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Commit | Line | Data |
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0b11dbf7 MY |
1 | # |
2 | # GPIO infrastructure and drivers | |
3 | # | |
4 | ||
5 | menu "GPIO Support" | |
6 | ||
da333ae7 MY |
7 | config DM_GPIO |
8 | bool "Enable Driver Model for GPIO drivers" | |
9 | depends on DM | |
10 | help | |
f94a1bed SG |
11 | Enable driver model for GPIO access. The standard GPIO |
12 | interface (gpio_get_value(), etc.) is then implemented by | |
13 | the GPIO uclass. Drivers provide methods to query the | |
14 | particular GPIOs that they provide. The uclass interface | |
15 | is defined in include/asm-generic/gpio.h. | |
606f7047 | 16 | |
88d5ecf4 TC |
17 | config ALTERA_PIO |
18 | bool "Altera PIO driver" | |
19 | depends on DM_GPIO | |
20 | help | |
21 | Select this to enable PIO for Altera devices. Please find | |
22 | details on the "Embedded Peripherals IP User Guide" of Altera. | |
23 | ||
e64bdb2f ÁFR |
24 | config BCM6345_GPIO |
25 | bool "BCM6345 GPIO driver" | |
26 | depends on DM_GPIO && ARCH_BMIPS | |
27 | help | |
28 | This driver supports the GPIO banks on BCM6345 SoCs. | |
29 | ||
e30a70c2 MV |
30 | config DWAPB_GPIO |
31 | bool "DWAPB GPIO driver" | |
32 | depends on DM && DM_GPIO | |
33 | default n | |
34 | help | |
35 | Support for the Designware APB GPIO driver. | |
36 | ||
5a07a5f9 WY |
37 | config AT91_GPIO |
38 | bool "AT91 PIO GPIO driver" | |
39 | depends on DM_GPIO | |
40 | default n | |
41 | help | |
42 | Say yes here to select AT91 PIO GPIO driver. AT91 PIO | |
43 | controller manages up to 32 fully programmable input/output | |
44 | lines. Each I/O line may be dedicated as a general-purpose | |
45 | I/O or be assigned to a function of an embedded peripheral. | |
46 | The assignment to a function of an embedded peripheral is | |
47 | the responsibility of AT91 Pinctrl driver. This driver is | |
48 | responsible for the general-purpose I/O. | |
49 | ||
2c62c56a WY |
50 | config ATMEL_PIO4 |
51 | bool "ATMEL PIO4 driver" | |
ee3311db | 52 | depends on DM_GPIO |
2c62c56a WY |
53 | default n |
54 | help | |
55 | Say yes here to support the Atmel PIO4 driver. | |
56 | The PIO4 is new version of Atmel PIO controller, which manages | |
57 | up to 128 fully programmable input/output lines. Each I/O line | |
58 | may be dedicated as a general purpose I/O or be assigned to | |
59 | a function of an embedded peripheral. | |
60 | ||
64b17977 SG |
61 | config INTEL_BROADWELL_GPIO |
62 | bool "Intel Broadwell GPIO driver" | |
63 | depends on DM | |
64 | help | |
65 | This driver supports Broadwell U devices which have an expanded | |
66 | GPIO feature set. The difference is large enough to merit a separate | |
67 | driver from the common Intel ICH6 driver. It supports a total of | |
68 | 95 GPIOs which can be configured from the device tree. | |
69 | ||
72436892 BM |
70 | config INTEL_ICH6_GPIO |
71 | bool "Intel ICH6 compatible legacy GPIO driver" | |
72 | depends on DM_GPIO | |
73 | help | |
74 | Say yes here to select Intel ICH6 compatible legacy GPIO driver. | |
75 | ||
d665eb61 PF |
76 | config IMX_RGPIO2P |
77 | bool "i.MX7ULP RGPIO2P driver" | |
78 | depends on DM | |
79 | default n | |
80 | help | |
81 | This driver supports i.MX7ULP Rapid GPIO2P controller. | |
82 | ||
3194c3cd EP |
83 | config HSDK_CREG_GPIO |
84 | bool "HSDK CREG GPIO griver" | |
d5fbcd57 | 85 | depends on DM_GPIO |
3194c3cd EP |
86 | default n |
87 | help | |
88 | This driver supports CREG GPIOs on Synopsys HSDK SOC. | |
89 | ||
606f7047 AA |
90 | config LPC32XX_GPIO |
91 | bool "LPC32XX GPIO driver" | |
92 | depends on DM | |
93 | default n | |
94 | help | |
95 | Support for the LPC32XX GPIO driver. | |
d79c50af | 96 | |
81a87e18 MK |
97 | config MSM_GPIO |
98 | bool "Qualcomm GPIO driver" | |
99 | depends on DM_GPIO | |
100 | default n | |
101 | help | |
102 | Support GPIO controllers on Qualcomm Snapdragon family of SoCs. | |
103 | This controller have single bank (default name "soc"), every | |
104 | gpio has it's own set of registers. | |
105 | Only simple GPIO operations are supported (get/set, change of | |
106 | direction and checking pin function). | |
107 | Supported devices: | |
108 | - APQ8016 | |
109 | - MSM8916 | |
110 | ||
8bbff6a7 AF |
111 | config MXC_GPIO |
112 | bool "Freescale/NXP MXC UART driver" | |
113 | help | |
114 | Support GPIO controllers on various i.MX platforms | |
115 | ||
29cb2b3b TR |
116 | config OMAP_GPIO |
117 | bool "TI OMAP GPIO driver" | |
118 | depends on ARCH_OMAP2PLUS | |
119 | default y | |
120 | help | |
121 | Support GPIO controllers on the TI OMAP3/4/5 and related (such as | |
122 | AM335x/AM43xx/AM57xx/DRA7xx/etc) families of SoCs. | |
123 | ||
0091362c SG |
124 | config CMD_PCA953X |
125 | bool "Enable the pca953x command" | |
126 | help | |
127 | Deprecated: This should be converted to driver model. | |
128 | ||
129 | This command provides access to a pca953x GPIO device using the | |
130 | legacy GPIO interface. Several subcommands are provided which mirror | |
131 | the standard 'gpio' command. It should use that instead. | |
132 | ||
120800df MK |
133 | config PM8916_GPIO |
134 | bool "Qualcomm PM8916 PMIC GPIO/keypad driver" | |
135 | depends on DM_GPIO && PMIC_PM8916 | |
136 | help | |
137 | Support for GPIO pins and power/reset buttons found on | |
138 | Qualcomm PM8916 PMIC. | |
139 | Default name for GPIO bank is "pm8916". | |
140 | Power and reset buttons are placed in "pm8916_key" bank and | |
141 | have gpio numbers 0 and 1 respectively. | |
142 | ||
5746b0df V |
143 | config PCF8575_GPIO |
144 | bool "PCF8575 I2C GPIO Expander driver" | |
145 | depends on DM_GPIO && DM_I2C | |
146 | help | |
147 | Support for PCF8575 I2C 16-bit GPIO expander. Most of these | |
148 | chips are from NXP and TI. | |
149 | ||
f5f69594 MV |
150 | config RCAR_GPIO |
151 | bool "Renesas RCar GPIO driver" | |
152 | depends on DM_GPIO && ARCH_RMOBILE | |
153 | help | |
154 | This driver supports the GPIO banks on Renesas RCar SoCs. | |
155 | ||
1f8f7730 SG |
156 | config ROCKCHIP_GPIO |
157 | bool "Rockchip GPIO driver" | |
158 | depends on DM_GPIO | |
159 | help | |
160 | Support GPIO access on Rockchip SoCs. The GPIOs are arranged into | |
161 | a number of banks (different for each SoC type) each with 32 GPIOs. | |
162 | The GPIOs for a device are defined in the device tree with one node | |
163 | for each bank. | |
164 | ||
d79c50af SG |
165 | config SANDBOX_GPIO |
166 | bool "Enable sandbox GPIO driver" | |
167 | depends on SANDBOX && DM && DM_GPIO | |
168 | help | |
169 | This driver supports some simulated GPIOs which can be adjusted | |
170 | using 'back door' functions like sandbox_gpio_set_value(). Then the | |
171 | GPIOs can be inspected through the normal get_get_value() | |
172 | interface. The purpose of this is to allow GPIOs to be used as | |
173 | normal in sandbox, perhaps with test code actually driving the | |
174 | behaviour of those GPIOs. | |
175 | ||
176 | config SANDBOX_GPIO_COUNT | |
177 | int "Number of sandbox GPIOs" | |
178 | depends on SANDBOX_GPIO | |
179 | default 128 | |
180 | help | |
181 | The sandbox driver can support any number of GPIOs. Generally these | |
182 | are specified using the device tree. But you can also have a number | |
183 | of 'anonymous' GPIOs that do not belong to any device or bank. | |
184 | Select a suitable value depending on your needs. | |
d348a943 | 185 | |
90d99e59 SG |
186 | config CMD_TCA642X |
187 | bool "tca642x - Command to access tca642x state" | |
188 | help | |
189 | DEPRECATED - This needs conversion to driver model | |
190 | ||
191 | This provides a way to looking at the pin state of this device. | |
192 | This mirrors the 'gpio' command and that should be used in preference | |
193 | to custom code. | |
194 | ||
601800be SW |
195 | config TEGRA_GPIO |
196 | bool "Tegra20..210 GPIO driver" | |
197 | depends on DM_GPIO | |
198 | help | |
199 | Support for the GPIO controller contained in NVIDIA Tegra20 through | |
200 | Tegra210. | |
201 | ||
074a1fdd SW |
202 | config TEGRA186_GPIO |
203 | bool "Tegra186 GPIO driver" | |
204 | depends on DM_GPIO | |
205 | help | |
206 | Support for the GPIO controller contained in NVIDIA Tegra186. This | |
207 | covers both the "main" and "AON" controller instances, even though | |
208 | they have slightly different register layout. | |
209 | ||
b9a66b63 MY |
210 | config GPIO_UNIPHIER |
211 | bool "UniPhier GPIO" | |
212 | depends on ARCH_UNIPHIER | |
213 | help | |
214 | Say yes here to support UniPhier GPIOs. | |
215 | ||
d348a943 BD |
216 | config VYBRID_GPIO |
217 | bool "Vybrid GPIO driver" | |
218 | depends on DM | |
219 | default n | |
220 | help | |
221 | Say yes here to support Vybrid vf610 GPIOs. | |
0b11dbf7 | 222 | |
386d934e PCM |
223 | config PIC32_GPIO |
224 | bool "Microchip PIC32 GPIO driver" | |
225 | depends on DM_GPIO && MACH_PIC32 | |
226 | default y | |
227 | help | |
228 | Say yes here to support Microchip PIC32 GPIOs. | |
229 | ||
77417102 VM |
230 | config STM32F7_GPIO |
231 | bool "ST STM32 GPIO driver" | |
232 | depends on DM_GPIO && STM32 | |
233 | default y | |
234 | help | |
235 | Device model driver support for STM32 GPIO controller. It should be | |
236 | usable on many stm32 families like stm32f4 & stm32H7. | |
237 | Tested on STM32F7. | |
238 | ||
704d9a64 SR |
239 | config MVEBU_GPIO |
240 | bool "Marvell MVEBU GPIO driver" | |
241 | depends on DM_GPIO && ARCH_MVEBU | |
242 | default y | |
243 | help | |
244 | Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs. | |
245 | ||
2978ae23 SDPP |
246 | config ZYNQ_GPIO |
247 | bool "Zynq GPIO driver" | |
251ab06d | 248 | depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP) |
2978ae23 SDPP |
249 | default y |
250 | help | |
251 | Supports GPIO access on Zynq SoC. | |
252 | ||
9300f711 PF |
253 | config DM_74X164 |
254 | bool "74x164 serial-in/parallel-out 8-bits shift register" | |
255 | depends on DM_GPIO | |
256 | help | |
257 | Driver for 74x164 compatible serial-in/parallel-out 8-outputs | |
258 | shift registers, such as 74lv165, 74hc595. | |
259 | This driver can be used to provide access to more gpio outputs. | |
260 | ||
03773439 PF |
261 | config DM_PCA953X |
262 | bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports" | |
263 | depends on DM_GPIO | |
264 | help | |
265 | Say yes here to provide access to several register-oriented | |
266 | SMBus I/O expanders, made mostly by NXP or TI. Compatible | |
267 | models include: | |
268 | ||
269 | 4 bits: pca9536, pca9537 | |
270 | ||
271 | 8 bits: max7310, max7315, pca6107, pca9534, pca9538, pca9554, | |
272 | pca9556, pca9557, pca9574, tca6408, xra1202 | |
273 | ||
274 | 16 bits: max7312, max7313, pca9535, pca9539, pca9555, pca9575, | |
275 | tca6416 | |
276 | ||
277 | 24 bits: tca6424 | |
278 | ||
279 | 40 bits: pca9505, pca9698 | |
280 | ||
281 | Now, max 24 bits chips and PCA953X compatible chips are | |
282 | supported | |
07d31f8f | 283 | |
3c216834 MS |
284 | config MPC8XXX_GPIO |
285 | bool "Freescale MPC8XXX GPIO driver" | |
07d31f8f | 286 | depends on DM_GPIO |
287 | help | |
3c216834 | 288 | This driver supports the built-in GPIO controller of MPC8XXX CPUs. |
07d31f8f | 289 | Each GPIO bank is identified by its own entry in the device tree, |
290 | i.e. | |
291 | ||
292 | gpio-controller@fc00 { | |
293 | #gpio-cells = <2>; | |
294 | compatible = "fsl,pq3-gpio"; | |
295 | reg = <0xfc00 0x100> | |
296 | } | |
297 | ||
298 | By default, each bank is assumed to have 32 GPIOs, but the ngpios | |
299 | setting is honored, so the number of GPIOs for each bank is | |
300 | configurable to match the actual GPIO count of the SoC (e.g. the | |
301 | 32/32/23 banks of the P1022 SoC). | |
302 | ||
51781783 | 303 | Aside from the standard functions of input/output mode, and output |
304 | value setting, the open-drain feature, which can configure individual | |
305 | GPIOs to work as open-drain outputs, is supported. | |
0b11dbf7 | 306 | endmenu |