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gpio: uniphier: use devm_get_addr() to get base address
[people/ms/u-boot.git] / drivers / gpio / altera_pio.c
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03d67e12 1/*
88d5ecf4 2 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
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3 * Copyright (C) 2011 Missing Link Electronics
4 * Joachim Foerster <joachim@missinglinkelectronics.com>
5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8#include <common.h>
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9#include <dm.h>
10#include <errno.h>
11#include <malloc.h>
12#include <fdtdec.h>
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13#include <asm/io.h>
14#include <asm/gpio.h>
15
88d5ecf4 16DECLARE_GLOBAL_DATA_PTR;
03d67e12 17
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18struct altera_pio_regs {
19 u32 data; /* Data register */
20 u32 direction; /* Direction register */
21};
03d67e12 22
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23struct altera_pio_platdata {
24 struct altera_pio_regs *regs;
25 int gpio_count;
26 const char *bank_name;
27};
03d67e12 28
88d5ecf4 29static int altera_pio_direction_input(struct udevice *dev, unsigned pin)
03d67e12 30{
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31 struct altera_pio_platdata *plat = dev_get_platdata(dev);
32 struct altera_pio_regs *const regs = plat->regs;
03d67e12 33
88d5ecf4 34 clrbits_le32(&regs->direction, 1 << pin);
03d67e12 35
88d5ecf4 36 return 0;
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37}
38
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39static int altera_pio_direction_output(struct udevice *dev, unsigned pin,
40 int val)
03d67e12 41{
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42 struct altera_pio_platdata *plat = dev_get_platdata(dev);
43 struct altera_pio_regs *const regs = plat->regs;
03d67e12 44
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45 if (val)
46 setbits_le32(&regs->data, 1 << pin);
47 else
48 clrbits_le32(&regs->data, 1 << pin);
49 /* change the data first, then the direction. to avoid glitch */
50 setbits_le32(&regs->direction, 1 << pin);
03d67e12 51
88d5ecf4 52 return 0;
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53}
54
88d5ecf4 55static int altera_pio_get_value(struct udevice *dev, unsigned pin)
03d67e12 56{
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57 struct altera_pio_platdata *plat = dev_get_platdata(dev);
58 struct altera_pio_regs *const regs = plat->regs;
03d67e12 59
88d5ecf4 60 return readl(&regs->data) & (1 << pin);
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61}
62
63
88d5ecf4 64static int altera_pio_set_value(struct udevice *dev, unsigned pin, int val)
03d67e12 65{
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66 struct altera_pio_platdata *plat = dev_get_platdata(dev);
67 struct altera_pio_regs *const regs = plat->regs;
03d67e12 68
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69 if (val)
70 setbits_le32(&regs->data, 1 << pin);
71 else
72 clrbits_le32(&regs->data, 1 << pin);
03d67e12 73
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74 return 0;
75}
76
88d5ecf4 77static int altera_pio_probe(struct udevice *dev)
03d67e12 78{
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79 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
80 struct altera_pio_platdata *plat = dev_get_platdata(dev);
03d67e12 81
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82 uc_priv->gpio_count = plat->gpio_count;
83 uc_priv->bank_name = plat->bank_name;
03d67e12 84
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85 return 0;
86}
87
88d5ecf4 88static int altera_pio_ofdata_to_platdata(struct udevice *dev)
03d67e12 89{
88d5ecf4 90 struct altera_pio_platdata *plat = dev_get_platdata(dev);
03d67e12 91
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92 plat->regs = map_physmem(dev_get_addr(dev),
93 sizeof(struct altera_pio_regs),
94 MAP_NOCACHE);
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95 plat->gpio_count = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
96 "altr,gpio-bank-width", 32);
97 plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset,
98 "gpio-bank-name", NULL);
03d67e12 99
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100 return 0;
101}
102
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103static const struct dm_gpio_ops altera_pio_ops = {
104 .direction_input = altera_pio_direction_input,
105 .direction_output = altera_pio_direction_output,
106 .get_value = altera_pio_get_value,
107 .set_value = altera_pio_set_value,
108};
109
110static const struct udevice_id altera_pio_ids[] = {
111 { .compatible = "altr,pio-1.0" },
112 { }
113};
114
115U_BOOT_DRIVER(altera_pio) = {
116 .name = "altera_pio",
117 .id = UCLASS_GPIO,
118 .of_match = altera_pio_ids,
119 .ops = &altera_pio_ops,
120 .ofdata_to_platdata = altera_pio_ofdata_to_platdata,
121 .platdata_auto_alloc_size = sizeof(struct altera_pio_platdata),
122 .probe = altera_pio_probe,
123};