[thirdparty/kernel/stable.git] / drivers / gpio / gpio-adp5588.c

/*
 * GPIO Chip driver for Analog Devices
 * ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
 *
 * Copyright 2009-2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/i2c.h>
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/of_device.h>

#include <linux/platform_data/adp5588.h>

#define DRV_NAME	"adp5588-gpio"

/*
 * Early pre 4.0 Silicon required to delay readout by at least 25ms,
 * since the Event Counter Register updated 25ms after the interrupt
 * asserted.
 */
#define WA_DELAYED_READOUT_REVID(rev)	((rev) < 4)

struct adp5588_gpio {
	struct i2c_client *client;
	struct gpio_chip gpio_chip;
	struct mutex lock;	/* protect cached dir, dat_out */
	/* protect serialized access to the interrupt controller bus */
	struct mutex irq_lock;
	uint8_t dat_out[3];
	uint8_t dir[3];
	uint8_t int_lvl_low[3];
	uint8_t int_lvl_high[3];
	uint8_t int_en[3];
	uint8_t irq_mask[3];
	uint8_t int_input_en[3];
};

static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
{
	int ret = i2c_smbus_read_byte_data(client, reg);

	if (ret < 0)
		dev_err(&client->dev, "Read Error\n");

	return ret;
}

static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
{
	int ret = i2c_smbus_write_byte_data(client, reg, val);

	if (ret < 0)
		dev_err(&client->dev, "Write Error\n");

	return ret;
}

static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
{
	struct adp5588_gpio *dev = gpiochip_get_data(chip);
	unsigned bank = ADP5588_BANK(off);
	unsigned bit = ADP5588_BIT(off);
	int val;

	mutex_lock(&dev->lock);

	if (dev->dir[bank] & bit)
		val = dev->dat_out[bank];
	else
		val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);

	mutex_unlock(&dev->lock);

	return !!(val & bit);
}

static void adp5588_gpio_set_value(struct gpio_chip *chip,
				   unsigned off, int val)
{
	unsigned bank, bit;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
			   dev->dat_out[bank]);
	mutex_unlock(&dev->lock);
}

static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
{
	int ret;
	unsigned bank;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] &= ~ADP5588_BIT(off);
	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

static int adp5588_gpio_direction_output(struct gpio_chip *chip,
					 unsigned off, int val)
{
	int ret;
	unsigned bank, bit;
	struct adp5588_gpio *dev = gpiochip_get_data(chip);

	bank = ADP5588_BANK(off);
	bit = ADP5588_BIT(off);

	mutex_lock(&dev->lock);
	dev->dir[bank] |= bit;

	if (val)
		dev->dat_out[bank] |= bit;
	else
		dev->dat_out[bank] &= ~bit;

	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
				 dev->dat_out[bank]);
	ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
				 dev->dir[bank]);
	mutex_unlock(&dev->lock);

	return ret;
}

#ifdef CONFIG_GPIO_ADP5588_IRQ

static void adp5588_irq_bus_lock(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);

	mutex_lock(&dev->irq_lock);
}

 /*
  * genirq core code can issue chip->mask/unmask from atomic context.
  * This doesn't work for slow busses where an access needs to sleep.
  * bus_sync_unlock() is therefore called outside the atomic context,
  * syncs the current irq mask state with the slow external controller
  * and unlocks the bus.
  */

static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);
	int i;

	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		if (dev->int_input_en[i]) {
			mutex_lock(&dev->lock);
			dev->dir[i] &= ~dev->int_input_en[i];
			dev->int_input_en[i] = 0;
			adp5588_gpio_write(dev->client, GPIO_DIR1 + i,
					   dev->dir[i]);
			mutex_unlock(&dev->lock);
		}

		if (dev->int_en[i] ^ dev->irq_mask[i]) {
			dev->int_en[i] = dev->irq_mask[i];
			adp5588_gpio_write(dev->client, GPI_EM1 + i,
					   dev->int_en[i]);
		}
	}

	mutex_unlock(&dev->irq_lock);
}

static void adp5588_irq_mask(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);

	dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq);
}

static void adp5588_irq_unmask(struct irq_data *d)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);

	dev->irq_mask[ADP5588_BANK(d->hwirq)] |= ADP5588_BIT(d->hwirq);
}

static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
{
	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	struct adp5588_gpio *dev = gpiochip_get_data(gc);
	uint16_t gpio = d->hwirq;
	unsigned bank, bit;

	bank = ADP5588_BANK(gpio);
	bit = ADP5588_BIT(gpio);

	dev->int_lvl_low[bank] &= ~bit;
	dev->int_lvl_high[bank] &= ~bit;

	if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_HIGH)
		dev->int_lvl_high[bank] |= bit;

	if (type & IRQ_TYPE_EDGE_BOTH || type & IRQ_TYPE_LEVEL_LOW)
		dev->int_lvl_low[bank] |= bit;

	dev->int_input_en[bank] |= bit;

	return 0;
}

static struct irq_chip adp5588_irq_chip = {
	.name			= "adp5588",
	.irq_mask		= adp5588_irq_mask,
	.irq_unmask		= adp5588_irq_unmask,
	.irq_bus_lock		= adp5588_irq_bus_lock,
	.irq_bus_sync_unlock	= adp5588_irq_bus_sync_unlock,
	.irq_set_type		= adp5588_irq_set_type,
};

static irqreturn_t adp5588_irq_handler(int irq, void *devid)
{
	struct adp5588_gpio *dev = devid;
	int status = adp5588_gpio_read(dev->client, INT_STAT);

	if (status & ADP5588_KE_INT) {
		int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT);

		if (ev_cnt > 0) {
			int i;

			for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) {
				int key = adp5588_gpio_read(dev->client,
							    Key_EVENTA + i);
				/* GPIN events begin at 97,
				 * bit 7 indicates logic level
				 */
				int gpio = (key & 0x7f) - 97;
				int lvl = key & (1 << 7);
				int bank = ADP5588_BANK(gpio);
				int bit = ADP5588_BIT(gpio);

				if ((lvl && dev->int_lvl_high[bank] & bit) ||
				    (!lvl && dev->int_lvl_low[bank] & bit))
					handle_nested_irq(irq_find_mapping(
					      dev->gpio_chip.irq.domain, gpio));
			}
		}
	}

	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */

	return IRQ_HANDLED;
}

static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	int ret;
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	int irq_base = pdata ? pdata->irq_base : 0;

	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */

	mutex_init(&dev->irq_lock);

	ret = devm_request_threaded_irq(&client->dev, client->irq,
					NULL, adp5588_irq_handler, IRQF_ONESHOT
					| IRQF_TRIGGER_FALLING | IRQF_SHARED,
					dev_name(&client->dev), dev);
	if (ret) {
		dev_err(&client->dev, "failed to request irq %d\n",
			client->irq);
		return ret;
	}
	ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
					  &adp5588_irq_chip, irq_base,
					  handle_simple_irq,
					  IRQ_TYPE_NONE);
	if (ret) {
		dev_err(&client->dev,
			"could not connect irqchip to gpiochip\n");
		return ret;
	}
	gpiochip_set_nested_irqchip(&dev->gpio_chip,
				    &adp5588_irq_chip,
				    client->irq);

	adp5588_gpio_write(client, CFG,
		ADP5588_AUTO_INC | ADP5588_INT_CFG | ADP5588_KE_IEN);

	return 0;
}

#else
static int adp5588_irq_setup(struct adp5588_gpio *dev)
{
	struct i2c_client *client = dev->client;
	dev_warn(&client->dev, "interrupt support not compiled in\n");

	return 0;
}

#endif /* CONFIG_GPIO_ADP5588_IRQ */

static int adp5588_gpio_probe(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev;
	struct gpio_chip *gc;
	int ret, i, revid;
	unsigned int pullup_dis_mask = 0;

	if (!i2c_check_functionality(client->adapter,
					I2C_FUNC_SMBUS_BYTE_DATA)) {
		dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
		return -EIO;
	}

	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
	if (!dev)
		return -ENOMEM;

	dev->client = client;

	gc = &dev->gpio_chip;
	gc->direction_input = adp5588_gpio_direction_input;
	gc->direction_output = adp5588_gpio_direction_output;
	gc->get = adp5588_gpio_get_value;
	gc->set = adp5588_gpio_set_value;
	gc->can_sleep = true;
	gc->base = -1;
	gc->parent = &client->dev;

	if (pdata) {
		gc->base = pdata->gpio_start;
		gc->names = pdata->names;
		pullup_dis_mask = pdata->pullup_dis_mask;
	}

	gc->ngpio = ADP5588_MAXGPIO;
	gc->label = client->name;
	gc->owner = THIS_MODULE;

	mutex_init(&dev->lock);

	ret = adp5588_gpio_read(dev->client, DEV_ID);
	if (ret < 0)
		return ret;

	revid = ret & ADP5588_DEVICE_ID_MASK;

	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
		dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
		dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
		ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
		ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
				(pullup_dis_mask >> (8 * i)) & 0xFF);
		ret |= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
		if (ret)
			return ret;
	}

	if (client->irq) {
		if (WA_DELAYED_READOUT_REVID(revid)) {
			dev_warn(&client->dev, "GPIO int not supported\n");
		} else {
			ret = adp5588_irq_setup(dev);
			if (ret)
				return ret;
		}
	}

	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
	if (ret)
		return ret;

	if (pdata && pdata->setup) {
		ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
		if (ret < 0)
			dev_warn(&client->dev, "setup failed, %d\n", ret);
	}

	i2c_set_clientdata(client, dev);

	return 0;
}

static int adp5588_gpio_remove(struct i2c_client *client)
{
	struct adp5588_gpio_platform_data *pdata =
			dev_get_platdata(&client->dev);
	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	int ret;

	if (pdata && pdata->teardown) {
		ret = pdata->teardown(client,
				      dev->gpio_chip.base, dev->gpio_chip.ngpio,
				      pdata->context);
		if (ret < 0) {
			dev_err(&client->dev, "teardown failed %d\n", ret);
			return ret;
		}
	}

	if (dev->client->irq)
		free_irq(dev->client->irq, dev);

	return 0;
}

static const struct i2c_device_id adp5588_gpio_id[] = {
	{DRV_NAME, 0},
	{}
};
MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);

#ifdef CONFIG_OF
static const struct of_device_id adp5588_gpio_of_id[] = {
	{ .compatible = "adi," DRV_NAME, },
	{},
};
MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id);
#endif

static struct i2c_driver adp5588_gpio_driver = {
	.driver = {
		.name = DRV_NAME,
		.of_match_table = of_match_ptr(adp5588_gpio_of_id),
	},
	.probe_new = adp5588_gpio_probe,
	.remove = adp5588_gpio_remove,
	.id_table = adp5588_gpio_id,
};

module_i2c_driver(adp5588_gpio_driver);

MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
MODULE_DESCRIPTION("GPIO ADP5588 Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
80884094 MH	1	/*
80884094 MH	2	* GPIO Chip driver for Analog Devices
459773ae	3	* ADP5588/ADP5587 I/O Expander and QWERTY Keypad Controller
80884094	4	*
459773ae	5	* Copyright 2009-2010 Analog Devices Inc.
80884094 MH	6	*
	7	* Licensed under the GPL-2 or later.
	8	*/
	9
	10	#include <linux/module.h>
	11	#include <linux/kernel.h>
5a0e3ad6	12	#include <linux/slab.h>
80884094 MH	13	#include <linux/init.h>
80884094 MH	14	#include <linux/i2c.h>
d543668a	15	#include <linux/gpio/driver.h>
459773ae MH	16	#include <linux/interrupt.h>
459773ae MH	17	#include <linux/irq.h>
9f22af11	18	#include <linux/of_device.h>
80884094	19
c1a46340	20	#include <linux/platform_data/adp5588.h>
80884094	21
459773ae MH	22	#define DRV_NAME "adp5588-gpio"
	23
	24	/*
	25	* Early pre 4.0 Silicon required to delay readout by at least 25ms,
	26	* since the Event Counter Register updated 25ms after the interrupt
	27	* asserted.
	28	*/
	29	#define WA_DELAYED_READOUT_REVID(rev) ((rev) < 4)
80884094 MH	30
	31	struct adp5588_gpio {
	32	struct i2c_client *client;
	33	struct gpio_chip gpio_chip;
	34	struct mutex lock; /* protect cached dir, dat_out */
459773ae MH	35	/* protect serialized access to the interrupt controller bus */
459773ae MH	36	struct mutex irq_lock;
80884094 MH	37	uint8_t dat_out[3];
80884094 MH	38	uint8_t dir[3];
5d643eda NV	39	uint8_t int_lvl_low[3];
5d643eda NV	40	uint8_t int_lvl_high[3];
459773ae MH	41	uint8_t int_en[3];
459773ae MH	42	uint8_t irq_mask[3];
6537886c	43	uint8_t int_input_en[3];
80884094 MH	44	};
	45
	46	static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
	47	{
	48	int ret = i2c_smbus_read_byte_data(client, reg);
	49
	50	if (ret < 0)
	51	dev_err(&client->dev, "Read Error\n");
	52
	53	return ret;
	54	}
	55
	56	static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
	57	{
	58	int ret = i2c_smbus_write_byte_data(client, reg, val);
	59
	60	if (ret < 0)
	61	dev_err(&client->dev, "Write Error\n");
	62
	63	return ret;
	64	}
	65
	66	static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
	67	{
f69255ce	68	struct adp5588_gpio *dev = gpiochip_get_data(chip);
992196f2 JFD	69	unsigned bank = ADP5588_BANK(off);
	70	unsigned bit = ADP5588_BIT(off);
	71	int val;
80884094	72
992196f2 JFD	73	mutex_lock(&dev->lock);
	74
	75	if (dev->dir[bank] & bit)
	76	val = dev->dat_out[bank];
	77	else
	78	val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank);
	79
	80	mutex_unlock(&dev->lock);
	81
	82	return !!(val & bit);
80884094 MH	83	}
	84
	85	static void adp5588_gpio_set_value(struct gpio_chip *chip,
	86	unsigned off, int val)
	87	{
	88	unsigned bank, bit;
f69255ce	89	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	90
459773ae MH	91	bank = ADP5588_BANK(off);
459773ae MH	92	bit = ADP5588_BIT(off);
80884094 MH	93
	94	mutex_lock(&dev->lock);
	95	if (val)
	96	dev->dat_out[bank] \|= bit;
	97	else
	98	dev->dat_out[bank] &= ~bit;
	99
	100	adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	101	dev->dat_out[bank]);
	102	mutex_unlock(&dev->lock);
	103	}
	104
	105	static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
	106	{
	107	int ret;
	108	unsigned bank;
f69255ce	109	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	110
459773ae	111	bank = ADP5588_BANK(off);
80884094 MH	112
80884094 MH	113	mutex_lock(&dev->lock);
459773ae	114	dev->dir[bank] &= ~ADP5588_BIT(off);
80884094 MH	115	ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
	116	mutex_unlock(&dev->lock);
	117
	118	return ret;
	119	}
	120
	121	static int adp5588_gpio_direction_output(struct gpio_chip *chip,
	122	unsigned off, int val)
	123	{
	124	int ret;
	125	unsigned bank, bit;
f69255ce	126	struct adp5588_gpio *dev = gpiochip_get_data(chip);
80884094	127
459773ae MH	128	bank = ADP5588_BANK(off);
459773ae MH	129	bit = ADP5588_BIT(off);
80884094 MH	130
	131	mutex_lock(&dev->lock);
	132	dev->dir[bank] \|= bit;
	133
	134	if (val)
	135	dev->dat_out[bank] \|= bit;
	136	else
	137	dev->dat_out[bank] &= ~bit;
	138
	139	ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
	140	dev->dat_out[bank]);
	141	ret \|= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
	142	dev->dir[bank]);
	143	mutex_unlock(&dev->lock);
	144
	145	return ret;
	146	}
	147
459773ae	148	#ifdef CONFIG_GPIO_ADP5588_IRQ
459773ae	149
12401eed	150	static void adp5588_irq_bus_lock(struct irq_data *d)
459773ae	151	{
9f22af11 NV	152	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	153	struct adp5588_gpio *dev = gpiochip_get_data(gc);
12401eed	154
459773ae MH	155	mutex_lock(&dev->irq_lock);
	156	}
	157
	158	/*
	159	* genirq core code can issue chip->mask/unmask from atomic context.
	160	* This doesn't work for slow busses where an access needs to sleep.
	161	* bus_sync_unlock() is therefore called outside the atomic context,
	162	* syncs the current irq mask state with the slow external controller
	163	* and unlocks the bus.
	164	*/
	165
12401eed	166	static void adp5588_irq_bus_sync_unlock(struct irq_data *d)
459773ae	167	{
9f22af11 NV	168	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	169	struct adp5588_gpio *dev = gpiochip_get_data(gc);
459773ae MH	170	int i;
459773ae MH	171
6537886c MH	172	for (i = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
	173	if (dev->int_input_en[i]) {
	174	mutex_lock(&dev->lock);
	175	dev->dir[i] &= ~dev->int_input_en[i];
	176	dev->int_input_en[i] = 0;
	177	adp5588_gpio_write(dev->client, GPIO_DIR1 + i,
	178	dev->dir[i]);
	179	mutex_unlock(&dev->lock);
	180	}
	181
459773ae MH	182	if (dev->int_en[i] ^ dev->irq_mask[i]) {
459773ae MH	183	dev->int_en[i] = dev->irq_mask[i];
5d643eda	184	adp5588_gpio_write(dev->client, GPI_EM1 + i,
459773ae MH	185	dev->int_en[i]);
459773ae MH	186	}
6537886c	187	}
459773ae MH	188
	189	mutex_unlock(&dev->irq_lock);
	190	}
	191
12401eed	192	static void adp5588_irq_mask(struct irq_data *d)
459773ae	193	{
9f22af11 NV	194	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	195	struct adp5588_gpio *dev = gpiochip_get_data(gc);
459773ae	196
9f22af11	197	dev->irq_mask[ADP5588_BANK(d->hwirq)] &= ~ADP5588_BIT(d->hwirq);
459773ae MH	198	}
459773ae MH	199
12401eed	200	static void adp5588_irq_unmask(struct irq_data *d)
459773ae	201	{
9f22af11 NV	202	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
9f22af11 NV	203	struct adp5588_gpio *dev = gpiochip_get_data(gc);
459773ae	204
9f22af11	205	dev->irq_mask[ADP5588_BANK(d->hwirq)] \|= ADP5588_BIT(d->hwirq);
459773ae MH	206	}
459773ae MH	207
12401eed	208	static int adp5588_irq_set_type(struct irq_data *d, unsigned int type)
459773ae	209	{
9f22af11 NV	210	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
	211	struct adp5588_gpio *dev = gpiochip_get_data(gc);
	212	uint16_t gpio = d->hwirq;
459773ae MH	213	unsigned bank, bit;
459773ae MH	214
459773ae MH	215	bank = ADP5588_BANK(gpio);
	216	bit = ADP5588_BIT(gpio);
	217
5d643eda NV	218	dev->int_lvl_low[bank] &= ~bit;
	219	dev->int_lvl_high[bank] &= ~bit;
	220
	221	if (type & IRQ_TYPE_EDGE_BOTH \|\| type & IRQ_TYPE_LEVEL_HIGH)
	222	dev->int_lvl_high[bank] \|= bit;
	223
	224	if (type & IRQ_TYPE_EDGE_BOTH \|\| type & IRQ_TYPE_LEVEL_LOW)
	225	dev->int_lvl_low[bank] \|= bit;
459773ae	226
6537886c	227	dev->int_input_en[bank] \|= bit;
459773ae MH	228
	229	return 0;
	230	}
	231
	232	static struct irq_chip adp5588_irq_chip = {
	233	.name = "adp5588",
12401eed LB	234	.irq_mask = adp5588_irq_mask,
	235	.irq_unmask = adp5588_irq_unmask,
	236	.irq_bus_lock = adp5588_irq_bus_lock,
	237	.irq_bus_sync_unlock = adp5588_irq_bus_sync_unlock,
	238	.irq_set_type = adp5588_irq_set_type,
459773ae MH	239	};
459773ae MH	240
459773ae MH	241	static irqreturn_t adp5588_irq_handler(int irq, void *devid)
	242	{
	243	struct adp5588_gpio *dev = devid;
5d643eda NV	244	int status = adp5588_gpio_read(dev->client, INT_STAT);
	245
	246	if (status & ADP5588_KE_INT) {
	247	int ev_cnt = adp5588_gpio_read(dev->client, KEY_LCK_EC_STAT);
	248
	249	if (ev_cnt > 0) {
	250	int i;
	251
	252	for (i = 0; i < (ev_cnt & ADP5588_KEC); i++) {
	253	int key = adp5588_gpio_read(dev->client,
	254	Key_EVENTA + i);
	255	/* GPIN events begin at 97,
	256	* bit 7 indicates logic level
	257	*/
	258	int gpio = (key & 0x7f) - 97;
	259	int lvl = key & (1 << 7);
	260	int bank = ADP5588_BANK(gpio);
	261	int bit = ADP5588_BIT(gpio);
	262
	263	if ((lvl && dev->int_lvl_high[bank] & bit) \|\|
	264	(!lvl && dev->int_lvl_low[bank] & bit))
	265	handle_nested_irq(irq_find_mapping(
	266	dev->gpio_chip.irq.domain, gpio));
459773ae MH	267	}
	268	}
	269	}
	270
	271	adp5588_gpio_write(dev->client, INT_STAT, status); /* Status is W1C */
	272
	273	return IRQ_HANDLED;
	274	}
	275
	276	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	277	{
	278	struct i2c_client *client = dev->client;
9f22af11	279	int ret;
e56aee18 JH	280	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	281	dev_get_platdata(&client->dev);
9f22af11	282	int irq_base = pdata ? pdata->irq_base : 0;
459773ae MH	283
	284	adp5588_gpio_write(client, CFG, ADP5588_AUTO_INC);
	285	adp5588_gpio_write(client, INT_STAT, -1); /* status is W1C */
459773ae	286
459773ae MH	287	mutex_init(&dev->irq_lock);
459773ae MH	288
9f22af11 NV	289	ret = devm_request_threaded_irq(&client->dev, client->irq,
	290	NULL, adp5588_irq_handler, IRQF_ONESHOT
	291	\| IRQF_TRIGGER_FALLING \| IRQF_SHARED,
	292	dev_name(&client->dev), dev);
459773ae MH	293	if (ret) {
	294	dev_err(&client->dev, "failed to request irq %d\n",
	295	client->irq);
9f22af11 NV	296	return ret;
	297	}
	298	ret = gpiochip_irqchip_add_nested(&dev->gpio_chip,
	299	&adp5588_irq_chip, irq_base,
	300	handle_simple_irq,
	301	IRQ_TYPE_NONE);
	302	if (ret) {
	303	dev_err(&client->dev,
	304	"could not connect irqchip to gpiochip\n");
	305	return ret;
459773ae	306	}
9f22af11 NV	307	gpiochip_set_nested_irqchip(&dev->gpio_chip,
	308	&adp5588_irq_chip,
	309	client->irq);
459773ae	310
459773ae	311	adp5588_gpio_write(client, CFG,
5d643eda	312	ADP5588_AUTO_INC \| ADP5588_INT_CFG \| ADP5588_KE_IEN);
459773ae MH	313
459773ae MH	314	return 0;
459773ae MH	315	}
	316
	317	#else
	318	static int adp5588_irq_setup(struct adp5588_gpio *dev)
	319	{
	320	struct i2c_client *client = dev->client;
	321	dev_warn(&client->dev, "interrupt support not compiled in\n");
	322
	323	return 0;
	324	}
	325
459773ae MH	326	#endif /* CONFIG_GPIO_ADP5588_IRQ */
459773ae MH	327
9f22af11	328	static int adp5588_gpio_probe(struct i2c_client *client)
80884094	329	{
e56aee18 JH	330	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	331	dev_get_platdata(&client->dev);
80884094 MH	332	struct adp5588_gpio *dev;
	333	struct gpio_chip *gc;
	334	int ret, i, revid;
9f22af11	335	unsigned int pullup_dis_mask = 0;
80884094 MH	336
	337	if (!i2c_check_functionality(client->adapter,
	338	I2C_FUNC_SMBUS_BYTE_DATA)) {
	339	dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
	340	return -EIO;
	341	}
	342
7898b31e	343	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
afeb7b45	344	if (!dev)
80884094	345	return -ENOMEM;
80884094 MH	346
	347	dev->client = client;
	348
	349	gc = &dev->gpio_chip;
	350	gc->direction_input = adp5588_gpio_direction_input;
	351	gc->direction_output = adp5588_gpio_direction_output;
	352	gc->get = adp5588_gpio_get_value;
	353	gc->set = adp5588_gpio_set_value;
9fb1f39e	354	gc->can_sleep = true;
9f22af11 NV	355	gc->base = -1;
	356	gc->parent = &client->dev;
	357
	358	if (pdata) {
	359	gc->base = pdata->gpio_start;
	360	gc->names = pdata->names;
	361	pullup_dis_mask = pdata->pullup_dis_mask;
	362	}
80884094	363
459773ae	364	gc->ngpio = ADP5588_MAXGPIO;
80884094 MH	365	gc->label = client->name;
	366	gc->owner = THIS_MODULE;
	367
	368	mutex_init(&dev->lock);
	369
80884094 MH	370	ret = adp5588_gpio_read(dev->client, DEV_ID);
80884094 MH	371	if (ret < 0)
9f22af11	372	return ret;
80884094 MH	373
	374	revid = ret & ADP5588_DEVICE_ID_MASK;
	375
459773ae	376	for (i = 0, ret = 0; i <= ADP5588_BANK(ADP5588_MAXGPIO); i++) {
80884094 MH	377	dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
	378	dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
	379	ret \|= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
	380	ret \|= adp5588_gpio_write(client, GPIO_PULL1 + i,
9f22af11	381	(pullup_dis_mask >> (8 * i)) & 0xFF);
459773ae	382	ret \|= adp5588_gpio_write(client, GPIO_INT_EN1 + i, 0);
80884094	383	if (ret)
9f22af11	384	return ret;
80884094 MH	385	}
80884094 MH	386
9f22af11	387	if (client->irq) {
459773ae MH	388	if (WA_DELAYED_READOUT_REVID(revid)) {
	389	dev_warn(&client->dev, "GPIO int not supported\n");
	390	} else {
	391	ret = adp5588_irq_setup(dev);
	392	if (ret)
9f22af11	393	return ret;
459773ae MH	394	}
	395	}
	396
7c263fe0	397	ret = devm_gpiochip_add_data(&client->dev, &dev->gpio_chip, dev);
80884094	398	if (ret)
9f22af11	399	return ret;
80884094	400
9f22af11	401	if (pdata && pdata->setup) {
80884094 MH	402	ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
	403	if (ret < 0)
	404	dev_warn(&client->dev, "setup failed, %d\n", ret);
	405	}
	406
	407	i2c_set_clientdata(client, dev);
459773ae	408
80884094	409	return 0;
80884094 MH	410	}
80884094 MH	411
206210ce	412	static int adp5588_gpio_remove(struct i2c_client *client)
80884094	413	{
e56aee18 JH	414	struct adp5588_gpio_platform_data *pdata =
e56aee18 JH	415	dev_get_platdata(&client->dev);
80884094 MH	416	struct adp5588_gpio *dev = i2c_get_clientdata(client);
	417	int ret;
	418
9f22af11	419	if (pdata && pdata->teardown) {
80884094 MH	420	ret = pdata->teardown(client,
	421	dev->gpio_chip.base, dev->gpio_chip.ngpio,
	422	pdata->context);
	423	if (ret < 0) {
	424	dev_err(&client->dev, "teardown failed %d\n", ret);
	425	return ret;
	426	}
	427	}
	428
9f22af11	429	if (dev->client->irq)
459773ae MH	430	free_irq(dev->client->irq, dev);
459773ae MH	431
80884094 MH	432	return 0;
	433	}
	434
	435	static const struct i2c_device_id adp5588_gpio_id[] = {
	436	{DRV_NAME, 0},
	437	{}
	438	};
80884094 MH	439	MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
80884094 MH	440
9f22af11 NV	441	#ifdef CONFIG_OF
	442	static const struct of_device_id adp5588_gpio_of_id[] = {
	443	{ .compatible = "adi," DRV_NAME, },
	444	{},
	445	};
	446	MODULE_DEVICE_TABLE(of, adp5588_gpio_of_id);
	447	#endif
	448
80884094 MH	449	static struct i2c_driver adp5588_gpio_driver = {
80884094 MH	450	.driver = {
9f22af11 NV	451	.name = DRV_NAME,
	452	.of_match_table = of_match_ptr(adp5588_gpio_of_id),
	453	},
	454	.probe_new = adp5588_gpio_probe,
8283c4ff	455	.remove = adp5588_gpio_remove,
80884094 MH	456	.id_table = adp5588_gpio_id,
	457	};
	458
c8554d32	459	module_i2c_driver(adp5588_gpio_driver);
80884094	460
be887843	461	MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
80884094 MH	462	MODULE_DESCRIPTION("GPIO ADP5588 Driver");
80884094 MH	463	MODULE_LICENSE("GPL");