[people/ms/linux.git] / drivers / gpu / drm / amd / display / dc / dc_link.h

/*
 * Copyright 2012-14 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef DC_LINK_H_
#define DC_LINK_H_

#include "dc.h"
#include "dc_types.h"
#include "grph_object_defs.h"

struct link_resource;

enum dc_link_fec_state {
	dc_link_fec_not_ready,
	dc_link_fec_ready,
	dc_link_fec_enabled
};

struct dc_link_status {
	bool link_active;
	struct dpcd_caps *dpcd_caps;
};

struct dprx_states {
	bool cable_id_written;
};

/* DP MST stream allocation (payload bandwidth number) */
struct link_mst_stream_allocation {
	/* DIG front */
	const struct stream_encoder *stream_enc;
	/* HPO DP Stream Encoder */
	const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
	/* associate DRM payload table with DC stream encoder */
	uint8_t vcp_id;
	/* number of slots required for the DP stream in transport packet */
	uint8_t slot_count;
};

/* DP MST stream allocation table */
struct link_mst_stream_allocation_table {
	/* number of DP video streams */
	int stream_count;
	/* array of stream allocations */
	struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
};

struct edp_trace_power_timestamps {
	uint64_t poweroff;
	uint64_t poweron;
};

struct dp_trace_lt_counts {
	unsigned int total;
	unsigned int fail;
};

struct dp_trace_lt {
	struct dp_trace_lt_counts counts;
	struct dp_trace_timestamps {
		unsigned long long start;
		unsigned long long end;
	} timestamps;
	enum link_training_result result;
	bool is_logged;
};

struct dp_trace {
	struct dp_trace_lt detect_lt_trace;
	struct dp_trace_lt commit_lt_trace;
	unsigned int link_loss_count;
	bool is_initialized;
	struct edp_trace_power_timestamps edp_trace_power_timestamps;
};

/* PSR feature flags */
struct psr_settings {
	bool psr_feature_enabled;		// PSR is supported by sink
	bool psr_allow_active;			// PSR is currently active
	enum dc_psr_version psr_version;		// Internal PSR version, determined based on DPCD
	bool psr_vtotal_control_support;	// Vtotal control is supported by sink

	/* These parameters are calculated in Driver,
	 * based on display timing and Sink capabilities.
	 * If VBLANK region is too small and Sink takes a long time
	 * to set up RFB, it may take an extra frame to enter PSR state.
	 */
	bool psr_frame_capture_indication_req;
	unsigned int psr_sdp_transmit_line_num_deadline;
	uint8_t force_ffu_mode;
	unsigned int psr_power_opt;
};

/*
 * A link contains one or more sinks and their connected status.
 * The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
 */
struct dc_link {
	struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
	unsigned int sink_count;
	struct dc_sink *local_sink;
	unsigned int link_index;
	enum dc_connection_type type;
	enum signal_type connector_signal;
	enum dc_irq_source irq_source_hpd;
	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse  */
	bool is_hpd_filter_disabled;
	bool dp_ss_off;
	bool link_state_valid;
	bool aux_access_disabled;
	bool sync_lt_in_progress;
	enum lttpr_mode lttpr_mode;
	bool is_internal_display;

	/* TODO: Rename. Flag an endpoint as having a programmable mapping to a
	 * DIG encoder. */
	bool is_dig_mapping_flexible;
	bool hpd_status; /* HPD status of link without physical HPD pin. */
	bool is_hpd_pending; /* Indicates a new received hpd */

	bool edp_sink_present;

	struct dp_trace dp_trace;

	/* caps is the same as reported_link_cap. link_traing use
	 * reported_link_cap. Will clean up.  TODO
	 */
	struct dc_link_settings reported_link_cap;
	struct dc_link_settings verified_link_cap;
	struct dc_link_settings cur_link_settings;
	struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
	struct dc_link_settings preferred_link_setting;
	/* preferred_training_settings are override values that
	 * come from DM. DM is responsible for the memory
	 * management of the override pointers.
	 */
	struct dc_link_training_overrides preferred_training_settings;
	struct dp_audio_test_data audio_test_data;

	uint8_t ddc_hw_inst;

	uint8_t hpd_src;

	uint8_t link_enc_hw_inst;
	/* DIG link encoder ID. Used as index in link encoder resource pool.
	 * For links with fixed mapping to DIG, this is not changed after dc_link
	 * object creation.
	 */
	enum engine_id eng_id;

	bool test_pattern_enabled;
	union compliance_test_state compliance_test_state;

	void *priv;

	struct ddc_service *ddc;

	bool aux_mode;

	/* Private to DC core */

	const struct dc *dc;

	struct dc_context *ctx;

	struct panel_cntl *panel_cntl;
	struct link_encoder *link_enc;
	struct graphics_object_id link_id;
	/* Endpoint type distinguishes display endpoints which do not have entries
	 * in the BIOS connector table from those that do. Helps when tracking link
	 * encoder to display endpoint assignments.
	 */
	enum display_endpoint_type ep_type;
	union ddi_channel_mapping ddi_channel_mapping;
	struct connector_device_tag_info device_tag;
	struct dpcd_caps dpcd_caps;
	uint32_t dongle_max_pix_clk;
	unsigned short chip_caps;
	unsigned int dpcd_sink_count;
#if defined(CONFIG_DRM_AMD_DC_HDCP)
	struct hdcp_caps hdcp_caps;
#endif
	enum edp_revision edp_revision;
	union dpcd_sink_ext_caps dpcd_sink_ext_caps;

	struct psr_settings psr_settings;

	/* Drive settings read from integrated info table */
	struct dc_lane_settings bios_forced_drive_settings;

	/* Vendor specific LTTPR workaround variables */
	uint8_t vendor_specific_lttpr_link_rate_wa;
	bool apply_vendor_specific_lttpr_link_rate_wa;

	/* MST record stream using this link */
	struct link_flags {
		bool dp_keep_receiver_powered;
		bool dp_skip_DID2;
		bool dp_skip_reset_segment;
		bool dp_mot_reset_segment;
		/* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */
		bool dpia_mst_dsc_always_on;
		/* Forced DPIA into TBT3 compatibility mode. */
		bool dpia_forced_tbt3_mode;
	} wa_flags;
	struct link_mst_stream_allocation_table mst_stream_alloc_table;

	struct dc_link_status link_status;
	struct dprx_states dprx_states;

	struct gpio *hpd_gpio;
	enum dc_link_fec_state fec_state;
};

const struct dc_link_status *dc_link_get_status(const struct dc_link *dc_link);

/**
 * dc_get_link_at_index() - Return an enumerated dc_link.
 *
 * dc_link order is constant and determined at
 * boot time.  They cannot be created or destroyed.
 * Use dc_get_caps() to get number of links.
 */
static inline struct dc_link *dc_get_link_at_index(struct dc *dc, uint32_t link_index)
{
	return dc->links[link_index];
}

static inline void get_edp_links(const struct dc *dc,
		struct dc_link **edp_links,
		int *edp_num)
{
	int i;

	*edp_num = 0;
	for (i = 0; i < dc->link_count; i++) {
		// report any eDP links, even unconnected DDI's
		if (!dc->links[i])
			continue;
		if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
			edp_links[*edp_num] = dc->links[i];
			if (++(*edp_num) == MAX_NUM_EDP)
				return;
		}
	}
}

static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
		const struct dc_link *link,
		unsigned int *inst_out)
{
	struct dc_link *edp_links[MAX_NUM_EDP];
	int edp_num;

	if (link->connector_signal != SIGNAL_TYPE_EDP)
		return false;
	get_edp_links(dc, edp_links, &edp_num);
	if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
		*inst_out = 1;
	else
		*inst_out = 0;
	return true;
}

/* Set backlight level of an embedded panel (eDP, LVDS).
 * backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
 * and 16 bit fractional, where 1.0 is max backlight value.
 */
bool dc_link_set_backlight_level(const struct dc_link *dc_link,
		uint32_t backlight_pwm_u16_16,
		uint32_t frame_ramp);

/* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
bool dc_link_set_backlight_level_nits(struct dc_link *link,
		bool isHDR,
		uint32_t backlight_millinits,
		uint32_t transition_time_in_ms);

bool dc_link_get_backlight_level_nits(struct dc_link *link,
		uint32_t *backlight_millinits,
		uint32_t *backlight_millinits_peak);

bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);

bool dc_link_read_default_bl_aux(struct dc_link *link, uint32_t *backlight_millinits);
bool dc_link_set_default_brightness_aux(struct dc_link *link);

int dc_link_get_backlight_level(const struct dc_link *dc_link);

int dc_link_get_target_backlight_pwm(const struct dc_link *link);

bool dc_link_set_psr_allow_active(struct dc_link *dc_link, const bool *enable,
		bool wait, bool force_static, const unsigned int *power_opts);

bool dc_link_get_psr_state(const struct dc_link *dc_link, enum dc_psr_state *state);

bool dc_link_setup_psr(struct dc_link *dc_link,
		const struct dc_stream_state *stream, struct psr_config *psr_config,
		struct psr_context *psr_context);

bool dc_power_alpm_dpcd_enable(struct dc_link *link, bool enable);

void dc_link_get_psr_residency(const struct dc_link *link, uint32_t *residency);

void dc_link_blank_all_dp_displays(struct dc *dc);
void dc_link_blank_all_edp_displays(struct dc *dc);

void dc_link_blank_dp_stream(struct dc_link *link, bool hw_init);
bool dc_link_set_sink_vtotal_in_psr_active(const struct dc_link *link,
		uint16_t psr_vtotal_idle, uint16_t psr_vtotal_su);

/* Request DC to detect if there is a Panel connected.
 * boot - If this call is during initial boot.
 * Return false for any type of detection failure or MST detection
 * true otherwise. True meaning further action is required (status update
 * and OS notification).
 */
enum dc_detect_reason {
	DETECT_REASON_BOOT,
	DETECT_REASON_RESUMEFROMS3S4,
	DETECT_REASON_HPD,
	DETECT_REASON_HPDRX,
	DETECT_REASON_FALLBACK,
	DETECT_REASON_RETRAIN,
	DETECT_REASON_TDR,
};

bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
bool dc_link_get_hpd_state(struct dc_link *dc_link);
enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);

/* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
 * Return:
 * true - Downstream port status changed. DM should call DC to do the
 * detection.
 * false - no change in Downstream port status. No further action required
 * from DM. */
bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
		union hpd_irq_data *hpd_irq_dpcd_data, bool *out_link_loss,
		bool defer_handling, bool *has_left_work);

/*
 * On eDP links this function call will stall until T12 has elapsed.
 * If the panel is not in power off state, this function will return
 * immediately.
 */
bool dc_link_wait_for_t12(struct dc_link *link);

void dc_link_dp_handle_automated_test(struct dc_link *link);
void dc_link_dp_handle_link_loss(struct dc_link *link);
bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);

struct dc_sink_init_data;

struct dc_sink *dc_link_add_remote_sink(
		struct dc_link *dc_link,
		const uint8_t *edid,
		int len,
		struct dc_sink_init_data *init_data);

void dc_link_remove_remote_sink(
	struct dc_link *link,
	struct dc_sink *sink);

/* Used by diagnostics for virtual link at the moment */

void dc_link_dp_set_drive_settings(
	struct dc_link *link,
	const struct link_resource *link_res,
	struct link_training_settings *lt_settings);

bool dc_link_dp_perform_link_training_skip_aux(
	struct dc_link *link,
	const struct link_resource *link_res,
	const struct dc_link_settings *link_setting);

enum link_training_result dc_link_dp_perform_link_training(
	struct dc_link *link,
	const struct link_resource *link_res,
	const struct dc_link_settings *link_settings,
	bool skip_video_pattern);

bool dc_link_dp_sync_lt_begin(struct dc_link *link);

enum link_training_result dc_link_dp_sync_lt_attempt(
	struct dc_link *link,
	const struct link_resource *link_res,
	struct dc_link_settings *link_setting,
	struct dc_link_training_overrides *lt_settings);

bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);

void dc_link_dp_enable_hpd(const struct dc_link *link);

void dc_link_dp_disable_hpd(const struct dc_link *link);

bool dc_link_dp_set_test_pattern(
	struct dc_link *link,
	enum dp_test_pattern test_pattern,
	enum dp_test_pattern_color_space test_pattern_color_space,
	const struct link_training_settings *p_link_settings,
	const unsigned char *p_custom_pattern,
	unsigned int cust_pattern_size);

bool dc_link_dp_get_max_link_enc_cap(const struct dc_link *link, struct dc_link_settings *max_link_enc_cap);

void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);

bool dc_link_is_dp_sink_present(struct dc_link *link);

bool dc_link_detect_sink(struct dc_link *link, enum dc_connection_type *type);
/*
 * DPCD access interfaces
 */

#ifdef CONFIG_DRM_AMD_DC_HDCP
bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
#endif
void dc_link_set_drive_settings(struct dc *dc,
				struct link_training_settings *lt_settings,
				const struct dc_link *link);
void dc_link_set_preferred_link_settings(struct dc *dc,
					 struct dc_link_settings *link_setting,
					 struct dc_link *link);
void dc_link_set_preferred_training_settings(struct dc *dc,
					struct dc_link_settings *link_setting,
					struct dc_link_training_overrides *lt_overrides,
					struct dc_link *link,
					bool skip_immediate_retrain);
void dc_link_enable_hpd(const struct dc_link *link);
void dc_link_disable_hpd(const struct dc_link *link);
void dc_link_set_test_pattern(struct dc_link *link,
			enum dp_test_pattern test_pattern,
			enum dp_test_pattern_color_space test_pattern_color_space,
			const struct link_training_settings *p_link_settings,
			const unsigned char *p_custom_pattern,
			unsigned int cust_pattern_size);
uint32_t dc_link_bandwidth_kbps(
	const struct dc_link *link,
	const struct dc_link_settings *link_setting);

const struct dc_link_settings *dc_link_get_link_cap(
		const struct dc_link *link);

void dc_link_overwrite_extended_receiver_cap(
		struct dc_link *link);

bool dc_is_oem_i2c_device_present(
	struct dc *dc,
	size_t slave_address
);

bool dc_submit_i2c(
		struct dc *dc,
		uint32_t link_index,
		struct i2c_command *cmd);

bool dc_submit_i2c_oem(
		struct dc *dc,
		struct i2c_command *cmd);

uint32_t dc_bandwidth_in_kbps_from_timing(
	const struct dc_crtc_timing *timing);

bool dc_link_is_fec_supported(const struct dc_link *link);
bool dc_link_should_enable_fec(const struct dc_link *link);

uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);
enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);

void dc_link_get_cur_link_res(const struct dc_link *link,
		struct link_resource *link_res);
/* take a snapshot of current link resource allocation state */
void dc_get_cur_link_res_map(const struct dc *dc, uint32_t *map);
/* restore link resource allocation state from a snapshot */
void dc_restore_link_res_map(const struct dc *dc, uint32_t *map);
void dc_link_clear_dprx_states(struct dc_link *link);
struct gpio *get_hpd_gpio(struct dc_bios *dcb,
		struct graphics_object_id link_id,
		struct gpio_service *gpio_service);
void dp_trace_reset(struct dc_link *link);
bool dc_dp_trace_is_initialized(struct dc_link *link);
unsigned long long dc_dp_trace_get_lt_end_timestamp(struct dc_link *link,
		bool in_detection);
void dc_dp_trace_set_is_logged_flag(struct dc_link *link,
		bool in_detection,
		bool is_logged);
bool dc_dp_trace_is_logged(struct dc_link *link,
		bool in_detection);
struct dp_trace_lt_counts *dc_dp_trace_get_lt_counts(struct dc_link *link,
		bool in_detection);
unsigned int dc_dp_trace_get_link_loss_count(struct dc_link *link);

/* Destruct the mst topology of the link and reset the allocated payload table */
bool reset_cur_dp_mst_topology(struct dc_link *link);
#endif /* DC_LINK_H_ */
Commit	Line	Data
2e5fa5ba HW	1	/*
	2	* Copyright 2012-14 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: AMD
	23	*
	24	*/
	25
	26	#ifndef DC_LINK_H_
	27	#define DC_LINK_H_
	28
9dac88d8	29	#include "dc.h"
2e5fa5ba HW	30	#include "dc_types.h"
	31	#include "grph_object_defs.h"
	32
ef30f441 WL	33	struct link_resource;
ef30f441 WL	34
97bda032 HW	35	enum dc_link_fec_state {
	36	dc_link_fec_not_ready,
	37	dc_link_fec_ready,
	38	dc_link_fec_enabled
	39	};
3128b285	40
2e5fa5ba	41	struct dc_link_status {
ff582b61	42	bool link_active;
2e5fa5ba HW	43	struct dpcd_caps *dpcd_caps;
	44	};
	45
c595fb05 WL	46	struct dprx_states {
c595fb05 WL	47	bool cable_id_written;
4a3ad932 SG	48	};
4a3ad932 SG	49
2e5fa5ba HW	50	/* DP MST stream allocation (payload bandwidth number) */
	51	struct link_mst_stream_allocation {
	52	/* DIG front */
	53	const struct stream_encoder *stream_enc;
3bc8d921 FZ	54	/* HPO DP Stream Encoder */
3bc8d921 FZ	55	const struct hpo_dp_stream_encoder *hpo_dp_stream_enc;
2e5fa5ba HW	56	/* associate DRM payload table with DC stream encoder */
	57	uint8_t vcp_id;
	58	/* number of slots required for the DP stream in transport packet */
	59	uint8_t slot_count;
	60	};
	61
	62	/* DP MST stream allocation table */
	63	struct link_mst_stream_allocation_table {
	64	/* number of DP video streams */
	65	int stream_count;
	66	/* array of stream allocations */
	67	struct link_mst_stream_allocation stream_allocations[MAX_CONTROLLER_NUM];
	68	};
	69
176cd438 LHM	70	struct edp_trace_power_timestamps {
	71	uint64_t poweroff;
	72	uint64_t poweron;
78d5d04d	73	};
d1ebfdd8	74
5fed53c7 LHM	75	struct dp_trace_lt_counts {
	76	unsigned int total;
	77	unsigned int fail;
	78	};
	79
	80	struct dp_trace_lt {
	81	struct dp_trace_lt_counts counts;
	82	struct dp_trace_timestamps {
	83	unsigned long long start;
	84	unsigned long long end;
	85	} timestamps;
	86	enum link_training_result result;
	87	bool is_logged;
	88	};
	89
	90	struct dp_trace {
	91	struct dp_trace_lt detect_lt_trace;
	92	struct dp_trace_lt commit_lt_trace;
	93	unsigned int link_loss_count;
	94	bool is_initialized;
176cd438	95	struct edp_trace_power_timestamps edp_trace_power_timestamps;
5fed53c7 LHM	96	};
5fed53c7 LHM	97
d1ebfdd8 WW	98	/* PSR feature flags */
	99	struct psr_settings {
	100	bool psr_feature_enabled; // PSR is supported by sink
	101	bool psr_allow_active; // PSR is currently active
1cfbbdde	102	enum dc_psr_version psr_version; // Internal PSR version, determined based on DPCD
6651875a	103	bool psr_vtotal_control_support; // Vtotal control is supported by sink
d1ebfdd8 WW	104
	105	/* These parameters are calculated in Driver,
	106	* based on display timing and Sink capabilities.
	107	* If VBLANK region is too small and Sink takes a long time
	108	* to set up RFB, it may take an extra frame to enter PSR state.
	109	*/
	110	bool psr_frame_capture_indication_req;
	111	unsigned int psr_sdp_transmit_line_num_deadline;
e61a048e	112	uint8_t force_ffu_mode;
e5dfcd27	113	unsigned int psr_power_opt;
d1ebfdd8 WW	114	};
d1ebfdd8 WW	115
2e5fa5ba HW	116	/*
	117	* A link contains one or more sinks and their connected status.
	118	* The currently active signal type (HDMI, DP-SST, DP-MST) is also reported.
	119	*/
	120	struct dc_link {
	121	struct dc_sink *remote_sinks[MAX_SINKS_PER_LINK];
	122	unsigned int sink_count;
	123	struct dc_sink *local_sink;
	124	unsigned int link_index;
	125	enum dc_connection_type type;
	126	enum signal_type connector_signal;
	127	enum dc_irq_source irq_source_hpd;
	128	enum dc_irq_source irq_source_hpd_rx;/* aka DP Short Pulse */
9a6995ce	129	bool is_hpd_filter_disabled;
ad830e7a	130	bool dp_ss_off;
eed928dc	131	bool link_state_valid;
e0a6440a	132	bool aux_access_disabled;
0b226322	133	bool sync_lt_in_progress;
3128b285	134	enum lttpr_mode lttpr_mode;
c85ef99a	135	bool is_internal_display;
9a6995ce	136
e1f4328f JK	137	/* TODO: Rename. Flag an endpoint as having a programmable mapping to a
	138	* DIG encoder. */
	139	bool is_dig_mapping_flexible;
99732e52	140	bool hpd_status; /* HPD status of link without physical HPD pin. */
6ef86fa8	141	bool is_hpd_pending; /* Indicates a new received hpd */
e1f4328f	142
6fce5bce EY	143	bool edp_sink_present;
6fce5bce EY	144
5fed53c7 LHM	145	struct dp_trace dp_trace;
5fed53c7 LHM	146
2e5fa5ba HW	147	/* caps is the same as reported_link_cap. link_traing use
	148	* reported_link_cap. Will clean up. TODO
	149	*/
	150	struct dc_link_settings reported_link_cap;
	151	struct dc_link_settings verified_link_cap;
	152	struct dc_link_settings cur_link_settings;
52dffe2f	153	struct dc_lane_settings cur_lane_setting[LANE_COUNT_DP_MAX];
2e5fa5ba	154	struct dc_link_settings preferred_link_setting;
1072461c GS	155	/* preferred_training_settings are override values that
	156	* come from DM. DM is responsible for the memory
	157	* management of the override pointers.
	158	*/
e0a6440a	159	struct dc_link_training_overrides preferred_training_settings;
8c8048f2	160	struct dp_audio_test_data audio_test_data;
2e5fa5ba HW	161
	162	uint8_t ddc_hw_inst;
	163
	164	uint8_t hpd_src;
	165
	166	uint8_t link_enc_hw_inst;
f42ef862 JK	167	/* DIG link encoder ID. Used as index in link encoder resource pool.
	168	* For links with fixed mapping to DIG, this is not changed after dc_link
	169	* object creation.
	170	*/
	171	enum engine_id eng_id;
2e5fa5ba HW	172
	173	bool test_pattern_enabled;
	174	union compliance_test_state compliance_test_state;
	175
	176	void *priv;
	177
	178	struct ddc_service *ddc;
	179
	180	bool aux_mode;
	181
	182	/* Private to DC core */
	183
	184	const struct dc *dc;
	185
	186	struct dc_context *ctx;
	187
d4caa72e	188	struct panel_cntl *panel_cntl;
2e5fa5ba HW	189	struct link_encoder *link_enc;
2e5fa5ba HW	190	struct graphics_object_id link_id;
f42ef862 JK	191	/* Endpoint type distinguishes display endpoints which do not have entries
	192	* in the BIOS connector table from those that do. Helps when tracking link
	193	* encoder to display endpoint assignments.
	194	*/
	195	enum display_endpoint_type ep_type;
2e5fa5ba HW	196	union ddi_channel_mapping ddi_channel_mapping;
	197	struct connector_device_tag_info device_tag;
	198	struct dpcd_caps dpcd_caps;
ceb3dbb4	199	uint32_t dongle_max_pix_clk;
2e5fa5ba HW	200	unsigned short chip_caps;
2e5fa5ba HW	201	unsigned int dpcd_sink_count;
fe8db3bc BL	202	#if defined(CONFIG_DRM_AMD_DC_HDCP)
	203	struct hdcp_caps hdcp_caps;
	204	#endif
2e5fa5ba	205	enum edp_revision edp_revision;
96577cf8	206	union dpcd_sink_ext_caps dpcd_sink_ext_caps;
2e5fa5ba	207
d1ebfdd8 WW	208	struct psr_settings psr_settings;
d1ebfdd8 WW	209
54fe00be GS	210	/* Drive settings read from integrated info table */
	211	struct dc_lane_settings bios_forced_drive_settings;
	212
c11099b0 GS	213	/* Vendor specific LTTPR workaround variables */
c11099b0 GS	214	uint8_t vendor_specific_lttpr_link_rate_wa;
2f2a4b18	215	bool apply_vendor_specific_lttpr_link_rate_wa;
c11099b0	216
2e5fa5ba HW	217	/* MST record stream using this link */
	218	struct link_flags {
	219	bool dp_keep_receiver_powered;
ee13cea9	220	bool dp_skip_DID2;
32ff3217	221	bool dp_skip_reset_segment;
4b169ca3	222	bool dp_mot_reset_segment;
ab644ea6 JK	223	/* Some USB4 docks do not handle turning off MST DSC once it has been enabled. */
ab644ea6 JK	224	bool dpia_mst_dsc_always_on;
31d64b82 JK	225	/* Forced DPIA into TBT3 compatibility mode. */
31d64b82 JK	226	bool dpia_forced_tbt3_mode;
2e5fa5ba HW	227	} wa_flags;
	228	struct link_mst_stream_allocation_table mst_stream_alloc_table;
	229
	230	struct dc_link_status link_status;
c595fb05	231	struct dprx_states dprx_states;
2e5fa5ba	232
ac627caf	233	struct gpio *hpd_gpio;
97bda032	234	enum dc_link_fec_state fec_state;
2e5fa5ba HW	235	};
	236
	237	const struct dc_link_status dc_link_get_status(const struct dc_link dc_link);
	238
2119aa17 DF	239	/**
	240	* dc_get_link_at_index() - Return an enumerated dc_link.
	241	*
	242	* dc_link order is constant and determined at
2e5fa5ba HW	243	* boot time. They cannot be created or destroyed.
	244	* Use dc_get_caps() to get number of links.
	245	*/
	246	static inline struct dc_link dc_get_link_at_index(struct dc dc, uint32_t link_index)
	247	{
	248	return dc->links[link_index];
	249	}
	250
45a1261b JW	251	static inline void get_edp_links(const struct dc *dc,
	252	struct dc_link **edp_links,
	253	int *edp_num)
ab4a4072 EY	254	{
	255	int i;
	256
45a1261b	257	*edp_num = 0;
ab4a4072	258	for (i = 0; i < dc->link_count; i++) {
45a1261b	259	// report any eDP links, even unconnected DDI's
a1f5e392 ML	260	if (!dc->links[i])
a1f5e392 ML	261	continue;
45a1261b JW	262	if (dc->links[i]->connector_signal == SIGNAL_TYPE_EDP) {
	263	edp_links[*edp_num] = dc->links[i];
	264	if (++(*edp_num) == MAX_NUM_EDP)
	265	return;
	266	}
ab4a4072	267	}
ab4a4072 EY	268	}
ab4a4072 EY	269
6e568e43 JW	270	static inline bool dc_get_edp_link_panel_inst(const struct dc *dc,
	271	const struct dc_link *link,
	272	unsigned int *inst_out)
	273	{
	274	struct dc_link *edp_links[MAX_NUM_EDP];
	275	int edp_num;
	276
	277	if (link->connector_signal != SIGNAL_TYPE_EDP)
	278	return false;
	279	get_edp_links(dc, edp_links, &edp_num);
	280	if ((edp_num > 1) && (link->link_index > edp_links[0]->link_index))
	281	*inst_out = 1;
	282	else
	283	*inst_out = 0;
	284	return true;
	285	}
	286
262485a5 AK	287	/* Set backlight level of an embedded panel (eDP, LVDS).
	288	* backlight_pwm_u16_16 is unsigned 32 bit with 16 bit integer
	289	* and 16 bit fractional, where 1.0 is max backlight value.
	290	*/
	291	bool dc_link_set_backlight_level(const struct dc_link *dc_link,
	292	uint32_t backlight_pwm_u16_16,
923fe495	293	uint32_t frame_ramp);
2e5fa5ba	294
96577cf8 HW	295	/* Set/get nits-based backlight level of an embedded panel (eDP, LVDS). */
	296	bool dc_link_set_backlight_level_nits(struct dc_link *link,
	297	bool isHDR,
	298	uint32_t backlight_millinits,
	299	uint32_t transition_time_in_ms);
	300
	301	bool dc_link_get_backlight_level_nits(struct dc_link *link,
	302	uint32_t *backlight_millinits,
	303	uint32_t *backlight_millinits_peak);
	304
	305	bool dc_link_backlight_enable_aux(struct dc_link *link, bool enable);
	306
	307	bool dc_link_read_default_bl_aux(struct dc_link link, uint32_t backlight_millinits);
	308	bool dc_link_set_default_brightness_aux(struct dc_link *link);
	309
620a0d27 DF	310	int dc_link_get_backlight_level(const struct dc_link *dc_link);
620a0d27 DF	311
fefe92fe AK	312	int dc_link_get_target_backlight_pwm(const struct dc_link *link);
fefe92fe AK	313
e5dfcd27 RC	314	bool dc_link_set_psr_allow_active(struct dc_link dc_link, const bool enable,
e5dfcd27 RC	315	bool wait, bool force_static, const unsigned int *power_opts);
2e5fa5ba	316
1d496907	317	bool dc_link_get_psr_state(const struct dc_link dc_link, enum dc_psr_state state);
2e5fa5ba HW	318
	319	bool dc_link_setup_psr(struct dc_link *dc_link,
	320	const struct dc_stream_state stream, struct psr_config psr_config,
	321	struct psr_context *psr_context);
	322
90bb21cb MA	323	bool dc_power_alpm_dpcd_enable(struct dc_link *link, bool enable);
90bb21cb MA	324
b8e0b3d6 WW	325	void dc_link_get_psr_residency(const struct dc_link link, uint32_t residency);
b8e0b3d6 WW	326
ebd1e719	327	void dc_link_blank_all_dp_displays(struct dc *dc);
2d017189	328	void dc_link_blank_all_edp_displays(struct dc *dc);
ebd1e719 LHM	329
ebd1e719 LHM	330	void dc_link_blank_dp_stream(struct dc_link *link, bool hw_init);
6651875a DZ	331	bool dc_link_set_sink_vtotal_in_psr_active(const struct dc_link *link,
6651875a DZ	332	uint16_t psr_vtotal_idle, uint16_t psr_vtotal_su);
ebd1e719	333
2e5fa5ba HW	334	/* Request DC to detect if there is a Panel connected.
	335	* boot - If this call is during initial boot.
	336	* Return false for any type of detection failure or MST detection
	337	* true otherwise. True meaning further action is required (status update
	338	* and OS notification).
	339	*/
	340	enum dc_detect_reason {
	341	DETECT_REASON_BOOT,
b6500759	342	DETECT_REASON_RESUMEFROMS3S4,
2e5fa5ba HW	343	DETECT_REASON_HPD,
2e5fa5ba HW	344	DETECT_REASON_HPDRX,
fb0fe920	345	DETECT_REASON_FALLBACK,
426b4c4f	346	DETECT_REASON_RETRAIN,
30456ffa	347	DETECT_REASON_TDR,
2e5fa5ba HW	348	};
	349
	350	bool dc_link_detect(struct dc_link *dc_link, enum dc_detect_reason reason);
16f4c695	351	bool dc_link_get_hpd_state(struct dc_link *dc_link);
48af9b91	352	enum dc_status dc_link_allocate_mst_payload(struct pipe_ctx *pipe_ctx);
d740e0bf FZ	353	enum dc_status dc_link_reduce_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
d740e0bf FZ	354	enum dc_status dc_link_increase_mst_payload(struct pipe_ctx *pipe_ctx, uint32_t req_pbn);
2e5fa5ba HW	355
	356	/* Notify DC about DP RX Interrupt (aka Short Pulse Interrupt).
	357	* Return:
	358	* true - Downstream port status changed. DM should call DC to do the
	359	* detection.
	360	* false - no change in Downstream port status. No further action required
	361	* from DM. */
	362	bool dc_link_handle_hpd_rx_irq(struct dc_link *dc_link,
8e794421 WL	363	union hpd_irq_data hpd_irq_dpcd_data, bool out_link_loss,
8e794421 WL	364	bool defer_handling, bool *has_left_work);
2e5fa5ba	365
cf3a2627 JL	366	/*
	367	* On eDP links this function call will stall until T12 has elapsed.
	368	* If the panel is not in power off state, this function will return
	369	* immediately.
	370	*/
	371	bool dc_link_wait_for_t12(struct dc_link *link);
	372
410ad92d WL	373	void dc_link_dp_handle_automated_test(struct dc_link *link);
	374	void dc_link_dp_handle_link_loss(struct dc_link *link);
	375	bool dc_link_dp_allow_hpd_rx_irq(const struct dc_link *link);
3083a984	376
2e5fa5ba HW	377	struct dc_sink_init_data;
	378
	379	struct dc_sink *dc_link_add_remote_sink(
	380	struct dc_link *dc_link,
	381	const uint8_t *edid,
	382	int len,
	383	struct dc_sink_init_data *init_data);
	384
	385	void dc_link_remove_remote_sink(
	386	struct dc_link *link,
	387	struct dc_sink *sink);
	388
	389	/* Used by diagnostics for virtual link at the moment */
	390
	391	void dc_link_dp_set_drive_settings(
	392	struct dc_link *link,
ef30f441	393	const struct link_resource *link_res,
2e5fa5ba HW	394	struct link_training_settings *lt_settings);
2e5fa5ba HW	395
e0a6440a DG	396	bool dc_link_dp_perform_link_training_skip_aux(
e0a6440a DG	397	struct dc_link *link,
ef30f441	398	const struct link_resource *link_res,
e0a6440a DG	399	const struct dc_link_settings *link_setting);
e0a6440a DG	400
2e5fa5ba HW	401	enum link_training_result dc_link_dp_perform_link_training(
2e5fa5ba HW	402	struct dc_link *link,
ef30f441	403	const struct link_resource *link_res,
3df21257	404	const struct dc_link_settings *link_settings,
2e5fa5ba HW	405	bool skip_video_pattern);
2e5fa5ba HW	406
0b226322 DG	407	bool dc_link_dp_sync_lt_begin(struct dc_link *link);
	408
	409	enum link_training_result dc_link_dp_sync_lt_attempt(
	410	struct dc_link *link,
ef30f441	411	const struct link_resource *link_res,
0b226322 DG	412	struct dc_link_settings *link_setting,
	413	struct dc_link_training_overrides *lt_settings);
	414
	415	bool dc_link_dp_sync_lt_end(struct dc_link *link, bool link_down);
	416
2e5fa5ba HW	417	void dc_link_dp_enable_hpd(const struct dc_link *link);
	418
	419	void dc_link_dp_disable_hpd(const struct dc_link *link);
	420
	421	bool dc_link_dp_set_test_pattern(
	422	struct dc_link *link,
	423	enum dp_test_pattern test_pattern,
2057b7e1	424	enum dp_test_pattern_color_space test_pattern_color_space,
2e5fa5ba HW	425	const struct link_training_settings *p_link_settings,
	426	const unsigned char *p_custom_pattern,
	427	unsigned int cust_pattern_size);
	428
98025a62 NC	429	bool dc_link_dp_get_max_link_enc_cap(const struct dc_link link, struct dc_link_settings max_link_enc_cap);
98025a62 NC	430
11fffe45	431	void dc_link_enable_hpd_filter(struct dc_link *link, bool enable);
9a6995ce	432
aac5db82 HW	433	bool dc_link_is_dp_sink_present(struct dc_link *link);
aac5db82 HW	434
fbbdadf2	435	bool dc_link_detect_sink(struct dc_link link, enum dc_connection_type type);
2e5fa5ba HW	436	/*
	437	* DPCD access interfaces
	438	*/
	439
5f869379	440	#ifdef CONFIG_DRM_AMD_DC_HDCP
0023b7ee BL	441	bool dc_link_is_hdcp14(struct dc_link *link, enum signal_type signal);
0023b7ee BL	442	bool dc_link_is_hdcp22(struct dc_link *link, enum signal_type signal);
5f869379	443	#endif
40dd6bd3 HW	444	void dc_link_set_drive_settings(struct dc *dc,
	445	struct link_training_settings *lt_settings,
	446	const struct dc_link *link);
40dd6bd3 HW	447	void dc_link_set_preferred_link_settings(struct dc *dc,
	448	struct dc_link_settings *link_setting,
	449	struct dc_link *link);
e0a6440a DG	450	void dc_link_set_preferred_training_settings(struct dc *dc,
	451	struct dc_link_settings *link_setting,
	452	struct dc_link_training_overrides *lt_overrides,
	453	struct dc_link *link,
	454	bool skip_immediate_retrain);
40dd6bd3 HW	455	void dc_link_enable_hpd(const struct dc_link *link);
	456	void dc_link_disable_hpd(const struct dc_link *link);
	457	void dc_link_set_test_pattern(struct dc_link *link,
	458	enum dp_test_pattern test_pattern,
2057b7e1	459	enum dp_test_pattern_color_space test_pattern_color_space,
40dd6bd3 HW	460	const struct link_training_settings *p_link_settings,
	461	const unsigned char *p_custom_pattern,
	462	unsigned int cust_pattern_size);
332c1191 NC	463	uint32_t dc_link_bandwidth_kbps(
	464	const struct dc_link *link,
	465	const struct dc_link_settings *link_setting);
40dd6bd3	466
5ac4619b	467	const struct dc_link_settings *dc_link_get_link_cap(
7ee3769a WL	468	const struct dc_link *link);
7ee3769a WL	469
8547058b LH	470	void dc_link_overwrite_extended_receiver_cap(
	471	struct dc_link *link);
	472
a0248d54 JX	473	bool dc_is_oem_i2c_device_present(
	474	struct dc *dc,
	475	size_t slave_address
	476	);
	477
2e5fa5ba HW	478	bool dc_submit_i2c(
	479	struct dc *dc,
	480	uint32_t link_index,
	481	struct i2c_command *cmd);
	482
d9a07577 JL	483	bool dc_submit_i2c_oem(
	484	struct dc *dc,
	485	struct i2c_command *cmd);
	486
e49f6936 WL	487	uint32_t dc_bandwidth_in_kbps_from_timing(
e49f6936 WL	488	const struct dc_crtc_timing *timing);
c14b726e WL	489
c14b726e WL	490	bool dc_link_is_fec_supported(const struct dc_link *link);
89c7dfa9	491	bool dc_link_should_enable_fec(const struct dc_link *link);
c14b726e	492
c022375a	493	uint32_t dc_link_bw_kbps_from_raw_frl_link_rate_data(uint8_t bw);
d740e0bf	494	enum dp_link_encoding dc_link_dp_mst_decide_link_encoding_format(const struct dc_link *link);
ef30f441	495
f6a3795d WL	496	void dc_link_get_cur_link_res(const struct dc_link *link,
f6a3795d WL	497	struct link_resource *link_res);
4c3adc0b WL	498	/* take a snapshot of current link resource allocation state */
	499	void dc_get_cur_link_res_map(const struct dc dc, uint32_t map);
	500	/* restore link resource allocation state from a snapshot */
	501	void dc_restore_link_res_map(const struct dc dc, uint32_t map);
c595fb05	502	void dc_link_clear_dprx_states(struct dc_link *link);
dfabe597 WL	503	struct gpio get_hpd_gpio(struct dc_bios dcb,
	504	struct graphics_object_id link_id,
	505	struct gpio_service *gpio_service);
5fed53c7 LHM	506	void dp_trace_reset(struct dc_link *link);
	507	bool dc_dp_trace_is_initialized(struct dc_link *link);
	508	unsigned long long dc_dp_trace_get_lt_end_timestamp(struct dc_link *link,
	509	bool in_detection);
	510	void dc_dp_trace_set_is_logged_flag(struct dc_link *link,
	511	bool in_detection,
	512	bool is_logged);
	513	bool dc_dp_trace_is_logged(struct dc_link *link,
	514	bool in_detection);
	515	struct dp_trace_lt_counts dc_dp_trace_get_lt_counts(struct dc_link link,
	516	bool in_detection);
	517	unsigned int dc_dp_trace_get_link_loss_count(struct dc_link *link);
aec4706b WL	518
	519	/* Destruct the mst topology of the link and reset the allocated payload table */
	520	bool reset_cur_dp_mst_topology(struct dc_link *link);
2e5fa5ba	521	#endif /* DC_LINK_H_ */