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1 | /* |
2 | * Copyright 2019 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | ||
23 | #ifndef __SMU_INTERNAL_H__ | |
24 | #define __SMU_INTERNAL_H__ | |
25 | ||
26 | #include "amdgpu_smu.h" | |
27 | ||
d8e0b16d EQ |
28 | #if defined(SWSMU_CODE_LAYER_L1) |
29 | ||
e26ffda8 KW |
30 | #define smu_ppt_funcs(intf, ret, smu, args...) \ |
31 | ((smu)->ppt_funcs ? ((smu)->ppt_funcs->intf ? (smu)->ppt_funcs->intf(smu, ##args) : ret) : -EINVAL) | |
32 | ||
33 | #define smu_init_microcode(smu) smu_ppt_funcs(init_microcode, 0, smu) | |
34 | #define smu_fini_microcode(smu) smu_ppt_funcs(fini_microcode, 0, smu) | |
35 | #define smu_init_smc_tables(smu) smu_ppt_funcs(init_smc_tables, 0, smu) | |
36 | #define smu_fini_smc_tables(smu) smu_ppt_funcs(fini_smc_tables, 0, smu) | |
37 | #define smu_init_power(smu) smu_ppt_funcs(init_power, 0, smu) | |
38 | #define smu_fini_power(smu) smu_ppt_funcs(fini_power, 0, smu) | |
39 | #define smu_setup_pptable(smu) smu_ppt_funcs(setup_pptable, 0, smu) | |
40 | #define smu_powergate_sdma(smu, gate) smu_ppt_funcs(powergate_sdma, 0, smu, gate) | |
41 | #define smu_get_vbios_bootup_values(smu) smu_ppt_funcs(get_vbios_bootup_values, 0, smu) | |
42 | #define smu_check_fw_version(smu) smu_ppt_funcs(check_fw_version, 0, smu) | |
43 | #define smu_write_pptable(smu) smu_ppt_funcs(write_pptable, 0, smu) | |
44 | #define smu_set_min_dcef_deep_sleep(smu, clk) smu_ppt_funcs(set_min_dcef_deep_sleep, 0, smu, clk) | |
45 | #define smu_set_driver_table_location(smu) smu_ppt_funcs(set_driver_table_location, 0, smu) | |
46 | #define smu_set_tool_table_location(smu) smu_ppt_funcs(set_tool_table_location, 0, smu) | |
47 | #define smu_notify_memory_pool_location(smu) smu_ppt_funcs(notify_memory_pool_location, 0, smu) | |
48 | #define smu_gfx_off_control(smu, enable) smu_ppt_funcs(gfx_off_control, 0, smu, enable) | |
443c7f3c | 49 | #define smu_get_gfx_off_status(smu) smu_ppt_funcs(get_gfx_off_status, 0, smu) |
0ad7347a AA |
50 | #define smu_get_gfx_off_entrycount(smu, value) smu_ppt_funcs(get_gfx_off_entrycount, 0, smu, value) |
51 | #define smu_get_gfx_off_residency(smu, value) smu_ppt_funcs(get_gfx_off_residency, 0, smu, value) | |
52 | #define smu_set_gfx_off_residency(smu, value) smu_ppt_funcs(set_gfx_off_residency, 0, smu, value) | |
e26ffda8 KW |
53 | #define smu_set_last_dcef_min_deep_sleep_clk(smu) smu_ppt_funcs(set_last_dcef_min_deep_sleep_clk, 0, smu) |
54 | #define smu_system_features_control(smu, en) smu_ppt_funcs(system_features_control, 0, smu, en) | |
55 | #define smu_init_max_sustainable_clocks(smu) smu_ppt_funcs(init_max_sustainable_clocks, 0, smu) | |
56 | #define smu_set_default_od_settings(smu) smu_ppt_funcs(set_default_od_settings, 0, smu) | |
57 | #define smu_send_smc_msg_with_param(smu, msg, param, read_arg) smu_ppt_funcs(send_smc_msg_with_param, 0, smu, msg, param, read_arg) | |
66c86828 | 58 | #define smu_send_smc_msg(smu, msg, read_arg) smu_ppt_funcs(send_smc_msg, 0, smu, msg, read_arg) |
e26ffda8 KW |
59 | #define smu_init_display_count(smu, count) smu_ppt_funcs(init_display_count, 0, smu, count) |
60 | #define smu_feature_set_allowed_mask(smu) smu_ppt_funcs(set_allowed_mask, 0, smu) | |
cc188a73 | 61 | #define smu_feature_get_enabled_mask(smu, mask) smu_ppt_funcs(get_enabled_mask, -EOPNOTSUPP, smu, mask) |
b4bb3aaf | 62 | #define smu_feature_is_enabled(smu, mask) smu_ppt_funcs(feature_is_enabled, 0, smu, mask) |
f69c15e1 | 63 | #define smu_disable_all_features_with_exception(smu, mask) smu_ppt_funcs(disable_all_features_with_exception, 0, smu, mask) |
f931b011 | 64 | #define smu_is_dpm_running(smu) smu_ppt_funcs(is_dpm_running, 0, smu) |
e26ffda8 | 65 | #define smu_notify_display_change(smu) smu_ppt_funcs(notify_display_change, 0, smu) |
e26ffda8 | 66 | #define smu_populate_umd_state_clk(smu) smu_ppt_funcs(populate_umd_state_clk, 0, smu) |
e26ffda8 KW |
67 | #define smu_enable_thermal_alert(smu) smu_ppt_funcs(enable_thermal_alert, 0, smu) |
68 | #define smu_disable_thermal_alert(smu) smu_ppt_funcs(disable_thermal_alert, 0, smu) | |
69 | #define smu_smc_read_sensor(smu, sensor, data, size) smu_ppt_funcs(read_sensor, -EINVAL, smu, sensor, data, size) | |
70 | #define smu_pre_display_config_changed(smu) smu_ppt_funcs(pre_display_config_changed, 0, smu) | |
f931b011 | 71 | #define smu_display_config_changed(smu) smu_ppt_funcs(display_config_changed, 0, smu) |
e26ffda8 KW |
72 | #define smu_apply_clocks_adjust_rules(smu) smu_ppt_funcs(apply_clocks_adjust_rules, 0, smu) |
73 | #define smu_notify_smc_display_config(smu) smu_ppt_funcs(notify_smc_display_config, 0, smu) | |
e26ffda8 KW |
74 | #define smu_run_btc(smu) smu_ppt_funcs(run_btc, 0, smu) |
75 | #define smu_get_allowed_feature_mask(smu, feature_mask, num) smu_ppt_funcs(get_allowed_feature_mask, 0, smu, feature_mask, num) | |
e7a95eea | 76 | #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, clock_ranges) |
e26ffda8 | 77 | #define smu_thermal_temperature_range_update(smu, range, rw) smu_ppt_funcs(thermal_temperature_range_update, 0, smu, range, rw) |
e26ffda8 KW |
78 | #define smu_register_irq_handler(smu) smu_ppt_funcs(register_irq_handler, 0, smu) |
79 | #define smu_get_dpm_ultimate_freq(smu, param, min, max) smu_ppt_funcs(get_dpm_ultimate_freq, 0, smu, param, min, max) | |
80 | #define smu_asic_set_performance_level(smu, level) smu_ppt_funcs(set_performance_level, -EINVAL, smu, level) | |
81 | #define smu_dump_pptable(smu) smu_ppt_funcs(dump_pptable, 0, smu) | |
e26ffda8 | 82 | #define smu_update_pcie_parameters(smu, pcie_gen_cap, pcie_width_cap) smu_ppt_funcs(update_pcie_parameters, 0, smu, pcie_gen_cap, pcie_width_cap) |
e26ffda8 | 83 | #define smu_set_power_source(smu, power_src) smu_ppt_funcs(set_power_source, 0, smu, power_src) |
2f60dd50 LT |
84 | #define smu_i2c_init(smu) smu_ppt_funcs(i2c_init, 0, smu) |
85 | #define smu_i2c_fini(smu) smu_ppt_funcs(i2c_fini, 0, smu) | |
e26ffda8 KW |
86 | #define smu_get_unique_id(smu) smu_ppt_funcs(get_unique_id, 0, smu) |
87 | #define smu_log_thermal_throttling(smu) smu_ppt_funcs(log_thermal_throttling_event, 0, smu) | |
19589468 | 88 | #define smu_get_asic_power_limits(smu, current, default, max, min) smu_ppt_funcs(get_power_limit, 0, smu, current, default, max, min) |
7dbf7805 EQ |
89 | #define smu_get_pp_feature_mask(smu, buf) smu_ppt_funcs(get_pp_feature_mask, 0, smu, buf) |
90 | #define smu_set_pp_feature_mask(smu, new_mask) smu_ppt_funcs(set_pp_feature_mask, 0, smu, new_mask) | |
588a4d5c | 91 | #define smu_gfx_ulv_control(smu, enablement) smu_ppt_funcs(gfx_ulv_control, 0, smu, enablement) |
f0d51d20 | 92 | #define smu_deep_sleep_control(smu, enablement) smu_ppt_funcs(deep_sleep_control, 0, smu, enablement) |
337b57ae | 93 | #define smu_get_fan_parameters(smu) smu_ppt_funcs(get_fan_parameters, 0, smu) |
4bdd4d25 | 94 | #define smu_post_init(smu) smu_ppt_funcs(post_init, 0, smu) |
76c71f00 | 95 | #define smu_gpo_control(smu, enablement) smu_ppt_funcs(gpo_control, 0, smu, enablement) |
c98ee897 | 96 | #define smu_set_fine_grain_gfx_freq_parameters(smu) smu_ppt_funcs(set_fine_grain_gfx_freq_parameters, 0, smu) |
b874c667 EQ |
97 | #define smu_get_default_config_table_settings(smu, config_table) smu_ppt_funcs(get_default_config_table_settings, -EOPNOTSUPP, smu, config_table) |
98 | #define smu_set_config_table(smu, config_table) smu_ppt_funcs(set_config_table, -EOPNOTSUPP, smu, config_table) | |
b37c41f2 | 99 | #define smu_init_pptable_microcode(smu) smu_ppt_funcs(init_pptable_microcode, 0, smu) |
8c4e9105 | 100 | #define smu_notify_rlc_state(smu, en) smu_ppt_funcs(notify_rlc_state, 0, smu, en) |
a141b4e3 | 101 | |
18c1d3ce | 102 | #endif |
d8e0b16d | 103 | #endif |