]>
Commit | Line | Data |
---|---|---|
ede53344 VS |
1 | /* |
2 | * Copyright © 2016 Intel Corporation | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | ||
580fc13f | 23 | #include <linux/delay.h> |
ede53344 VS |
24 | #include <linux/errno.h> |
25 | #include <linux/export.h> | |
26 | #include <linux/i2c.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/string.h> | |
580fc13f | 29 | |
ede53344 | 30 | #include <drm/drm_dp_dual_mode_helper.h> |
580fc13f | 31 | #include <drm/drm_print.h> |
ede53344 VS |
32 | |
33 | /** | |
34 | * DOC: dp dual mode helpers | |
35 | * | |
36 | * Helper functions to deal with DP dual mode (aka. DP++) adaptors. | |
37 | * | |
38 | * Type 1: | |
39 | * Adaptor registers (if any) and the sink DDC bus may be accessed via I2C. | |
40 | * | |
41 | * Type 2: | |
42 | * Adaptor registers and sink DDC bus can be accessed either via I2C or | |
43 | * I2C-over-AUX. Source devices may choose to implement either of these | |
44 | * access methods. | |
45 | */ | |
46 | ||
47 | #define DP_DUAL_MODE_SLAVE_ADDRESS 0x40 | |
48 | ||
49 | /** | |
50 | * drm_dp_dual_mode_read - Read from the DP dual mode adaptor register(s) | |
51 | * @adapter: I2C adapter for the DDC bus | |
52 | * @offset: register offset | |
53 | * @buffer: buffer for return data | |
54 | * @size: sizo of the buffer | |
55 | * | |
56 | * Reads @size bytes from the DP dual mode adaptor registers | |
57 | * starting at @offset. | |
58 | * | |
59 | * Returns: | |
60 | * 0 on success, negative error code on failure | |
61 | */ | |
62 | ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter, | |
63 | u8 offset, void *buffer, size_t size) | |
64 | { | |
65 | struct i2c_msg msgs[] = { | |
66 | { | |
67 | .addr = DP_DUAL_MODE_SLAVE_ADDRESS, | |
68 | .flags = 0, | |
69 | .len = 1, | |
70 | .buf = &offset, | |
71 | }, | |
72 | { | |
73 | .addr = DP_DUAL_MODE_SLAVE_ADDRESS, | |
74 | .flags = I2C_M_RD, | |
75 | .len = size, | |
76 | .buf = buffer, | |
77 | }, | |
78 | }; | |
79 | int ret; | |
80 | ||
81 | ret = i2c_transfer(adapter, msgs, ARRAY_SIZE(msgs)); | |
82 | if (ret < 0) | |
83 | return ret; | |
84 | if (ret != ARRAY_SIZE(msgs)) | |
85 | return -EPROTO; | |
86 | ||
87 | return 0; | |
88 | } | |
89 | EXPORT_SYMBOL(drm_dp_dual_mode_read); | |
90 | ||
91 | /** | |
92 | * drm_dp_dual_mode_write - Write to the DP dual mode adaptor register(s) | |
93 | * @adapter: I2C adapter for the DDC bus | |
94 | * @offset: register offset | |
95 | * @buffer: buffer for write data | |
96 | * @size: sizo of the buffer | |
97 | * | |
98 | * Writes @size bytes to the DP dual mode adaptor registers | |
99 | * starting at @offset. | |
100 | * | |
101 | * Returns: | |
102 | * 0 on success, negative error code on failure | |
103 | */ | |
104 | ssize_t drm_dp_dual_mode_write(struct i2c_adapter *adapter, | |
105 | u8 offset, const void *buffer, size_t size) | |
106 | { | |
107 | struct i2c_msg msg = { | |
108 | .addr = DP_DUAL_MODE_SLAVE_ADDRESS, | |
109 | .flags = 0, | |
110 | .len = 1 + size, | |
111 | .buf = NULL, | |
112 | }; | |
113 | void *data; | |
114 | int ret; | |
115 | ||
0ee931c4 | 116 | data = kmalloc(msg.len, GFP_KERNEL); |
ede53344 VS |
117 | if (!data) |
118 | return -ENOMEM; | |
119 | ||
120 | msg.buf = data; | |
121 | ||
122 | memcpy(data, &offset, 1); | |
123 | memcpy(data + 1, buffer, size); | |
124 | ||
125 | ret = i2c_transfer(adapter, &msg, 1); | |
126 | ||
127 | kfree(data); | |
128 | ||
129 | if (ret < 0) | |
130 | return ret; | |
131 | if (ret != 1) | |
132 | return -EPROTO; | |
133 | ||
134 | return 0; | |
135 | } | |
136 | EXPORT_SYMBOL(drm_dp_dual_mode_write); | |
137 | ||
138 | static bool is_hdmi_adaptor(const char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN]) | |
139 | { | |
140 | static const char dp_dual_mode_hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = | |
141 | "DP-HDMI ADAPTOR\x04"; | |
142 | ||
143 | return memcmp(hdmi_id, dp_dual_mode_hdmi_id, | |
144 | sizeof(dp_dual_mode_hdmi_id)) == 0; | |
145 | } | |
146 | ||
9ff7a1b0 ID |
147 | static bool is_type1_adaptor(uint8_t adaptor_id) |
148 | { | |
149 | return adaptor_id == 0 || adaptor_id == 0xff; | |
150 | } | |
151 | ||
ede53344 VS |
152 | static bool is_type2_adaptor(uint8_t adaptor_id) |
153 | { | |
154 | return adaptor_id == (DP_DUAL_MODE_TYPE_TYPE2 | | |
155 | DP_DUAL_MODE_REV_TYPE2); | |
156 | } | |
157 | ||
b610393a JN |
158 | static bool is_lspcon_adaptor(const char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN], |
159 | const uint8_t adaptor_id) | |
056996b9 SS |
160 | { |
161 | return is_hdmi_adaptor(hdmi_id) && | |
162 | (adaptor_id == (DP_DUAL_MODE_TYPE_TYPE2 | | |
163 | DP_DUAL_MODE_TYPE_HAS_DPCD)); | |
164 | } | |
165 | ||
ede53344 VS |
166 | /** |
167 | * drm_dp_dual_mode_detect - Identify the DP dual mode adaptor | |
168 | * @adapter: I2C adapter for the DDC bus | |
169 | * | |
170 | * Attempt to identify the type of the DP dual mode adaptor used. | |
171 | * | |
172 | * Note that when the answer is @DRM_DP_DUAL_MODE_UNKNOWN it's not | |
173 | * certain whether we're dealing with a native HDMI port or | |
174 | * a type 1 DVI dual mode adaptor. The driver will have to use | |
175 | * some other hardware/driver specific mechanism to make that | |
176 | * distinction. | |
177 | * | |
178 | * Returns: | |
179 | * The type of the DP dual mode adaptor used | |
180 | */ | |
181 | enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter *adapter) | |
182 | { | |
183 | char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = {}; | |
184 | uint8_t adaptor_id = 0x00; | |
185 | ssize_t ret; | |
186 | ||
187 | /* | |
188 | * Let's see if the adaptor is there the by reading the | |
189 | * HDMI ID registers. | |
190 | * | |
191 | * Note that type 1 DVI adaptors are not required to implemnt | |
192 | * any registers, and that presents a problem for detection. | |
193 | * If the i2c transfer is nacked, we may or may not be dealing | |
194 | * with a type 1 DVI adaptor. Some other mechanism of detecting | |
195 | * the presence of the adaptor is required. One way would be | |
196 | * to check the state of the CONFIG1 pin, Another method would | |
197 | * simply require the driver to know whether the port is a DP++ | |
198 | * port or a native HDMI port. Both of these methods are entirely | |
199 | * hardware/driver specific so we can't deal with them here. | |
200 | */ | |
201 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_HDMI_ID, | |
202 | hdmi_id, sizeof(hdmi_id)); | |
9ff7a1b0 ID |
203 | DRM_DEBUG_KMS("DP dual mode HDMI ID: %*pE (err %zd)\n", |
204 | ret ? 0 : (int)sizeof(hdmi_id), hdmi_id, ret); | |
ede53344 VS |
205 | if (ret) |
206 | return DRM_DP_DUAL_MODE_UNKNOWN; | |
207 | ||
208 | /* | |
209 | * Sigh. Some (maybe all?) type 1 adaptors are broken and ack | |
210 | * the offset but ignore it, and instead they just always return | |
211 | * data from the start of the HDMI ID buffer. So for a broken | |
212 | * type 1 HDMI adaptor a single byte read will always give us | |
213 | * 0x44, and for a type 1 DVI adaptor it should give 0x00 | |
214 | * (assuming it implements any registers). Fortunately neither | |
215 | * of those values will match the type 2 signature of the | |
216 | * DP_DUAL_MODE_ADAPTOR_ID register so we can proceed with | |
217 | * the type 2 adaptor detection safely even in the presence | |
218 | * of broken type 1 adaptors. | |
219 | */ | |
220 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_ADAPTOR_ID, | |
221 | &adaptor_id, sizeof(adaptor_id)); | |
9ff7a1b0 ID |
222 | DRM_DEBUG_KMS("DP dual mode adaptor ID: %02x (err %zd)\n", |
223 | adaptor_id, ret); | |
ede53344 | 224 | if (ret == 0) { |
056996b9 SS |
225 | if (is_lspcon_adaptor(hdmi_id, adaptor_id)) |
226 | return DRM_DP_DUAL_MODE_LSPCON; | |
ede53344 VS |
227 | if (is_type2_adaptor(adaptor_id)) { |
228 | if (is_hdmi_adaptor(hdmi_id)) | |
229 | return DRM_DP_DUAL_MODE_TYPE2_HDMI; | |
230 | else | |
231 | return DRM_DP_DUAL_MODE_TYPE2_DVI; | |
232 | } | |
9ff7a1b0 ID |
233 | /* |
234 | * If neither a proper type 1 ID nor a broken type 1 adaptor | |
235 | * as described above, assume type 1, but let the user know | |
236 | * that we may have misdetected the type. | |
237 | */ | |
238 | if (!is_type1_adaptor(adaptor_id) && adaptor_id != hdmi_id[0]) | |
239 | DRM_ERROR("Unexpected DP dual mode adaptor ID %02x\n", | |
240 | adaptor_id); | |
241 | ||
ede53344 VS |
242 | } |
243 | ||
244 | if (is_hdmi_adaptor(hdmi_id)) | |
245 | return DRM_DP_DUAL_MODE_TYPE1_HDMI; | |
246 | else | |
247 | return DRM_DP_DUAL_MODE_TYPE1_DVI; | |
248 | } | |
249 | EXPORT_SYMBOL(drm_dp_dual_mode_detect); | |
250 | ||
251 | /** | |
252 | * drm_dp_dual_mode_max_tmds_clock - Max TMDS clock for DP dual mode adaptor | |
253 | * @type: DP dual mode adaptor type | |
254 | * @adapter: I2C adapter for the DDC bus | |
255 | * | |
256 | * Determine the max TMDS clock the adaptor supports based on the | |
257 | * type of the dual mode adaptor and the DP_DUAL_MODE_MAX_TMDS_CLOCK | |
258 | * register (on type2 adaptors). As some type 1 adaptors have | |
259 | * problems with registers (see comments in drm_dp_dual_mode_detect()) | |
260 | * we don't read the register on those, instead we simply assume | |
261 | * a 165 MHz limit based on the specification. | |
262 | * | |
263 | * Returns: | |
264 | * Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz. | |
265 | */ | |
266 | int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type, | |
267 | struct i2c_adapter *adapter) | |
268 | { | |
269 | uint8_t max_tmds_clock; | |
270 | ssize_t ret; | |
271 | ||
272 | /* native HDMI so no limit */ | |
273 | if (type == DRM_DP_DUAL_MODE_NONE) | |
274 | return 0; | |
275 | ||
276 | /* | |
277 | * Type 1 adaptors are limited to 165MHz | |
278 | * Type 2 adaptors can tells us their limit | |
279 | */ | |
280 | if (type < DRM_DP_DUAL_MODE_TYPE2_DVI) | |
281 | return 165000; | |
282 | ||
283 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_MAX_TMDS_CLOCK, | |
284 | &max_tmds_clock, sizeof(max_tmds_clock)); | |
285 | if (ret || max_tmds_clock == 0x00 || max_tmds_clock == 0xff) { | |
286 | DRM_DEBUG_KMS("Failed to query max TMDS clock\n"); | |
287 | return 165000; | |
288 | } | |
289 | ||
290 | return max_tmds_clock * 5000 / 2; | |
291 | } | |
292 | EXPORT_SYMBOL(drm_dp_dual_mode_max_tmds_clock); | |
293 | ||
294 | /** | |
295 | * drm_dp_dual_mode_get_tmds_output - Get the state of the TMDS output buffers in the DP dual mode adaptor | |
296 | * @type: DP dual mode adaptor type | |
297 | * @adapter: I2C adapter for the DDC bus | |
298 | * @enabled: current state of the TMDS output buffers | |
299 | * | |
300 | * Get the state of the TMDS output buffers in the adaptor. For | |
301 | * type2 adaptors this is queried from the DP_DUAL_MODE_TMDS_OEN | |
302 | * register. As some type 1 adaptors have problems with registers | |
303 | * (see comments in drm_dp_dual_mode_detect()) we don't read the | |
304 | * register on those, instead we simply assume that the buffers | |
305 | * are always enabled. | |
306 | * | |
307 | * Returns: | |
308 | * 0 on success, negative error code on failure | |
309 | */ | |
310 | int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type, | |
311 | struct i2c_adapter *adapter, | |
312 | bool *enabled) | |
313 | { | |
314 | uint8_t tmds_oen; | |
315 | ssize_t ret; | |
316 | ||
317 | if (type < DRM_DP_DUAL_MODE_TYPE2_DVI) { | |
318 | *enabled = true; | |
319 | return 0; | |
320 | } | |
321 | ||
322 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_TMDS_OEN, | |
323 | &tmds_oen, sizeof(tmds_oen)); | |
324 | if (ret) { | |
325 | DRM_DEBUG_KMS("Failed to query state of TMDS output buffers\n"); | |
326 | return ret; | |
327 | } | |
328 | ||
329 | *enabled = !(tmds_oen & DP_DUAL_MODE_TMDS_DISABLE); | |
330 | ||
331 | return 0; | |
332 | } | |
333 | EXPORT_SYMBOL(drm_dp_dual_mode_get_tmds_output); | |
334 | ||
335 | /** | |
336 | * drm_dp_dual_mode_set_tmds_output - Enable/disable TMDS output buffers in the DP dual mode adaptor | |
337 | * @type: DP dual mode adaptor type | |
338 | * @adapter: I2C adapter for the DDC bus | |
339 | * @enable: enable (as opposed to disable) the TMDS output buffers | |
340 | * | |
341 | * Set the state of the TMDS output buffers in the adaptor. For | |
342 | * type2 this is set via the DP_DUAL_MODE_TMDS_OEN register. As | |
343 | * some type 1 adaptors have problems with registers (see comments | |
344 | * in drm_dp_dual_mode_detect()) we avoid touching the register, | |
345 | * making this function a no-op on type 1 adaptors. | |
346 | * | |
347 | * Returns: | |
348 | * 0 on success, negative error code on failure | |
349 | */ | |
350 | int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type, | |
351 | struct i2c_adapter *adapter, bool enable) | |
352 | { | |
353 | uint8_t tmds_oen = enable ? 0 : DP_DUAL_MODE_TMDS_DISABLE; | |
354 | ssize_t ret; | |
7eb2c4dd | 355 | int retry; |
ede53344 VS |
356 | |
357 | if (type < DRM_DP_DUAL_MODE_TYPE2_DVI) | |
358 | return 0; | |
359 | ||
7eb2c4dd ID |
360 | /* |
361 | * LSPCON adapters in low-power state may ignore the first write, so | |
362 | * read back and verify the written value a few times. | |
363 | */ | |
364 | for (retry = 0; retry < 3; retry++) { | |
365 | uint8_t tmp; | |
366 | ||
367 | ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_TMDS_OEN, | |
368 | &tmds_oen, sizeof(tmds_oen)); | |
369 | if (ret) { | |
370 | DRM_DEBUG_KMS("Failed to %s TMDS output buffers (%d attempts)\n", | |
371 | enable ? "enable" : "disable", | |
372 | retry + 1); | |
373 | return ret; | |
374 | } | |
375 | ||
376 | ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_TMDS_OEN, | |
377 | &tmp, sizeof(tmp)); | |
378 | if (ret) { | |
379 | DRM_DEBUG_KMS("I2C read failed during TMDS output buffer %s (%d attempts)\n", | |
380 | enable ? "enabling" : "disabling", | |
381 | retry + 1); | |
382 | return ret; | |
383 | } | |
384 | ||
385 | if (tmp == tmds_oen) | |
386 | return 0; | |
ede53344 VS |
387 | } |
388 | ||
7eb2c4dd ID |
389 | DRM_DEBUG_KMS("I2C write value mismatch during TMDS output buffer %s\n", |
390 | enable ? "enabling" : "disabling"); | |
391 | ||
392 | return -EIO; | |
ede53344 VS |
393 | } |
394 | EXPORT_SYMBOL(drm_dp_dual_mode_set_tmds_output); | |
395 | ||
396 | /** | |
397 | * drm_dp_get_dual_mode_type_name - Get the name of the DP dual mode adaptor type as a string | |
398 | * @type: DP dual mode adaptor type | |
399 | * | |
400 | * Returns: | |
401 | * String representation of the DP dual mode adaptor type | |
402 | */ | |
403 | const char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type) | |
404 | { | |
405 | switch (type) { | |
406 | case DRM_DP_DUAL_MODE_NONE: | |
407 | return "none"; | |
408 | case DRM_DP_DUAL_MODE_TYPE1_DVI: | |
409 | return "type 1 DVI"; | |
410 | case DRM_DP_DUAL_MODE_TYPE1_HDMI: | |
411 | return "type 1 HDMI"; | |
412 | case DRM_DP_DUAL_MODE_TYPE2_DVI: | |
413 | return "type 2 DVI"; | |
414 | case DRM_DP_DUAL_MODE_TYPE2_HDMI: | |
415 | return "type 2 HDMI"; | |
00d3c14f ACO |
416 | case DRM_DP_DUAL_MODE_LSPCON: |
417 | return "lspcon"; | |
ede53344 VS |
418 | default: |
419 | WARN_ON(type != DRM_DP_DUAL_MODE_UNKNOWN); | |
420 | return "unknown"; | |
421 | } | |
422 | } | |
423 | EXPORT_SYMBOL(drm_dp_get_dual_mode_type_name); | |
056996b9 SS |
424 | |
425 | /** | |
426 | * drm_lspcon_get_mode: Get LSPCON's current mode of operation by | |
613a3081 JN |
427 | * reading offset (0x80, 0x41) |
428 | * @adapter: I2C-over-aux adapter | |
429 | * @mode: current lspcon mode of operation output variable | |
056996b9 SS |
430 | * |
431 | * Returns: | |
432 | * 0 on success, sets the current_mode value to appropriate mode | |
433 | * -error on failure | |
434 | */ | |
435 | int drm_lspcon_get_mode(struct i2c_adapter *adapter, | |
436 | enum drm_lspcon_mode *mode) | |
437 | { | |
438 | u8 data; | |
439 | int ret = 0; | |
f687e25a | 440 | int retry; |
056996b9 SS |
441 | |
442 | if (!mode) { | |
443 | DRM_ERROR("NULL input\n"); | |
444 | return -EINVAL; | |
445 | } | |
446 | ||
447 | /* Read Status: i2c over aux */ | |
f687e25a SS |
448 | for (retry = 0; retry < 6; retry++) { |
449 | if (retry) | |
450 | usleep_range(500, 1000); | |
451 | ||
452 | ret = drm_dp_dual_mode_read(adapter, | |
453 | DP_DUAL_MODE_LSPCON_CURRENT_MODE, | |
454 | &data, sizeof(data)); | |
455 | if (!ret) | |
456 | break; | |
457 | } | |
458 | ||
056996b9 | 459 | if (ret < 0) { |
f687e25a | 460 | DRM_DEBUG_KMS("LSPCON read(0x80, 0x41) failed\n"); |
056996b9 SS |
461 | return -EFAULT; |
462 | } | |
463 | ||
464 | if (data & DP_DUAL_MODE_LSPCON_MODE_PCON) | |
465 | *mode = DRM_LSPCON_MODE_PCON; | |
466 | else | |
467 | *mode = DRM_LSPCON_MODE_LS; | |
468 | return 0; | |
469 | } | |
470 | EXPORT_SYMBOL(drm_lspcon_get_mode); | |
471 | ||
472 | /** | |
613a3081 JN |
473 | * drm_lspcon_set_mode: Change LSPCON's mode of operation by |
474 | * writing offset (0x80, 0x40) | |
475 | * @adapter: I2C-over-aux adapter | |
476 | * @mode: required mode of operation | |
056996b9 SS |
477 | * |
478 | * Returns: | |
479 | * 0 on success, -error on failure/timeout | |
480 | */ | |
481 | int drm_lspcon_set_mode(struct i2c_adapter *adapter, | |
482 | enum drm_lspcon_mode mode) | |
483 | { | |
484 | u8 data = 0; | |
485 | int ret; | |
486 | int time_out = 200; | |
487 | enum drm_lspcon_mode current_mode; | |
488 | ||
489 | if (mode == DRM_LSPCON_MODE_PCON) | |
490 | data = DP_DUAL_MODE_LSPCON_MODE_PCON; | |
491 | ||
492 | /* Change mode */ | |
493 | ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_LSPCON_MODE_CHANGE, | |
494 | &data, sizeof(data)); | |
495 | if (ret < 0) { | |
496 | DRM_ERROR("LSPCON mode change failed\n"); | |
497 | return ret; | |
498 | } | |
499 | ||
500 | /* | |
501 | * Confirm mode change by reading the status bit. | |
502 | * Sometimes, it takes a while to change the mode, | |
503 | * so wait and retry until time out or done. | |
504 | */ | |
505 | do { | |
506 | ret = drm_lspcon_get_mode(adapter, ¤t_mode); | |
507 | if (ret) { | |
508 | DRM_ERROR("can't confirm LSPCON mode change\n"); | |
509 | return ret; | |
510 | } else { | |
511 | if (current_mode != mode) { | |
512 | msleep(10); | |
513 | time_out -= 10; | |
514 | } else { | |
515 | DRM_DEBUG_KMS("LSPCON mode changed to %s\n", | |
516 | mode == DRM_LSPCON_MODE_LS ? | |
517 | "LS" : "PCON"); | |
518 | return 0; | |
519 | } | |
520 | } | |
521 | } while (time_out); | |
522 | ||
523 | DRM_ERROR("LSPCON mode change timed out\n"); | |
524 | return -ETIMEDOUT; | |
525 | } | |
526 | EXPORT_SYMBOL(drm_lspcon_set_mode); |