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drm/edid: Document drm_mode_find_dmt
[thirdparty/kernel/stable.git] / drivers / gpu / drm / drm_edid.c
CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
2d1a8a48 33#include <linux/export.h>
f453ba04
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34#include "drmP.h"
35#include "drm_edid.h"
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
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42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
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45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
3c537889 69
13931579
AJ
70struct detailed_mode_closure {
71 struct drm_connector *connector;
72 struct edid *edid;
73 bool preferred;
74 u32 quirks;
75 int modes;
76};
f453ba04 77
5c61259e
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78#define LEVEL_DMT 0
79#define LEVEL_GTF 1
7a374350
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80#define LEVEL_GTF2 2
81#define LEVEL_CVT 3
5c61259e 82
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83static struct edid_quirk {
84 char *vendor;
85 int product_id;
86 u32 quirks;
87} edid_quirk_list[] = {
88 /* Acer AL1706 */
89 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
90 /* Acer F51 */
91 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
92 /* Unknown Acer */
93 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
94
95 /* Belinea 10 15 55 */
96 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
97 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
98
99 /* Envision Peripherals, Inc. EN-7100e */
100 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
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101 /* Envision EN2028 */
102 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
103
104 /* Funai Electronics PM36B */
105 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
106 EDID_QUIRK_DETAILED_IN_CM },
107
108 /* LG Philips LCD LP154W01-A5 */
109 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
110 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
111
112 /* Philips 107p5 CRT */
113 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
114
115 /* Proview AY765C */
116 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
117
118 /* Samsung SyncMaster 205BW. Note: irony */
119 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
120 /* Samsung SyncMaster 22[5-6]BW */
121 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
122 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
123};
124
61e57a8d 125/*** DDC fetch and block validation ***/
f453ba04 126
083ae056
AJ
127static const u8 edid_header[] = {
128 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
129};
f453ba04 130
051963d4
TR
131 /*
132 * Sanity check the header of the base EDID block. Return 8 if the header
133 * is perfect, down to 0 if it's totally wrong.
134 */
135int drm_edid_header_is_valid(const u8 *raw_edid)
136{
137 int i, score = 0;
138
139 for (i = 0; i < sizeof(edid_header); i++)
140 if (raw_edid[i] == edid_header[i])
141 score++;
142
143 return score;
144}
145EXPORT_SYMBOL(drm_edid_header_is_valid);
146
147
61e57a8d
AJ
148/*
149 * Sanity check the EDID block (base or extension). Return 0 if the block
150 * doesn't check out, or 1 if it's valid.
f453ba04 151 */
da0df92b 152bool drm_edid_block_valid(u8 *raw_edid)
f453ba04 153{
61e57a8d 154 int i;
f453ba04 155 u8 csum = 0;
61e57a8d 156 struct edid *edid = (struct edid *)raw_edid;
f453ba04 157
61e57a8d 158 if (raw_edid[0] == 0x00) {
051963d4 159 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d
AJ
160 if (score == 8) ;
161 else if (score >= 6) {
162 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
163 memcpy(raw_edid, edid_header, sizeof(edid_header));
164 } else {
165 goto bad;
166 }
167 }
f453ba04
DA
168
169 for (i = 0; i < EDID_LENGTH; i++)
170 csum += raw_edid[i];
171 if (csum) {
172 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
4a638b4e
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173
174 /* allow CEA to slide through, switches mangle this */
175 if (raw_edid[0] != 0x02)
176 goto bad;
f453ba04
DA
177 }
178
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179 /* per-block-type checks */
180 switch (raw_edid[0]) {
181 case 0: /* base */
182 if (edid->version != 1) {
183 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
184 goto bad;
185 }
862b89c0 186
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AJ
187 if (edid->revision > 4)
188 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
189 break;
862b89c0 190
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AJ
191 default:
192 break;
193 }
47ee4ccf 194
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DA
195 return 1;
196
197bad:
198 if (raw_edid) {
f49dadb8 199 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
200 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
201 raw_edid, EDID_LENGTH, false);
f453ba04
DA
202 }
203 return 0;
204}
da0df92b 205EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
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206
207/**
208 * drm_edid_is_valid - sanity check EDID data
209 * @edid: EDID data
210 *
211 * Sanity-check an entire EDID record (including extensions)
212 */
213bool drm_edid_is_valid(struct edid *edid)
214{
215 int i;
216 u8 *raw = (u8 *)edid;
217
218 if (!edid)
219 return false;
220
221 for (i = 0; i <= edid->extensions; i++)
222 if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
223 return false;
224
225 return true;
226}
3c537889 227EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 228
61e57a8d
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229#define DDC_SEGMENT_ADDR 0x30
230/**
231 * Get EDID information via I2C.
232 *
233 * \param adapter : i2c device adaptor
234 * \param buf : EDID data buffer to be filled
235 * \param len : EDID data buffer length
236 * \return 0 on success or -1 on failure.
237 *
238 * Try to fetch EDID information by calling i2c driver function.
239 */
240static int
241drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
242 int block, int len)
243{
244 unsigned char start = block * EDID_LENGTH;
4819d2e4
CW
245 int ret, retries = 5;
246
247 /* The core i2c driver will automatically retry the transfer if the
248 * adapter reports EAGAIN. However, we find that bit-banging transfers
249 * are susceptible to errors under a heavily loaded machine and
250 * generate spurious NAKs and timeouts. Retrying the transfer
251 * of the individual block a few times seems to overcome this.
252 */
253 do {
254 struct i2c_msg msgs[] = {
255 {
256 .addr = DDC_ADDR,
257 .flags = 0,
258 .len = 1,
259 .buf = &start,
260 }, {
261 .addr = DDC_ADDR,
262 .flags = I2C_M_RD,
263 .len = len,
264 .buf = buf,
265 }
266 };
267 ret = i2c_transfer(adapter, msgs, 2);
9292f37e
ED
268 if (ret == -ENXIO) {
269 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
270 adapter->name);
271 break;
272 }
4819d2e4
CW
273 } while (ret != 2 && --retries);
274
275 return ret == 2 ? 0 : -1;
61e57a8d
AJ
276}
277
4a9a8b71
DA
278static bool drm_edid_is_zero(u8 *in_edid, int length)
279{
280 int i;
281 u32 *raw_edid = (u32 *)in_edid;
282
283 for (i = 0; i < length / 4; i++)
284 if (*(raw_edid + i) != 0)
285 return false;
286 return true;
287}
288
61e57a8d
AJ
289static u8 *
290drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
291{
0ea75e23 292 int i, j = 0, valid_extensions = 0;
61e57a8d
AJ
293 u8 *block, *new;
294
295 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
296 return NULL;
297
298 /* base block fetch */
299 for (i = 0; i < 4; i++) {
300 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
301 goto out;
302 if (drm_edid_block_valid(block))
303 break;
4a9a8b71
DA
304 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
305 connector->null_edid_counter++;
306 goto carp;
307 }
61e57a8d
AJ
308 }
309 if (i == 4)
310 goto carp;
311
312 /* if there's no extensions, we're done */
313 if (block[0x7e] == 0)
314 return block;
315
316 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
317 if (!new)
318 goto out;
319 block = new;
320
321 for (j = 1; j <= block[0x7e]; j++) {
322 for (i = 0; i < 4; i++) {
0ea75e23
ST
323 if (drm_do_probe_ddc_edid(adapter,
324 block + (valid_extensions + 1) * EDID_LENGTH,
325 j, EDID_LENGTH))
61e57a8d 326 goto out;
0ea75e23
ST
327 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {
328 valid_extensions++;
61e57a8d 329 break;
0ea75e23 330 }
61e57a8d
AJ
331 }
332 if (i == 4)
0ea75e23
ST
333 dev_warn(connector->dev->dev,
334 "%s: Ignoring invalid EDID block %d.\n",
335 drm_get_connector_name(connector), j);
336 }
337
338 if (valid_extensions != block[0x7e]) {
339 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
340 block[0x7e] = valid_extensions;
341 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
342 if (!new)
343 goto out;
344 block = new;
61e57a8d
AJ
345 }
346
347 return block;
348
349carp:
dcdb1674 350 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
61e57a8d
AJ
351 drm_get_connector_name(connector), j);
352
353out:
354 kfree(block);
355 return NULL;
356}
357
358/**
359 * Probe DDC presence.
360 *
361 * \param adapter : i2c device adaptor
362 * \return 1 on success
363 */
364static bool
365drm_probe_ddc(struct i2c_adapter *adapter)
366{
367 unsigned char out;
368
369 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
370}
371
372/**
373 * drm_get_edid - get EDID data, if available
374 * @connector: connector we're probing
375 * @adapter: i2c adapter to use for DDC
376 *
377 * Poke the given i2c channel to grab EDID data if possible. If found,
378 * attach it to the connector.
379 *
380 * Return edid data or NULL if we couldn't find any.
381 */
382struct edid *drm_get_edid(struct drm_connector *connector,
383 struct i2c_adapter *adapter)
384{
385 struct edid *edid = NULL;
386
387 if (drm_probe_ddc(adapter))
388 edid = (struct edid *)drm_do_get_edid(connector, adapter);
389
390 connector->display_info.raw_edid = (char *)edid;
391
392 return edid;
393
394}
395EXPORT_SYMBOL(drm_get_edid);
396
397/*** EDID parsing ***/
398
f453ba04
DA
399/**
400 * edid_vendor - match a string against EDID's obfuscated vendor field
401 * @edid: EDID to match
402 * @vendor: vendor string
403 *
404 * Returns true if @vendor is in @edid, false otherwise
405 */
406static bool edid_vendor(struct edid *edid, char *vendor)
407{
408 char edid_vendor[3];
409
410 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
411 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
412 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 413 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
414
415 return !strncmp(edid_vendor, vendor, 3);
416}
417
418/**
419 * edid_get_quirks - return quirk flags for a given EDID
420 * @edid: EDID to process
421 *
422 * This tells subsequent routines what fixes they need to apply.
423 */
424static u32 edid_get_quirks(struct edid *edid)
425{
426 struct edid_quirk *quirk;
427 int i;
428
429 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
430 quirk = &edid_quirk_list[i];
431
432 if (edid_vendor(edid, quirk->vendor) &&
433 (EDID_PRODUCT_ID(edid) == quirk->product_id))
434 return quirk->quirks;
435 }
436
437 return 0;
438}
439
440#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
441#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
442
f453ba04
DA
443/**
444 * edid_fixup_preferred - set preferred modes based on quirk list
445 * @connector: has mode list to fix up
446 * @quirks: quirks list
447 *
448 * Walk the mode list for @connector, clearing the preferred status
449 * on existing modes and setting it anew for the right mode ala @quirks.
450 */
451static void edid_fixup_preferred(struct drm_connector *connector,
452 u32 quirks)
453{
454 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 455 int target_refresh = 0;
f453ba04
DA
456
457 if (list_empty(&connector->probed_modes))
458 return;
459
460 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
461 target_refresh = 60;
462 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
463 target_refresh = 75;
464
465 preferred_mode = list_first_entry(&connector->probed_modes,
466 struct drm_display_mode, head);
467
468 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
469 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
470
471 if (cur_mode == preferred_mode)
472 continue;
473
474 /* Largest mode is preferred */
475 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
476 preferred_mode = cur_mode;
477
478 /* At a given size, try to get closest to target refresh */
479 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
480 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
481 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
482 preferred_mode = cur_mode;
483 }
484 }
485
486 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
487}
488
33c7531d
AJ
489/*
490 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
491 * @dev: Device to duplicate against
492 * @hsize: Mode width
493 * @vsize: Mode height
494 * @fresh: Mode refresh rate
495 *
496 * Walk the DMT mode list looking for a match for the given parameters.
497 * Return a newly allocated copy of the mode, or NULL if not found.
498 */
1d42bbc8
DA
499struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
500 int hsize, int vsize, int fresh)
559ee21d 501{
b1f559ec 502 struct drm_display_mode *mode = NULL;
07a5e632 503 int i;
559ee21d 504
07a5e632 505 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 506 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
559ee21d
ZY
507 if (hsize == ptr->hdisplay &&
508 vsize == ptr->vdisplay &&
509 fresh == drm_mode_vrefresh(ptr)) {
510 /* get the expected default mode */
511 mode = drm_mode_duplicate(dev, ptr);
512 break;
513 }
514 }
515 return mode;
516}
1d42bbc8 517EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 518
d1ff6409
AJ
519typedef void detailed_cb(struct detailed_timing *timing, void *closure);
520
4d76a221
AJ
521static void
522cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
523{
524 int i, n = 0;
4966b2a9 525 u8 d = ext[0x02];
4d76a221
AJ
526 u8 *det_base = ext + d;
527
4966b2a9 528 n = (127 - d) / 18;
4d76a221
AJ
529 for (i = 0; i < n; i++)
530 cb((struct detailed_timing *)(det_base + 18 * i), closure);
531}
532
cbba98f8
AJ
533static void
534vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
535{
536 unsigned int i, n = min((int)ext[0x02], 6);
537 u8 *det_base = ext + 5;
538
539 if (ext[0x01] != 1)
540 return; /* unknown version */
541
542 for (i = 0; i < n; i++)
543 cb((struct detailed_timing *)(det_base + 18 * i), closure);
544}
545
d1ff6409
AJ
546static void
547drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
548{
549 int i;
550 struct edid *edid = (struct edid *)raw_edid;
551
552 if (edid == NULL)
553 return;
554
555 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
556 cb(&(edid->detailed_timings[i]), closure);
557
4d76a221
AJ
558 for (i = 1; i <= raw_edid[0x7e]; i++) {
559 u8 *ext = raw_edid + (i * EDID_LENGTH);
560 switch (*ext) {
561 case CEA_EXT:
562 cea_for_each_detailed_block(ext, cb, closure);
563 break;
cbba98f8
AJ
564 case VTB_EXT:
565 vtb_for_each_detailed_block(ext, cb, closure);
566 break;
4d76a221
AJ
567 default:
568 break;
569 }
570 }
d1ff6409
AJ
571}
572
573static void
574is_rb(struct detailed_timing *t, void *data)
575{
576 u8 *r = (u8 *)t;
577 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
578 if (r[15] & 0x10)
579 *(bool *)data = true;
580}
581
582/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
583static bool
584drm_monitor_supports_rb(struct edid *edid)
585{
586 if (edid->revision >= 4) {
587 bool ret;
588 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
589 return ret;
590 }
591
592 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
593}
594
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595static void
596find_gtf2(struct detailed_timing *t, void *data)
597{
598 u8 *r = (u8 *)t;
599 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
600 *(u8 **)data = r;
601}
602
603/* Secondary GTF curve kicks in above some break frequency */
604static int
605drm_gtf2_hbreak(struct edid *edid)
606{
607 u8 *r = NULL;
608 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
609 return r ? (r[12] * 2) : 0;
610}
611
612static int
613drm_gtf2_2c(struct edid *edid)
614{
615 u8 *r = NULL;
616 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
617 return r ? r[13] : 0;
618}
619
620static int
621drm_gtf2_m(struct edid *edid)
622{
623 u8 *r = NULL;
624 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
625 return r ? (r[15] << 8) + r[14] : 0;
626}
627
628static int
629drm_gtf2_k(struct edid *edid)
630{
631 u8 *r = NULL;
632 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
633 return r ? r[16] : 0;
634}
635
636static int
637drm_gtf2_2j(struct edid *edid)
638{
639 u8 *r = NULL;
640 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
641 return r ? r[17] : 0;
642}
643
644/**
645 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
646 * @edid: EDID block to scan
647 */
648static int standard_timing_level(struct edid *edid)
649{
650 if (edid->revision >= 2) {
651 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
652 return LEVEL_CVT;
653 if (drm_gtf2_hbreak(edid))
654 return LEVEL_GTF2;
655 return LEVEL_GTF;
656 }
657 return LEVEL_DMT;
658}
659
23425cae
AJ
660/*
661 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
662 * monitors fill with ascii space (0x20) instead.
663 */
664static int
665bad_std_timing(u8 a, u8 b)
666{
667 return (a == 0x00 && b == 0x00) ||
668 (a == 0x01 && b == 0x01) ||
669 (a == 0x20 && b == 0x20);
670}
671
f453ba04
DA
672/**
673 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
674 * @t: standard timing params
5c61259e 675 * @timing_level: standard timing level
f453ba04
DA
676 *
677 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 678 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 679 */
7ca6adb3 680static struct drm_display_mode *
7a374350
AJ
681drm_mode_std(struct drm_connector *connector, struct edid *edid,
682 struct std_timing *t, int revision)
f453ba04 683{
7ca6adb3
AJ
684 struct drm_device *dev = connector->dev;
685 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
686 int hsize, vsize;
687 int vrefresh_rate;
0454beab
MD
688 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
689 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
690 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
691 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 692 int timing_level = standard_timing_level(edid);
5c61259e 693
23425cae
AJ
694 if (bad_std_timing(t->hsize, t->vfreq_aspect))
695 return NULL;
696
5c61259e
ZY
697 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
698 hsize = t->hsize * 8 + 248;
699 /* vrefresh_rate = vfreq + 60 */
700 vrefresh_rate = vfreq + 60;
701 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
702 if (aspect_ratio == 0) {
703 if (revision < 3)
704 vsize = hsize;
705 else
706 vsize = (hsize * 10) / 16;
707 } else if (aspect_ratio == 1)
f453ba04 708 vsize = (hsize * 3) / 4;
0454beab 709 else if (aspect_ratio == 2)
f453ba04
DA
710 vsize = (hsize * 4) / 5;
711 else
712 vsize = (hsize * 9) / 16;
a0910c8e
AJ
713
714 /* HDTV hack, part 1 */
715 if (vrefresh_rate == 60 &&
716 ((hsize == 1360 && vsize == 765) ||
717 (hsize == 1368 && vsize == 769))) {
718 hsize = 1366;
719 vsize = 768;
720 }
721
7ca6adb3
AJ
722 /*
723 * If this connector already has a mode for this size and refresh
724 * rate (because it came from detailed or CVT info), use that
725 * instead. This way we don't have to guess at interlace or
726 * reduced blanking.
727 */
522032da 728 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
729 if (m->hdisplay == hsize && m->vdisplay == vsize &&
730 drm_mode_vrefresh(m) == vrefresh_rate)
731 return NULL;
732
a0910c8e
AJ
733 /* HDTV hack, part 2 */
734 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
735 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 736 false);
559ee21d 737 mode->hdisplay = 1366;
a4967de6
AJ
738 mode->hsync_start = mode->hsync_start - 1;
739 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
740 return mode;
741 }
a0910c8e 742
559ee21d 743 /* check whether it can be found in default mode table */
1d42bbc8 744 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
559ee21d
ZY
745 if (mode)
746 return mode;
747
5c61259e
ZY
748 switch (timing_level) {
749 case LEVEL_DMT:
5c61259e
ZY
750 break;
751 case LEVEL_GTF:
752 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
753 break;
7a374350
AJ
754 case LEVEL_GTF2:
755 /*
756 * This is potentially wrong if there's ever a monitor with
757 * more than one ranges section, each claiming a different
758 * secondary GTF curve. Please don't do that.
759 */
760 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
761 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 762 drm_mode_destroy(dev, mode);
7a374350
AJ
763 mode = drm_gtf_mode_complex(dev, hsize, vsize,
764 vrefresh_rate, 0, 0,
765 drm_gtf2_m(edid),
766 drm_gtf2_2c(edid),
767 drm_gtf2_k(edid),
768 drm_gtf2_2j(edid));
769 }
770 break;
5c61259e 771 case LEVEL_CVT:
d50ba256
DA
772 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
773 false);
5c61259e
ZY
774 break;
775 }
f453ba04
DA
776 return mode;
777}
778
b58db2c6
AJ
779/*
780 * EDID is delightfully ambiguous about how interlaced modes are to be
781 * encoded. Our internal representation is of frame height, but some
782 * HDTV detailed timings are encoded as field height.
783 *
784 * The format list here is from CEA, in frame size. Technically we
785 * should be checking refresh rate too. Whatever.
786 */
787static void
788drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
789 struct detailed_pixel_timing *pt)
790{
791 int i;
792 static const struct {
793 int w, h;
794 } cea_interlaced[] = {
795 { 1920, 1080 },
796 { 720, 480 },
797 { 1440, 480 },
798 { 2880, 480 },
799 { 720, 576 },
800 { 1440, 576 },
801 { 2880, 576 },
802 };
b58db2c6
AJ
803
804 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
805 return;
806
3c581411 807 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
808 if ((mode->hdisplay == cea_interlaced[i].w) &&
809 (mode->vdisplay == cea_interlaced[i].h / 2)) {
810 mode->vdisplay *= 2;
811 mode->vsync_start *= 2;
812 mode->vsync_end *= 2;
813 mode->vtotal *= 2;
814 mode->vtotal |= 1;
815 }
816 }
817
818 mode->flags |= DRM_MODE_FLAG_INTERLACE;
819}
820
f453ba04
DA
821/**
822 * drm_mode_detailed - create a new mode from an EDID detailed timing section
823 * @dev: DRM device (needed to create new mode)
824 * @edid: EDID block
825 * @timing: EDID detailed timing info
826 * @quirks: quirks to apply
827 *
828 * An EDID detailed timing block contains enough info for us to create and
829 * return a new struct drm_display_mode.
830 */
831static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
832 struct edid *edid,
833 struct detailed_timing *timing,
834 u32 quirks)
835{
836 struct drm_display_mode *mode;
837 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
838 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
839 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
840 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
841 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
842 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
843 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
844 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
845 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 846
fc438966 847 /* ignore tiny modes */
0454beab 848 if (hactive < 64 || vactive < 64)
fc438966
AJ
849 return NULL;
850
0454beab 851 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
852 printk(KERN_WARNING "stereo mode not supported\n");
853 return NULL;
854 }
0454beab 855 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 856 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
857 }
858
fcb45611
ZY
859 /* it is incorrect if hsync/vsync width is zero */
860 if (!hsync_pulse_width || !vsync_pulse_width) {
861 DRM_DEBUG_KMS("Incorrect Detailed timing. "
862 "Wrong Hsync/Vsync pulse width\n");
863 return NULL;
864 }
f453ba04
DA
865 mode = drm_mode_create(dev);
866 if (!mode)
867 return NULL;
868
869 mode->type = DRM_MODE_TYPE_DRIVER;
870
871 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
872 timing->pixel_clock = cpu_to_le16(1088);
873
874 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
875
876 mode->hdisplay = hactive;
877 mode->hsync_start = mode->hdisplay + hsync_offset;
878 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
879 mode->htotal = mode->hdisplay + hblank;
880
881 mode->vdisplay = vactive;
882 mode->vsync_start = mode->vdisplay + vsync_offset;
883 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
884 mode->vtotal = mode->vdisplay + vblank;
f453ba04 885
7064fef5
JB
886 /* Some EDIDs have bogus h/vtotal values */
887 if (mode->hsync_end > mode->htotal)
888 mode->htotal = mode->hsync_end + 1;
889 if (mode->vsync_end > mode->vtotal)
890 mode->vtotal = mode->vsync_end + 1;
891
b58db2c6 892 drm_mode_do_interlace_quirk(mode, pt);
f453ba04 893
171fdd89
AJ
894 drm_mode_set_name(mode);
895
f453ba04 896 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 897 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
898 }
899
0454beab
MD
900 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
901 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
902 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
903 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 904
e14cbee4
MD
905 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
906 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
907
908 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
909 mode->width_mm *= 10;
910 mode->height_mm *= 10;
911 }
912
913 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
914 mode->width_mm = edid->width_cm * 10;
915 mode->height_mm = edid->height_cm * 10;
916 }
917
918 return mode;
919}
920
07a5e632 921static bool
b1f559ec 922mode_is_rb(const struct drm_display_mode *mode)
07a5e632 923{
b17e52ef
AJ
924 return (mode->htotal - mode->hdisplay == 160) &&
925 (mode->hsync_end - mode->hdisplay == 80) &&
926 (mode->hsync_end - mode->hsync_start == 32) &&
927 (mode->vsync_start - mode->vdisplay == 3);
928}
07a5e632 929
b17e52ef 930static bool
b1f559ec
CW
931mode_in_hsync_range(const struct drm_display_mode *mode,
932 struct edid *edid, u8 *t)
b17e52ef
AJ
933{
934 int hsync, hmin, hmax;
935
936 hmin = t[7];
937 if (edid->revision >= 4)
938 hmin += ((t[4] & 0x04) ? 255 : 0);
939 hmax = t[8];
940 if (edid->revision >= 4)
941 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 942 hsync = drm_mode_hsync(mode);
07a5e632 943
b17e52ef
AJ
944 return (hsync <= hmax && hsync >= hmin);
945}
946
947static bool
b1f559ec
CW
948mode_in_vsync_range(const struct drm_display_mode *mode,
949 struct edid *edid, u8 *t)
b17e52ef
AJ
950{
951 int vsync, vmin, vmax;
952
953 vmin = t[5];
954 if (edid->revision >= 4)
955 vmin += ((t[4] & 0x01) ? 255 : 0);
956 vmax = t[6];
957 if (edid->revision >= 4)
958 vmax += ((t[4] & 0x02) ? 255 : 0);
959 vsync = drm_mode_vrefresh(mode);
960
961 return (vsync <= vmax && vsync >= vmin);
962}
963
964static u32
965range_pixel_clock(struct edid *edid, u8 *t)
966{
967 /* unspecified */
968 if (t[9] == 0 || t[9] == 255)
969 return 0;
970
971 /* 1.4 with CVT support gives us real precision, yay */
972 if (edid->revision >= 4 && t[10] == 0x04)
973 return (t[9] * 10000) - ((t[12] >> 2) * 250);
974
975 /* 1.3 is pathetic, so fuzz up a bit */
976 return t[9] * 10000 + 5001;
977}
978
b17e52ef 979static bool
b1f559ec 980mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
981 struct detailed_timing *timing)
982{
983 u32 max_clock;
984 u8 *t = (u8 *)timing;
985
986 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
987 return false;
988
b17e52ef 989 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
990 return false;
991
b17e52ef 992 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
993 if (mode->clock > max_clock)
994 return false;
b17e52ef
AJ
995
996 /* 1.4 max horizontal check */
997 if (edid->revision >= 4 && t[10] == 0x04)
998 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
999 return false;
1000
1001 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1002 return false;
07a5e632
AJ
1003
1004 return true;
1005}
1006
1007/*
1008 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1009 * need to account for them.
1010 */
b17e52ef
AJ
1011static int
1012drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1013 struct detailed_timing *timing)
07a5e632
AJ
1014{
1015 int i, modes = 0;
1016 struct drm_display_mode *newmode;
1017 struct drm_device *dev = connector->dev;
1018
1019 for (i = 0; i < drm_num_dmt_modes; i++) {
b17e52ef 1020 if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
07a5e632
AJ
1021 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1022 if (newmode) {
1023 drm_mode_probed_add(connector, newmode);
1024 modes++;
1025 }
1026 }
1027 }
1028
1029 return modes;
1030}
1031
13931579
AJ
1032static void
1033do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1034{
13931579
AJ
1035 struct detailed_mode_closure *closure = c;
1036 struct detailed_non_pixel *data = &timing->data.other_data;
1037 int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
9340d8cf 1038
13931579
AJ
1039 if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE)
1040 closure->modes += drm_gtf_modes_for_range(closure->connector,
1041 closure->edid,
1042 timing);
1043}
69da3015 1044
13931579
AJ
1045static int
1046add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1047{
1048 struct detailed_mode_closure closure = {
1049 connector, edid, 0, 0, 0
1050 };
9340d8cf 1051
13931579
AJ
1052 if (version_greater(edid, 1, 0))
1053 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1054 &closure);
9340d8cf 1055
13931579 1056 return closure.modes;
9340d8cf
AJ
1057}
1058
2255be14
AJ
1059static int
1060drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1061{
1062 int i, j, m, modes = 0;
1063 struct drm_display_mode *mode;
1064 u8 *est = ((u8 *)timing) + 5;
1065
1066 for (i = 0; i < 6; i++) {
1067 for (j = 7; j > 0; j--) {
1068 m = (i * 8) + (7 - j);
3c581411 1069 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1070 break;
1071 if (est[i] & (1 << j)) {
1d42bbc8
DA
1072 mode = drm_mode_find_dmt(connector->dev,
1073 est3_modes[m].w,
1074 est3_modes[m].h,
1075 est3_modes[m].r
1076 /*, est3_modes[m].rb */);
2255be14
AJ
1077 if (mode) {
1078 drm_mode_probed_add(connector, mode);
1079 modes++;
1080 }
1081 }
1082 }
1083 }
1084
1085 return modes;
1086}
1087
13931579
AJ
1088static void
1089do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1090{
13931579 1091 struct detailed_mode_closure *closure = c;
9cf00977 1092 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1093
13931579
AJ
1094 if (data->type == EDID_DETAIL_EST_TIMINGS)
1095 closure->modes += drm_est3_modes(closure->connector, timing);
1096}
9cf00977 1097
13931579
AJ
1098/**
1099 * add_established_modes - get est. modes from EDID and add them
1100 * @edid: EDID block to scan
1101 *
1102 * Each EDID block contains a bitmap of the supported "established modes" list
1103 * (defined above). Tease them out and add them to the global modes list.
1104 */
1105static int
1106add_established_modes(struct drm_connector *connector, struct edid *edid)
1107{
1108 struct drm_device *dev = connector->dev;
1109 unsigned long est_bits = edid->established_timings.t1 |
1110 (edid->established_timings.t2 << 8) |
1111 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1112 int i, modes = 0;
1113 struct detailed_mode_closure closure = {
1114 connector, edid, 0, 0, 0
1115 };
9cf00977 1116
13931579
AJ
1117 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1118 if (est_bits & (1<<i)) {
1119 struct drm_display_mode *newmode;
1120 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1121 if (newmode) {
1122 drm_mode_probed_add(connector, newmode);
1123 modes++;
1124 }
1125 }
9cf00977
AJ
1126 }
1127
13931579
AJ
1128 if (version_greater(edid, 1, 0))
1129 drm_for_each_detailed_block((u8 *)edid,
1130 do_established_modes, &closure);
1131
1132 return modes + closure.modes;
1133}
1134
1135static void
1136do_standard_modes(struct detailed_timing *timing, void *c)
1137{
1138 struct detailed_mode_closure *closure = c;
1139 struct detailed_non_pixel *data = &timing->data.other_data;
1140 struct drm_connector *connector = closure->connector;
1141 struct edid *edid = closure->edid;
1142
1143 if (data->type == EDID_DETAIL_STD_MODES) {
1144 int i;
9cf00977
AJ
1145 for (i = 0; i < 6; i++) {
1146 struct std_timing *std;
1147 struct drm_display_mode *newmode;
1148
1149 std = &data->data.timings[i];
7a374350
AJ
1150 newmode = drm_mode_std(connector, edid, std,
1151 edid->revision);
9cf00977
AJ
1152 if (newmode) {
1153 drm_mode_probed_add(connector, newmode);
13931579 1154 closure->modes++;
9cf00977
AJ
1155 }
1156 }
9cf00977 1157 }
9cf00977
AJ
1158}
1159
f453ba04 1160/**
13931579 1161 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1162 * @edid: EDID block to scan
f453ba04 1163 *
13931579
AJ
1164 * Standard modes can be calculated using the appropriate standard (DMT,
1165 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1166 */
13931579
AJ
1167static int
1168add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1169{
9cf00977 1170 int i, modes = 0;
13931579
AJ
1171 struct detailed_mode_closure closure = {
1172 connector, edid, 0, 0, 0
1173 };
1174
1175 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1176 struct drm_display_mode *newmode;
1177
1178 newmode = drm_mode_std(connector, edid,
1179 &edid->standard_timings[i],
1180 edid->revision);
1181 if (newmode) {
1182 drm_mode_probed_add(connector, newmode);
1183 modes++;
1184 }
1185 }
1186
1187 if (version_greater(edid, 1, 0))
1188 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1189 &closure);
1190
1191 /* XXX should also look for standard codes in VTB blocks */
1192
1193 return modes + closure.modes;
1194}
f453ba04 1195
13931579
AJ
1196static int drm_cvt_modes(struct drm_connector *connector,
1197 struct detailed_timing *timing)
1198{
1199 int i, j, modes = 0;
1200 struct drm_display_mode *newmode;
1201 struct drm_device *dev = connector->dev;
1202 struct cvt_timing *cvt;
1203 const int rates[] = { 60, 85, 75, 60, 50 };
1204 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1205
13931579
AJ
1206 for (i = 0; i < 4; i++) {
1207 int uninitialized_var(width), height;
1208 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1209
13931579 1210 if (!memcmp(cvt->code, empty, 3))
9cf00977 1211 continue;
f453ba04 1212
13931579
AJ
1213 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1214 switch (cvt->code[1] & 0x0c) {
1215 case 0x00:
1216 width = height * 4 / 3;
1217 break;
1218 case 0x04:
1219 width = height * 16 / 9;
1220 break;
1221 case 0x08:
1222 width = height * 16 / 10;
1223 break;
1224 case 0x0c:
1225 width = height * 15 / 9;
1226 break;
1227 }
1228
1229 for (j = 1; j < 5; j++) {
1230 if (cvt->code[2] & (1 << j)) {
1231 newmode = drm_cvt_mode(dev, width, height,
1232 rates[j], j == 0,
1233 false, false);
1234 if (newmode) {
1235 drm_mode_probed_add(connector, newmode);
1236 modes++;
1237 }
1238 }
1239 }
f453ba04
DA
1240 }
1241
1242 return modes;
1243}
9cf00977 1244
13931579
AJ
1245static void
1246do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1247{
13931579
AJ
1248 struct detailed_mode_closure *closure = c;
1249 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1250
13931579
AJ
1251 if (data->type == EDID_DETAIL_CVT_3BYTE)
1252 closure->modes += drm_cvt_modes(closure->connector, timing);
1253}
882f0219 1254
13931579
AJ
1255static int
1256add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1257{
1258 struct detailed_mode_closure closure = {
1259 connector, edid, 0, 0, 0
1260 };
882f0219 1261
13931579
AJ
1262 if (version_greater(edid, 1, 2))
1263 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1264
13931579 1265 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1266
13931579
AJ
1267 return closure.modes;
1268}
1269
1270static void
1271do_detailed_mode(struct detailed_timing *timing, void *c)
1272{
1273 struct detailed_mode_closure *closure = c;
1274 struct drm_display_mode *newmode;
1275
1276 if (timing->pixel_clock) {
1277 newmode = drm_mode_detailed(closure->connector->dev,
1278 closure->edid, timing,
1279 closure->quirks);
1280 if (!newmode)
1281 return;
1282
1283 if (closure->preferred)
1284 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1285
1286 drm_mode_probed_add(closure->connector, newmode);
1287 closure->modes++;
1288 closure->preferred = 0;
882f0219 1289 }
13931579 1290}
882f0219 1291
13931579
AJ
1292/*
1293 * add_detailed_modes - Add modes from detailed timings
1294 * @connector: attached connector
1295 * @edid: EDID block to scan
1296 * @quirks: quirks to apply
1297 */
1298static int
1299add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1300 u32 quirks)
1301{
1302 struct detailed_mode_closure closure = {
1303 connector,
1304 edid,
1305 1,
1306 quirks,
1307 0
1308 };
1309
1310 if (closure.preferred && !version_greater(edid, 1, 3))
1311 closure.preferred =
1312 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1313
1314 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1315
1316 return closure.modes;
882f0219 1317}
f453ba04 1318
f23c20c8 1319#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1320#define AUDIO_BLOCK 0x01
54ac76f8 1321#define VIDEO_BLOCK 0x02
f23c20c8 1322#define VENDOR_BLOCK 0x03
76adaa34 1323#define SPEAKER_BLOCK 0x04
8fe9790d 1324#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1325#define EDID_CEA_YCRCB444 (1 << 5)
1326#define EDID_CEA_YCRCB422 (1 << 4)
8fe9790d 1327
f23c20c8 1328/**
8fe9790d 1329 * Search EDID for CEA extension block.
f23c20c8 1330 */
eccaca28 1331u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1332{
8fe9790d
ZW
1333 u8 *edid_ext = NULL;
1334 int i;
f23c20c8
ML
1335
1336 /* No EDID or EDID extensions */
1337 if (edid == NULL || edid->extensions == 0)
8fe9790d 1338 return NULL;
f23c20c8 1339
f23c20c8 1340 /* Find CEA extension */
7466f4cc 1341 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1342 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1343 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1344 break;
1345 }
1346
7466f4cc 1347 if (i == edid->extensions)
8fe9790d
ZW
1348 return NULL;
1349
1350 return edid_ext;
1351}
eccaca28 1352EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1353
54ac76f8
CS
1354static int
1355do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1356{
1357 struct drm_device *dev = connector->dev;
1358 u8 * mode, cea_mode;
1359 int modes = 0;
1360
1361 for (mode = db; mode < db + len; mode++) {
1362 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1363 if (cea_mode < drm_num_cea_modes) {
1364 struct drm_display_mode *newmode;
1365 newmode = drm_mode_duplicate(dev,
1366 &edid_cea_modes[cea_mode]);
1367 if (newmode) {
1368 drm_mode_probed_add(connector, newmode);
1369 modes++;
1370 }
1371 }
1372 }
1373
1374 return modes;
1375}
1376
1377static int
1378add_cea_modes(struct drm_connector *connector, struct edid *edid)
1379{
1380 u8 * cea = drm_find_cea_extension(edid);
1381 u8 * db, dbl;
1382 int modes = 0;
1383
1384 if (cea && cea[1] >= 3) {
1385 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1386 dbl = db[0] & 0x1f;
1387 if (((db[0] & 0xe0) >> 5) == VIDEO_BLOCK)
1388 modes += do_cea_modes (connector, db+1, dbl);
1389 }
1390 }
1391
1392 return modes;
1393}
1394
76adaa34
WF
1395static void
1396parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db)
1397{
1398 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1399
1400 connector->dvi_dual = db[6] & 1;
1401 connector->max_tmds_clock = db[7] * 5;
1402
1403 connector->latency_present[0] = db[8] >> 7;
1404 connector->latency_present[1] = (db[8] >> 6) & 1;
1405 connector->video_latency[0] = db[9];
1406 connector->audio_latency[0] = db[10];
1407 connector->video_latency[1] = db[11];
1408 connector->audio_latency[1] = db[12];
1409
1410 DRM_LOG_KMS("HDMI: DVI dual %d, "
1411 "max TMDS clock %d, "
1412 "latency present %d %d, "
1413 "video latency %d %d, "
1414 "audio latency %d %d\n",
1415 connector->dvi_dual,
1416 connector->max_tmds_clock,
1417 (int) connector->latency_present[0],
1418 (int) connector->latency_present[1],
1419 connector->video_latency[0],
1420 connector->video_latency[1],
1421 connector->audio_latency[0],
1422 connector->audio_latency[1]);
1423}
1424
1425static void
1426monitor_name(struct detailed_timing *t, void *data)
1427{
1428 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1429 *(u8 **)data = t->data.other_data.data.str.str;
1430}
1431
1432/**
1433 * drm_edid_to_eld - build ELD from EDID
1434 * @connector: connector corresponding to the HDMI/DP sink
1435 * @edid: EDID to parse
1436 *
1437 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1438 * Some ELD fields are left to the graphics driver caller:
1439 * - Conn_Type
1440 * - HDCP
1441 * - Port_ID
1442 */
1443void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1444{
1445 uint8_t *eld = connector->eld;
1446 u8 *cea;
1447 u8 *name;
1448 u8 *db;
1449 int sad_count = 0;
1450 int mnl;
1451 int dbl;
1452
1453 memset(eld, 0, sizeof(connector->eld));
1454
1455 cea = drm_find_cea_extension(edid);
1456 if (!cea) {
1457 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1458 return;
1459 }
1460
1461 name = NULL;
1462 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1463 for (mnl = 0; name && mnl < 13; mnl++) {
1464 if (name[mnl] == 0x0a)
1465 break;
1466 eld[20 + mnl] = name[mnl];
1467 }
1468 eld[4] = (cea[1] << 5) | mnl;
1469 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1470
1471 eld[0] = 2 << 3; /* ELD version: 2 */
1472
1473 eld[16] = edid->mfg_id[0];
1474 eld[17] = edid->mfg_id[1];
1475 eld[18] = edid->prod_code[0];
1476 eld[19] = edid->prod_code[1];
1477
a0ab734d
CS
1478 if (cea[1] >= 3)
1479 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) {
1480 dbl = db[0] & 0x1f;
1481
1482 switch ((db[0] & 0xe0) >> 5) {
1483 case AUDIO_BLOCK:
1484 /* Audio Data Block, contains SADs */
1485 sad_count = dbl / 3;
1486 memcpy(eld + 20 + mnl, &db[1], dbl);
1487 break;
1488 case SPEAKER_BLOCK:
1489 /* Speaker Allocation Data Block */
1490 eld[7] = db[1];
1491 break;
1492 case VENDOR_BLOCK:
1493 /* HDMI Vendor-Specific Data Block */
1494 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0)
1495 parse_hdmi_vsdb(connector, db);
1496 break;
1497 default:
1498 break;
1499 }
76adaa34 1500 }
76adaa34
WF
1501 eld[5] |= sad_count << 4;
1502 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1503
1504 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1505}
1506EXPORT_SYMBOL(drm_edid_to_eld);
1507
1508/**
1509 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1510 * @connector: connector associated with the HDMI/DP sink
1511 * @mode: the display mode
1512 */
1513int drm_av_sync_delay(struct drm_connector *connector,
1514 struct drm_display_mode *mode)
1515{
1516 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1517 int a, v;
1518
1519 if (!connector->latency_present[0])
1520 return 0;
1521 if (!connector->latency_present[1])
1522 i = 0;
1523
1524 a = connector->audio_latency[i];
1525 v = connector->video_latency[i];
1526
1527 /*
1528 * HDMI/DP sink doesn't support audio or video?
1529 */
1530 if (a == 255 || v == 255)
1531 return 0;
1532
1533 /*
1534 * Convert raw EDID values to millisecond.
1535 * Treat unknown latency as 0ms.
1536 */
1537 if (a)
1538 a = min(2 * (a - 1), 500);
1539 if (v)
1540 v = min(2 * (v - 1), 500);
1541
1542 return max(v - a, 0);
1543}
1544EXPORT_SYMBOL(drm_av_sync_delay);
1545
1546/**
1547 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1548 * @encoder: the encoder just changed display mode
1549 * @mode: the adjusted display mode
1550 *
1551 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1552 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1553 */
1554struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1555 struct drm_display_mode *mode)
1556{
1557 struct drm_connector *connector;
1558 struct drm_device *dev = encoder->dev;
1559
1560 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1561 if (connector->encoder == encoder && connector->eld[0])
1562 return connector;
1563
1564 return NULL;
1565}
1566EXPORT_SYMBOL(drm_select_eld);
1567
8fe9790d
ZW
1568/**
1569 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1570 * @edid: monitor EDID information
1571 *
1572 * Parse the CEA extension according to CEA-861-B.
1573 * Return true if HDMI, false if not or unknown.
1574 */
1575bool drm_detect_hdmi_monitor(struct edid *edid)
1576{
1577 u8 *edid_ext;
1578 int i, hdmi_id;
1579 int start_offset, end_offset;
1580 bool is_hdmi = false;
1581
1582 edid_ext = drm_find_cea_extension(edid);
1583 if (!edid_ext)
f23c20c8
ML
1584 goto end;
1585
1586 /* Data block offset in CEA extension block */
1587 start_offset = 4;
1588 end_offset = edid_ext[2];
1589
1590 /*
1591 * Because HDMI identifier is in Vendor Specific Block,
1592 * search it from all data blocks of CEA extension.
1593 */
1594 for (i = start_offset; i < end_offset;
1595 /* Increased by data block len */
1596 i += ((edid_ext[i] & 0x1f) + 1)) {
1597 /* Find vendor specific block */
1598 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1599 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1600 edid_ext[i + 3] << 16;
1601 /* Find HDMI identifier */
1602 if (hdmi_id == HDMI_IDENTIFIER)
1603 is_hdmi = true;
1604 break;
1605 }
1606 }
1607
1608end:
1609 return is_hdmi;
1610}
1611EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1612
8fe9790d
ZW
1613/**
1614 * drm_detect_monitor_audio - check monitor audio capability
1615 *
1616 * Monitor should have CEA extension block.
1617 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1618 * audio' only. If there is any audio extension block and supported
1619 * audio format, assume at least 'basic audio' support, even if 'basic
1620 * audio' is not defined in EDID.
1621 *
1622 */
1623bool drm_detect_monitor_audio(struct edid *edid)
1624{
1625 u8 *edid_ext;
1626 int i, j;
1627 bool has_audio = false;
1628 int start_offset, end_offset;
1629
1630 edid_ext = drm_find_cea_extension(edid);
1631 if (!edid_ext)
1632 goto end;
1633
1634 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1635
1636 if (has_audio) {
1637 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1638 goto end;
1639 }
1640
1641 /* Data block offset in CEA extension block */
1642 start_offset = 4;
1643 end_offset = edid_ext[2];
1644
1645 for (i = start_offset; i < end_offset;
1646 i += ((edid_ext[i] & 0x1f) + 1)) {
1647 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1648 has_audio = true;
1649 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1650 DRM_DEBUG_KMS("CEA audio format %d\n",
1651 (edid_ext[i + j] >> 3) & 0xf);
1652 goto end;
1653 }
1654 }
1655end:
1656 return has_audio;
1657}
1658EXPORT_SYMBOL(drm_detect_monitor_audio);
1659
3b11228b
JB
1660/**
1661 * drm_add_display_info - pull display info out if present
1662 * @edid: EDID data
1663 * @info: display info (attached to connector)
1664 *
1665 * Grab any available display info and stuff it into the drm_display_info
1666 * structure that's part of the connector. Useful for tracking bpp and
1667 * color spaces.
1668 */
1669static void drm_add_display_info(struct edid *edid,
1670 struct drm_display_info *info)
1671{
ebec9a7b
JB
1672 u8 *edid_ext;
1673
3b11228b
JB
1674 info->width_mm = edid->width_cm * 10;
1675 info->height_mm = edid->height_cm * 10;
1676
1677 /* driver figures it out in this case */
1678 info->bpc = 0;
da05a5a7 1679 info->color_formats = 0;
3b11228b 1680
a988bc72 1681 if (edid->revision < 3)
3b11228b
JB
1682 return;
1683
1684 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1685 return;
1686
a988bc72
LPC
1687 /* Get data from CEA blocks if present */
1688 edid_ext = drm_find_cea_extension(edid);
1689 if (edid_ext) {
1690 info->cea_rev = edid_ext[1];
1691
1692 /* The existence of a CEA block should imply RGB support */
1693 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1694 if (edid_ext[3] & EDID_CEA_YCRCB444)
1695 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1696 if (edid_ext[3] & EDID_CEA_YCRCB422)
1697 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1698 }
1699
1700 /* Only defined for 1.4 with digital displays */
1701 if (edid->revision < 4)
1702 return;
1703
3b11228b
JB
1704 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1705 case DRM_EDID_DIGITAL_DEPTH_6:
1706 info->bpc = 6;
1707 break;
1708 case DRM_EDID_DIGITAL_DEPTH_8:
1709 info->bpc = 8;
1710 break;
1711 case DRM_EDID_DIGITAL_DEPTH_10:
1712 info->bpc = 10;
1713 break;
1714 case DRM_EDID_DIGITAL_DEPTH_12:
1715 info->bpc = 12;
1716 break;
1717 case DRM_EDID_DIGITAL_DEPTH_14:
1718 info->bpc = 14;
1719 break;
1720 case DRM_EDID_DIGITAL_DEPTH_16:
1721 info->bpc = 16;
1722 break;
1723 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1724 default:
1725 info->bpc = 0;
1726 break;
1727 }
da05a5a7 1728
a988bc72 1729 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
1730 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1731 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1732 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1733 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
1734}
1735
f453ba04
DA
1736/**
1737 * drm_add_edid_modes - add modes from EDID data, if available
1738 * @connector: connector we're probing
1739 * @edid: edid data
1740 *
1741 * Add the specified modes to the connector's mode list.
1742 *
1743 * Return number of modes added or 0 if we couldn't find any.
1744 */
1745int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1746{
1747 int num_modes = 0;
1748 u32 quirks;
1749
1750 if (edid == NULL) {
1751 return 0;
1752 }
3c537889 1753 if (!drm_edid_is_valid(edid)) {
dcdb1674 1754 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1755 drm_get_connector_name(connector));
1756 return 0;
1757 }
1758
1759 quirks = edid_get_quirks(edid);
1760
c867df70
AJ
1761 /*
1762 * EDID spec says modes should be preferred in this order:
1763 * - preferred detailed mode
1764 * - other detailed modes from base block
1765 * - detailed modes from extension blocks
1766 * - CVT 3-byte code modes
1767 * - standard timing codes
1768 * - established timing codes
1769 * - modes inferred from GTF or CVT range information
1770 *
13931579 1771 * We get this pretty much right.
c867df70
AJ
1772 *
1773 * XXX order for additional mode types in extension blocks?
1774 */
13931579
AJ
1775 num_modes += add_detailed_modes(connector, edid, quirks);
1776 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
1777 num_modes += add_standard_modes(connector, edid);
1778 num_modes += add_established_modes(connector, edid);
13931579 1779 num_modes += add_inferred_modes(connector, edid);
54ac76f8 1780 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
1781
1782 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1783 edid_fixup_preferred(connector, quirks);
1784
3b11228b 1785 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
1786
1787 return num_modes;
1788}
1789EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
1790
1791/**
1792 * drm_add_modes_noedid - add modes for the connectors without EDID
1793 * @connector: connector we're probing
1794 * @hdisplay: the horizontal display limit
1795 * @vdisplay: the vertical display limit
1796 *
1797 * Add the specified modes to the connector's mode list. Only when the
1798 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1799 *
1800 * Return number of modes added or 0 if we couldn't find any.
1801 */
1802int drm_add_modes_noedid(struct drm_connector *connector,
1803 int hdisplay, int vdisplay)
1804{
1805 int i, count, num_modes = 0;
b1f559ec 1806 struct drm_display_mode *mode;
f0fda0a4
ZY
1807 struct drm_device *dev = connector->dev;
1808
1809 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1810 if (hdisplay < 0)
1811 hdisplay = 0;
1812 if (vdisplay < 0)
1813 vdisplay = 0;
1814
1815 for (i = 0; i < count; i++) {
b1f559ec 1816 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
1817 if (hdisplay && vdisplay) {
1818 /*
1819 * Only when two are valid, they will be used to check
1820 * whether the mode should be added to the mode list of
1821 * the connector.
1822 */
1823 if (ptr->hdisplay > hdisplay ||
1824 ptr->vdisplay > vdisplay)
1825 continue;
1826 }
f985dedb
AJ
1827 if (drm_mode_vrefresh(ptr) > 61)
1828 continue;
f0fda0a4
ZY
1829 mode = drm_mode_duplicate(dev, ptr);
1830 if (mode) {
1831 drm_mode_probed_add(connector, mode);
1832 num_modes++;
1833 }
1834 }
1835 return num_modes;
1836}
1837EXPORT_SYMBOL(drm_add_modes_noedid);