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CommitLineData
f453ba04
DA
1/*
2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
61e57a8d 5 * Copyright 2010 Red Hat, Inc.
f453ba04
DA
6 *
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
8 * FB layer.
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
20 * of the Software.
21 *
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
29 */
30#include <linux/kernel.h>
5a0e3ad6 31#include <linux/slab.h>
f453ba04 32#include <linux/i2c.h>
47819ba2 33#include <linux/module.h>
f453ba04
DA
34#include "drmP.h"
35#include "drm_edid.h"
38fcbb67 36#include "drm_edid_modes.h"
f453ba04 37
13931579
AJ
38#define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
f453ba04 41
d1ff6409
AJ
42#define EDID_EST_TIMINGS 16
43#define EDID_STD_TIMINGS 8
44#define EDID_DETAILED_TIMINGS 4
f453ba04
DA
45
46/*
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
51 */
52
53/* First detailed mode wrong, use largest 60Hz mode */
54#define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55/* Reported 135MHz pixel clock is too high, needs adjustment */
56#define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57/* Prefer the largest mode at 75 Hz */
58#define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59/* Detail timing is in cm not mm */
60#define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61/* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
63 */
64#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65/* Monitor forgot to set the first detailed is preferred bit. */
66#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67/* use +hsync +vsync for detailed mode */
68#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
bc42aabc
AJ
69/* Force reduced-blanking timings for detailed modes */
70#define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
3c537889 71
13931579
AJ
72struct detailed_mode_closure {
73 struct drm_connector *connector;
74 struct edid *edid;
75 bool preferred;
76 u32 quirks;
77 int modes;
78};
f453ba04 79
5c61259e
ZY
80#define LEVEL_DMT 0
81#define LEVEL_GTF 1
7a374350
AJ
82#define LEVEL_GTF2 2
83#define LEVEL_CVT 3
5c61259e 84
f453ba04 85static struct edid_quirk {
c51a3fd6 86 char vendor[4];
f453ba04
DA
87 int product_id;
88 u32 quirks;
89} edid_quirk_list[] = {
6f33814b
PM
90 /* ASUS VW222S */
91 { "ACI", 0x22a2, EDID_QUIRK_FORCE_REDUCED_BLANKING },
92
f453ba04
DA
93 /* Acer AL1706 */
94 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
95 /* Acer F51 */
96 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
97 /* Unknown Acer */
98 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
99
100 /* Belinea 10 15 55 */
101 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
102 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
103
104 /* Envision Peripherals, Inc. EN-7100e */
105 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
ba1163de
AJ
106 /* Envision EN2028 */
107 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
f453ba04
DA
108
109 /* Funai Electronics PM36B */
110 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
111 EDID_QUIRK_DETAILED_IN_CM },
112
113 /* LG Philips LCD LP154W01-A5 */
114 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
115 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
116
117 /* Philips 107p5 CRT */
118 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
119
120 /* Proview AY765C */
121 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
122
123 /* Samsung SyncMaster 205BW. Note: irony */
124 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
125 /* Samsung SyncMaster 22[5-6]BW */
126 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
127 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
bc42aabc
AJ
128
129 /* ViewSonic VA2026w */
130 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
f453ba04
DA
131};
132
61e57a8d 133/*** DDC fetch and block validation ***/
f453ba04 134
083ae056
AJ
135static const u8 edid_header[] = {
136 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
137};
f453ba04 138
051963d4
TR
139 /*
140 * Sanity check the header of the base EDID block. Return 8 if the header
141 * is perfect, down to 0 if it's totally wrong.
142 */
143int drm_edid_header_is_valid(const u8 *raw_edid)
144{
145 int i, score = 0;
146
147 for (i = 0; i < sizeof(edid_header); i++)
148 if (raw_edid[i] == edid_header[i])
149 score++;
150
151 return score;
152}
153EXPORT_SYMBOL(drm_edid_header_is_valid);
154
47819ba2
AJ
155static int edid_fixup __read_mostly = 6;
156module_param_named(edid_fixup, edid_fixup, int, 0400);
157MODULE_PARM_DESC(edid_fixup,
158 "Minimum number of valid EDID header bytes (0-8, default 6)");
051963d4 159
61e57a8d
AJ
160/*
161 * Sanity check the EDID block (base or extension). Return 0 if the block
162 * doesn't check out, or 1 if it's valid.
f453ba04 163 */
0b2443ed 164bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
f453ba04 165{
61e57a8d 166 int i;
f453ba04 167 u8 csum = 0;
61e57a8d 168 struct edid *edid = (struct edid *)raw_edid;
f453ba04 169
47819ba2
AJ
170 if (edid_fixup > 8 || edid_fixup < 0)
171 edid_fixup = 6;
172
f89ec8a4 173 if (block == 0) {
051963d4 174 int score = drm_edid_header_is_valid(raw_edid);
61e57a8d 175 if (score == 8) ;
47819ba2 176 else if (score >= edid_fixup) {
61e57a8d
AJ
177 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
178 memcpy(raw_edid, edid_header, sizeof(edid_header));
179 } else {
180 goto bad;
181 }
182 }
f453ba04
DA
183
184 for (i = 0; i < EDID_LENGTH; i++)
185 csum += raw_edid[i];
186 if (csum) {
0b2443ed
JG
187 if (print_bad_edid) {
188 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
189 }
4a638b4e
AJ
190
191 /* allow CEA to slide through, switches mangle this */
192 if (raw_edid[0] != 0x02)
193 goto bad;
f453ba04
DA
194 }
195
61e57a8d
AJ
196 /* per-block-type checks */
197 switch (raw_edid[0]) {
198 case 0: /* base */
199 if (edid->version != 1) {
200 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
201 goto bad;
202 }
862b89c0 203
61e57a8d
AJ
204 if (edid->revision > 4)
205 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
206 break;
862b89c0 207
61e57a8d
AJ
208 default:
209 break;
210 }
47ee4ccf 211
f453ba04
DA
212 return 1;
213
214bad:
0b2443ed 215 if (raw_edid && print_bad_edid) {
f49dadb8 216 printk(KERN_ERR "Raw EDID:\n");
0aff47f2
TV
217 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
218 raw_edid, EDID_LENGTH, false);
f453ba04
DA
219 }
220 return 0;
221}
da0df92b 222EXPORT_SYMBOL(drm_edid_block_valid);
61e57a8d
AJ
223
224/**
225 * drm_edid_is_valid - sanity check EDID data
226 * @edid: EDID data
227 *
228 * Sanity-check an entire EDID record (including extensions)
229 */
230bool drm_edid_is_valid(struct edid *edid)
231{
232 int i;
233 u8 *raw = (u8 *)edid;
234
235 if (!edid)
236 return false;
237
238 for (i = 0; i <= edid->extensions; i++)
0b2443ed 239 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
61e57a8d
AJ
240 return false;
241
242 return true;
243}
3c537889 244EXPORT_SYMBOL(drm_edid_is_valid);
f453ba04 245
61e57a8d
AJ
246#define DDC_SEGMENT_ADDR 0x30
247/**
248 * Get EDID information via I2C.
249 *
250 * \param adapter : i2c device adaptor
251 * \param buf : EDID data buffer to be filled
252 * \param len : EDID data buffer length
253 * \return 0 on success or -1 on failure.
254 *
255 * Try to fetch EDID information by calling i2c driver function.
256 */
257static int
258drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
259 int block, int len)
260{
261 unsigned char start = block * EDID_LENGTH;
cd004b3f
S
262 unsigned char segment = block >> 1;
263 unsigned char xfers = segment ? 3 : 2;
4819d2e4
CW
264 int ret, retries = 5;
265
266 /* The core i2c driver will automatically retry the transfer if the
267 * adapter reports EAGAIN. However, we find that bit-banging transfers
268 * are susceptible to errors under a heavily loaded machine and
269 * generate spurious NAKs and timeouts. Retrying the transfer
270 * of the individual block a few times seems to overcome this.
271 */
272 do {
273 struct i2c_msg msgs[] = {
274 {
cd004b3f
S
275 .addr = DDC_SEGMENT_ADDR,
276 .flags = 0,
277 .len = 1,
278 .buf = &segment,
279 }, {
4819d2e4
CW
280 .addr = DDC_ADDR,
281 .flags = 0,
282 .len = 1,
283 .buf = &start,
284 }, {
285 .addr = DDC_ADDR,
286 .flags = I2C_M_RD,
287 .len = len,
288 .buf = buf,
289 }
290 };
cd004b3f
S
291
292 /*
293 * Avoid sending the segment addr to not upset non-compliant ddc
294 * monitors.
295 */
296 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
297
9292f37e
ED
298 if (ret == -ENXIO) {
299 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
300 adapter->name);
301 break;
302 }
cd004b3f 303 } while (ret != xfers && --retries);
4819d2e4 304
cd004b3f 305 return ret == xfers ? 0 : -1;
61e57a8d
AJ
306}
307
4a9a8b71
DA
308static bool drm_edid_is_zero(u8 *in_edid, int length)
309{
310 int i;
311 u32 *raw_edid = (u32 *)in_edid;
312
313 for (i = 0; i < length / 4; i++)
314 if (*(raw_edid + i) != 0)
315 return false;
316 return true;
317}
318
61e57a8d
AJ
319static u8 *
320drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
321{
0ea75e23 322 int i, j = 0, valid_extensions = 0;
61e57a8d 323 u8 *block, *new;
0b2443ed 324 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
61e57a8d
AJ
325
326 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
327 return NULL;
328
329 /* base block fetch */
330 for (i = 0; i < 4; i++) {
331 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
332 goto out;
0b2443ed 333 if (drm_edid_block_valid(block, 0, print_bad_edid))
61e57a8d 334 break;
4a9a8b71
DA
335 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
336 connector->null_edid_counter++;
337 goto carp;
338 }
61e57a8d
AJ
339 }
340 if (i == 4)
341 goto carp;
342
343 /* if there's no extensions, we're done */
344 if (block[0x7e] == 0)
345 return block;
346
347 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
348 if (!new)
349 goto out;
350 block = new;
351
352 for (j = 1; j <= block[0x7e]; j++) {
353 for (i = 0; i < 4; i++) {
0ea75e23
ST
354 if (drm_do_probe_ddc_edid(adapter,
355 block + (valid_extensions + 1) * EDID_LENGTH,
356 j, EDID_LENGTH))
61e57a8d 357 goto out;
0b2443ed 358 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
0ea75e23 359 valid_extensions++;
61e57a8d 360 break;
0ea75e23 361 }
61e57a8d
AJ
362 }
363 if (i == 4)
0ea75e23
ST
364 dev_warn(connector->dev->dev,
365 "%s: Ignoring invalid EDID block %d.\n",
366 drm_get_connector_name(connector), j);
367 }
368
369 if (valid_extensions != block[0x7e]) {
370 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
371 block[0x7e] = valid_extensions;
372 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
373 if (!new)
374 goto out;
375 block = new;
61e57a8d
AJ
376 }
377
378 return block;
379
380carp:
0b2443ed
JG
381 if (print_bad_edid) {
382 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
383 drm_get_connector_name(connector), j);
384 }
385 connector->bad_edid_counter++;
61e57a8d
AJ
386
387out:
388 kfree(block);
389 return NULL;
390}
391
392/**
393 * Probe DDC presence.
394 *
395 * \param adapter : i2c device adaptor
396 * \return 1 on success
397 */
398static bool
399drm_probe_ddc(struct i2c_adapter *adapter)
400{
401 unsigned char out;
402
403 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
404}
405
406/**
407 * drm_get_edid - get EDID data, if available
408 * @connector: connector we're probing
409 * @adapter: i2c adapter to use for DDC
410 *
411 * Poke the given i2c channel to grab EDID data if possible. If found,
412 * attach it to the connector.
413 *
414 * Return edid data or NULL if we couldn't find any.
415 */
416struct edid *drm_get_edid(struct drm_connector *connector,
417 struct i2c_adapter *adapter)
418{
419 struct edid *edid = NULL;
420
421 if (drm_probe_ddc(adapter))
422 edid = (struct edid *)drm_do_get_edid(connector, adapter);
423
61e57a8d 424 return edid;
61e57a8d
AJ
425}
426EXPORT_SYMBOL(drm_get_edid);
427
428/*** EDID parsing ***/
429
f453ba04
DA
430/**
431 * edid_vendor - match a string against EDID's obfuscated vendor field
432 * @edid: EDID to match
433 * @vendor: vendor string
434 *
435 * Returns true if @vendor is in @edid, false otherwise
436 */
437static bool edid_vendor(struct edid *edid, char *vendor)
438{
439 char edid_vendor[3];
440
441 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
442 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
443 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
16456c87 444 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
f453ba04
DA
445
446 return !strncmp(edid_vendor, vendor, 3);
447}
448
449/**
450 * edid_get_quirks - return quirk flags for a given EDID
451 * @edid: EDID to process
452 *
453 * This tells subsequent routines what fixes they need to apply.
454 */
455static u32 edid_get_quirks(struct edid *edid)
456{
457 struct edid_quirk *quirk;
458 int i;
459
460 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
461 quirk = &edid_quirk_list[i];
462
463 if (edid_vendor(edid, quirk->vendor) &&
464 (EDID_PRODUCT_ID(edid) == quirk->product_id))
465 return quirk->quirks;
466 }
467
468 return 0;
469}
470
471#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
472#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
473
f453ba04
DA
474/**
475 * edid_fixup_preferred - set preferred modes based on quirk list
476 * @connector: has mode list to fix up
477 * @quirks: quirks list
478 *
479 * Walk the mode list for @connector, clearing the preferred status
480 * on existing modes and setting it anew for the right mode ala @quirks.
481 */
482static void edid_fixup_preferred(struct drm_connector *connector,
483 u32 quirks)
484{
485 struct drm_display_mode *t, *cur_mode, *preferred_mode;
f890607b 486 int target_refresh = 0;
f453ba04
DA
487
488 if (list_empty(&connector->probed_modes))
489 return;
490
491 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
492 target_refresh = 60;
493 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
494 target_refresh = 75;
495
496 preferred_mode = list_first_entry(&connector->probed_modes,
497 struct drm_display_mode, head);
498
499 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
500 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
501
502 if (cur_mode == preferred_mode)
503 continue;
504
505 /* Largest mode is preferred */
506 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
507 preferred_mode = cur_mode;
508
509 /* At a given size, try to get closest to target refresh */
510 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
511 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
512 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
513 preferred_mode = cur_mode;
514 }
515 }
516
517 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
518}
519
f6e252ba
AJ
520static bool
521mode_is_rb(const struct drm_display_mode *mode)
522{
523 return (mode->htotal - mode->hdisplay == 160) &&
524 (mode->hsync_end - mode->hdisplay == 80) &&
525 (mode->hsync_end - mode->hsync_start == 32) &&
526 (mode->vsync_start - mode->vdisplay == 3);
527}
528
33c7531d
AJ
529/*
530 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
531 * @dev: Device to duplicate against
532 * @hsize: Mode width
533 * @vsize: Mode height
534 * @fresh: Mode refresh rate
f6e252ba 535 * @rb: Mode reduced-blanking-ness
33c7531d
AJ
536 *
537 * Walk the DMT mode list looking for a match for the given parameters.
538 * Return a newly allocated copy of the mode, or NULL if not found.
539 */
1d42bbc8 540struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
f6e252ba
AJ
541 int hsize, int vsize, int fresh,
542 bool rb)
559ee21d 543{
07a5e632 544 int i;
559ee21d 545
07a5e632 546 for (i = 0; i < drm_num_dmt_modes; i++) {
b1f559ec 547 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f8b46a05
AJ
548 if (hsize != ptr->hdisplay)
549 continue;
550 if (vsize != ptr->vdisplay)
551 continue;
552 if (fresh != drm_mode_vrefresh(ptr))
553 continue;
f6e252ba
AJ
554 if (rb != mode_is_rb(ptr))
555 continue;
f8b46a05
AJ
556
557 return drm_mode_duplicate(dev, ptr);
559ee21d 558 }
f8b46a05
AJ
559
560 return NULL;
559ee21d 561}
1d42bbc8 562EXPORT_SYMBOL(drm_mode_find_dmt);
23425cae 563
d1ff6409
AJ
564typedef void detailed_cb(struct detailed_timing *timing, void *closure);
565
4d76a221
AJ
566static void
567cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
568{
569 int i, n = 0;
4966b2a9 570 u8 d = ext[0x02];
4d76a221
AJ
571 u8 *det_base = ext + d;
572
4966b2a9 573 n = (127 - d) / 18;
4d76a221
AJ
574 for (i = 0; i < n; i++)
575 cb((struct detailed_timing *)(det_base + 18 * i), closure);
576}
577
cbba98f8
AJ
578static void
579vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
580{
581 unsigned int i, n = min((int)ext[0x02], 6);
582 u8 *det_base = ext + 5;
583
584 if (ext[0x01] != 1)
585 return; /* unknown version */
586
587 for (i = 0; i < n; i++)
588 cb((struct detailed_timing *)(det_base + 18 * i), closure);
589}
590
d1ff6409
AJ
591static void
592drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
593{
594 int i;
595 struct edid *edid = (struct edid *)raw_edid;
596
597 if (edid == NULL)
598 return;
599
600 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
601 cb(&(edid->detailed_timings[i]), closure);
602
4d76a221
AJ
603 for (i = 1; i <= raw_edid[0x7e]; i++) {
604 u8 *ext = raw_edid + (i * EDID_LENGTH);
605 switch (*ext) {
606 case CEA_EXT:
607 cea_for_each_detailed_block(ext, cb, closure);
608 break;
cbba98f8
AJ
609 case VTB_EXT:
610 vtb_for_each_detailed_block(ext, cb, closure);
611 break;
4d76a221
AJ
612 default:
613 break;
614 }
615 }
d1ff6409
AJ
616}
617
618static void
619is_rb(struct detailed_timing *t, void *data)
620{
621 u8 *r = (u8 *)t;
622 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
623 if (r[15] & 0x10)
624 *(bool *)data = true;
625}
626
627/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
628static bool
629drm_monitor_supports_rb(struct edid *edid)
630{
631 if (edid->revision >= 4) {
b196a498 632 bool ret = false;
d1ff6409
AJ
633 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
634 return ret;
635 }
636
637 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
638}
639
7a374350
AJ
640static void
641find_gtf2(struct detailed_timing *t, void *data)
642{
643 u8 *r = (u8 *)t;
644 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
645 *(u8 **)data = r;
646}
647
648/* Secondary GTF curve kicks in above some break frequency */
649static int
650drm_gtf2_hbreak(struct edid *edid)
651{
652 u8 *r = NULL;
653 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
654 return r ? (r[12] * 2) : 0;
655}
656
657static int
658drm_gtf2_2c(struct edid *edid)
659{
660 u8 *r = NULL;
661 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
662 return r ? r[13] : 0;
663}
664
665static int
666drm_gtf2_m(struct edid *edid)
667{
668 u8 *r = NULL;
669 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
670 return r ? (r[15] << 8) + r[14] : 0;
671}
672
673static int
674drm_gtf2_k(struct edid *edid)
675{
676 u8 *r = NULL;
677 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
678 return r ? r[16] : 0;
679}
680
681static int
682drm_gtf2_2j(struct edid *edid)
683{
684 u8 *r = NULL;
685 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
686 return r ? r[17] : 0;
687}
688
689/**
690 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
691 * @edid: EDID block to scan
692 */
693static int standard_timing_level(struct edid *edid)
694{
695 if (edid->revision >= 2) {
696 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
697 return LEVEL_CVT;
698 if (drm_gtf2_hbreak(edid))
699 return LEVEL_GTF2;
700 return LEVEL_GTF;
701 }
702 return LEVEL_DMT;
703}
704
23425cae
AJ
705/*
706 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
707 * monitors fill with ascii space (0x20) instead.
708 */
709static int
710bad_std_timing(u8 a, u8 b)
711{
712 return (a == 0x00 && b == 0x00) ||
713 (a == 0x01 && b == 0x01) ||
714 (a == 0x20 && b == 0x20);
715}
716
f453ba04
DA
717/**
718 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
719 * @t: standard timing params
5c61259e 720 * @timing_level: standard timing level
f453ba04
DA
721 *
722 * Take the standard timing params (in this case width, aspect, and refresh)
5c61259e 723 * and convert them into a real mode using CVT/GTF/DMT.
f453ba04 724 */
7ca6adb3 725static struct drm_display_mode *
7a374350
AJ
726drm_mode_std(struct drm_connector *connector, struct edid *edid,
727 struct std_timing *t, int revision)
f453ba04 728{
7ca6adb3
AJ
729 struct drm_device *dev = connector->dev;
730 struct drm_display_mode *m, *mode = NULL;
5c61259e
ZY
731 int hsize, vsize;
732 int vrefresh_rate;
0454beab
MD
733 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
734 >> EDID_TIMING_ASPECT_SHIFT;
5c61259e
ZY
735 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
736 >> EDID_TIMING_VFREQ_SHIFT;
7a374350 737 int timing_level = standard_timing_level(edid);
5c61259e 738
23425cae
AJ
739 if (bad_std_timing(t->hsize, t->vfreq_aspect))
740 return NULL;
741
5c61259e
ZY
742 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
743 hsize = t->hsize * 8 + 248;
744 /* vrefresh_rate = vfreq + 60 */
745 vrefresh_rate = vfreq + 60;
746 /* the vdisplay is calculated based on the aspect ratio */
f066a17d
AJ
747 if (aspect_ratio == 0) {
748 if (revision < 3)
749 vsize = hsize;
750 else
751 vsize = (hsize * 10) / 16;
752 } else if (aspect_ratio == 1)
f453ba04 753 vsize = (hsize * 3) / 4;
0454beab 754 else if (aspect_ratio == 2)
f453ba04
DA
755 vsize = (hsize * 4) / 5;
756 else
757 vsize = (hsize * 9) / 16;
a0910c8e
AJ
758
759 /* HDTV hack, part 1 */
760 if (vrefresh_rate == 60 &&
761 ((hsize == 1360 && vsize == 765) ||
762 (hsize == 1368 && vsize == 769))) {
763 hsize = 1366;
764 vsize = 768;
765 }
766
7ca6adb3
AJ
767 /*
768 * If this connector already has a mode for this size and refresh
769 * rate (because it came from detailed or CVT info), use that
770 * instead. This way we don't have to guess at interlace or
771 * reduced blanking.
772 */
522032da 773 list_for_each_entry(m, &connector->probed_modes, head)
7ca6adb3
AJ
774 if (m->hdisplay == hsize && m->vdisplay == vsize &&
775 drm_mode_vrefresh(m) == vrefresh_rate)
776 return NULL;
777
a0910c8e
AJ
778 /* HDTV hack, part 2 */
779 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
780 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
d50ba256 781 false);
559ee21d 782 mode->hdisplay = 1366;
a4967de6
AJ
783 mode->hsync_start = mode->hsync_start - 1;
784 mode->hsync_end = mode->hsync_end - 1;
559ee21d
ZY
785 return mode;
786 }
a0910c8e 787
559ee21d 788 /* check whether it can be found in default mode table */
f6e252ba
AJ
789 if (drm_monitor_supports_rb(edid)) {
790 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
791 true);
792 if (mode)
793 return mode;
794 }
795 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
559ee21d
ZY
796 if (mode)
797 return mode;
798
f6e252ba 799 /* okay, generate it */
5c61259e
ZY
800 switch (timing_level) {
801 case LEVEL_DMT:
5c61259e
ZY
802 break;
803 case LEVEL_GTF:
804 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
805 break;
7a374350
AJ
806 case LEVEL_GTF2:
807 /*
808 * This is potentially wrong if there's ever a monitor with
809 * more than one ranges section, each claiming a different
810 * secondary GTF curve. Please don't do that.
811 */
812 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
fc48f169
TI
813 if (!mode)
814 return NULL;
7a374350 815 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
aefd330e 816 drm_mode_destroy(dev, mode);
7a374350
AJ
817 mode = drm_gtf_mode_complex(dev, hsize, vsize,
818 vrefresh_rate, 0, 0,
819 drm_gtf2_m(edid),
820 drm_gtf2_2c(edid),
821 drm_gtf2_k(edid),
822 drm_gtf2_2j(edid));
823 }
824 break;
5c61259e 825 case LEVEL_CVT:
d50ba256
DA
826 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
827 false);
5c61259e
ZY
828 break;
829 }
f453ba04
DA
830 return mode;
831}
832
b58db2c6
AJ
833/*
834 * EDID is delightfully ambiguous about how interlaced modes are to be
835 * encoded. Our internal representation is of frame height, but some
836 * HDTV detailed timings are encoded as field height.
837 *
838 * The format list here is from CEA, in frame size. Technically we
839 * should be checking refresh rate too. Whatever.
840 */
841static void
842drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
843 struct detailed_pixel_timing *pt)
844{
845 int i;
846 static const struct {
847 int w, h;
848 } cea_interlaced[] = {
849 { 1920, 1080 },
850 { 720, 480 },
851 { 1440, 480 },
852 { 2880, 480 },
853 { 720, 576 },
854 { 1440, 576 },
855 { 2880, 576 },
856 };
b58db2c6
AJ
857
858 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
859 return;
860
3c581411 861 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
b58db2c6
AJ
862 if ((mode->hdisplay == cea_interlaced[i].w) &&
863 (mode->vdisplay == cea_interlaced[i].h / 2)) {
864 mode->vdisplay *= 2;
865 mode->vsync_start *= 2;
866 mode->vsync_end *= 2;
867 mode->vtotal *= 2;
868 mode->vtotal |= 1;
869 }
870 }
871
872 mode->flags |= DRM_MODE_FLAG_INTERLACE;
873}
874
f453ba04
DA
875/**
876 * drm_mode_detailed - create a new mode from an EDID detailed timing section
877 * @dev: DRM device (needed to create new mode)
878 * @edid: EDID block
879 * @timing: EDID detailed timing info
880 * @quirks: quirks to apply
881 *
882 * An EDID detailed timing block contains enough info for us to create and
883 * return a new struct drm_display_mode.
884 */
885static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
886 struct edid *edid,
887 struct detailed_timing *timing,
888 u32 quirks)
889{
890 struct drm_display_mode *mode;
891 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
0454beab
MD
892 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
893 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
894 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
895 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
e14cbee4
MD
896 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
897 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
898 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
899 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
f453ba04 900
fc438966 901 /* ignore tiny modes */
0454beab 902 if (hactive < 64 || vactive < 64)
fc438966
AJ
903 return NULL;
904
0454beab 905 if (pt->misc & DRM_EDID_PT_STEREO) {
f453ba04
DA
906 printk(KERN_WARNING "stereo mode not supported\n");
907 return NULL;
908 }
0454beab 909 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
79b7dcb2 910 printk(KERN_WARNING "composite sync not supported\n");
f453ba04
DA
911 }
912
fcb45611
ZY
913 /* it is incorrect if hsync/vsync width is zero */
914 if (!hsync_pulse_width || !vsync_pulse_width) {
915 DRM_DEBUG_KMS("Incorrect Detailed timing. "
916 "Wrong Hsync/Vsync pulse width\n");
917 return NULL;
918 }
bc42aabc
AJ
919
920 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
921 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
922 if (!mode)
923 return NULL;
924
925 goto set_size;
926 }
927
f453ba04
DA
928 mode = drm_mode_create(dev);
929 if (!mode)
930 return NULL;
931
f453ba04 932 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
0454beab
MD
933 timing->pixel_clock = cpu_to_le16(1088);
934
935 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
936
937 mode->hdisplay = hactive;
938 mode->hsync_start = mode->hdisplay + hsync_offset;
939 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
940 mode->htotal = mode->hdisplay + hblank;
941
942 mode->vdisplay = vactive;
943 mode->vsync_start = mode->vdisplay + vsync_offset;
944 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
945 mode->vtotal = mode->vdisplay + vblank;
f453ba04 946
7064fef5
JB
947 /* Some EDIDs have bogus h/vtotal values */
948 if (mode->hsync_end > mode->htotal)
949 mode->htotal = mode->hsync_end + 1;
950 if (mode->vsync_end > mode->vtotal)
951 mode->vtotal = mode->vsync_end + 1;
952
b58db2c6 953 drm_mode_do_interlace_quirk(mode, pt);
f453ba04
DA
954
955 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
0454beab 956 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
f453ba04
DA
957 }
958
0454beab
MD
959 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
960 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
961 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
962 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
f453ba04 963
bc42aabc 964set_size:
e14cbee4
MD
965 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
966 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
f453ba04
DA
967
968 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
969 mode->width_mm *= 10;
970 mode->height_mm *= 10;
971 }
972
973 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
974 mode->width_mm = edid->width_cm * 10;
975 mode->height_mm = edid->height_cm * 10;
976 }
977
bc42aabc
AJ
978 mode->type = DRM_MODE_TYPE_DRIVER;
979 drm_mode_set_name(mode);
980
f453ba04
DA
981 return mode;
982}
983
b17e52ef 984static bool
b1f559ec
CW
985mode_in_hsync_range(const struct drm_display_mode *mode,
986 struct edid *edid, u8 *t)
b17e52ef
AJ
987{
988 int hsync, hmin, hmax;
989
990 hmin = t[7];
991 if (edid->revision >= 4)
992 hmin += ((t[4] & 0x04) ? 255 : 0);
993 hmax = t[8];
994 if (edid->revision >= 4)
995 hmax += ((t[4] & 0x08) ? 255 : 0);
07a5e632 996 hsync = drm_mode_hsync(mode);
07a5e632 997
b17e52ef
AJ
998 return (hsync <= hmax && hsync >= hmin);
999}
1000
1001static bool
b1f559ec
CW
1002mode_in_vsync_range(const struct drm_display_mode *mode,
1003 struct edid *edid, u8 *t)
b17e52ef
AJ
1004{
1005 int vsync, vmin, vmax;
1006
1007 vmin = t[5];
1008 if (edid->revision >= 4)
1009 vmin += ((t[4] & 0x01) ? 255 : 0);
1010 vmax = t[6];
1011 if (edid->revision >= 4)
1012 vmax += ((t[4] & 0x02) ? 255 : 0);
1013 vsync = drm_mode_vrefresh(mode);
1014
1015 return (vsync <= vmax && vsync >= vmin);
1016}
1017
1018static u32
1019range_pixel_clock(struct edid *edid, u8 *t)
1020{
1021 /* unspecified */
1022 if (t[9] == 0 || t[9] == 255)
1023 return 0;
1024
1025 /* 1.4 with CVT support gives us real precision, yay */
1026 if (edid->revision >= 4 && t[10] == 0x04)
1027 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1028
1029 /* 1.3 is pathetic, so fuzz up a bit */
1030 return t[9] * 10000 + 5001;
1031}
1032
b17e52ef 1033static bool
b1f559ec 1034mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
b17e52ef
AJ
1035 struct detailed_timing *timing)
1036{
1037 u32 max_clock;
1038 u8 *t = (u8 *)timing;
1039
1040 if (!mode_in_hsync_range(mode, edid, t))
07a5e632
AJ
1041 return false;
1042
b17e52ef 1043 if (!mode_in_vsync_range(mode, edid, t))
07a5e632
AJ
1044 return false;
1045
b17e52ef 1046 if ((max_clock = range_pixel_clock(edid, t)))
07a5e632
AJ
1047 if (mode->clock > max_clock)
1048 return false;
b17e52ef
AJ
1049
1050 /* 1.4 max horizontal check */
1051 if (edid->revision >= 4 && t[10] == 0x04)
1052 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1053 return false;
1054
1055 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1056 return false;
07a5e632
AJ
1057
1058 return true;
1059}
1060
7b668ebe
TI
1061static bool valid_inferred_mode(const struct drm_connector *connector,
1062 const struct drm_display_mode *mode)
1063{
1064 struct drm_display_mode *m;
1065 bool ok = false;
1066
1067 list_for_each_entry(m, &connector->probed_modes, head) {
1068 if (mode->hdisplay == m->hdisplay &&
1069 mode->vdisplay == m->vdisplay &&
1070 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1071 return false; /* duplicated */
1072 if (mode->hdisplay <= m->hdisplay &&
1073 mode->vdisplay <= m->vdisplay)
1074 ok = true;
1075 }
1076 return ok;
1077}
1078
b17e52ef 1079static int
cd4cd3de 1080drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
b17e52ef 1081 struct detailed_timing *timing)
07a5e632
AJ
1082{
1083 int i, modes = 0;
1084 struct drm_display_mode *newmode;
1085 struct drm_device *dev = connector->dev;
1086
1087 for (i = 0; i < drm_num_dmt_modes; i++) {
7b668ebe
TI
1088 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1089 valid_inferred_mode(connector, drm_dmt_modes + i)) {
07a5e632
AJ
1090 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1091 if (newmode) {
1092 drm_mode_probed_add(connector, newmode);
1093 modes++;
1094 }
1095 }
1096 }
1097
1098 return modes;
1099}
1100
c09dedb7
TI
1101/* fix up 1366x768 mode from 1368x768;
1102 * GFT/CVT can't express 1366 width which isn't dividable by 8
1103 */
1104static void fixup_mode_1366x768(struct drm_display_mode *mode)
1105{
1106 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1107 mode->hdisplay = 1366;
1108 mode->hsync_start--;
1109 mode->hsync_end--;
1110 drm_mode_set_name(mode);
1111 }
1112}
1113
b309bd37
AJ
1114static int
1115drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1116 struct detailed_timing *timing)
1117{
1118 int i, modes = 0;
1119 struct drm_display_mode *newmode;
1120 struct drm_device *dev = connector->dev;
1121
1122 for (i = 0; i < num_extra_modes; i++) {
1123 const struct minimode *m = &extra_modes[i];
1124 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
fc48f169
TI
1125 if (!newmode)
1126 return modes;
b309bd37 1127
c09dedb7 1128 fixup_mode_1366x768(newmode);
7b668ebe
TI
1129 if (!mode_in_range(newmode, edid, timing) ||
1130 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1131 drm_mode_destroy(dev, newmode);
1132 continue;
1133 }
1134
1135 drm_mode_probed_add(connector, newmode);
1136 modes++;
1137 }
1138
1139 return modes;
1140}
1141
1142static int
1143drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1144 struct detailed_timing *timing)
1145{
1146 int i, modes = 0;
1147 struct drm_display_mode *newmode;
1148 struct drm_device *dev = connector->dev;
1149 bool rb = drm_monitor_supports_rb(edid);
1150
1151 for (i = 0; i < num_extra_modes; i++) {
1152 const struct minimode *m = &extra_modes[i];
1153 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
fc48f169
TI
1154 if (!newmode)
1155 return modes;
b309bd37 1156
c09dedb7 1157 fixup_mode_1366x768(newmode);
7b668ebe
TI
1158 if (!mode_in_range(newmode, edid, timing) ||
1159 !valid_inferred_mode(connector, newmode)) {
b309bd37
AJ
1160 drm_mode_destroy(dev, newmode);
1161 continue;
1162 }
1163
1164 drm_mode_probed_add(connector, newmode);
1165 modes++;
1166 }
1167
1168 return modes;
1169}
1170
13931579
AJ
1171static void
1172do_inferred_modes(struct detailed_timing *timing, void *c)
9340d8cf 1173{
13931579
AJ
1174 struct detailed_mode_closure *closure = c;
1175 struct detailed_non_pixel *data = &timing->data.other_data;
b309bd37 1176 struct detailed_data_monitor_range *range = &data->data.range;
9340d8cf 1177
cb21aafe
AJ
1178 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1179 return;
1180
1181 closure->modes += drm_dmt_modes_for_range(closure->connector,
1182 closure->edid,
1183 timing);
b309bd37
AJ
1184
1185 if (!version_greater(closure->edid, 1, 1))
1186 return; /* GTF not defined yet */
1187
1188 switch (range->flags) {
1189 case 0x02: /* secondary gtf, XXX could do more */
1190 case 0x00: /* default gtf */
1191 closure->modes += drm_gtf_modes_for_range(closure->connector,
1192 closure->edid,
1193 timing);
1194 break;
1195 case 0x04: /* cvt, only in 1.4+ */
1196 if (!version_greater(closure->edid, 1, 3))
1197 break;
1198
1199 closure->modes += drm_cvt_modes_for_range(closure->connector,
1200 closure->edid,
1201 timing);
1202 break;
1203 case 0x01: /* just the ranges, no formula */
1204 default:
1205 break;
1206 }
13931579 1207}
69da3015 1208
13931579
AJ
1209static int
1210add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1211{
1212 struct detailed_mode_closure closure = {
1213 connector, edid, 0, 0, 0
1214 };
9340d8cf 1215
13931579
AJ
1216 if (version_greater(edid, 1, 0))
1217 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1218 &closure);
9340d8cf 1219
13931579 1220 return closure.modes;
9340d8cf
AJ
1221}
1222
2255be14
AJ
1223static int
1224drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1225{
1226 int i, j, m, modes = 0;
1227 struct drm_display_mode *mode;
1228 u8 *est = ((u8 *)timing) + 5;
1229
1230 for (i = 0; i < 6; i++) {
1231 for (j = 7; j > 0; j--) {
1232 m = (i * 8) + (7 - j);
3c581411 1233 if (m >= ARRAY_SIZE(est3_modes))
2255be14
AJ
1234 break;
1235 if (est[i] & (1 << j)) {
1d42bbc8
DA
1236 mode = drm_mode_find_dmt(connector->dev,
1237 est3_modes[m].w,
1238 est3_modes[m].h,
f6e252ba
AJ
1239 est3_modes[m].r,
1240 est3_modes[m].rb);
2255be14
AJ
1241 if (mode) {
1242 drm_mode_probed_add(connector, mode);
1243 modes++;
1244 }
1245 }
1246 }
1247 }
1248
1249 return modes;
1250}
1251
13931579
AJ
1252static void
1253do_established_modes(struct detailed_timing *timing, void *c)
9cf00977 1254{
13931579 1255 struct detailed_mode_closure *closure = c;
9cf00977 1256 struct detailed_non_pixel *data = &timing->data.other_data;
9cf00977 1257
13931579
AJ
1258 if (data->type == EDID_DETAIL_EST_TIMINGS)
1259 closure->modes += drm_est3_modes(closure->connector, timing);
1260}
9cf00977 1261
13931579
AJ
1262/**
1263 * add_established_modes - get est. modes from EDID and add them
1264 * @edid: EDID block to scan
1265 *
1266 * Each EDID block contains a bitmap of the supported "established modes" list
1267 * (defined above). Tease them out and add them to the global modes list.
1268 */
1269static int
1270add_established_modes(struct drm_connector *connector, struct edid *edid)
1271{
1272 struct drm_device *dev = connector->dev;
1273 unsigned long est_bits = edid->established_timings.t1 |
1274 (edid->established_timings.t2 << 8) |
1275 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
1276 int i, modes = 0;
1277 struct detailed_mode_closure closure = {
1278 connector, edid, 0, 0, 0
1279 };
9cf00977 1280
13931579
AJ
1281 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1282 if (est_bits & (1<<i)) {
1283 struct drm_display_mode *newmode;
1284 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1285 if (newmode) {
1286 drm_mode_probed_add(connector, newmode);
1287 modes++;
1288 }
1289 }
9cf00977
AJ
1290 }
1291
13931579
AJ
1292 if (version_greater(edid, 1, 0))
1293 drm_for_each_detailed_block((u8 *)edid,
1294 do_established_modes, &closure);
1295
1296 return modes + closure.modes;
1297}
1298
1299static void
1300do_standard_modes(struct detailed_timing *timing, void *c)
1301{
1302 struct detailed_mode_closure *closure = c;
1303 struct detailed_non_pixel *data = &timing->data.other_data;
1304 struct drm_connector *connector = closure->connector;
1305 struct edid *edid = closure->edid;
1306
1307 if (data->type == EDID_DETAIL_STD_MODES) {
1308 int i;
9cf00977
AJ
1309 for (i = 0; i < 6; i++) {
1310 struct std_timing *std;
1311 struct drm_display_mode *newmode;
1312
1313 std = &data->data.timings[i];
7a374350
AJ
1314 newmode = drm_mode_std(connector, edid, std,
1315 edid->revision);
9cf00977
AJ
1316 if (newmode) {
1317 drm_mode_probed_add(connector, newmode);
13931579 1318 closure->modes++;
9cf00977
AJ
1319 }
1320 }
9cf00977 1321 }
9cf00977
AJ
1322}
1323
f453ba04 1324/**
13931579 1325 * add_standard_modes - get std. modes from EDID and add them
f453ba04 1326 * @edid: EDID block to scan
f453ba04 1327 *
13931579
AJ
1328 * Standard modes can be calculated using the appropriate standard (DMT,
1329 * GTF or CVT. Grab them from @edid and add them to the list.
f453ba04 1330 */
13931579
AJ
1331static int
1332add_standard_modes(struct drm_connector *connector, struct edid *edid)
f453ba04 1333{
9cf00977 1334 int i, modes = 0;
13931579
AJ
1335 struct detailed_mode_closure closure = {
1336 connector, edid, 0, 0, 0
1337 };
1338
1339 for (i = 0; i < EDID_STD_TIMINGS; i++) {
1340 struct drm_display_mode *newmode;
1341
1342 newmode = drm_mode_std(connector, edid,
1343 &edid->standard_timings[i],
1344 edid->revision);
1345 if (newmode) {
1346 drm_mode_probed_add(connector, newmode);
1347 modes++;
1348 }
1349 }
1350
1351 if (version_greater(edid, 1, 0))
1352 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1353 &closure);
1354
1355 /* XXX should also look for standard codes in VTB blocks */
1356
1357 return modes + closure.modes;
1358}
f453ba04 1359
13931579
AJ
1360static int drm_cvt_modes(struct drm_connector *connector,
1361 struct detailed_timing *timing)
1362{
1363 int i, j, modes = 0;
1364 struct drm_display_mode *newmode;
1365 struct drm_device *dev = connector->dev;
1366 struct cvt_timing *cvt;
1367 const int rates[] = { 60, 85, 75, 60, 50 };
1368 const u8 empty[3] = { 0, 0, 0 };
a327f6b8 1369
13931579
AJ
1370 for (i = 0; i < 4; i++) {
1371 int uninitialized_var(width), height;
1372 cvt = &(timing->data.other_data.data.cvt[i]);
f453ba04 1373
13931579 1374 if (!memcmp(cvt->code, empty, 3))
9cf00977 1375 continue;
f453ba04 1376
13931579
AJ
1377 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1378 switch (cvt->code[1] & 0x0c) {
1379 case 0x00:
1380 width = height * 4 / 3;
1381 break;
1382 case 0x04:
1383 width = height * 16 / 9;
1384 break;
1385 case 0x08:
1386 width = height * 16 / 10;
1387 break;
1388 case 0x0c:
1389 width = height * 15 / 9;
1390 break;
1391 }
1392
1393 for (j = 1; j < 5; j++) {
1394 if (cvt->code[2] & (1 << j)) {
1395 newmode = drm_cvt_mode(dev, width, height,
1396 rates[j], j == 0,
1397 false, false);
1398 if (newmode) {
1399 drm_mode_probed_add(connector, newmode);
1400 modes++;
1401 }
1402 }
1403 }
f453ba04
DA
1404 }
1405
1406 return modes;
1407}
9cf00977 1408
13931579
AJ
1409static void
1410do_cvt_mode(struct detailed_timing *timing, void *c)
882f0219 1411{
13931579
AJ
1412 struct detailed_mode_closure *closure = c;
1413 struct detailed_non_pixel *data = &timing->data.other_data;
882f0219 1414
13931579
AJ
1415 if (data->type == EDID_DETAIL_CVT_3BYTE)
1416 closure->modes += drm_cvt_modes(closure->connector, timing);
1417}
882f0219 1418
13931579
AJ
1419static int
1420add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1421{
1422 struct detailed_mode_closure closure = {
1423 connector, edid, 0, 0, 0
1424 };
882f0219 1425
13931579
AJ
1426 if (version_greater(edid, 1, 2))
1427 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
882f0219 1428
13931579 1429 /* XXX should also look for CVT codes in VTB blocks */
882f0219 1430
13931579
AJ
1431 return closure.modes;
1432}
1433
1434static void
1435do_detailed_mode(struct detailed_timing *timing, void *c)
1436{
1437 struct detailed_mode_closure *closure = c;
1438 struct drm_display_mode *newmode;
1439
1440 if (timing->pixel_clock) {
1441 newmode = drm_mode_detailed(closure->connector->dev,
1442 closure->edid, timing,
1443 closure->quirks);
1444 if (!newmode)
1445 return;
1446
1447 if (closure->preferred)
1448 newmode->type |= DRM_MODE_TYPE_PREFERRED;
1449
1450 drm_mode_probed_add(closure->connector, newmode);
1451 closure->modes++;
1452 closure->preferred = 0;
882f0219 1453 }
13931579 1454}
882f0219 1455
13931579
AJ
1456/*
1457 * add_detailed_modes - Add modes from detailed timings
1458 * @connector: attached connector
1459 * @edid: EDID block to scan
1460 * @quirks: quirks to apply
1461 */
1462static int
1463add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1464 u32 quirks)
1465{
1466 struct detailed_mode_closure closure = {
1467 connector,
1468 edid,
1469 1,
1470 quirks,
1471 0
1472 };
1473
1474 if (closure.preferred && !version_greater(edid, 1, 3))
1475 closure.preferred =
1476 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1477
1478 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1479
1480 return closure.modes;
882f0219 1481}
f453ba04 1482
f23c20c8 1483#define HDMI_IDENTIFIER 0x000C03
8fe9790d 1484#define AUDIO_BLOCK 0x01
54ac76f8 1485#define VIDEO_BLOCK 0x02
f23c20c8 1486#define VENDOR_BLOCK 0x03
76adaa34 1487#define SPEAKER_BLOCK 0x04
8fe9790d 1488#define EDID_BASIC_AUDIO (1 << 6)
a988bc72
LPC
1489#define EDID_CEA_YCRCB444 (1 << 5)
1490#define EDID_CEA_YCRCB422 (1 << 4)
8fe9790d 1491
f23c20c8 1492/**
8fe9790d 1493 * Search EDID for CEA extension block.
f23c20c8 1494 */
eccaca28 1495u8 *drm_find_cea_extension(struct edid *edid)
f23c20c8 1496{
8fe9790d
ZW
1497 u8 *edid_ext = NULL;
1498 int i;
f23c20c8
ML
1499
1500 /* No EDID or EDID extensions */
1501 if (edid == NULL || edid->extensions == 0)
8fe9790d 1502 return NULL;
f23c20c8 1503
f23c20c8 1504 /* Find CEA extension */
7466f4cc 1505 for (i = 0; i < edid->extensions; i++) {
8fe9790d
ZW
1506 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1507 if (edid_ext[0] == CEA_EXT)
f23c20c8
ML
1508 break;
1509 }
1510
7466f4cc 1511 if (i == edid->extensions)
8fe9790d
ZW
1512 return NULL;
1513
1514 return edid_ext;
1515}
eccaca28 1516EXPORT_SYMBOL(drm_find_cea_extension);
8fe9790d 1517
54ac76f8
CS
1518static int
1519do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
1520{
1521 struct drm_device *dev = connector->dev;
1522 u8 * mode, cea_mode;
1523 int modes = 0;
1524
1525 for (mode = db; mode < db + len; mode++) {
1526 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
1527 if (cea_mode < drm_num_cea_modes) {
1528 struct drm_display_mode *newmode;
1529 newmode = drm_mode_duplicate(dev,
1530 &edid_cea_modes[cea_mode]);
1531 if (newmode) {
1532 drm_mode_probed_add(connector, newmode);
1533 modes++;
1534 }
1535 }
1536 }
1537
1538 return modes;
1539}
1540
9e50b9d5
VS
1541static int
1542cea_db_payload_len(const u8 *db)
1543{
1544 return db[0] & 0x1f;
1545}
1546
1547static int
1548cea_db_tag(const u8 *db)
1549{
1550 return db[0] >> 5;
1551}
1552
1553static int
1554cea_revision(const u8 *cea)
1555{
1556 return cea[1];
1557}
1558
1559static int
1560cea_db_offsets(const u8 *cea, int *start, int *end)
1561{
1562 /* Data block offset in CEA extension block */
1563 *start = 4;
1564 *end = cea[2];
1565 if (*end == 0)
1566 *end = 127;
1567 if (*end < 4 || *end > 127)
1568 return -ERANGE;
1569 return 0;
1570}
1571
1572#define for_each_cea_db(cea, i, start, end) \
1573 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
1574
54ac76f8
CS
1575static int
1576add_cea_modes(struct drm_connector *connector, struct edid *edid)
1577{
1578 u8 * cea = drm_find_cea_extension(edid);
1579 u8 * db, dbl;
1580 int modes = 0;
1581
9e50b9d5
VS
1582 if (cea && cea_revision(cea) >= 3) {
1583 int i, start, end;
1584
1585 if (cea_db_offsets(cea, &start, &end))
1586 return 0;
1587
1588 for_each_cea_db(cea, i, start, end) {
1589 db = &cea[i];
1590 dbl = cea_db_payload_len(db);
1591
1592 if (cea_db_tag(db) == VIDEO_BLOCK)
54ac76f8
CS
1593 modes += do_cea_modes (connector, db+1, dbl);
1594 }
1595 }
1596
1597 return modes;
1598}
1599
76adaa34 1600static void
8504072a 1601parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
76adaa34 1602{
8504072a 1603 u8 len = cea_db_payload_len(db);
76adaa34 1604
8504072a
VS
1605 if (len >= 6) {
1606 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
1607 connector->dvi_dual = db[6] & 1;
1608 }
1609 if (len >= 7)
1610 connector->max_tmds_clock = db[7] * 5;
1611 if (len >= 8) {
1612 connector->latency_present[0] = db[8] >> 7;
1613 connector->latency_present[1] = (db[8] >> 6) & 1;
1614 }
1615 if (len >= 9)
1616 connector->video_latency[0] = db[9];
1617 if (len >= 10)
1618 connector->audio_latency[0] = db[10];
1619 if (len >= 11)
1620 connector->video_latency[1] = db[11];
1621 if (len >= 12)
1622 connector->audio_latency[1] = db[12];
76adaa34
WF
1623
1624 DRM_LOG_KMS("HDMI: DVI dual %d, "
1625 "max TMDS clock %d, "
1626 "latency present %d %d, "
1627 "video latency %d %d, "
1628 "audio latency %d %d\n",
1629 connector->dvi_dual,
1630 connector->max_tmds_clock,
1631 (int) connector->latency_present[0],
1632 (int) connector->latency_present[1],
1633 connector->video_latency[0],
1634 connector->video_latency[1],
1635 connector->audio_latency[0],
1636 connector->audio_latency[1]);
1637}
1638
1639static void
1640monitor_name(struct detailed_timing *t, void *data)
1641{
1642 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
1643 *(u8 **)data = t->data.other_data.data.str.str;
1644}
1645
14f77fdd
VS
1646static bool cea_db_is_hdmi_vsdb(const u8 *db)
1647{
1648 int hdmi_id;
1649
1650 if (cea_db_tag(db) != VENDOR_BLOCK)
1651 return false;
1652
1653 if (cea_db_payload_len(db) < 5)
1654 return false;
1655
1656 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
1657
1658 return hdmi_id == HDMI_IDENTIFIER;
1659}
1660
76adaa34
WF
1661/**
1662 * drm_edid_to_eld - build ELD from EDID
1663 * @connector: connector corresponding to the HDMI/DP sink
1664 * @edid: EDID to parse
1665 *
1666 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
1667 * Some ELD fields are left to the graphics driver caller:
1668 * - Conn_Type
1669 * - HDCP
1670 * - Port_ID
1671 */
1672void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
1673{
1674 uint8_t *eld = connector->eld;
1675 u8 *cea;
1676 u8 *name;
1677 u8 *db;
1678 int sad_count = 0;
1679 int mnl;
1680 int dbl;
1681
1682 memset(eld, 0, sizeof(connector->eld));
1683
1684 cea = drm_find_cea_extension(edid);
1685 if (!cea) {
1686 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
1687 return;
1688 }
1689
1690 name = NULL;
1691 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
1692 for (mnl = 0; name && mnl < 13; mnl++) {
1693 if (name[mnl] == 0x0a)
1694 break;
1695 eld[20 + mnl] = name[mnl];
1696 }
1697 eld[4] = (cea[1] << 5) | mnl;
1698 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
1699
1700 eld[0] = 2 << 3; /* ELD version: 2 */
1701
1702 eld[16] = edid->mfg_id[0];
1703 eld[17] = edid->mfg_id[1];
1704 eld[18] = edid->prod_code[0];
1705 eld[19] = edid->prod_code[1];
1706
9e50b9d5
VS
1707 if (cea_revision(cea) >= 3) {
1708 int i, start, end;
1709
1710 if (cea_db_offsets(cea, &start, &end)) {
1711 start = 0;
1712 end = 0;
1713 }
1714
1715 for_each_cea_db(cea, i, start, end) {
1716 db = &cea[i];
1717 dbl = cea_db_payload_len(db);
1718
1719 switch (cea_db_tag(db)) {
a0ab734d
CS
1720 case AUDIO_BLOCK:
1721 /* Audio Data Block, contains SADs */
1722 sad_count = dbl / 3;
9e50b9d5
VS
1723 if (dbl >= 1)
1724 memcpy(eld + 20 + mnl, &db[1], dbl);
a0ab734d
CS
1725 break;
1726 case SPEAKER_BLOCK:
9e50b9d5
VS
1727 /* Speaker Allocation Data Block */
1728 if (dbl >= 1)
1729 eld[7] = db[1];
a0ab734d
CS
1730 break;
1731 case VENDOR_BLOCK:
1732 /* HDMI Vendor-Specific Data Block */
14f77fdd 1733 if (cea_db_is_hdmi_vsdb(db))
a0ab734d
CS
1734 parse_hdmi_vsdb(connector, db);
1735 break;
1736 default:
1737 break;
1738 }
76adaa34 1739 }
9e50b9d5 1740 }
76adaa34
WF
1741 eld[5] |= sad_count << 4;
1742 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
1743
1744 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
1745}
1746EXPORT_SYMBOL(drm_edid_to_eld);
1747
1748/**
1749 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
1750 * @connector: connector associated with the HDMI/DP sink
1751 * @mode: the display mode
1752 */
1753int drm_av_sync_delay(struct drm_connector *connector,
1754 struct drm_display_mode *mode)
1755{
1756 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
1757 int a, v;
1758
1759 if (!connector->latency_present[0])
1760 return 0;
1761 if (!connector->latency_present[1])
1762 i = 0;
1763
1764 a = connector->audio_latency[i];
1765 v = connector->video_latency[i];
1766
1767 /*
1768 * HDMI/DP sink doesn't support audio or video?
1769 */
1770 if (a == 255 || v == 255)
1771 return 0;
1772
1773 /*
1774 * Convert raw EDID values to millisecond.
1775 * Treat unknown latency as 0ms.
1776 */
1777 if (a)
1778 a = min(2 * (a - 1), 500);
1779 if (v)
1780 v = min(2 * (v - 1), 500);
1781
1782 return max(v - a, 0);
1783}
1784EXPORT_SYMBOL(drm_av_sync_delay);
1785
1786/**
1787 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
1788 * @encoder: the encoder just changed display mode
1789 * @mode: the adjusted display mode
1790 *
1791 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
1792 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
1793 */
1794struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
1795 struct drm_display_mode *mode)
1796{
1797 struct drm_connector *connector;
1798 struct drm_device *dev = encoder->dev;
1799
1800 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
1801 if (connector->encoder == encoder && connector->eld[0])
1802 return connector;
1803
1804 return NULL;
1805}
1806EXPORT_SYMBOL(drm_select_eld);
1807
8fe9790d
ZW
1808/**
1809 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
1810 * @edid: monitor EDID information
1811 *
1812 * Parse the CEA extension according to CEA-861-B.
1813 * Return true if HDMI, false if not or unknown.
1814 */
1815bool drm_detect_hdmi_monitor(struct edid *edid)
1816{
1817 u8 *edid_ext;
14f77fdd 1818 int i;
8fe9790d 1819 int start_offset, end_offset;
8fe9790d
ZW
1820
1821 edid_ext = drm_find_cea_extension(edid);
1822 if (!edid_ext)
14f77fdd 1823 return false;
f23c20c8 1824
9e50b9d5 1825 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
14f77fdd 1826 return false;
f23c20c8
ML
1827
1828 /*
1829 * Because HDMI identifier is in Vendor Specific Block,
1830 * search it from all data blocks of CEA extension.
1831 */
9e50b9d5 1832 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
14f77fdd
VS
1833 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
1834 return true;
f23c20c8
ML
1835 }
1836
14f77fdd 1837 return false;
f23c20c8
ML
1838}
1839EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1840
8fe9790d
ZW
1841/**
1842 * drm_detect_monitor_audio - check monitor audio capability
1843 *
1844 * Monitor should have CEA extension block.
1845 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1846 * audio' only. If there is any audio extension block and supported
1847 * audio format, assume at least 'basic audio' support, even if 'basic
1848 * audio' is not defined in EDID.
1849 *
1850 */
1851bool drm_detect_monitor_audio(struct edid *edid)
1852{
1853 u8 *edid_ext;
1854 int i, j;
1855 bool has_audio = false;
1856 int start_offset, end_offset;
1857
1858 edid_ext = drm_find_cea_extension(edid);
1859 if (!edid_ext)
1860 goto end;
1861
1862 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1863
1864 if (has_audio) {
1865 DRM_DEBUG_KMS("Monitor has basic audio support\n");
1866 goto end;
1867 }
1868
9e50b9d5
VS
1869 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
1870 goto end;
8fe9790d 1871
9e50b9d5
VS
1872 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
1873 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
8fe9790d 1874 has_audio = true;
9e50b9d5 1875 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
8fe9790d
ZW
1876 DRM_DEBUG_KMS("CEA audio format %d\n",
1877 (edid_ext[i + j] >> 3) & 0xf);
1878 goto end;
1879 }
1880 }
1881end:
1882 return has_audio;
1883}
1884EXPORT_SYMBOL(drm_detect_monitor_audio);
1885
3b11228b
JB
1886/**
1887 * drm_add_display_info - pull display info out if present
1888 * @edid: EDID data
1889 * @info: display info (attached to connector)
1890 *
1891 * Grab any available display info and stuff it into the drm_display_info
1892 * structure that's part of the connector. Useful for tracking bpp and
1893 * color spaces.
1894 */
1895static void drm_add_display_info(struct edid *edid,
1896 struct drm_display_info *info)
1897{
ebec9a7b
JB
1898 u8 *edid_ext;
1899
3b11228b
JB
1900 info->width_mm = edid->width_cm * 10;
1901 info->height_mm = edid->height_cm * 10;
1902
1903 /* driver figures it out in this case */
1904 info->bpc = 0;
da05a5a7 1905 info->color_formats = 0;
3b11228b 1906
a988bc72 1907 if (edid->revision < 3)
3b11228b
JB
1908 return;
1909
1910 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1911 return;
1912
a988bc72
LPC
1913 /* Get data from CEA blocks if present */
1914 edid_ext = drm_find_cea_extension(edid);
1915 if (edid_ext) {
1916 info->cea_rev = edid_ext[1];
1917
1918 /* The existence of a CEA block should imply RGB support */
1919 info->color_formats = DRM_COLOR_FORMAT_RGB444;
1920 if (edid_ext[3] & EDID_CEA_YCRCB444)
1921 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1922 if (edid_ext[3] & EDID_CEA_YCRCB422)
1923 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
1924 }
1925
1926 /* Only defined for 1.4 with digital displays */
1927 if (edid->revision < 4)
1928 return;
1929
3b11228b
JB
1930 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1931 case DRM_EDID_DIGITAL_DEPTH_6:
1932 info->bpc = 6;
1933 break;
1934 case DRM_EDID_DIGITAL_DEPTH_8:
1935 info->bpc = 8;
1936 break;
1937 case DRM_EDID_DIGITAL_DEPTH_10:
1938 info->bpc = 10;
1939 break;
1940 case DRM_EDID_DIGITAL_DEPTH_12:
1941 info->bpc = 12;
1942 break;
1943 case DRM_EDID_DIGITAL_DEPTH_14:
1944 info->bpc = 14;
1945 break;
1946 case DRM_EDID_DIGITAL_DEPTH_16:
1947 info->bpc = 16;
1948 break;
1949 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1950 default:
1951 info->bpc = 0;
1952 break;
1953 }
da05a5a7 1954
a988bc72 1955 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
ee58808d
LPC
1956 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
1957 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
1958 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
1959 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3b11228b
JB
1960}
1961
f453ba04
DA
1962/**
1963 * drm_add_edid_modes - add modes from EDID data, if available
1964 * @connector: connector we're probing
1965 * @edid: edid data
1966 *
1967 * Add the specified modes to the connector's mode list.
1968 *
1969 * Return number of modes added or 0 if we couldn't find any.
1970 */
1971int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1972{
1973 int num_modes = 0;
1974 u32 quirks;
1975
1976 if (edid == NULL) {
1977 return 0;
1978 }
3c537889 1979 if (!drm_edid_is_valid(edid)) {
dcdb1674 1980 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
f453ba04
DA
1981 drm_get_connector_name(connector));
1982 return 0;
1983 }
1984
1985 quirks = edid_get_quirks(edid);
1986
c867df70
AJ
1987 /*
1988 * EDID spec says modes should be preferred in this order:
1989 * - preferred detailed mode
1990 * - other detailed modes from base block
1991 * - detailed modes from extension blocks
1992 * - CVT 3-byte code modes
1993 * - standard timing codes
1994 * - established timing codes
1995 * - modes inferred from GTF or CVT range information
1996 *
13931579 1997 * We get this pretty much right.
c867df70
AJ
1998 *
1999 * XXX order for additional mode types in extension blocks?
2000 */
13931579
AJ
2001 num_modes += add_detailed_modes(connector, edid, quirks);
2002 num_modes += add_cvt_modes(connector, edid);
c867df70
AJ
2003 num_modes += add_standard_modes(connector, edid);
2004 num_modes += add_established_modes(connector, edid);
13931579 2005 num_modes += add_inferred_modes(connector, edid);
54ac76f8 2006 num_modes += add_cea_modes(connector, edid);
f453ba04
DA
2007
2008 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2009 edid_fixup_preferred(connector, quirks);
2010
3b11228b 2011 drm_add_display_info(edid, &connector->display_info);
f453ba04
DA
2012
2013 return num_modes;
2014}
2015EXPORT_SYMBOL(drm_add_edid_modes);
f0fda0a4
ZY
2016
2017/**
2018 * drm_add_modes_noedid - add modes for the connectors without EDID
2019 * @connector: connector we're probing
2020 * @hdisplay: the horizontal display limit
2021 * @vdisplay: the vertical display limit
2022 *
2023 * Add the specified modes to the connector's mode list. Only when the
2024 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2025 *
2026 * Return number of modes added or 0 if we couldn't find any.
2027 */
2028int drm_add_modes_noedid(struct drm_connector *connector,
2029 int hdisplay, int vdisplay)
2030{
2031 int i, count, num_modes = 0;
b1f559ec 2032 struct drm_display_mode *mode;
f0fda0a4
ZY
2033 struct drm_device *dev = connector->dev;
2034
2035 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2036 if (hdisplay < 0)
2037 hdisplay = 0;
2038 if (vdisplay < 0)
2039 vdisplay = 0;
2040
2041 for (i = 0; i < count; i++) {
b1f559ec 2042 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
f0fda0a4
ZY
2043 if (hdisplay && vdisplay) {
2044 /*
2045 * Only when two are valid, they will be used to check
2046 * whether the mode should be added to the mode list of
2047 * the connector.
2048 */
2049 if (ptr->hdisplay > hdisplay ||
2050 ptr->vdisplay > vdisplay)
2051 continue;
2052 }
f985dedb
AJ
2053 if (drm_mode_vrefresh(ptr) > 61)
2054 continue;
f0fda0a4
ZY
2055 mode = drm_mode_duplicate(dev, ptr);
2056 if (mode) {
2057 drm_mode_probed_add(connector, mode);
2058 num_modes++;
2059 }
2060 }
2061 return num_modes;
2062}
2063EXPORT_SYMBOL(drm_add_modes_noedid);