[thirdparty/kernel/stable.git] / drivers / gpu / drm / fsl-dcu / fsl_dcu_drm_drv.c

/*
 * Copyright 2015 Freescale Semiconductor, Inc.
 *
 * Freescale DCU drm device driver
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/console.h>
#include <linux/io.h>
#include <linux/mfd/syscon.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>

#include <drm/drmP.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_modeset_helper.h>
#include <drm/drm_probe_helper.h>

#include "fsl_dcu_drm_crtc.h"
#include "fsl_dcu_drm_drv.h"
#include "fsl_tcon.h"

static int legacyfb_depth = 24;
module_param(legacyfb_depth, int, 0444);

static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
{
	if (reg == DCU_INT_STATUS || reg == DCU_UPDATE_MODE)
		return true;

	return false;
}

static const struct regmap_config fsl_dcu_regmap_config = {
	.reg_bits = 32,
	.reg_stride = 4,
	.val_bits = 32,

	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
};

static void fsl_dcu_irq_uninstall(struct drm_device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;

	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
}

static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
{
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	int ret;

	ret = fsl_dcu_drm_modeset_init(fsl_dev);
	if (ret < 0) {
		dev_err(dev->dev, "failed to initialize mode setting\n");
		return ret;
	}

	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
	if (ret < 0) {
		dev_err(dev->dev, "failed to initialize vblank\n");
		goto done;
	}

	ret = drm_irq_install(dev, fsl_dev->irq);
	if (ret < 0) {
		dev_err(dev->dev, "failed to install IRQ handler\n");
		goto done;
	}

	if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
	    legacyfb_depth != 32) {
		dev_warn(dev->dev,
			"Invalid legacyfb_depth.  Defaulting to 24bpp\n");
		legacyfb_depth = 24;
	}

	return 0;
done:
	drm_kms_helper_poll_fini(dev);

	drm_mode_config_cleanup(dev);
	drm_irq_uninstall(dev);
	dev->dev_private = NULL;

	return ret;
}

static void fsl_dcu_unload(struct drm_device *dev)
{
	drm_atomic_helper_shutdown(dev);
	drm_kms_helper_poll_fini(dev);

	drm_mode_config_cleanup(dev);
	drm_irq_uninstall(dev);

	dev->dev_private = NULL;
}

static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
{
	struct drm_device *dev = arg;
	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	unsigned int int_status;
	int ret;

	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
	if (ret) {
		dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
		return IRQ_NONE;
	}

	if (int_status & DCU_INT_STATUS_VBLANK)
		drm_handle_vblank(dev, 0);

	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);

	return IRQ_HANDLED;
}

DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);

static struct drm_driver fsl_dcu_drm_driver = {
	.driver_features	= DRIVER_GEM | DRIVER_MODESET
				| DRIVER_PRIME | DRIVER_ATOMIC,
	.load			= fsl_dcu_load,
	.unload			= fsl_dcu_unload,
	.irq_handler		= fsl_dcu_drm_irq,
	.irq_preinstall		= fsl_dcu_irq_uninstall,
	.irq_uninstall		= fsl_dcu_irq_uninstall,
	.gem_free_object_unlocked = drm_gem_cma_free_object,
	.gem_vm_ops		= &drm_gem_cma_vm_ops,
	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
	.gem_prime_import	= drm_gem_prime_import,
	.gem_prime_export	= drm_gem_prime_export,
	.gem_prime_get_sg_table	= drm_gem_cma_prime_get_sg_table,
	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	.gem_prime_vmap		= drm_gem_cma_prime_vmap,
	.gem_prime_vunmap	= drm_gem_cma_prime_vunmap,
	.gem_prime_mmap		= drm_gem_cma_prime_mmap,
	.dumb_create		= drm_gem_cma_dumb_create,
	.fops			= &fsl_dcu_drm_fops,
	.name			= "fsl-dcu-drm",
	.desc			= "Freescale DCU DRM",
	.date			= "20160425",
	.major			= 1,
	.minor			= 1,
};

#ifdef CONFIG_PM_SLEEP
static int fsl_dcu_drm_pm_suspend(struct device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
	int ret;

	if (!fsl_dev)
		return 0;

	disable_irq(fsl_dev->irq);

	ret = drm_mode_config_helper_suspend(fsl_dev->drm);
	if (ret) {
		enable_irq(fsl_dev->irq);
		return ret;
	}

	clk_disable_unprepare(fsl_dev->clk);

	return 0;
}

static int fsl_dcu_drm_pm_resume(struct device *dev)
{
	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
	int ret;

	if (!fsl_dev)
		return 0;

	ret = clk_prepare_enable(fsl_dev->clk);
	if (ret < 0) {
		dev_err(dev, "failed to enable dcu clk\n");
		return ret;
	}

	if (fsl_dev->tcon)
		fsl_tcon_bypass_enable(fsl_dev->tcon);
	fsl_dcu_drm_init_planes(fsl_dev->drm);
	enable_irq(fsl_dev->irq);

	drm_mode_config_helper_resume(fsl_dev->drm);

	return 0;
}
#endif

static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
};

static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
	.name = "ls1021a",
	.total_layer = 16,
	.max_layer = 4,
	.layer_regs = LS1021A_LAYER_REG_NUM,
};

static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
	.name = "vf610",
	.total_layer = 64,
	.max_layer = 6,
	.layer_regs = VF610_LAYER_REG_NUM,
};

static const struct of_device_id fsl_dcu_of_match[] = {
	{
		.compatible = "fsl,ls1021a-dcu",
		.data = &fsl_dcu_ls1021a_data,
	}, {
		.compatible = "fsl,vf610-dcu",
		.data = &fsl_dcu_vf610_data,
	}, {
	},
};
MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);

static int fsl_dcu_drm_probe(struct platform_device *pdev)
{
	struct fsl_dcu_drm_device *fsl_dev;
	struct drm_device *drm;
	struct device *dev = &pdev->dev;
	struct resource *res;
	void __iomem *base;
	struct drm_driver *driver = &fsl_dcu_drm_driver;
	struct clk *pix_clk_in;
	char pix_clk_name[32];
	const char *pix_clk_in_name;
	const struct of_device_id *id;
	int ret;
	u8 div_ratio_shift = 0;

	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
	if (!fsl_dev)
		return -ENOMEM;

	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
	if (!id)
		return -ENODEV;
	fsl_dev->soc = id->data;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	base = devm_ioremap_resource(dev, res);
	if (IS_ERR(base)) {
		ret = PTR_ERR(base);
		return ret;
	}

	fsl_dev->irq = platform_get_irq(pdev, 0);
	if (fsl_dev->irq < 0) {
		dev_err(dev, "failed to get irq\n");
		return fsl_dev->irq;
	}

	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
			&fsl_dcu_regmap_config);
	if (IS_ERR(fsl_dev->regmap)) {
		dev_err(dev, "regmap init failed\n");
		return PTR_ERR(fsl_dev->regmap);
	}

	fsl_dev->clk = devm_clk_get(dev, "dcu");
	if (IS_ERR(fsl_dev->clk)) {
		dev_err(dev, "failed to get dcu clock\n");
		return PTR_ERR(fsl_dev->clk);
	}
	ret = clk_prepare_enable(fsl_dev->clk);
	if (ret < 0) {
		dev_err(dev, "failed to enable dcu clk\n");
		return ret;
	}

	pix_clk_in = devm_clk_get(dev, "pix");
	if (IS_ERR(pix_clk_in)) {
		/* legancy binding, use dcu clock as pixel clock input */
		pix_clk_in = fsl_dev->clk;
	}

	if (of_property_read_bool(dev->of_node, "big-endian"))
		div_ratio_shift = 24;

	pix_clk_in_name = __clk_get_name(pix_clk_in);
	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
			pix_clk_in_name, 0, base + DCU_DIV_RATIO,
			div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
	if (IS_ERR(fsl_dev->pix_clk)) {
		dev_err(dev, "failed to register pix clk\n");
		ret = PTR_ERR(fsl_dev->pix_clk);
		goto disable_clk;
	}

	fsl_dev->tcon = fsl_tcon_init(dev);

	drm = drm_dev_alloc(driver, dev);
	if (IS_ERR(drm)) {
		ret = PTR_ERR(drm);
		goto unregister_pix_clk;
	}

	fsl_dev->dev = dev;
	fsl_dev->drm = drm;
	fsl_dev->np = dev->of_node;
	drm->dev_private = fsl_dev;
	dev_set_drvdata(dev, fsl_dev);

	ret = drm_dev_register(drm, 0);
	if (ret < 0)
		goto put;

	drm_fbdev_generic_setup(drm, legacyfb_depth);

	return 0;

put:
	drm_dev_put(drm);
unregister_pix_clk:
	clk_unregister(fsl_dev->pix_clk);
disable_clk:
	clk_disable_unprepare(fsl_dev->clk);
	return ret;
}

static int fsl_dcu_drm_remove(struct platform_device *pdev)
{
	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);

	drm_dev_unregister(fsl_dev->drm);
	drm_dev_put(fsl_dev->drm);
	clk_disable_unprepare(fsl_dev->clk);
	clk_unregister(fsl_dev->pix_clk);

	return 0;
}

static struct platform_driver fsl_dcu_drm_platform_driver = {
	.probe		= fsl_dcu_drm_probe,
	.remove		= fsl_dcu_drm_remove,
	.driver		= {
		.name	= "fsl-dcu",
		.pm	= &fsl_dcu_drm_pm_ops,
		.of_match_table = fsl_dcu_of_match,
	},
};

module_platform_driver(fsl_dcu_drm_platform_driver);

MODULE_DESCRIPTION("Freescale DCU DRM Driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
109eee2f JW	1	/*
	2	* Copyright 2015 Freescale Semiconductor, Inc.
	3	*
	4	* Freescale DCU drm device driver
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*/
	11
	12	#include <linux/clk.h>
	13	#include <linux/clk-provider.h>
a8db4324	14	#include <linux/console.h>
109eee2f JW	15	#include <linux/io.h>
	16	#include <linux/mfd/syscon.h>
	17	#include <linux/mm.h>
	18	#include <linux/module.h>
	19	#include <linux/of_platform.h>
	20	#include <linux/platform_device.h>
	21	#include <linux/pm.h>
	22	#include <linux/pm_runtime.h>
	23	#include <linux/regmap.h>
	24
	25	#include <drm/drmP.h>
a8db4324	26	#include <drm/drm_atomic_helper.h>
afb49e4d	27	#include <drm/drm_fb_cma_helper.h>
f4d26fa9	28	#include <drm/drm_fb_helper.h>
109eee2f	29	#include <drm/drm_gem_cma_helper.h>
3b712391	30	#include <drm/drm_modeset_helper.h>
fcd70cd3	31	#include <drm/drm_probe_helper.h>
109eee2f JW	32
	33	#include "fsl_dcu_drm_crtc.h"
	34	#include "fsl_dcu_drm_drv.h"
fb127b79	35	#include "fsl_tcon.h"
109eee2f	36
73fe26a4 SA	37	static int legacyfb_depth = 24;
	38	module_param(legacyfb_depth, int, 0444);
	39
efb8b491 SA	40	static bool fsl_dcu_drm_is_volatile_reg(struct device *dev, unsigned int reg)
	41	{
	42	if (reg == DCU_INT_STATUS \|\| reg == DCU_UPDATE_MODE)
	43	return true;
	44
	45	return false;
	46	}
	47
109eee2f JW	48	static const struct regmap_config fsl_dcu_regmap_config = {
	49	.reg_bits = 32,
	50	.reg_stride = 4,
	51	.val_bits = 32,
efb8b491 SA	52
efb8b491 SA	53	.volatile_reg = fsl_dcu_drm_is_volatile_reg,
109eee2f JW	54	};
109eee2f JW	55
685ec6eb	56	static void fsl_dcu_irq_uninstall(struct drm_device *dev)
109eee2f JW	57	{
109eee2f JW	58	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
109eee2f	59
685ec6eb	60	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, ~0);
638c93f6	61	regmap_write(fsl_dev->regmap, DCU_INT_MASK, ~0);
109eee2f JW	62	}
109eee2f JW	63
b617966c	64	static int fsl_dcu_load(struct drm_device *dev, unsigned long flags)
109eee2f	65	{
b617966c	66	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
109eee2f JW	67	int ret;
	68
	69	ret = fsl_dcu_drm_modeset_init(fsl_dev);
	70	if (ret < 0) {
b617966c	71	dev_err(dev->dev, "failed to initialize mode setting\n");
109eee2f JW	72	return ret;
	73	}
	74
b617966c	75	ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
109eee2f	76	if (ret < 0) {
b617966c	77	dev_err(dev->dev, "failed to initialize vblank\n");
109eee2f JW	78	goto done;
109eee2f JW	79	}
109eee2f	80
685ec6eb SA	81	ret = drm_irq_install(dev, fsl_dev->irq);
	82	if (ret < 0) {
	83	dev_err(dev->dev, "failed to install IRQ handler\n");
109eee2f	84	goto done;
685ec6eb	85	}
109eee2f	86
73fe26a4 SA	87	if (legacyfb_depth != 16 && legacyfb_depth != 24 &&
	88	legacyfb_depth != 32) {
	89	dev_warn(dev->dev,
	90	"Invalid legacyfb_depth. Defaulting to 24bpp\n");
	91	legacyfb_depth = 24;
	92	}
109eee2f JW	93
	94	return 0;
	95	done:
7d17a626 SA	96	drm_kms_helper_poll_fini(dev);
7d17a626 SA	97
b617966c	98	drm_mode_config_cleanup(dev);
b617966c SA	99	drm_irq_uninstall(dev);
b617966c SA	100	dev->dev_private = NULL;
109eee2f JW	101
	102	return ret;
	103	}
	104
11b3c20b	105	static void fsl_dcu_unload(struct drm_device *dev)
109eee2f	106	{
09cedcb6	107	drm_atomic_helper_shutdown(dev);
7d17a626 SA	108	drm_kms_helper_poll_fini(dev);
7d17a626 SA	109
109eee2f	110	drm_mode_config_cleanup(dev);
109eee2f JW	111	drm_irq_uninstall(dev);
	112
	113	dev->dev_private = NULL;
109eee2f JW	114	}
109eee2f JW	115
109eee2f JW	116	static irqreturn_t fsl_dcu_drm_irq(int irq, void *arg)
	117	{
	118	struct drm_device *dev = arg;
	119	struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
	120	unsigned int int_status;
	121	int ret;
	122
	123	ret = regmap_read(fsl_dev->regmap, DCU_INT_STATUS, &int_status);
e291d298 SA	124	if (ret) {
	125	dev_err(dev->dev, "read DCU_INT_STATUS failed\n");
	126	return IRQ_NONE;
	127	}
	128
109eee2f JW	129	if (int_status & DCU_INT_STATUS_VBLANK)
	130	drm_handle_vblank(dev, 0);
	131
e291d298	132	regmap_write(fsl_dev->regmap, DCU_INT_STATUS, int_status);
109eee2f JW	133
	134	return IRQ_HANDLED;
	135	}
	136
d55f7e5d	137	DEFINE_DRM_GEM_CMA_FOPS(fsl_dcu_drm_fops);
109eee2f JW	138
109eee2f JW	139	static struct drm_driver fsl_dcu_drm_driver = {
5b38e747	140	.driver_features = DRIVER_GEM \| DRIVER_MODESET
109eee2f JW	141	\| DRIVER_PRIME \| DRIVER_ATOMIC,
	142	.load = fsl_dcu_load,
	143	.unload = fsl_dcu_unload,
109eee2f	144	.irq_handler = fsl_dcu_drm_irq,
685ec6eb SA	145	.irq_preinstall = fsl_dcu_irq_uninstall,
685ec6eb SA	146	.irq_uninstall = fsl_dcu_irq_uninstall,
7c089285	147	.gem_free_object_unlocked = drm_gem_cma_free_object,
109eee2f JW	148	.gem_vm_ops = &drm_gem_cma_vm_ops,
	149	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	150	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	151	.gem_prime_import = drm_gem_prime_import,
	152	.gem_prime_export = drm_gem_prime_export,
	153	.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
	154	.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
	155	.gem_prime_vmap = drm_gem_cma_prime_vmap,
	156	.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
	157	.gem_prime_mmap = drm_gem_cma_prime_mmap,
	158	.dumb_create = drm_gem_cma_dumb_create,
109eee2f JW	159	.fops = &fsl_dcu_drm_fops,
	160	.name = "fsl-dcu-drm",
	161	.desc = "Freescale DCU DRM",
0449eefe	162	.date = "20160425",
109eee2f	163	.major = 1,
0449eefe	164	.minor = 1,
109eee2f JW	165	};
	166
	167	#ifdef CONFIG_PM_SLEEP
	168	static int fsl_dcu_drm_pm_suspend(struct device *dev)
	169	{
	170	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
3b712391	171	int ret;
109eee2f JW	172
	173	if (!fsl_dev)
	174	return 0;
	175
a8db4324	176	disable_irq(fsl_dev->irq);
a8db4324	177
3b712391 NT	178	ret = drm_mode_config_helper_suspend(fsl_dev->drm);
3b712391 NT	179	if (ret) {
a8db4324	180	enable_irq(fsl_dev->irq);
3b712391	181	return ret;
a8db4324 SA	182	}
a8db4324 SA	183
ff09b41f	184	clk_disable_unprepare(fsl_dev->clk);
109eee2f JW	185
	186	return 0;
	187	}
	188
	189	static int fsl_dcu_drm_pm_resume(struct device *dev)
	190	{
	191	struct fsl_dcu_drm_device *fsl_dev = dev_get_drvdata(dev);
	192	int ret;
	193
	194	if (!fsl_dev)
	195	return 0;
	196
ff09b41f	197	ret = clk_prepare_enable(fsl_dev->clk);
109eee2f JW	198	if (ret < 0) {
109eee2f JW	199	dev_err(dev, "failed to enable dcu clk\n");
109eee2f JW	200	return ret;
109eee2f JW	201	}
109eee2f	202
8dedefbc SA	203	if (fsl_dev->tcon)
8dedefbc SA	204	fsl_tcon_bypass_enable(fsl_dev->tcon);
a8db4324	205	fsl_dcu_drm_init_planes(fsl_dev->drm);
9fd99f4f	206	enable_irq(fsl_dev->irq);
a8db4324	207
3b712391	208	drm_mode_config_helper_resume(fsl_dev->drm);
109eee2f JW	209
	210	return 0;
	211	}
	212	#endif
	213
	214	static const struct dev_pm_ops fsl_dcu_drm_pm_ops = {
	215	SET_SYSTEM_SLEEP_PM_OPS(fsl_dcu_drm_pm_suspend, fsl_dcu_drm_pm_resume)
	216	};
	217
	218	static const struct fsl_dcu_soc_data fsl_dcu_ls1021a_data = {
	219	.name = "ls1021a",
	220	.total_layer = 16,
	221	.max_layer = 4,
6aaf5a49	222	.layer_regs = LS1021A_LAYER_REG_NUM,
109eee2f JW	223	};
	224
	225	static const struct fsl_dcu_soc_data fsl_dcu_vf610_data = {
	226	.name = "vf610",
	227	.total_layer = 64,
	228	.max_layer = 6,
6aaf5a49	229	.layer_regs = VF610_LAYER_REG_NUM,
109eee2f JW	230	};
	231
	232	static const struct of_device_id fsl_dcu_of_match[] = {
	233	{
	234	.compatible = "fsl,ls1021a-dcu",
	235	.data = &fsl_dcu_ls1021a_data,
	236	}, {
	237	.compatible = "fsl,vf610-dcu",
	238	.data = &fsl_dcu_vf610_data,
	239	}, {
	240	},
	241	};
	242	MODULE_DEVICE_TABLE(of, fsl_dcu_of_match);
	243
	244	static int fsl_dcu_drm_probe(struct platform_device *pdev)
	245	{
	246	struct fsl_dcu_drm_device *fsl_dev;
	247	struct drm_device *drm;
	248	struct device *dev = &pdev->dev;
	249	struct resource *res;
	250	void __iomem *base;
	251	struct drm_driver *driver = &fsl_dcu_drm_driver;
2d701449 SA	252	struct clk *pix_clk_in;
	253	char pix_clk_name[32];
	254	const char *pix_clk_in_name;
109eee2f JW	255	const struct of_device_id *id;
109eee2f JW	256	int ret;
6cc4758a	257	u8 div_ratio_shift = 0;
109eee2f JW	258
	259	fsl_dev = devm_kzalloc(dev, sizeof(*fsl_dev), GFP_KERNEL);
	260	if (!fsl_dev)
	261	return -ENOMEM;
	262
73fa3033 SA	263	id = of_match_node(fsl_dcu_of_match, pdev->dev.of_node);
	264	if (!id)
	265	return -ENODEV;
	266	fsl_dev->soc = id->data;
	267
109eee2f	268	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
109eee2f JW	269	base = devm_ioremap_resource(dev, res);
	270	if (IS_ERR(base)) {
	271	ret = PTR_ERR(base);
	272	return ret;
	273	}
	274
	275	fsl_dev->irq = platform_get_irq(pdev, 0);
	276	if (fsl_dev->irq < 0) {
	277	dev_err(dev, "failed to get irq\n");
238e4f44	278	return fsl_dev->irq;
109eee2f JW	279	}
109eee2f JW	280
73fa3033 SA	281	fsl_dev->regmap = devm_regmap_init_mmio(dev, base,
	282	&fsl_dcu_regmap_config);
	283	if (IS_ERR(fsl_dev->regmap)) {
	284	dev_err(dev, "regmap init failed\n");
	285	return PTR_ERR(fsl_dev->regmap);
	286	}
	287
109eee2f JW	288	fsl_dev->clk = devm_clk_get(dev, "dcu");
109eee2f JW	289	if (IS_ERR(fsl_dev->clk)) {
109eee2f	290	dev_err(dev, "failed to get dcu clock\n");
73fa3033	291	return PTR_ERR(fsl_dev->clk);
109eee2f	292	}
73fa3033	293	ret = clk_prepare_enable(fsl_dev->clk);
109eee2f JW	294	if (ret < 0) {
109eee2f JW	295	dev_err(dev, "failed to enable dcu clk\n");
109eee2f JW	296	return ret;
	297	}
	298
2d701449 SA	299	pix_clk_in = devm_clk_get(dev, "pix");
	300	if (IS_ERR(pix_clk_in)) {
	301	/* legancy binding, use dcu clock as pixel clock input */
	302	pix_clk_in = fsl_dev->clk;
	303	}
	304
6cc4758a SA	305	if (of_property_read_bool(dev->of_node, "big-endian"))
	306	div_ratio_shift = 24;
	307
2d701449 SA	308	pix_clk_in_name = __clk_get_name(pix_clk_in);
	309	snprintf(pix_clk_name, sizeof(pix_clk_name), "%s_pix", pix_clk_in_name);
	310	fsl_dev->pix_clk = clk_register_divider(dev, pix_clk_name,
	311	pix_clk_in_name, 0, base + DCU_DIV_RATIO,
6cc4758a	312	div_ratio_shift, 8, CLK_DIVIDER_ROUND_CLOSEST, NULL);
f93500f4	313	if (IS_ERR(fsl_dev->pix_clk)) {
2d701449 SA	314	dev_err(dev, "failed to register pix clk\n");
	315	ret = PTR_ERR(fsl_dev->pix_clk);
	316	goto disable_clk;
f93500f4	317	}
2d701449	318
fb127b79 SA	319	fsl_dev->tcon = fsl_tcon_init(dev);
fb127b79 SA	320
109eee2f	321	drm = drm_dev_alloc(driver, dev);
0f288605 TG	322	if (IS_ERR(drm)) {
0f288605 TG	323	ret = PTR_ERR(drm);
0a70c998	324	goto unregister_pix_clk;
73fa3033	325	}
109eee2f JW	326
	327	fsl_dev->dev = dev;
	328	fsl_dev->drm = drm;
	329	fsl_dev->np = dev->of_node;
	330	drm->dev_private = fsl_dev;
	331	dev_set_drvdata(dev, fsl_dev);
109eee2f JW	332
	333	ret = drm_dev_register(drm, 0);
	334	if (ret < 0)
a74c0aa5	335	goto put;
109eee2f	336
f4d26fa9 NT	337	drm_fbdev_generic_setup(drm, legacyfb_depth);
f4d26fa9 NT	338
109eee2f JW	339	return 0;
109eee2f JW	340
a74c0aa5 TZ	341	put:
a74c0aa5 TZ	342	drm_dev_put(drm);
2d701449 SA	343	unregister_pix_clk:
2d701449 SA	344	clk_unregister(fsl_dev->pix_clk);
73fa3033 SA	345	disable_clk:
73fa3033 SA	346	clk_disable_unprepare(fsl_dev->clk);
109eee2f JW	347	return ret;
	348	}
	349
	350	static int fsl_dcu_drm_remove(struct platform_device *pdev)
	351	{
	352	struct fsl_dcu_drm_device *fsl_dev = platform_get_drvdata(pdev);
	353
c4085743	354	drm_dev_unregister(fsl_dev->drm);
a74c0aa5	355	drm_dev_put(fsl_dev->drm);
73fa3033	356	clk_disable_unprepare(fsl_dev->clk);
2d701449	357	clk_unregister(fsl_dev->pix_clk);
109eee2f JW	358
	359	return 0;
	360	}
	361
	362	static struct platform_driver fsl_dcu_drm_platform_driver = {
	363	.probe = fsl_dcu_drm_probe,
	364	.remove = fsl_dcu_drm_remove,
	365	.driver = {
	366	.name = "fsl-dcu",
	367	.pm = &fsl_dcu_drm_pm_ops,
	368	.of_match_table = fsl_dcu_of_match,
	369	},
	370	};
	371
	372	module_platform_driver(fsl_dcu_drm_platform_driver);
	373
	374	MODULE_DESCRIPTION("Freescale DCU DRM Driver");
	375	MODULE_LICENSE("GPL");