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5182f646 | 1 | /* |
816c3715 | 2 | * SPDX-License-Identifier: MIT |
5182f646 | 3 | * |
816c3715 | 4 | * Copyright © 2018 Intel Corporation |
5182f646 | 5 | * |
816c3715 LL |
6 | * Autogenerated file by GPU Top : https://github.com/rib/gputop |
7 | * DO NOT EDIT manually! | |
5182f646 RB |
8 | */ |
9 | ||
10 | #include <linux/sysfs.h> | |
11 | ||
12 | #include "i915_drv.h" | |
13 | #include "i915_oa_bxt.h" | |
14 | ||
fc599211 RB |
15 | static const struct i915_oa_reg b_counter_config_test_oa[] = { |
16 | { _MMIO(0x2740), 0x00000000 }, | |
17 | { _MMIO(0x2744), 0x00800000 }, | |
18 | { _MMIO(0x2714), 0xf0800000 }, | |
19 | { _MMIO(0x2710), 0x00000000 }, | |
20 | { _MMIO(0x2724), 0xf0800000 }, | |
21 | { _MMIO(0x2720), 0x00000000 }, | |
22 | { _MMIO(0x2770), 0x00000004 }, | |
23 | { _MMIO(0x2774), 0x00000000 }, | |
24 | { _MMIO(0x2778), 0x00000003 }, | |
25 | { _MMIO(0x277c), 0x00000000 }, | |
26 | { _MMIO(0x2780), 0x00000007 }, | |
27 | { _MMIO(0x2784), 0x00000000 }, | |
28 | { _MMIO(0x2788), 0x00100002 }, | |
29 | { _MMIO(0x278c), 0x0000fff7 }, | |
30 | { _MMIO(0x2790), 0x00100002 }, | |
31 | { _MMIO(0x2794), 0x0000ffcf }, | |
32 | { _MMIO(0x2798), 0x00100082 }, | |
33 | { _MMIO(0x279c), 0x0000ffef }, | |
34 | { _MMIO(0x27a0), 0x001000c2 }, | |
35 | { _MMIO(0x27a4), 0x0000ffe7 }, | |
36 | { _MMIO(0x27a8), 0x00100001 }, | |
37 | { _MMIO(0x27ac), 0x0000ffe7 }, | |
38 | }; | |
39 | ||
40 | static const struct i915_oa_reg flex_eu_config_test_oa[] = { | |
41 | }; | |
42 | ||
43 | static const struct i915_oa_reg mux_config_test_oa[] = { | |
3802c5cb | 44 | { _MMIO(0x9840), 0x00000080 }, |
fc599211 RB |
45 | { _MMIO(0x9888), 0x19800000 }, |
46 | { _MMIO(0x9888), 0x07800063 }, | |
47 | { _MMIO(0x9888), 0x11800000 }, | |
48 | { _MMIO(0x9888), 0x23810008 }, | |
49 | { _MMIO(0x9888), 0x1d950400 }, | |
50 | { _MMIO(0x9888), 0x0f922000 }, | |
51 | { _MMIO(0x9888), 0x1f908000 }, | |
52 | { _MMIO(0x9888), 0x37900000 }, | |
53 | { _MMIO(0x9888), 0x55900000 }, | |
54 | { _MMIO(0x9888), 0x47900000 }, | |
55 | { _MMIO(0x9888), 0x33900000 }, | |
56 | }; | |
57 | ||
fc599211 RB |
58 | static ssize_t |
59 | show_test_oa_id(struct device *kdev, struct device_attribute *attr, char *buf) | |
60 | { | |
701f8231 | 61 | return sprintf(buf, "1\n"); |
fc599211 RB |
62 | } |
63 | ||
701f8231 LL |
64 | void |
65 | i915_perf_load_test_config_bxt(struct drm_i915_private *dev_priv) | |
5182f646 | 66 | { |
49e43ef7 | 67 | strlcpy(dev_priv->perf.oa.test_config.uuid, |
701f8231 | 68 | "5ee72f5c-092f-421e-8b70-225f7c3e9612", |
49e43ef7 | 69 | sizeof(dev_priv->perf.oa.test_config.uuid)); |
701f8231 | 70 | dev_priv->perf.oa.test_config.id = 1; |
5182f646 | 71 | |
701f8231 LL |
72 | dev_priv->perf.oa.test_config.mux_regs = mux_config_test_oa; |
73 | dev_priv->perf.oa.test_config.mux_regs_len = ARRAY_SIZE(mux_config_test_oa); | |
5182f646 | 74 | |
701f8231 LL |
75 | dev_priv->perf.oa.test_config.b_counter_regs = b_counter_config_test_oa; |
76 | dev_priv->perf.oa.test_config.b_counter_regs_len = ARRAY_SIZE(b_counter_config_test_oa); | |
5182f646 | 77 | |
701f8231 LL |
78 | dev_priv->perf.oa.test_config.flex_regs = flex_eu_config_test_oa; |
79 | dev_priv->perf.oa.test_config.flex_regs_len = ARRAY_SIZE(flex_eu_config_test_oa); | |
5182f646 | 80 | |
701f8231 LL |
81 | dev_priv->perf.oa.test_config.sysfs_metric.name = "5ee72f5c-092f-421e-8b70-225f7c3e9612"; |
82 | dev_priv->perf.oa.test_config.sysfs_metric.attrs = dev_priv->perf.oa.test_config.attrs; | |
83 | ||
84 | dev_priv->perf.oa.test_config.attrs[0] = &dev_priv->perf.oa.test_config.sysfs_metric_id.attr; | |
5182f646 | 85 | |
701f8231 LL |
86 | dev_priv->perf.oa.test_config.sysfs_metric_id.attr.name = "id"; |
87 | dev_priv->perf.oa.test_config.sysfs_metric_id.attr.mode = 0444; | |
88 | dev_priv->perf.oa.test_config.sysfs_metric_id.show = show_test_oa_id; | |
5182f646 | 89 | } |