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[thirdparty/kernel/stable.git] / drivers / gpu / drm / i915 / intel_dp_mst.c
CommitLineData
0e32b39c
DA
1/*
2 * Copyright © 2008 Intel Corporation
3 * 2014 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
c6f95f27 26#include <drm/drm_atomic_helper.h>
0e32b39c 27#include <drm/drm_edid.h>
fcd70cd3 28#include <drm/drm_probe_helper.h>
0e32b39c 29
331c201a
JN
30#include "i915_drv.h"
31#include "intel_audio.h"
ec7f29ff 32#include "intel_connector.h"
fdc24cf3 33#include "intel_ddi.h"
27fec1f9 34#include "intel_dp.h"
331c201a
JN
35#include "intel_drv.h"
36
f1477219
VS
37static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
38 struct intel_crtc_state *crtc_state,
39 struct drm_connector_state *conn_state,
40 struct link_config_limits *limits)
41{
42 struct drm_atomic_state *state = crtc_state->base.state;
43 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
44 struct intel_dp *intel_dp = &intel_mst->primary->dp;
45 struct intel_connector *connector =
46 to_intel_connector(conn_state->connector);
47 const struct drm_display_mode *adjusted_mode =
48 &crtc_state->base.adjusted_mode;
49 void *port = connector->port;
50 bool constant_n = drm_dp_has_quirk(&intel_dp->desc,
51 DP_DPCD_QUIRK_CONSTANT_N);
52 int bpp, slots = -EINVAL;
53
54 crtc_state->lane_count = limits->max_lane_count;
55 crtc_state->port_clock = limits->max_clock;
56
57 for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
58 crtc_state->pipe_bpp = bpp;
59
60 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
61 crtc_state->pipe_bpp);
62
63 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
64 port, crtc_state->pbn);
65 if (slots == -EDEADLK)
66 return slots;
67 if (slots >= 0)
68 break;
69 }
70
71 if (slots < 0) {
72 DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
73 return slots;
74 }
75
76 intel_link_compute_m_n(crtc_state->pipe_bpp,
77 crtc_state->lane_count,
78 adjusted_mode->crtc_clock,
79 crtc_state->port_clock,
80 &crtc_state->dp_m_n,
81 constant_n);
82 crtc_state->dp_m_n.tu = slots;
83
84 return 0;
85}
86
96550555
LP
87static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
88 struct intel_crtc_state *pipe_config,
89 struct drm_connector_state *conn_state)
0e32b39c 90{
53e9bf5e 91 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
0e32b39c 92 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
f1477219
VS
93 struct intel_dp *intel_dp = &intel_mst->primary->dp;
94 struct intel_connector *connector =
95 to_intel_connector(conn_state->connector);
765bdb0b
VS
96 struct intel_digital_connector_state *intel_conn_state =
97 to_intel_digital_connector_state(conn_state);
f1477219
VS
98 const struct drm_display_mode *adjusted_mode =
99 &pipe_config->base.adjusted_mode;
100 void *port = connector->port;
101 struct link_config_limits limits;
102 int ret;
0e32b39c 103
e4dd27aa 104 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
96550555 105 return -EINVAL;
e4dd27aa 106
d9facae6 107 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
0e32b39c 108 pipe_config->has_pch_encoder = false;
765bdb0b
VS
109
110 if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
111 pipe_config->has_audio =
112 drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, port);
113 else
114 pipe_config->has_audio =
115 intel_conn_state->force_audio == HDMI_AUDIO_ON;
116
0e32b39c
DA
117 /*
118 * for MST we always configure max link bw - the spec doesn't
119 * seem to suggest we should do otherwise.
120 */
f1477219
VS
121 limits.min_clock =
122 limits.max_clock = intel_dp_max_link_rate(intel_dp);
ed4e9c1d 123
f1477219
VS
124 limits.min_lane_count =
125 limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
0e32b39c 126
4e2056e0 127 limits.min_bpp = intel_dp_min_bpp(pipe_config);
f1477219 128 limits.max_bpp = pipe_config->pipe_bpp;
0e32b39c 129
f1477219
VS
130 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
131
132 ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
133 conn_state, &limits);
134 if (ret)
135 return ret;
e75f4771 136
37aa52bf
VS
137 pipe_config->limited_color_range =
138 intel_dp_limited_color_range(pipe_config, conn_state);
139
5161d058
VS
140 if (IS_GEN9_LP(dev_priv))
141 pipe_config->lane_lat_optim_mask =
142 bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
143
53e9bf5e
VS
144 intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
145
96550555 146 return 0;
f424f55e 147}
0e32b39c 148
eceae147
LP
149static int
150intel_dp_mst_atomic_check(struct drm_connector *connector,
151 struct drm_connector_state *new_conn_state)
f424f55e
PD
152{
153 struct drm_atomic_state *state = new_conn_state->state;
eceae147
LP
154 struct drm_connector_state *old_conn_state =
155 drm_atomic_get_old_connector_state(state, connector);
156 struct intel_connector *intel_connector =
157 to_intel_connector(connector);
158 struct drm_crtc *new_crtc = new_conn_state->crtc;
f424f55e 159 struct drm_crtc_state *crtc_state;
eceae147 160 struct drm_dp_mst_topology_mgr *mgr;
37aa52bf
VS
161 int ret;
162
163 ret = intel_digital_connector_atomic_check(connector, new_conn_state);
164 if (ret)
165 return ret;
eceae147
LP
166
167 if (!old_conn_state->crtc)
168 return 0;
169
170 /* We only want to free VCPI if this state disables the CRTC on this
171 * connector
172 */
173 if (new_crtc) {
174 crtc_state = drm_atomic_get_new_crtc_state(state, new_crtc);
175
176 if (!crtc_state ||
177 !drm_atomic_crtc_needs_modeset(crtc_state) ||
178 crtc_state->enable)
179 return 0;
f424f55e 180 }
eceae147
LP
181
182 mgr = &enc_to_mst(old_conn_state->best_encoder)->primary->dp.mst_mgr;
183 ret = drm_dp_atomic_release_vcpi_slots(state, mgr,
184 intel_connector->port);
185
f424f55e 186 return ret;
0e32b39c
DA
187}
188
fd6bbda9 189static void intel_mst_disable_dp(struct intel_encoder *encoder,
5f88a9c6
VS
190 const struct intel_crtc_state *old_crtc_state,
191 const struct drm_connector_state *old_conn_state)
0e32b39c
DA
192{
193 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
194 struct intel_digital_port *intel_dig_port = intel_mst->primary;
195 struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b
ML
196 struct intel_connector *connector =
197 to_intel_connector(old_conn_state->connector);
0e32b39c
DA
198 int ret;
199
9b1c5818 200 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
0e32b39c 201
1e7bfa0b 202 drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
0e32b39c
DA
203
204 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
205 if (ret) {
206 DRM_ERROR("failed to update payload %d\n", ret);
207 }
37255d8d 208 if (old_crtc_state->has_audio)
8ec47de2
VS
209 intel_audio_codec_disable(encoder,
210 old_crtc_state, old_conn_state);
0e32b39c
DA
211}
212
fd6bbda9 213static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
5f88a9c6
VS
214 const struct intel_crtc_state *old_crtc_state,
215 const struct drm_connector_state *old_conn_state)
0e32b39c
DA
216{
217 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
218 struct intel_digital_port *intel_dig_port = intel_mst->primary;
219 struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b
ML
220 struct intel_connector *connector =
221 to_intel_connector(old_conn_state->connector);
0e32b39c 222
2b5cf4ef
ID
223 intel_ddi_disable_pipe_clock(old_crtc_state);
224
0e32b39c
DA
225 /* this can fail */
226 drm_dp_check_act_status(&intel_dp->mst_mgr);
227 /* and this can also fail */
228 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
229
1e7bfa0b 230 drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
0e32b39c 231
5ea2355a
DP
232 /*
233 * Power down mst path before disabling the port, otherwise we end
234 * up getting interrupts from the sink upon detecting link loss.
235 */
236 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
237 false);
238
19e0b4ca 239 intel_dp->active_mst_links--;
0552f765
DA
240
241 intel_mst->connector = NULL;
be1c63c8
LP
242 if (intel_dp->active_mst_links == 0) {
243 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
fd6bbda9 244 intel_dig_port->base.post_disable(&intel_dig_port->base,
1939ba51 245 old_crtc_state, NULL);
be1c63c8 246 }
1939ba51 247
9b1c5818 248 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
0e32b39c
DA
249}
250
5161d058
VS
251static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
252 const struct intel_crtc_state *pipe_config,
253 const struct drm_connector_state *conn_state)
254{
255 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
256 struct intel_digital_port *intel_dig_port = intel_mst->primary;
257 struct intel_dp *intel_dp = &intel_dig_port->dp;
258
ca401e96 259 if (intel_dp->active_mst_links == 0)
5161d058
VS
260 intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
261 pipe_config, NULL);
262}
263
bad46f2f
JRS
264static void intel_mst_post_pll_disable_dp(struct intel_encoder *encoder,
265 const struct intel_crtc_state *old_crtc_state,
266 const struct drm_connector_state *old_conn_state)
267{
268 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
269 struct intel_digital_port *intel_dig_port = intel_mst->primary;
270 struct intel_dp *intel_dp = &intel_dig_port->dp;
271
272 if (intel_dp->active_mst_links == 0)
273 intel_dig_port->base.post_pll_disable(&intel_dig_port->base,
274 old_crtc_state,
275 old_conn_state);
276}
277
fd6bbda9 278static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
5f88a9c6
VS
279 const struct intel_crtc_state *pipe_config,
280 const struct drm_connector_state *conn_state)
0e32b39c
DA
281{
282 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
283 struct intel_digital_port *intel_dig_port = intel_mst->primary;
284 struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b 285 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
8f4f2797 286 enum port port = intel_dig_port->base.port;
1e7bfa0b
ML
287 struct intel_connector *connector =
288 to_intel_connector(conn_state->connector);
0e32b39c 289 int ret;
739f3abd 290 u32 temp;
0e32b39c 291
e85376cb
ML
292 /* MST encoders are bound to a crtc, not to a connector,
293 * force the mapping here for get_hw_state.
294 */
1e7bfa0b
ML
295 connector->encoder = encoder;
296 intel_mst->connector = connector;
e85376cb 297
9b1c5818 298 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
0552f765 299
be1c63c8
LP
300 if (intel_dp->active_mst_links == 0)
301 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
302
5ea2355a 303 drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
be1c63c8 304
e081c846
ACO
305 if (intel_dp->active_mst_links == 0)
306 intel_dig_port->base.pre_enable(&intel_dig_port->base,
307 pipe_config, NULL);
0e32b39c
DA
308
309 ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
1e7bfa0b 310 connector->port,
1e797f55
PD
311 pipe_config->pbn,
312 pipe_config->dp_m_n.tu);
65172699 313 if (!ret)
0e32b39c 314 DRM_ERROR("failed to allocate vcpi\n");
0e32b39c 315
19e0b4ca 316 intel_dp->active_mst_links++;
0e32b39c
DA
317 temp = I915_READ(DP_TP_STATUS(port));
318 I915_WRITE(DP_TP_STATUS(port), temp);
319
320 ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
2b5cf4ef
ID
321
322 intel_ddi_enable_pipe_clock(pipe_config);
0e32b39c
DA
323}
324
fd6bbda9 325static void intel_mst_enable_dp(struct intel_encoder *encoder,
5f88a9c6
VS
326 const struct intel_crtc_state *pipe_config,
327 const struct drm_connector_state *conn_state)
0e32b39c
DA
328{
329 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
330 struct intel_digital_port *intel_dig_port = intel_mst->primary;
331 struct intel_dp *intel_dp = &intel_dig_port->dp;
1e7bfa0b 332 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
8f4f2797 333 enum port port = intel_dig_port->base.port;
0e32b39c 334
9b1c5818 335 DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
0e32b39c 336
97a04e0d 337 if (intel_wait_for_register(&dev_priv->uncore,
3016a31f
CW
338 DP_TP_STATUS(port),
339 DP_TP_STATUS_ACT_SENT,
340 DP_TP_STATUS_ACT_SENT,
341 1))
0e32b39c
DA
342 DRM_ERROR("Timed out waiting for ACT sent\n");
343
6bd31b37 344 drm_dp_check_act_status(&intel_dp->mst_mgr);
0e32b39c 345
6bd31b37 346 drm_dp_update_payload_part2(&intel_dp->mst_mgr);
37255d8d 347 if (pipe_config->has_audio)
7f9e7754 348 intel_audio_codec_enable(encoder, pipe_config, conn_state);
0e32b39c
DA
349}
350
351static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
352 enum pipe *pipe)
353{
354 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
355 *pipe = intel_mst->pipe;
0552f765 356 if (intel_mst->connector)
0e32b39c
DA
357 return true;
358 return false;
359}
360
361static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
5cec258b 362 struct intel_crtc_state *pipe_config)
0e32b39c
DA
363{
364 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
365 struct intel_digital_port *intel_dig_port = intel_mst->primary;
53e9bf5e 366
35686a44 367 intel_ddi_get_config(&intel_dig_port->base, pipe_config);
0e32b39c
DA
368}
369
370static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
371{
372 struct intel_connector *intel_connector = to_intel_connector(connector);
373 struct intel_dp *intel_dp = intel_connector->mst_port;
374 struct edid *edid;
375 int ret;
376
39b50c60 377 if (drm_connector_is_unregistered(connector))
0552f765 378 return intel_connector_update_modes(connector, NULL);
0e32b39c 379
0552f765 380 edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
0e32b39c
DA
381 ret = intel_connector_update_modes(connector, edid);
382 kfree(edid);
383
384 return ret;
385}
386
387static enum drm_connector_status
f7f3d48a 388intel_dp_mst_detect(struct drm_connector *connector, bool force)
0e32b39c
DA
389{
390 struct intel_connector *intel_connector = to_intel_connector(connector);
391 struct intel_dp *intel_dp = intel_connector->mst_port;
392
39b50c60 393 if (drm_connector_is_unregistered(connector))
0552f765 394 return connector_status_disconnected;
6ed5bb1f
LP
395 return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr,
396 intel_connector->port);
0e32b39c
DA
397}
398
0e32b39c 399static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
0e32b39c
DA
400 .detect = intel_dp_mst_detect,
401 .fill_modes = drm_helper_probe_single_connector_modes,
37aa52bf
VS
402 .atomic_get_property = intel_digital_connector_atomic_get_property,
403 .atomic_set_property = intel_digital_connector_atomic_set_property,
1ebaa0b9 404 .late_register = intel_connector_register,
c191eca1 405 .early_unregister = intel_connector_unregister,
d4b26e4f 406 .destroy = intel_connector_destroy,
c6f95f27 407 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
37aa52bf 408 .atomic_duplicate_state = intel_digital_connector_duplicate_state,
0e32b39c
DA
409};
410
411static int intel_dp_mst_get_modes(struct drm_connector *connector)
412{
413 return intel_dp_mst_get_ddc_modes(connector);
414}
415
416static enum drm_mode_status
417intel_dp_mst_mode_valid(struct drm_connector *connector,
418 struct drm_display_mode *mode)
419{
22a2c8e0
DP
420 struct intel_connector *intel_connector = to_intel_connector(connector);
421 struct intel_dp *intel_dp = intel_connector->mst_port;
832d5bfd 422 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
22a2c8e0
DP
423 int max_rate, mode_rate, max_lanes, max_link_clock;
424
39b50c60 425 if (drm_connector_is_unregistered(connector))
06bfe5b0
RV
426 return MODE_ERROR;
427
e4dd27aa
VS
428 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
429 return MODE_NO_DBLESCAN;
430
22a2c8e0 431 max_link_clock = intel_dp_max_link_rate(intel_dp);
3d65a735 432 max_lanes = intel_dp_max_lane_count(intel_dp);
22a2c8e0
DP
433
434 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
f1477219 435 mode_rate = intel_dp_link_required(mode->clock, 18);
832d5bfd 436
0e32b39c
DA
437 /* TODO - validate mode against available PBN for link */
438 if (mode->clock < 10000)
439 return MODE_CLOCK_LOW;
440
441 if (mode->flags & DRM_MODE_FLAG_DBLCLK)
442 return MODE_H_ILLEGAL;
443
22a2c8e0 444 if (mode_rate > max_rate || mode->clock > max_dotclk)
832d5bfd
MK
445 return MODE_CLOCK_HIGH;
446
0e32b39c
DA
447 return MODE_OK;
448}
449
459485ad
SV
450static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
451 struct drm_connector_state *state)
452{
453 struct intel_connector *intel_connector = to_intel_connector(connector);
454 struct intel_dp *intel_dp = intel_connector->mst_port;
455 struct intel_crtc *crtc = to_intel_crtc(state->crtc);
456
457 return &intel_dp->mst_encoders[crtc->pipe]->base.base;
458}
459
0e32b39c
DA
460static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
461 .get_modes = intel_dp_mst_get_modes,
462 .mode_valid = intel_dp_mst_mode_valid,
459485ad 463 .atomic_best_encoder = intel_mst_atomic_best_encoder,
f424f55e 464 .atomic_check = intel_dp_mst_atomic_check,
0e32b39c
DA
465};
466
467static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
468{
469 struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
470
471 drm_encoder_cleanup(encoder);
472 kfree(intel_mst);
473}
474
475static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
476 .destroy = intel_dp_mst_encoder_destroy,
477};
478
479static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
480{
e85376cb 481 if (connector->encoder && connector->base.state->crtc) {
0e32b39c
DA
482 enum pipe pipe;
483 if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
484 return false;
485 return true;
486 }
487 return false;
488}
489
12e6cecd 490static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
0e32b39c
DA
491{
492 struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
493 struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
494 struct drm_device *dev = intel_dig_port->base.base.dev;
4d58443d 495 struct drm_i915_private *dev_priv = to_i915(dev);
0e32b39c
DA
496 struct intel_connector *intel_connector;
497 struct drm_connector *connector;
4d58443d 498 enum pipe pipe;
091a4f91 499 int ret;
0e32b39c 500
9bdbd0b9 501 intel_connector = intel_connector_alloc();
0e32b39c
DA
502 if (!intel_connector)
503 return NULL;
504
66a5ab10
LP
505 intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
506 intel_connector->mst_port = intel_dp;
507 intel_connector->port = port;
79a47cd3 508 drm_dp_mst_get_port_malloc(port);
66a5ab10 509
0e32b39c 510 connector = &intel_connector->base;
091a4f91
JA
511 ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
512 DRM_MODE_CONNECTOR_DisplayPort);
513 if (ret) {
514 intel_connector_free(intel_connector);
515 return NULL;
516 }
517
0e32b39c
DA
518 drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
519
4d58443d 520 for_each_pipe(dev_priv, pipe) {
091a4f91
JA
521 struct drm_encoder *enc =
522 &intel_dp->mst_encoders[pipe]->base.base;
523
cde4c44d 524 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
091a4f91
JA
525 if (ret)
526 goto err;
0e32b39c 527 }
0e32b39c
DA
528
529 drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
6f134d7b
DA
530 drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
531
97e14fbe 532 ret = drm_connector_set_path_property(connector, pathprop);
091a4f91
JA
533 if (ret)
534 goto err;
535
765bdb0b 536 intel_attach_force_audio_property(connector);
37aa52bf 537 intel_attach_broadcast_rgb_property(connector);
5ca0ef8a 538 drm_connector_attach_max_bpc_property(connector, 6, 12);
37aa52bf 539
d9515c5e 540 return connector;
091a4f91
JA
541
542err:
543 drm_connector_cleanup(connector);
544 return NULL;
d9515c5e
DA
545}
546
547static void intel_dp_register_mst_connector(struct drm_connector *connector)
548{
666b7cdc 549 struct drm_i915_private *dev_priv = to_i915(connector->dev);
7a418e34 550
666b7cdc
SV
551 if (dev_priv->fbdev)
552 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
553 connector);
7a418e34 554
666b7cdc 555 drm_connector_register(connector);
0e32b39c
DA
556}
557
558static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
559 struct drm_connector *connector)
560{
666b7cdc 561 struct drm_i915_private *dev_priv = to_i915(connector->dev);
20fae983 562
dd59a9ba 563 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name);
c191eca1 564 drm_connector_unregister(connector);
1f771755 565
666b7cdc
SV
566 if (dev_priv->fbdev)
567 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
568 connector);
0e32b39c 569
ef196b5c 570 drm_connector_put(connector);
0e32b39c
DA
571}
572
69a0f89c 573static const struct drm_dp_mst_topology_cbs mst_cbs = {
0e32b39c 574 .add_connector = intel_dp_add_mst_connector,
d9515c5e 575 .register_connector = intel_dp_register_mst_connector,
0e32b39c 576 .destroy_connector = intel_dp_destroy_mst_connector,
0e32b39c
DA
577};
578
579static struct intel_dp_mst_encoder *
580intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
581{
582 struct intel_dp_mst_encoder *intel_mst;
583 struct intel_encoder *intel_encoder;
584 struct drm_device *dev = intel_dig_port->base.base.dev;
585
586 intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
587
588 if (!intel_mst)
589 return NULL;
590
591 intel_mst->pipe = pipe;
592 intel_encoder = &intel_mst->base;
593 intel_mst->primary = intel_dig_port;
594
595 drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
580d8ed5 596 DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
0e32b39c
DA
597
598 intel_encoder->type = INTEL_OUTPUT_DP_MST;
79f255a0 599 intel_encoder->power_domain = intel_dig_port->base.power_domain;
8f4f2797 600 intel_encoder->port = intel_dig_port->base.port;
0e32b39c
DA
601 intel_encoder->crtc_mask = 0x7;
602 intel_encoder->cloneable = 0;
603
604 intel_encoder->compute_config = intel_dp_mst_compute_config;
605 intel_encoder->disable = intel_mst_disable_dp;
606 intel_encoder->post_disable = intel_mst_post_disable_dp;
5161d058 607 intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
bad46f2f 608 intel_encoder->post_pll_disable = intel_mst_post_pll_disable_dp;
0e32b39c
DA
609 intel_encoder->pre_enable = intel_mst_pre_enable_dp;
610 intel_encoder->enable = intel_mst_enable_dp;
611 intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
612 intel_encoder->get_config = intel_dp_mst_enc_get_config;
613
614 return intel_mst;
615
616}
617
618static bool
619intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
620{
0e32b39c 621 struct intel_dp *intel_dp = &intel_dig_port->dp;
4d58443d
MK
622 struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
623 enum pipe pipe;
0e32b39c 624
4d58443d
MK
625 for_each_pipe(dev_priv, pipe)
626 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
0e32b39c
DA
627 return true;
628}
629
630int
631intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
632{
633 struct intel_dp *intel_dp = &intel_dig_port->dp;
634 struct drm_device *dev = intel_dig_port->base.base.dev;
635 int ret;
636
637 intel_dp->can_mst = true;
638 intel_dp->mst_mgr.cbs = &mst_cbs;
639
640 /* create encoders */
641 intel_dp_create_fake_mst_encoders(intel_dig_port);
7b0a89a6
DP
642 ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
643 &intel_dp->aux, 16, 3, conn_base_id);
0e32b39c
DA
644 if (ret) {
645 intel_dp->can_mst = false;
646 return ret;
647 }
648 return 0;
649}
650
651void
652intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
653{
654 struct intel_dp *intel_dp = &intel_dig_port->dp;
655
656 if (!intel_dp->can_mst)
657 return;
658
659 drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
660 /* encoders will get killed by normal cleanup */
661}