[thirdparty/linux.git] / drivers / gpu / drm / mediatek / mtk_hdmi_phy.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2018 MediaTek Inc.
 * Author: Chunhui Dai <chunhui.dai@mediatek.com>
 */

#ifndef _MTK_HDMI_PHY_H
#define _MTK_HDMI_PHY_H
#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/types.h>

struct mtk_hdmi_phy;

struct mtk_hdmi_phy_conf {
	bool tz_disabled;
	unsigned long flags;
	const struct clk_ops *hdmi_phy_clk_ops;
	void (*hdmi_phy_enable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
	void (*hdmi_phy_disable_tmds)(struct mtk_hdmi_phy *hdmi_phy);
};

struct mtk_hdmi_phy {
	void __iomem *regs;
	struct device *dev;
	struct mtk_hdmi_phy_conf *conf;
	struct clk *pll;
	struct clk_hw pll_hw;
	unsigned long pll_rate;
	unsigned char drv_imp_clk;
	unsigned char drv_imp_d2;
	unsigned char drv_imp_d1;
	unsigned char drv_imp_d0;
	unsigned int ibias;
	unsigned int ibias_up;
};

void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
			     u32 bits);
void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
			   u32 bits);
void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
		       u32 val, u32 mask);
struct mtk_hdmi_phy *to_mtk_hdmi_phy(struct clk_hw *hw);

extern struct platform_driver mtk_hdmi_phy_driver;
extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf;

#endif /* _MTK_HDMI_PHY_H */
Commit	Line	Data
be28b650	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/*
	3	* Copyright (c) 2018 MediaTek Inc.
	4	* Author: Chunhui Dai <chunhui.dai@mediatek.com>
	5	*/
	6
	7	#ifndef _MTK_HDMI_PHY_H
	8	#define _MTK_HDMI_PHY_H
	9	#include <linux/clk.h>
	10	#include <linux/clk-provider.h>
	11	#include <linux/delay.h>
	12	#include <linux/io.h>
	13	#include <linux/mfd/syscon.h>
	14	#include <linux/module.h>
	15	#include <linux/of_device.h>
	16	#include <linux/phy/phy.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/types.h>
	19
	20	struct mtk_hdmi_phy;
	21
	22	struct mtk_hdmi_phy_conf {
0fc721b2	23	bool tz_disabled;
827abdd0	24	unsigned long flags;
be28b650	25	const struct clk_ops *hdmi_phy_clk_ops;
	26	void (hdmi_phy_enable_tmds)(struct mtk_hdmi_phy hdmi_phy);
	27	void (hdmi_phy_disable_tmds)(struct mtk_hdmi_phy hdmi_phy);
	28	};
	29
	30	struct mtk_hdmi_phy {
	31	void __iomem *regs;
	32	struct device *dev;
	33	struct mtk_hdmi_phy_conf *conf;
	34	struct clk *pll;
	35	struct clk_hw pll_hw;
	36	unsigned long pll_rate;
	37	unsigned char drv_imp_clk;
	38	unsigned char drv_imp_d2;
	39	unsigned char drv_imp_d1;
	40	unsigned char drv_imp_d0;
	41	unsigned int ibias;
	42	unsigned int ibias_up;
	43	};
	44
	45	void mtk_hdmi_phy_clear_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
	46	u32 bits);
	47	void mtk_hdmi_phy_set_bits(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
	48	u32 bits);
	49	void mtk_hdmi_phy_mask(struct mtk_hdmi_phy *hdmi_phy, u32 offset,
	50	u32 val, u32 mask);
	51	struct mtk_hdmi_phy to_mtk_hdmi_phy(struct clk_hw hw);
be28b650	52
	53	extern struct platform_driver mtk_hdmi_phy_driver;
	54	extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_8173_conf;
0fc721b2	55	extern struct mtk_hdmi_phy_conf mtk_hdmi_phy_2701_conf;
be28b650	56
be28b650	57	#endif /* _MTK_HDMI_PHY_H */