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Commit | Line | Data |
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caab277b | 1 | // SPDX-License-Identifier: GPL-2.0-only |
c8afe684 | 2 | /* |
5eba5d87 | 3 | * Copyright (c) 2014 The Linux Foundation. All rights reserved. |
c8afe684 RC |
4 | * Copyright (C) 2013 Red Hat |
5 | * Author: Rob Clark <robdclark@gmail.com> | |
c8afe684 RC |
6 | */ |
7 | ||
f6a8eaca | 8 | #include <linux/of_irq.h> |
1fd6a441 AT |
9 | #include <linux/of_gpio.h> |
10 | ||
f1427016 | 11 | #include <sound/hdmi-codec.h> |
c8afe684 RC |
12 | #include "hdmi.h" |
13 | ||
fcda50c8 | 14 | void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) |
c8afe684 RC |
15 | { |
16 | uint32_t ctrl = 0; | |
c6a57a50 | 17 | unsigned long flags; |
c8afe684 | 18 | |
c6a57a50 | 19 | spin_lock_irqsave(&hdmi->reg_lock, flags); |
c8afe684 RC |
20 | if (power_on) { |
21 | ctrl |= HDMI_CTRL_ENABLE; | |
22 | if (!hdmi->hdmi_mode) { | |
23 | ctrl |= HDMI_CTRL_HDMI; | |
24 | hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); | |
25 | ctrl &= ~HDMI_CTRL_HDMI; | |
26 | } else { | |
27 | ctrl |= HDMI_CTRL_HDMI; | |
28 | } | |
29 | } else { | |
30 | ctrl = HDMI_CTRL_HDMI; | |
31 | } | |
32 | ||
33 | hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); | |
c6a57a50 | 34 | spin_unlock_irqrestore(&hdmi->reg_lock, flags); |
c8afe684 RC |
35 | DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", |
36 | power_on ? "Enable" : "Disable", ctrl); | |
37 | } | |
38 | ||
fcda50c8 | 39 | static irqreturn_t msm_hdmi_irq(int irq, void *dev_id) |
c8afe684 RC |
40 | { |
41 | struct hdmi *hdmi = dev_id; | |
42 | ||
43 | /* Process HPD: */ | |
fcda50c8 | 44 | msm_hdmi_connector_irq(hdmi->connector); |
c8afe684 RC |
45 | |
46 | /* Process DDC: */ | |
fcda50c8 | 47 | msm_hdmi_i2c_irq(hdmi->i2c); |
c8afe684 | 48 | |
c6a57a50 JW |
49 | /* Process HDCP: */ |
50 | if (hdmi->hdcp_ctrl) | |
fcda50c8 | 51 | msm_hdmi_hdcp_irq(hdmi->hdcp_ctrl); |
c6a57a50 | 52 | |
c8afe684 RC |
53 | /* TODO audio.. */ |
54 | ||
55 | return IRQ_HANDLED; | |
56 | } | |
57 | ||
fcda50c8 | 58 | static void msm_hdmi_destroy(struct hdmi *hdmi) |
c8afe684 | 59 | { |
c6a57a50 JW |
60 | /* |
61 | * at this point, hpd has been disabled, | |
62 | * after flush workq, it's safe to deinit hdcp | |
63 | */ | |
64 | if (hdmi->workq) { | |
65 | flush_workqueue(hdmi->workq); | |
66 | destroy_workqueue(hdmi->workq); | |
67 | } | |
fcda50c8 | 68 | msm_hdmi_hdcp_destroy(hdmi); |
c8afe684 | 69 | |
e00012b2 AT |
70 | if (hdmi->phy_dev) { |
71 | put_device(hdmi->phy_dev); | |
72 | hdmi->phy = NULL; | |
73 | hdmi->phy_dev = NULL; | |
74 | } | |
75 | ||
c8afe684 | 76 | if (hdmi->i2c) |
fcda50c8 | 77 | msm_hdmi_i2c_destroy(hdmi->i2c); |
c8afe684 | 78 | |
c0c0d9ee | 79 | platform_set_drvdata(hdmi->pdev, NULL); |
c8afe684 RC |
80 | } |
81 | ||
fcda50c8 | 82 | static int msm_hdmi_get_phy(struct hdmi *hdmi) |
e00012b2 AT |
83 | { |
84 | struct platform_device *pdev = hdmi->pdev; | |
85 | struct platform_device *phy_pdev; | |
86 | struct device_node *phy_node; | |
87 | ||
88 | phy_node = of_parse_phandle(pdev->dev.of_node, "phys", 0); | |
89 | if (!phy_node) { | |
6a41da17 | 90 | DRM_DEV_ERROR(&pdev->dev, "cannot find phy device\n"); |
e00012b2 AT |
91 | return -ENXIO; |
92 | } | |
93 | ||
94 | phy_pdev = of_find_device_by_node(phy_node); | |
95 | if (phy_pdev) | |
96 | hdmi->phy = platform_get_drvdata(phy_pdev); | |
97 | ||
98 | of_node_put(phy_node); | |
99 | ||
100 | if (!phy_pdev || !hdmi->phy) { | |
6a41da17 | 101 | DRM_DEV_ERROR(&pdev->dev, "phy driver is not ready\n"); |
e00012b2 AT |
102 | return -EPROBE_DEFER; |
103 | } | |
104 | ||
105 | hdmi->phy_dev = get_device(&phy_pdev->dev); | |
106 | ||
107 | return 0; | |
108 | } | |
109 | ||
067fef37 RC |
110 | /* construct hdmi at bind/probe time, grab all the resources. If |
111 | * we are to EPROBE_DEFER we want to do it here, rather than later | |
112 | * at modeset_init() time | |
113 | */ | |
fcda50c8 | 114 | static struct hdmi *msm_hdmi_init(struct platform_device *pdev) |
c8afe684 | 115 | { |
067fef37 | 116 | struct hdmi_platform_config *config = pdev->dev.platform_data; |
a3376e3e | 117 | struct hdmi *hdmi = NULL; |
c6a57a50 | 118 | struct resource *res; |
dada25bd | 119 | int i, ret; |
c8afe684 | 120 | |
067fef37 | 121 | hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); |
a3376e3e RC |
122 | if (!hdmi) { |
123 | ret = -ENOMEM; | |
124 | goto fail; | |
125 | } | |
126 | ||
c8afe684 | 127 | hdmi->pdev = pdev; |
dada25bd | 128 | hdmi->config = config; |
c6a57a50 | 129 | spin_lock_init(&hdmi->reg_lock); |
c0c0d9ee | 130 | |
dada25bd | 131 | hdmi->mmio = msm_ioremap(pdev, config->mmio_name, "HDMI"); |
c8afe684 RC |
132 | if (IS_ERR(hdmi->mmio)) { |
133 | ret = PTR_ERR(hdmi->mmio); | |
134 | goto fail; | |
135 | } | |
136 | ||
c6a57a50 JW |
137 | /* HDCP needs physical address of hdmi register */ |
138 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, | |
139 | config->mmio_name); | |
140 | hdmi->mmio_phy_addr = res->start; | |
141 | ||
142 | hdmi->qfprom_mmio = msm_ioremap(pdev, | |
143 | config->qfprom_mmio_name, "HDMI_QFPROM"); | |
144 | if (IS_ERR(hdmi->qfprom_mmio)) { | |
6a41da17 | 145 | DRM_DEV_INFO(&pdev->dev, "can't find qfprom resource\n"); |
c6a57a50 JW |
146 | hdmi->qfprom_mmio = NULL; |
147 | } | |
148 | ||
a86854d0 KC |
149 | hdmi->hpd_regs = devm_kcalloc(&pdev->dev, |
150 | config->hpd_reg_cnt, | |
151 | sizeof(hdmi->hpd_regs[0]), | |
152 | GFP_KERNEL); | |
447fa529 SV |
153 | if (!hdmi->hpd_regs) { |
154 | ret = -ENOMEM; | |
155 | goto fail; | |
156 | } | |
dada25bd RC |
157 | for (i = 0; i < config->hpd_reg_cnt; i++) { |
158 | struct regulator *reg; | |
159 | ||
3e87599b | 160 | reg = devm_regulator_get(&pdev->dev, |
41e69778 | 161 | config->hpd_reg_names[i]); |
dada25bd RC |
162 | if (IS_ERR(reg)) { |
163 | ret = PTR_ERR(reg); | |
6a41da17 | 164 | DRM_DEV_ERROR(&pdev->dev, "failed to get hpd regulator: %s (%d)\n", |
dada25bd RC |
165 | config->hpd_reg_names[i], ret); |
166 | goto fail; | |
167 | } | |
168 | ||
169 | hdmi->hpd_regs[i] = reg; | |
c8afe684 RC |
170 | } |
171 | ||
a86854d0 KC |
172 | hdmi->pwr_regs = devm_kcalloc(&pdev->dev, |
173 | config->pwr_reg_cnt, | |
174 | sizeof(hdmi->pwr_regs[0]), | |
175 | GFP_KERNEL); | |
447fa529 SV |
176 | if (!hdmi->pwr_regs) { |
177 | ret = -ENOMEM; | |
178 | goto fail; | |
179 | } | |
dada25bd RC |
180 | for (i = 0; i < config->pwr_reg_cnt; i++) { |
181 | struct regulator *reg; | |
c8afe684 | 182 | |
3e87599b | 183 | reg = devm_regulator_get(&pdev->dev, |
41e69778 | 184 | config->pwr_reg_names[i]); |
dada25bd RC |
185 | if (IS_ERR(reg)) { |
186 | ret = PTR_ERR(reg); | |
6a41da17 | 187 | DRM_DEV_ERROR(&pdev->dev, "failed to get pwr regulator: %s (%d)\n", |
dada25bd RC |
188 | config->pwr_reg_names[i], ret); |
189 | goto fail; | |
190 | } | |
191 | ||
192 | hdmi->pwr_regs[i] = reg; | |
c8afe684 RC |
193 | } |
194 | ||
a86854d0 KC |
195 | hdmi->hpd_clks = devm_kcalloc(&pdev->dev, |
196 | config->hpd_clk_cnt, | |
197 | sizeof(hdmi->hpd_clks[0]), | |
198 | GFP_KERNEL); | |
447fa529 SV |
199 | if (!hdmi->hpd_clks) { |
200 | ret = -ENOMEM; | |
201 | goto fail; | |
202 | } | |
dada25bd RC |
203 | for (i = 0; i < config->hpd_clk_cnt; i++) { |
204 | struct clk *clk; | |
205 | ||
aede1e9e | 206 | clk = msm_clk_get(pdev, config->hpd_clk_names[i]); |
dada25bd RC |
207 | if (IS_ERR(clk)) { |
208 | ret = PTR_ERR(clk); | |
6a41da17 | 209 | DRM_DEV_ERROR(&pdev->dev, "failed to get hpd clk: %s (%d)\n", |
dada25bd RC |
210 | config->hpd_clk_names[i], ret); |
211 | goto fail; | |
212 | } | |
213 | ||
214 | hdmi->hpd_clks[i] = clk; | |
c8afe684 RC |
215 | } |
216 | ||
a86854d0 KC |
217 | hdmi->pwr_clks = devm_kcalloc(&pdev->dev, |
218 | config->pwr_clk_cnt, | |
219 | sizeof(hdmi->pwr_clks[0]), | |
220 | GFP_KERNEL); | |
447fa529 SV |
221 | if (!hdmi->pwr_clks) { |
222 | ret = -ENOMEM; | |
223 | goto fail; | |
224 | } | |
dada25bd RC |
225 | for (i = 0; i < config->pwr_clk_cnt; i++) { |
226 | struct clk *clk; | |
227 | ||
aede1e9e | 228 | clk = msm_clk_get(pdev, config->pwr_clk_names[i]); |
dada25bd RC |
229 | if (IS_ERR(clk)) { |
230 | ret = PTR_ERR(clk); | |
6a41da17 | 231 | DRM_DEV_ERROR(&pdev->dev, "failed to get pwr clk: %s (%d)\n", |
dada25bd RC |
232 | config->pwr_clk_names[i], ret); |
233 | goto fail; | |
234 | } | |
235 | ||
236 | hdmi->pwr_clks[i] = clk; | |
c8afe684 RC |
237 | } |
238 | ||
6ed9ed48 AT |
239 | pm_runtime_enable(&pdev->dev); |
240 | ||
c6a57a50 JW |
241 | hdmi->workq = alloc_ordered_workqueue("msm_hdmi", 0); |
242 | ||
fcda50c8 | 243 | hdmi->i2c = msm_hdmi_i2c_init(hdmi); |
c8afe684 RC |
244 | if (IS_ERR(hdmi->i2c)) { |
245 | ret = PTR_ERR(hdmi->i2c); | |
6a41da17 | 246 | DRM_DEV_ERROR(&pdev->dev, "failed to get i2c: %d\n", ret); |
c8afe684 RC |
247 | hdmi->i2c = NULL; |
248 | goto fail; | |
249 | } | |
250 | ||
fcda50c8 | 251 | ret = msm_hdmi_get_phy(hdmi); |
e00012b2 | 252 | if (ret) { |
6a41da17 | 253 | DRM_DEV_ERROR(&pdev->dev, "failed to get phy\n"); |
e00012b2 AT |
254 | goto fail; |
255 | } | |
256 | ||
fcda50c8 | 257 | hdmi->hdcp_ctrl = msm_hdmi_hdcp_init(hdmi); |
c6a57a50 JW |
258 | if (IS_ERR(hdmi->hdcp_ctrl)) { |
259 | dev_warn(&pdev->dev, "failed to init hdcp: disabled\n"); | |
260 | hdmi->hdcp_ctrl = NULL; | |
261 | } | |
262 | ||
067fef37 RC |
263 | return hdmi; |
264 | ||
265 | fail: | |
266 | if (hdmi) | |
fcda50c8 | 267 | msm_hdmi_destroy(hdmi); |
067fef37 RC |
268 | |
269 | return ERR_PTR(ret); | |
270 | } | |
271 | ||
272 | /* Second part of initialization, the drm/kms level modeset_init, | |
273 | * constructs/initializes mode objects, etc, is called from master | |
274 | * driver (not hdmi sub-device's probe/bind!) | |
275 | * | |
276 | * Any resource (regulator/clk/etc) which could be missing at boot | |
fcda50c8 | 277 | * should be handled in msm_hdmi_init() so that failure happens from |
067fef37 RC |
278 | * hdmi sub-device's probe. |
279 | */ | |
fcda50c8 | 280 | int msm_hdmi_modeset_init(struct hdmi *hdmi, |
067fef37 RC |
281 | struct drm_device *dev, struct drm_encoder *encoder) |
282 | { | |
283 | struct msm_drm_private *priv = dev->dev_private; | |
284 | struct platform_device *pdev = hdmi->pdev; | |
067fef37 RC |
285 | int ret; |
286 | ||
287 | hdmi->dev = dev; | |
288 | hdmi->encoder = encoder; | |
289 | ||
290 | hdmi_audio_infoframe_init(&hdmi->audio.infoframe); | |
291 | ||
fcda50c8 | 292 | hdmi->bridge = msm_hdmi_bridge_init(hdmi); |
a3376e3e RC |
293 | if (IS_ERR(hdmi->bridge)) { |
294 | ret = PTR_ERR(hdmi->bridge); | |
6a41da17 | 295 | DRM_DEV_ERROR(dev->dev, "failed to create HDMI bridge: %d\n", ret); |
a3376e3e RC |
296 | hdmi->bridge = NULL; |
297 | goto fail; | |
298 | } | |
299 | ||
fcda50c8 | 300 | hdmi->connector = msm_hdmi_connector_init(hdmi); |
a3376e3e RC |
301 | if (IS_ERR(hdmi->connector)) { |
302 | ret = PTR_ERR(hdmi->connector); | |
6a41da17 | 303 | DRM_DEV_ERROR(dev->dev, "failed to create HDMI connector: %d\n", ret); |
a3376e3e RC |
304 | hdmi->connector = NULL; |
305 | goto fail; | |
306 | } | |
307 | ||
f6a8eaca RC |
308 | hdmi->irq = irq_of_parse_and_map(pdev->dev.of_node, 0); |
309 | if (hdmi->irq < 0) { | |
310 | ret = hdmi->irq; | |
6a41da17 | 311 | DRM_DEV_ERROR(dev->dev, "failed to get irq: %d\n", ret); |
f6a8eaca RC |
312 | goto fail; |
313 | } | |
c8afe684 | 314 | |
f6a8eaca | 315 | ret = devm_request_irq(&pdev->dev, hdmi->irq, |
fcda50c8 | 316 | msm_hdmi_irq, IRQF_TRIGGER_HIGH | IRQF_ONESHOT, |
f6a8eaca RC |
317 | "hdmi_isr", hdmi); |
318 | if (ret < 0) { | |
6a41da17 | 319 | DRM_DEV_ERROR(dev->dev, "failed to request IRQ%u: %d\n", |
f6a8eaca RC |
320 | hdmi->irq, ret); |
321 | goto fail; | |
c8afe684 RC |
322 | } |
323 | ||
ee445635 TT |
324 | ret = msm_hdmi_hpd_enable(hdmi->connector); |
325 | if (ret < 0) { | |
326 | DRM_DEV_ERROR(&hdmi->pdev->dev, "failed to enable HPD: %d\n", ret); | |
327 | goto fail; | |
328 | } | |
329 | ||
a3376e3e RC |
330 | encoder->bridge = hdmi->bridge; |
331 | ||
332 | priv->bridges[priv->num_bridges++] = hdmi->bridge; | |
333 | priv->connectors[priv->num_connectors++] = hdmi->connector; | |
334 | ||
c0c0d9ee RC |
335 | platform_set_drvdata(pdev, hdmi); |
336 | ||
067fef37 | 337 | return 0; |
c8afe684 RC |
338 | |
339 | fail: | |
3d3f8b1f | 340 | /* bridge is normally destroyed by drm: */ |
067fef37 | 341 | if (hdmi->bridge) { |
fcda50c8 | 342 | msm_hdmi_bridge_destroy(hdmi->bridge); |
067fef37 RC |
343 | hdmi->bridge = NULL; |
344 | } | |
345 | if (hdmi->connector) { | |
346 | hdmi->connector->funcs->destroy(hdmi->connector); | |
347 | hdmi->connector = NULL; | |
a3376e3e | 348 | } |
c8afe684 | 349 | |
067fef37 | 350 | return ret; |
c8afe684 RC |
351 | } |
352 | ||
353 | /* | |
354 | * The hdmi device: | |
355 | */ | |
356 | ||
5eba5d87 SV |
357 | #define HDMI_CFG(item, entry) \ |
358 | .item ## _names = item ##_names_ ## entry, \ | |
359 | .item ## _cnt = ARRAY_SIZE(item ## _names_ ## entry) | |
360 | ||
0afbe59e SV |
361 | static const char *pwr_reg_names_none[] = {}; |
362 | static const char *hpd_reg_names_none[] = {}; | |
363 | ||
ba3d7bf3 | 364 | static struct hdmi_platform_config hdmi_tx_8660_config; |
5eba5d87 SV |
365 | |
366 | static const char *hpd_reg_names_8960[] = {"core-vdda", "hdmi-mux"}; | |
aede1e9e | 367 | static const char *hpd_clk_names_8960[] = {"core", "master_iface", "slave_iface"}; |
5eba5d87 SV |
368 | |
369 | static struct hdmi_platform_config hdmi_tx_8960_config = { | |
5eba5d87 SV |
370 | HDMI_CFG(hpd_reg, 8960), |
371 | HDMI_CFG(hpd_clk, 8960), | |
372 | }; | |
373 | ||
374 | static const char *pwr_reg_names_8x74[] = {"core-vdda", "core-vcc"}; | |
375 | static const char *hpd_reg_names_8x74[] = {"hpd-gdsc", "hpd-5v"}; | |
aede1e9e RC |
376 | static const char *pwr_clk_names_8x74[] = {"extp", "alt_iface"}; |
377 | static const char *hpd_clk_names_8x74[] = {"iface", "core", "mdp_core"}; | |
5eba5d87 SV |
378 | static unsigned long hpd_clk_freq_8x74[] = {0, 19200000, 0}; |
379 | ||
5cf3a455 | 380 | static struct hdmi_platform_config hdmi_tx_8974_config = { |
5eba5d87 SV |
381 | HDMI_CFG(pwr_reg, 8x74), |
382 | HDMI_CFG(hpd_reg, 8x74), | |
383 | HDMI_CFG(pwr_clk, 8x74), | |
384 | HDMI_CFG(hpd_clk, 8x74), | |
385 | .hpd_freq = hpd_clk_freq_8x74, | |
386 | }; | |
387 | ||
388 | static const char *hpd_reg_names_8084[] = {"hpd-gdsc", "hpd-5v", "hpd-5v-en"}; | |
389 | ||
390 | static struct hdmi_platform_config hdmi_tx_8084_config = { | |
5eba5d87 SV |
391 | HDMI_CFG(pwr_reg, 8x74), |
392 | HDMI_CFG(hpd_reg, 8084), | |
393 | HDMI_CFG(pwr_clk, 8x74), | |
394 | HDMI_CFG(hpd_clk, 8x74), | |
395 | .hpd_freq = hpd_clk_freq_8x74, | |
396 | }; | |
397 | ||
5cf3a455 | 398 | static struct hdmi_platform_config hdmi_tx_8994_config = { |
3a84f846 | 399 | HDMI_CFG(pwr_reg, 8x74), |
0afbe59e SV |
400 | HDMI_CFG(hpd_reg, none), |
401 | HDMI_CFG(pwr_clk, 8x74), | |
402 | HDMI_CFG(hpd_clk, 8x74), | |
403 | .hpd_freq = hpd_clk_freq_8x74, | |
404 | }; | |
405 | ||
406 | static struct hdmi_platform_config hdmi_tx_8996_config = { | |
0afbe59e SV |
407 | HDMI_CFG(pwr_reg, none), |
408 | HDMI_CFG(hpd_reg, none), | |
3a84f846 SV |
409 | HDMI_CFG(pwr_clk, 8x74), |
410 | HDMI_CFG(hpd_clk, 8x74), | |
411 | .hpd_freq = hpd_clk_freq_8x74, | |
412 | }; | |
413 | ||
dc50f782 AT |
414 | static const struct { |
415 | const char *name; | |
416 | const bool output; | |
417 | const int value; | |
418 | const char *label; | |
fcda50c8 | 419 | } msm_hdmi_gpio_pdata[] = { |
dc50f782 AT |
420 | { "qcom,hdmi-tx-ddc-clk", true, 1, "HDMI_DDC_CLK" }, |
421 | { "qcom,hdmi-tx-ddc-data", true, 1, "HDMI_DDC_DATA" }, | |
422 | { "qcom,hdmi-tx-hpd", false, 1, "HDMI_HPD" }, | |
423 | { "qcom,hdmi-tx-mux-en", true, 1, "HDMI_MUX_EN" }, | |
424 | { "qcom,hdmi-tx-mux-sel", true, 0, "HDMI_MUX_SEL" }, | |
425 | { "qcom,hdmi-tx-mux-lpm", true, 1, "HDMI_MUX_LPM" }, | |
426 | }; | |
427 | ||
fcda50c8 | 428 | static int msm_hdmi_get_gpio(struct device_node *of_node, const char *name) |
fc886107 | 429 | { |
5f6f5e08 AT |
430 | int gpio; |
431 | ||
432 | /* try with the gpio names as in the table (downstream bindings) */ | |
433 | gpio = of_get_named_gpio(of_node, name, 0); | |
fc886107 MC |
434 | if (gpio < 0) { |
435 | char name2[32]; | |
5f6f5e08 AT |
436 | |
437 | /* try with the gpio names as in the upstream bindings */ | |
438 | snprintf(name2, sizeof(name2), "%s-gpios", name); | |
fc886107 | 439 | gpio = of_get_named_gpio(of_node, name2, 0); |
5f6f5e08 AT |
440 | if (gpio < 0) { |
441 | char name3[32]; | |
442 | ||
443 | /* | |
444 | * try again after stripping out the "qcom,hdmi-tx" | |
445 | * prefix. This is mainly to match "hpd-gpios" used | |
446 | * in the upstream bindings | |
447 | */ | |
448 | if (sscanf(name2, "qcom,hdmi-tx-%s", name3)) | |
449 | gpio = of_get_named_gpio(of_node, name3, 0); | |
450 | } | |
451 | ||
fc886107 | 452 | if (gpio < 0) { |
3a84f846 | 453 | DBG("failed to get gpio: %s (%d)", name, gpio); |
fc886107 MC |
454 | gpio = -1; |
455 | } | |
456 | } | |
457 | return gpio; | |
458 | } | |
fc886107 | 459 | |
f1427016 SK |
460 | /* |
461 | * HDMI audio codec callbacks | |
462 | */ | |
463 | static int msm_hdmi_audio_hw_params(struct device *dev, void *data, | |
464 | struct hdmi_codec_daifmt *daifmt, | |
465 | struct hdmi_codec_params *params) | |
466 | { | |
467 | struct hdmi *hdmi = dev_get_drvdata(dev); | |
468 | unsigned int chan; | |
469 | unsigned int channel_allocation = 0; | |
470 | unsigned int rate; | |
471 | unsigned int level_shift = 0; /* 0dB */ | |
472 | bool down_mix = false; | |
473 | ||
6a41da17 | 474 | DRM_DEV_DEBUG(dev, "%u Hz, %d bit, %d channels\n", params->sample_rate, |
f1427016 SK |
475 | params->sample_width, params->cea.channels); |
476 | ||
477 | switch (params->cea.channels) { | |
478 | case 2: | |
479 | /* FR and FL speakers */ | |
480 | channel_allocation = 0; | |
481 | chan = MSM_HDMI_AUDIO_CHANNEL_2; | |
482 | break; | |
483 | case 4: | |
484 | /* FC, LFE, FR and FL speakers */ | |
485 | channel_allocation = 0x3; | |
486 | chan = MSM_HDMI_AUDIO_CHANNEL_4; | |
487 | break; | |
488 | case 6: | |
489 | /* RR, RL, FC, LFE, FR and FL speakers */ | |
490 | channel_allocation = 0x0B; | |
491 | chan = MSM_HDMI_AUDIO_CHANNEL_6; | |
492 | break; | |
493 | case 8: | |
494 | /* FRC, FLC, RR, RL, FC, LFE, FR and FL speakers */ | |
495 | channel_allocation = 0x1F; | |
496 | chan = MSM_HDMI_AUDIO_CHANNEL_8; | |
497 | break; | |
498 | default: | |
499 | return -EINVAL; | |
500 | } | |
501 | ||
502 | switch (params->sample_rate) { | |
503 | case 32000: | |
504 | rate = HDMI_SAMPLE_RATE_32KHZ; | |
505 | break; | |
506 | case 44100: | |
507 | rate = HDMI_SAMPLE_RATE_44_1KHZ; | |
508 | break; | |
509 | case 48000: | |
510 | rate = HDMI_SAMPLE_RATE_48KHZ; | |
511 | break; | |
512 | case 88200: | |
513 | rate = HDMI_SAMPLE_RATE_88_2KHZ; | |
514 | break; | |
515 | case 96000: | |
516 | rate = HDMI_SAMPLE_RATE_96KHZ; | |
517 | break; | |
518 | case 176400: | |
519 | rate = HDMI_SAMPLE_RATE_176_4KHZ; | |
520 | break; | |
521 | case 192000: | |
522 | rate = HDMI_SAMPLE_RATE_192KHZ; | |
523 | break; | |
524 | default: | |
6a41da17 | 525 | DRM_DEV_ERROR(dev, "rate[%d] not supported!\n", |
f1427016 SK |
526 | params->sample_rate); |
527 | return -EINVAL; | |
528 | } | |
529 | ||
530 | msm_hdmi_audio_set_sample_rate(hdmi, rate); | |
531 | msm_hdmi_audio_info_setup(hdmi, 1, chan, channel_allocation, | |
532 | level_shift, down_mix); | |
533 | ||
534 | return 0; | |
535 | } | |
536 | ||
537 | static void msm_hdmi_audio_shutdown(struct device *dev, void *data) | |
538 | { | |
539 | struct hdmi *hdmi = dev_get_drvdata(dev); | |
540 | ||
541 | msm_hdmi_audio_info_setup(hdmi, 0, 0, 0, 0, 0); | |
542 | } | |
543 | ||
544 | static const struct hdmi_codec_ops msm_hdmi_audio_codec_ops = { | |
545 | .hw_params = msm_hdmi_audio_hw_params, | |
546 | .audio_shutdown = msm_hdmi_audio_shutdown, | |
547 | }; | |
548 | ||
549 | static struct hdmi_codec_pdata codec_data = { | |
550 | .ops = &msm_hdmi_audio_codec_ops, | |
551 | .max_i2s_channels = 8, | |
552 | .i2s = 1, | |
553 | }; | |
554 | ||
555 | static int msm_hdmi_register_audio_driver(struct hdmi *hdmi, struct device *dev) | |
556 | { | |
557 | hdmi->audio_pdev = platform_device_register_data(dev, | |
558 | HDMI_CODEC_DRV_NAME, | |
559 | PLATFORM_DEVID_AUTO, | |
560 | &codec_data, | |
561 | sizeof(codec_data)); | |
06f32172 | 562 | return PTR_ERR_OR_ZERO(hdmi->audio_pdev); |
f1427016 SK |
563 | } |
564 | ||
fcda50c8 | 565 | static int msm_hdmi_bind(struct device *dev, struct device *master, void *data) |
c8afe684 | 566 | { |
d1a717bd RC |
567 | struct drm_device *drm = dev_get_drvdata(master); |
568 | struct msm_drm_private *priv = drm->dev_private; | |
67146519 | 569 | struct hdmi_platform_config *hdmi_cfg; |
067fef37 | 570 | struct hdmi *hdmi; |
060530f1 | 571 | struct device_node *of_node = dev->of_node; |
f1427016 | 572 | int i, err; |
dada25bd | 573 | |
1fd6a441 AT |
574 | hdmi_cfg = (struct hdmi_platform_config *) |
575 | of_device_get_match_data(dev); | |
576 | if (!hdmi_cfg) { | |
6a41da17 | 577 | DRM_DEV_ERROR(dev, "unknown hdmi_cfg: %pOFn\n", of_node); |
5eba5d87 | 578 | return -ENXIO; |
41e69778 | 579 | } |
dada25bd | 580 | |
5eba5d87 | 581 | hdmi_cfg->mmio_name = "core_physical"; |
c6a57a50 | 582 | hdmi_cfg->qfprom_mmio_name = "qfprom_physical"; |
dc50f782 AT |
583 | |
584 | for (i = 0; i < HDMI_MAX_NUM_GPIO; i++) { | |
fcda50c8 AB |
585 | hdmi_cfg->gpios[i].num = msm_hdmi_get_gpio(of_node, |
586 | msm_hdmi_gpio_pdata[i].name); | |
587 | hdmi_cfg->gpios[i].output = msm_hdmi_gpio_pdata[i].output; | |
588 | hdmi_cfg->gpios[i].value = msm_hdmi_gpio_pdata[i].value; | |
589 | hdmi_cfg->gpios[i].label = msm_hdmi_gpio_pdata[i].label; | |
dc50f782 | 590 | } |
dada25bd | 591 | |
5eba5d87 SV |
592 | dev->platform_data = hdmi_cfg; |
593 | ||
fcda50c8 | 594 | hdmi = msm_hdmi_init(to_platform_device(dev)); |
067fef37 RC |
595 | if (IS_ERR(hdmi)) |
596 | return PTR_ERR(hdmi); | |
d1a717bd | 597 | priv->hdmi = hdmi; |
5eba5d87 | 598 | |
f1427016 SK |
599 | err = msm_hdmi_register_audio_driver(hdmi, dev); |
600 | if (err) { | |
601 | DRM_ERROR("Failed to attach an audio codec %d\n", err); | |
602 | hdmi->audio_pdev = NULL; | |
603 | } | |
604 | ||
c8afe684 RC |
605 | return 0; |
606 | } | |
607 | ||
fcda50c8 | 608 | static void msm_hdmi_unbind(struct device *dev, struct device *master, |
060530f1 RC |
609 | void *data) |
610 | { | |
d1a717bd RC |
611 | struct drm_device *drm = dev_get_drvdata(master); |
612 | struct msm_drm_private *priv = drm->dev_private; | |
613 | if (priv->hdmi) { | |
f1427016 SK |
614 | if (priv->hdmi->audio_pdev) |
615 | platform_device_unregister(priv->hdmi->audio_pdev); | |
616 | ||
fcda50c8 | 617 | msm_hdmi_destroy(priv->hdmi); |
d1a717bd RC |
618 | priv->hdmi = NULL; |
619 | } | |
060530f1 RC |
620 | } |
621 | ||
fcda50c8 AB |
622 | static const struct component_ops msm_hdmi_ops = { |
623 | .bind = msm_hdmi_bind, | |
624 | .unbind = msm_hdmi_unbind, | |
060530f1 RC |
625 | }; |
626 | ||
fcda50c8 | 627 | static int msm_hdmi_dev_probe(struct platform_device *pdev) |
060530f1 | 628 | { |
fcda50c8 | 629 | return component_add(&pdev->dev, &msm_hdmi_ops); |
060530f1 RC |
630 | } |
631 | ||
fcda50c8 | 632 | static int msm_hdmi_dev_remove(struct platform_device *pdev) |
c8afe684 | 633 | { |
fcda50c8 | 634 | component_del(&pdev->dev, &msm_hdmi_ops); |
c8afe684 RC |
635 | return 0; |
636 | } | |
637 | ||
fcda50c8 | 638 | static const struct of_device_id msm_hdmi_dt_match[] = { |
1fd6a441 AT |
639 | { .compatible = "qcom,hdmi-tx-8996", .data = &hdmi_tx_8996_config }, |
640 | { .compatible = "qcom,hdmi-tx-8994", .data = &hdmi_tx_8994_config }, | |
641 | { .compatible = "qcom,hdmi-tx-8084", .data = &hdmi_tx_8084_config }, | |
642 | { .compatible = "qcom,hdmi-tx-8974", .data = &hdmi_tx_8974_config }, | |
643 | { .compatible = "qcom,hdmi-tx-8960", .data = &hdmi_tx_8960_config }, | |
644 | { .compatible = "qcom,hdmi-tx-8660", .data = &hdmi_tx_8660_config }, | |
645 | {} | |
646 | }; | |
647 | ||
fcda50c8 AB |
648 | static struct platform_driver msm_hdmi_driver = { |
649 | .probe = msm_hdmi_dev_probe, | |
650 | .remove = msm_hdmi_dev_remove, | |
dada25bd RC |
651 | .driver = { |
652 | .name = "hdmi_msm", | |
fcda50c8 | 653 | .of_match_table = msm_hdmi_dt_match, |
dada25bd | 654 | }, |
c8afe684 RC |
655 | }; |
656 | ||
fcda50c8 | 657 | void __init msm_hdmi_register(void) |
c8afe684 | 658 | { |
fcda50c8 AB |
659 | msm_hdmi_phy_driver_register(); |
660 | platform_driver_register(&msm_hdmi_driver); | |
c8afe684 RC |
661 | } |
662 | ||
fcda50c8 | 663 | void __exit msm_hdmi_unregister(void) |
c8afe684 | 664 | { |
fcda50c8 AB |
665 | platform_driver_unregister(&msm_hdmi_driver); |
666 | msm_hdmi_phy_driver_unregister(); | |
c8afe684 | 667 | } |