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drm/nouveau: port all engines to new engine module format
[people/arne_f/kernel.git] / drivers / gpu / drm / nouveau / nouveau_compat.c
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586c55f6 1#include "nouveau_drm.h"
ebb945a9 2#include "nouveau_chan.h"
586c55f6
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3#include "nouveau_compat.h"
4
cd42439d 5#include <subdev/bios.h>
cb75d97e
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6#include <subdev/bios/dcb.h>
7#include <subdev/bios/init.h>
70790f4f 8#include <subdev/bios/pll.h>
e0996aea 9#include <subdev/gpio.h>
4196faa8 10#include <subdev/i2c.h>
70790f4f 11#include <subdev/clock.h>
7d9115de 12#include <subdev/mc.h>
5a5c7432 13#include <subdev/timer.h>
861d2107 14#include <subdev/fb.h>
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15#include <subdev/bar.h>
16#include <subdev/vm.h>
cd42439d 17
cb75d97e
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18int
19nvdrm_gart_init(struct drm_device *dev, u64 *base, u64 *size)
20{
21 struct nouveau_drm *drm = nouveau_newpriv(dev);
22 if (drm->agp.stat == ENABLED) {
23 *base = drm->agp.base;
24 *size = drm->agp.base;
25 return 0;
26 }
27 return -ENODEV;
28}
29
586c55f6
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30u8
31_nv_rd08(struct drm_device *dev, u32 reg)
32{
33 struct nouveau_drm *drm = nouveau_newpriv(dev);
34 return nv_ro08(drm->device, reg);
35}
36
37void
38_nv_wr08(struct drm_device *dev, u32 reg, u8 val)
39{
40 struct nouveau_drm *drm = nouveau_newpriv(dev);
41 nv_wo08(drm->device, reg, val);
42}
43
44u32
45_nv_rd32(struct drm_device *dev, u32 reg)
46{
47 struct nouveau_drm *drm = nouveau_newpriv(dev);
48 return nv_ro32(drm->device, reg);
49}
50
51void
52_nv_wr32(struct drm_device *dev, u32 reg, u32 val)
53{
54 struct nouveau_drm *drm = nouveau_newpriv(dev);
55 nv_wo32(drm->device, reg, val);
56}
57
58u32
59_nv_mask(struct drm_device *dev, u32 reg, u32 mask, u32 val)
60{
61 u32 tmp = _nv_rd32(dev, reg);
62 _nv_wr32(dev, reg, (tmp & ~mask) | val);
63 return tmp;
64}
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65
66bool
67_nv_bios(struct drm_device *dev, u8 **data, u32 *size)
68{
69 struct nouveau_drm *drm = nouveau_newpriv(dev);
70 struct nouveau_bios *bios = nouveau_bios(drm->device);
71 *data = bios->data;
72 *size = bios->size;
73 return true;
74}
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75
76void
77nouveau_gpio_reset(struct drm_device *dev)
78{
79 struct nouveau_drm *drm = nouveau_newpriv(dev);
80 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
81 gpio->reset(gpio);
82}
83
84int
85nouveau_gpio_find(struct drm_device *dev, int idx, u8 tag, u8 line,
86 struct dcb_gpio_func *func)
87{
88 struct nouveau_drm *drm = nouveau_newpriv(dev);
89 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
90
91 return gpio->find(gpio, idx, tag, line, func);
92}
93
94bool
95nouveau_gpio_func_valid(struct drm_device *dev, u8 tag)
96{
97 struct nouveau_drm *drm = nouveau_newpriv(dev);
98 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
99 struct dcb_gpio_func func;
100
101 return gpio->find(gpio, 0, tag, 0xff, &func) == 0;
102}
103
104int
105nouveau_gpio_func_set(struct drm_device *dev, u8 tag, int state)
106{
107 struct nouveau_drm *drm = nouveau_newpriv(dev);
108 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
109 if (gpio && gpio->get)
110 return gpio->set(gpio, 0, tag, 0xff, state);
111 return -ENODEV;
112}
113
114int
115nouveau_gpio_func_get(struct drm_device *dev, u8 tag)
116{
117 struct nouveau_drm *drm = nouveau_newpriv(dev);
118 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
119 if (gpio && gpio->get)
120 return gpio->get(gpio, 0, tag, 0xff);
121 return -ENODEV;
122}
123
124int
125nouveau_gpio_irq(struct drm_device *dev, int idx, u8 tag, u8 line, bool on)
126{
127 struct nouveau_drm *drm = nouveau_newpriv(dev);
128 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
129 if (gpio && gpio->irq)
130 return gpio->irq(gpio, idx, tag, line, on);
131 return -ENODEV;
132}
133
134int
135nouveau_gpio_isr_add(struct drm_device *dev, int idx, u8 tag, u8 line,
136 void (*exec)(void *, int state), void *data)
137{
138 struct nouveau_drm *drm = nouveau_newpriv(dev);
139 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
140 if (gpio && gpio->isr_add)
141 return gpio->isr_add(gpio, idx, tag, line, exec, data);
142 return -ENODEV;
143}
144
145void
146nouveau_gpio_isr_del(struct drm_device *dev, int idx, u8 tag, u8 line,
147 void (*exec)(void *, int state), void *data)
148{
149 struct nouveau_drm *drm = nouveau_newpriv(dev);
150 struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
151 if (gpio && gpio->isr_del)
152 gpio->isr_del(gpio, idx, tag, line, exec, data);
153}
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154
155struct nouveau_i2c_port *
156nouveau_i2c_find(struct drm_device *dev, u8 index)
157{
158 struct nouveau_drm *drm = nouveau_newpriv(dev);
159 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
160
161 return i2c->find(i2c, index);
162}
163
164bool
165nouveau_probe_i2c_addr(struct nouveau_i2c_port *port, int addr)
166{
167 return nv_probe_i2c(port, addr);
168}
169
170struct i2c_adapter *
171nouveau_i2c_adapter(struct nouveau_i2c_port *port)
172{
173 return &port->adapter;
174}
175
176
177int
178nouveau_i2c_identify(struct drm_device *dev, const char *what,
179 struct i2c_board_info *info,
180 bool (*match)(struct nouveau_i2c_port *,
181 struct i2c_board_info *),
182 int index)
183{
184 struct nouveau_drm *drm = nouveau_newpriv(dev);
185 struct nouveau_i2c *i2c = nouveau_i2c(drm->device);
186
187 return i2c->identify(i2c, index, what, info, match);
188}
189
190int
191auxch_rd(struct drm_device *dev, struct nouveau_i2c_port *port,
192 u32 addr, u8 *data, u8 size)
193{
194 return nv_rdaux(port, addr, data, size);
195}
196
197int
198auxch_wr(struct drm_device *dev, struct nouveau_i2c_port *port,
199 u32 addr, u8 *data, u8 size)
200{
201 return nv_wraux(port, addr, data, size);
202}
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203
204u32
205get_pll_register(struct drm_device *dev, u32 type)
206{
207 struct nouveau_drm *drm = nouveau_newpriv(dev);
208 struct nouveau_bios *bios = nouveau_bios(drm->device);
209 struct nvbios_pll info;
210
211 if (nvbios_pll_parse(bios, type, &info))
212 return 0;
213 return info.reg;
214}
215
216int
217get_pll_limits(struct drm_device *dev, u32 type, struct nvbios_pll *info)
218{
219 struct nouveau_drm *drm = nouveau_newpriv(dev);
220 struct nouveau_bios *bios = nouveau_bios(drm->device);
221
222 return nvbios_pll_parse(bios, type, info);
223}
224
225int
226setPLL(struct drm_device *dev, u32 reg, u32 freq)
227{
228 struct nouveau_drm *drm = nouveau_newpriv(dev);
229 struct nouveau_clock *clk = nouveau_clock(drm->device);
230 int ret = -ENODEV;
231
232 if (clk->pll_set)
233 ret = clk->pll_set(clk, reg, freq);
234 return ret;
235}
236
237
238int
239nouveau_calc_pll_mnp(struct drm_device *dev, struct nvbios_pll *info,
240 int freq, struct nouveau_pll_vals *pv)
241{
242 struct nouveau_drm *drm = nouveau_newpriv(dev);
243 struct nouveau_clock *clk = nouveau_clock(drm->device);
244 int ret = 0;
245
246 if (clk->pll_calc)
247 ret = clk->pll_calc(clk, info, freq, pv);
248 return ret;
249}
250
251int
252nouveau_hw_setpll(struct drm_device *dev, u32 reg1,
253 struct nouveau_pll_vals *pv)
254{
255 struct nouveau_drm *drm = nouveau_newpriv(dev);
256 struct nouveau_clock *clk = nouveau_clock(drm->device);
257 int ret = -ENODEV;
258
259 if (clk->pll_prog)
260 ret = clk->pll_prog(clk, reg1, pv);
261 return ret;
262}
263
264int nva3_pll_calc(struct nouveau_clock *, struct nvbios_pll *, u32 freq,
265 int *N, int *fN, int *M, int *P);
266
267int
268nva3_calc_pll(struct drm_device *dev, struct nvbios_pll *info, u32 freq,
269 int *N, int *fN, int *M, int *P)
270{
271 struct nouveau_drm *drm = nouveau_newpriv(dev);
272 struct nouveau_clock *clk = nouveau_clock(drm->device);
273
274 return nva3_pll_calc(clk, info, freq, N, fN, M, P);
275}
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276
277void
278nouveau_bios_run_init_table(struct drm_device *dev, uint16_t table,
279 struct dcb_output *dcbent, int crtc)
280{
281 struct nouveau_drm *drm = nouveau_newpriv(dev);
282 struct nouveau_bios *bios = nouveau_bios(drm->device);
283 struct nvbios_init init = {
284 .subdev = nv_subdev(bios),
285 .bios = bios,
286 .offset = table,
287 .outp = dcbent,
288 .crtc = crtc,
289 .execute = 1
290 };
291
292 nvbios_exec(&init);
293}
294
295void
296nouveau_bios_init_exec(struct drm_device *dev, uint16_t table)
297{
298 nouveau_bios_run_init_table(dev, table, NULL, 0);
299}
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300
301void
302nv_intr(struct drm_device *dev)
303{
304 struct nouveau_drm *drm = nouveau_newpriv(dev);
305 struct nouveau_mc *pmc = nouveau_mc(drm->device);
5a5c7432
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306 nv_subdev(pmc)->intr(&pmc->base);
307}
308
309bool nouveau_wait_eq(struct drm_device *dev, uint64_t timeout,
310 uint32_t reg, uint32_t mask, uint32_t val)
311{
312 struct nouveau_drm *drm = nouveau_newpriv(dev);
313 return nouveau_timer_wait_eq(drm->device, timeout, reg, mask, val);
314}
315
316bool nouveau_wait_ne(struct drm_device *dev, uint64_t timeout,
317 uint32_t reg, uint32_t mask, uint32_t val)
318{
319 struct nouveau_drm *drm = nouveau_newpriv(dev);
320 return nouveau_timer_wait_ne(drm->device, timeout, reg, mask, val);
321}
322
323bool nouveau_wait_cb(struct drm_device *dev, u64 timeout,
324 bool (*cond)(void *), void *data)
325{
326 struct nouveau_drm *drm = nouveau_newpriv(dev);
327 return nouveau_timer_wait_cb(drm->device, timeout, cond, data);
328}
329
330u64
331nv_timer_read(struct drm_device *dev)
332{
333 struct nouveau_drm *drm = nouveau_newpriv(dev);
334 struct nouveau_timer *ptimer = nouveau_timer(drm->device);
335 return ptimer->read(ptimer);
7d9115de 336}
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337
338int
339nvfb_tile_nr(struct drm_device *dev)
340{
341 struct nouveau_drm *drm = nouveau_newpriv(dev);
342 struct nouveau_fb *pfb = nouveau_fb(drm->device);
343 return pfb->tile.regions;
344}
345
346struct nouveau_fb_tile *
347nvfb_tile(struct drm_device *dev, int i)
348{
349 struct nouveau_drm *drm = nouveau_newpriv(dev);
350 struct nouveau_fb *pfb = nouveau_fb(drm->device);
351 return &pfb->tile.region[i];
352}
353
354void
355nvfb_tile_init(struct drm_device *dev, int i, u32 a, u32 b, u32 c, u32 d)
356{
357 struct nouveau_drm *drm = nouveau_newpriv(dev);
358 struct nouveau_fb *pfb = nouveau_fb(drm->device);
359 pfb->tile.init(pfb, i, a, b, c, d, &pfb->tile.region[i]);
360}
361
362void
363nvfb_tile_fini(struct drm_device *dev, int i)
364{
365 struct nouveau_drm *drm = nouveau_newpriv(dev);
366 struct nouveau_fb *pfb = nouveau_fb(drm->device);
367 pfb->tile.fini(pfb, i, &pfb->tile.region[i]);
368}
369
370void
371nvfb_tile_prog(struct drm_device *dev, int i)
372{
373 struct nouveau_drm *drm = nouveau_newpriv(dev);
374 struct nouveau_fb *pfb = nouveau_fb(drm->device);
375 pfb->tile.prog(pfb, i, &pfb->tile.region[i]);
376}
377
378bool
379nvfb_flags_valid(struct drm_device *dev, u32 flags)
380{
381 struct nouveau_drm *drm = nouveau_newpriv(dev);
382 struct nouveau_fb *pfb = nouveau_fb(drm->device);
383 return pfb->memtype_valid(pfb, flags);
384}
385
386int
387nvfb_vram_get(struct drm_device *dev, u64 size, u32 align, u32 ncmin,
388 u32 memtype, struct nouveau_mem **pmem)
389{
390 struct nouveau_drm *drm = nouveau_newpriv(dev);
391 struct nouveau_fb *pfb = nouveau_fb(drm->device);
392 int ret = pfb->ram.get(pfb, size, align, ncmin, memtype, pmem);
393 if (ret)
394 return ret;
395 (*pmem)->dev = dev;
396 return 0;
397}
398
399void
400nvfb_vram_put(struct drm_device *dev, struct nouveau_mem **pmem)
401{
402 struct nouveau_drm *drm = nouveau_newpriv(dev);
403 struct nouveau_fb *pfb = nouveau_fb(drm->device);
404 pfb->ram.put(pfb, pmem);
405}
406
407
408u64 nvfb_vram_sys_base(struct drm_device *dev)
409{
410 struct nouveau_drm *drm = nouveau_newpriv(dev);
411 struct nouveau_fb *pfb = nouveau_fb(drm->device);
412 return pfb->ram.stolen;
413}
414
415u64 nvfb_vram_size(struct drm_device *dev)
416{
417 struct nouveau_drm *drm = nouveau_newpriv(dev);
418 struct nouveau_fb *pfb = nouveau_fb(drm->device);
419 return pfb->ram.size;
420}
421
422int nvfb_vram_type(struct drm_device *dev)
423{
424 struct nouveau_drm *drm = nouveau_newpriv(dev);
425 struct nouveau_fb *pfb = nouveau_fb(drm->device);
426 return pfb->ram.type;
427}
428
429int nvfb_vram_rank_B(struct drm_device *dev)
430{
431 struct nouveau_drm *drm = nouveau_newpriv(dev);
432 struct nouveau_fb *pfb = nouveau_fb(drm->device);
433 return pfb->ram.ranks > 1;
434}
435
436void
437nv50_fb_vm_trap(struct drm_device *dev, int disp)
438{
439 struct nouveau_drm *drm = nouveau_newpriv(dev);
440 nv50_fb_trap(nouveau_fb(drm->device), disp);
441}
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442
443#include <core/subdev/instmem/nv04.h>
444
445struct nouveau_gpuobj *
446nvimem_ramro(struct drm_device *dev)
447{
448 struct nouveau_drm *drm = nouveau_newpriv(dev);
449 struct nv04_instmem_priv *imem = (void *)nouveau_instmem(drm->device);
450 return imem->ramro;
451}
452
453struct nouveau_gpuobj *
454nvimem_ramfc(struct drm_device *dev)
455{
456 struct nouveau_drm *drm = nouveau_newpriv(dev);
457 struct nv04_instmem_priv *imem = (void *)nouveau_instmem(drm->device);
458 return imem->ramfc;
459}
460
461int _nouveau_gpuobj_new(struct drm_device *dev, struct nouveau_gpuobj *par,
462 int size, int align, u32 flags,
463 struct nouveau_gpuobj **pobj)
464{
465 struct nouveau_drm *drm = nouveau_newpriv(dev);
466 int ret;
467
468 if (!par)
469 flags |= NVOBJ_FLAG_HEAP;
470
471 ret = nouveau_gpuobj_new(drm->device, nv_object(par), size, align,
472 flags, pobj);
473 if (ret)
474 return ret;
475
476 (*pobj)->dev = dev;
477 return 0;
478}
479
480u32 nv_ri32(struct drm_device *dev , u32 addr)
481{
482 struct nouveau_drm *drm = nouveau_newpriv(dev);
483 struct nouveau_instmem *imem = nouveau_instmem(drm->device);
484 return nv_ro32(imem, addr);
485}
486
487void nv_wi32(struct drm_device *dev, u32 addr, u32 data)
488{
489 struct nouveau_drm *drm = nouveau_newpriv(dev);
490 struct nouveau_instmem *imem = nouveau_instmem(drm->device);
491 nv_wo32(imem, addr, data);
492}
493
494u32 nvimem_reserved(struct drm_device *dev)
495{
496 struct nouveau_drm *drm = nouveau_newpriv(dev);
497 struct nouveau_instmem *imem = nouveau_instmem(drm->device);
498 return imem->reserved;
499}
500
501int
502nvbar_map(struct drm_device *dev, struct nouveau_mem *mem, u32 flags,
503 struct nouveau_vma *vma)
504{
505 struct nouveau_drm *drm = nouveau_newpriv(dev);
506 struct nouveau_bar *bar = nouveau_bar(drm->device);
507 return bar->umap(bar, mem, flags, vma);
508}
509
510void
511nvbar_unmap(struct drm_device *dev, struct nouveau_vma *vma)
512{
513 struct nouveau_drm *drm = nouveau_newpriv(dev);
514 struct nouveau_bar *bar = nouveau_bar(drm->device);
515 bar->unmap(bar, vma);
516}
517
518int
519nouveau_gpuobj_map_bar(struct nouveau_gpuobj *gpuobj, u32 flags,
520 struct nouveau_vma *vma)
521{
522 struct nouveau_drm *drm = nouveau_newpriv(gpuobj->dev);
523 struct nouveau_bar *bar = nouveau_bar(drm->device);
524 struct nouveau_instobj *iobj = (void *)
525 nv_pclass(nv_object(gpuobj), NV_MEMOBJ_CLASS);
526 struct nouveau_mem **mem = (void *)(iobj + 1);
527 struct nouveau_mem *node = *mem;
528
529 return bar->umap(bar, node, flags, vma);
530}
531
532void
533nvimem_flush(struct drm_device *dev)
534{
535}
536
537void _nv50_vm_flush_engine(struct drm_device *dev, int engine)
538{
539 struct nouveau_drm *drm = nouveau_newpriv(dev);
540 nv50_vm_flush_engine(nv_subdev(drm->device), engine);
541}
542
543int _nouveau_vm_new(struct drm_device *dev, u64 offset, u64 length,
544 u64 mm_offset, struct nouveau_vm **pvm)
545{
546 struct nouveau_drm *drm = nouveau_newpriv(dev);
547 return nouveau_vm_new(nv_device(drm->device), offset, length, mm_offset, pvm);
548}
549
550#include <core/subdev/vm/nv04.h>
551struct nouveau_vm *
552nv04vm_ref(struct drm_device *dev)
553{
554 struct nouveau_drm *drm = nouveau_newpriv(dev);
555 struct nouveau_vmmgr *vmm = nouveau_vmmgr(drm->device);
556 struct nv04_vmmgr_priv *priv = (void *)vmm;
557 return priv->vm;
558}
559
560struct nouveau_gpuobj *
561nv04vm_refdma(struct drm_device *dev)
562{
563 struct nouveau_gpuobj *gpuobj = NULL;
564 nouveau_gpuobj_ref(nv04vm_ref(dev)->pgt[0].obj[0], &gpuobj);
565 return gpuobj;
566}
567
568void
569nvvm_engref(struct nouveau_vm *vm, int eng, int ref)
570{
571 atomic_add(ref, &vm->engref[eng]);
572}
573
574int
575nvvm_spg_shift(struct nouveau_vm *vm)
576{
577 return vm->vmm->spg_shift;
578}
579
580int
581nvvm_lpg_shift(struct nouveau_vm *vm)
582{
583 return vm->vmm->lpg_shift;
584}
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585
586u64 nvgpuobj_addr(struct nouveau_object *object)
587{
588 return nv_gpuobj(object)->addr;
589}
590
591struct drm_device *
592nouveau_drv(void *ptr)
593{
594 struct nouveau_drm *drm = ptr;
595 return drm->dev;
596}
597
598struct nouveau_channel *
599nvdrm_channel(struct drm_device *dev)
600{
601 struct nouveau_drm *drm = nouveau_newpriv(dev);
602 return drm->channel;
603}
604
605struct mutex *
606nvchan_mutex(struct nouveau_channel *chan)
607{
608 return &chan->cli->mutex;
609}