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drm/nouveau/ce/gp104: initial support
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CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
5addcf0a
DA
32#include "drmP.h"
33#include "drm_crtc_helper.h"
fdb751ef 34
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
7974dd1b
BS
37#include <core/pci.h>
38#include <core/tegra.h>
94580299 39
923bc416 40#include <nvif/class.h>
845f2725 41#include <nvif/cl0002.h>
8ed1730c 42#include <nvif/cla06f.h>
538b269b
BS
43#include <nvif/if0004.h>
44
4dc28134 45#include "nouveau_drv.h"
ebb945a9 46#include "nouveau_dma.h"
77145f1c
BS
47#include "nouveau_ttm.h"
48#include "nouveau_gem.h"
77145f1c 49#include "nouveau_vga.h"
b9ed919f 50#include "nouveau_hwmon.h"
77145f1c
BS
51#include "nouveau_acpi.h"
52#include "nouveau_bios.h"
53#include "nouveau_ioctl.h"
ebb945a9
BS
54#include "nouveau_abi16.h"
55#include "nouveau_fbcon.h"
56#include "nouveau_fence.h"
33b903e8 57#include "nouveau_debugfs.h"
27111a23 58#include "nouveau_usif.h"
703fa264 59#include "nouveau_connector.h"
055a65d5 60#include "nouveau_platform.h"
ebb945a9 61
94580299
BS
62MODULE_PARM_DESC(config, "option string to pass to driver core");
63static char *nouveau_config;
64module_param_named(config, nouveau_config, charp, 0400);
65
66MODULE_PARM_DESC(debug, "debug string to pass to driver core");
67static char *nouveau_debug;
68module_param_named(debug, nouveau_debug, charp, 0400);
69
ebb945a9
BS
70MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
71static int nouveau_noaccel = 0;
72module_param_named(noaccel, nouveau_noaccel, int, 0400);
73
9430738d
BS
74MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
75 "0 = disabled, 1 = enabled, 2 = headless)");
76int nouveau_modeset = -1;
77145f1c
BS
77module_param_named(modeset, nouveau_modeset, int, 0400);
78
5addcf0a
DA
79MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
80int nouveau_runtime_pm = -1;
81module_param_named(runpm, nouveau_runtime_pm, int, 0400);
82
915b4d11
DH
83static struct drm_driver driver_stub;
84static struct drm_driver driver_pci;
85static struct drm_driver driver_platform;
77145f1c 86
94580299 87static u64
420b9469 88nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
89{
90 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
91 name |= pdev->bus->number << 16;
92 name |= PCI_SLOT(pdev->devfn) << 8;
93 return name | PCI_FUNC(pdev->devfn);
94}
95
420b9469
AC
96static u64
97nouveau_platform_name(struct platform_device *platformdev)
98{
99 return platformdev->id;
100}
101
102static u64
103nouveau_name(struct drm_device *dev)
104{
105 if (dev->pdev)
106 return nouveau_pci_name(dev->pdev);
107 else
108 return nouveau_platform_name(dev->platformdev);
109}
110
94580299 111static int
9ad97ede 112nouveau_cli_create(struct drm_device *dev, const char *sname,
fa6df8c1 113 int size, void **pcli)
94580299 114{
0ad72863 115 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
9ad97ede 116 int ret;
0ad72863 117 if (cli) {
9ad97ede
BS
118 snprintf(cli->name, sizeof(cli->name), "%s", sname);
119 cli->dev = dev;
120
a01ca78c 121 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
9ad97ede
BS
122 nouveau_config, nouveau_debug,
123 &cli->base);
27111a23 124 if (ret == 0) {
0ad72863 125 mutex_init(&cli->mutex);
27111a23
BS
126 usif_client_init(cli);
127 }
94580299 128 return ret;
dd5700ea 129 }
0ad72863 130 return -ENOMEM;
94580299
BS
131}
132
133static void
134nouveau_cli_destroy(struct nouveau_cli *cli)
135{
be83cd4e 136 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
0ad72863 137 nvif_client_fini(&cli->base);
27111a23 138 usif_client_fini(cli);
f5654d95 139 kfree(cli);
94580299
BS
140}
141
ebb945a9
BS
142static void
143nouveau_accel_fini(struct nouveau_drm *drm)
144{
fbd58ebd 145 nouveau_channel_idle(drm->channel);
0ad72863 146 nvif_object_fini(&drm->ntfy);
f027f491 147 nvkm_gpuobj_del(&drm->notify);
fbd58ebd 148 nvif_notify_fini(&drm->flip);
0ad72863 149 nvif_object_fini(&drm->nvsw);
fbd58ebd
BS
150 nouveau_channel_del(&drm->channel);
151
152 nouveau_channel_idle(drm->cechan);
0ad72863 153 nvif_object_fini(&drm->ttm.copy);
fbd58ebd
BS
154 nouveau_channel_del(&drm->cechan);
155
ebb945a9
BS
156 if (drm->fence)
157 nouveau_fence(drm)->dtor(drm);
158}
159
160static void
161nouveau_accel_init(struct nouveau_drm *drm)
162{
967e7bde 163 struct nvif_device *device = &drm->device;
41a63406 164 struct nvif_sclass *sclass;
49981046 165 u32 arg0, arg1;
41a63406 166 int ret, i, n;
ebb945a9 167
967e7bde 168 if (nouveau_noaccel)
ebb945a9
BS
169 return;
170
171 /* initialise synchronisation routines */
967e7bde
BS
172 /*XXX: this is crap, but the fence/channel stuff is a little
173 * backwards in some places. this will be fixed.
174 */
41a63406 175 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
176 if (ret < 0)
177 return;
178
41a63406
BS
179 for (ret = -ENOSYS, i = 0; i < n; i++) {
180 switch (sclass[i].oclass) {
bbf8906b 181 case NV03_CHANNEL_DMA:
967e7bde
BS
182 ret = nv04_fence_create(drm);
183 break;
bbf8906b 184 case NV10_CHANNEL_DMA:
967e7bde
BS
185 ret = nv10_fence_create(drm);
186 break;
bbf8906b
BS
187 case NV17_CHANNEL_DMA:
188 case NV40_CHANNEL_DMA:
967e7bde
BS
189 ret = nv17_fence_create(drm);
190 break;
bbf8906b 191 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
192 ret = nv50_fence_create(drm);
193 break;
bbf8906b 194 case G82_CHANNEL_GPFIFO:
967e7bde
BS
195 ret = nv84_fence_create(drm);
196 break;
bbf8906b
BS
197 case FERMI_CHANNEL_GPFIFO:
198 case KEPLER_CHANNEL_GPFIFO_A:
63f8c9b7 199 case KEPLER_CHANNEL_GPFIFO_B:
a1020afe 200 case MAXWELL_CHANNEL_GPFIFO_A:
e8ff9794 201 case PASCAL_CHANNEL_GPFIFO_A:
967e7bde
BS
202 ret = nvc0_fence_create(drm);
203 break;
204 default:
205 break;
206 }
207 }
208
41a63406 209 nvif_object_sclass_put(&sclass);
ebb945a9
BS
210 if (ret) {
211 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
212 nouveau_accel_fini(drm);
213 return;
214 }
215
967e7bde 216 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
fcf3f91c 217 ret = nouveau_channel_new(drm, &drm->device,
1f5ff7f5
BS
218 NVA06F_V0_ENGINE_CE0 |
219 NVA06F_V0_ENGINE_CE1,
bbf8906b 220 0, &drm->cechan);
49981046
BS
221 if (ret)
222 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
223
1f5ff7f5 224 arg0 = NVA06F_V0_ENGINE_GR;
49469800 225 arg1 = 1;
00fc6f6f 226 } else
967e7bde
BS
227 if (device->info.chipset >= 0xa3 &&
228 device->info.chipset != 0xaa &&
229 device->info.chipset != 0xac) {
fcf3f91c 230 ret = nouveau_channel_new(drm, &drm->device,
0ad72863 231 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
232 if (ret)
233 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
234
235 arg0 = NvDmaFB;
236 arg1 = NvDmaTT;
49981046
BS
237 } else {
238 arg0 = NvDmaFB;
239 arg1 = NvDmaTT;
240 }
241
fcf3f91c 242 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
ebb945a9
BS
243 if (ret) {
244 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
245 nouveau_accel_fini(drm);
246 return;
247 }
248
a01ca78c 249 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 250 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 251 if (ret == 0) {
69a6146d
BS
252 ret = RING_SPACE(drm->channel, 2);
253 if (ret == 0) {
967e7bde 254 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
255 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
256 OUT_RING (drm->channel, NVDRM_NVSW);
257 } else
967e7bde 258 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
259 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
260 OUT_RING (drm->channel, 0x001f0000);
261 }
262 }
898a2b32
BS
263
264 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
538b269b
BS
265 false, NV04_NVSW_NTFY_UEVENT,
266 NULL, 0, 0, &drm->flip);
898a2b32
BS
267 if (ret == 0)
268 ret = nvif_notify_get(&drm->flip);
269 if (ret) {
270 nouveau_accel_fini(drm);
271 return;
272 }
69a6146d
BS
273 }
274
275 if (ret) {
276 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
277 nouveau_accel_fini(drm);
278 return;
279 }
280
967e7bde 281 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
f027f491
BS
282 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
283 NULL, &drm->notify);
ebb945a9
BS
284 if (ret) {
285 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
286 nouveau_accel_fini(drm);
287 return;
288 }
289
a01ca78c 290 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
291 NV_DMA_IN_MEMORY,
292 &(struct nv_dma_v0) {
293 .target = NV_DMA_V0_TARGET_VRAM,
294 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
295 .start = drm->notify->addr,
296 .limit = drm->notify->addr + 31
4acfd707 297 }, sizeof(struct nv_dma_v0),
0ad72863 298 &drm->ntfy);
ebb945a9
BS
299 if (ret) {
300 nouveau_accel_fini(drm);
301 return;
302 }
303 }
304
305
49981046 306 nouveau_bo_move_init(drm);
ebb945a9
BS
307}
308
56550d94
GKH
309static int nouveau_drm_probe(struct pci_dev *pdev,
310 const struct pci_device_id *pent)
94580299 311{
be83cd4e 312 struct nvkm_device *device;
ebb945a9
BS
313 struct apertures_struct *aper;
314 bool boot = false;
94580299
BS
315 int ret;
316
b00e5334 317 if (vga_switcheroo_client_probe_defer(pdev))
98b3a340
LW
318 return -EPROBE_DEFER;
319
ebb945a9
BS
320 /* remove conflicting drivers (vesafb, efifb etc) */
321 aper = alloc_apertures(3);
322 if (!aper)
323 return -ENOMEM;
324
325 aper->ranges[0].base = pci_resource_start(pdev, 1);
326 aper->ranges[0].size = pci_resource_len(pdev, 1);
327 aper->count = 1;
328
329 if (pci_resource_len(pdev, 2)) {
330 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
331 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
332 aper->count++;
333 }
334
335 if (pci_resource_len(pdev, 3)) {
336 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
337 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
338 aper->count++;
339 }
340
341#ifdef CONFIG_X86
342 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
343#endif
771fa0e4
BS
344 if (nouveau_modeset != 2)
345 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 346 kfree(aper);
ebb945a9 347
7974dd1b
BS
348 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
349 true, true, ~0ULL, &device);
94580299
BS
350 if (ret)
351 return ret;
352
353 pci_set_master(pdev);
354
915b4d11 355 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 356 if (ret) {
e781dc8f 357 nvkm_device_del(&device);
94580299
BS
358 return ret;
359 }
360
361 return 0;
362}
363
5addcf0a
DA
364#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
365
366static void
46941b0f 367nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 368{
46941b0f 369 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 370
420b9469 371 if (!pdev) {
f2a0adad 372 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
420b9469
AC
373 drm->hdmi_device = NULL;
374 return;
375 }
376
5addcf0a
DA
377 /* subfunction one is a hdmi audio device? */
378 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
379 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
380
381 if (!drm->hdmi_device) {
46941b0f 382 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
383 return;
384 }
385
386 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 387 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
388 pci_dev_put(drm->hdmi_device);
389 drm->hdmi_device = NULL;
390 return;
391 }
392}
393
5b8a43ae 394static int
94580299
BS
395nouveau_drm_load(struct drm_device *dev, unsigned long flags)
396{
94580299
BS
397 struct nouveau_drm *drm;
398 int ret;
399
9ad97ede 400 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
94580299
BS
401 if (ret)
402 return ret;
403
77145f1c
BS
404 dev->dev_private = drm;
405 drm->dev = dev;
989aa5b7 406 nvxx_client(&drm->client.base)->debug =
be83cd4e 407 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 408
94580299 409 INIT_LIST_HEAD(&drm->clients);
ebb945a9 410 spin_lock_init(&drm->tile.lock);
94580299 411
46941b0f 412 nouveau_get_hdmi_dev(drm);
5addcf0a 413
fcf3f91c 414 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
586491e6 415 &(struct nv_device_v0) {
94580299 416 .device = ~0,
586491e6 417 }, sizeof(struct nv_device_v0),
0ad72863 418 &drm->device);
94580299
BS
419 if (ret)
420 goto fail_device;
421
7d3428cd
IM
422 dev->irq_enabled = true;
423
77145f1c
BS
424 /* workaround an odd issue on nvc1 by disabling the device's
425 * nosnoop capability. hopefully won't cause issues until a
426 * better fix is found - assuming there is one...
427 */
967e7bde 428 if (drm->device.info.chipset == 0xc1)
a01ca78c 429 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 430
77145f1c 431 nouveau_vga_init(drm);
cb75d97e 432
967e7bde 433 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
2100292c
BS
434 if (!nvxx_device(&drm->device)->mmu) {
435 ret = -ENOSYS;
436 goto fail_device;
437 }
438
be83cd4e 439 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 440 0x1000, NULL, &drm->client.vm);
ebb945a9
BS
441 if (ret)
442 goto fail_device;
3ee6f5b5 443
989aa5b7 444 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
445 }
446
447 ret = nouveau_ttm_init(drm);
94580299 448 if (ret)
77145f1c
BS
449 goto fail_ttm;
450
451 ret = nouveau_bios_init(dev);
452 if (ret)
453 goto fail_bios;
454
77145f1c 455 ret = nouveau_display_create(dev);
ebb945a9 456 if (ret)
77145f1c
BS
457 goto fail_dispctor;
458
459 if (dev->mode_config.num_crtc) {
460 ret = nouveau_display_init(dev);
461 if (ret)
462 goto fail_dispinit;
463 }
464
b126a200 465 nouveau_debugfs_init(drm);
b9ed919f 466 nouveau_hwmon_init(dev);
ebb945a9
BS
467 nouveau_accel_init(drm);
468 nouveau_fbcon_init(dev);
5addcf0a
DA
469
470 if (nouveau_runtime_pm != 0) {
471 pm_runtime_use_autosuspend(dev->dev);
472 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
473 pm_runtime_set_active(dev->dev);
474 pm_runtime_allow(dev->dev);
475 pm_runtime_mark_last_busy(dev->dev);
476 pm_runtime_put(dev->dev);
477 }
94580299
BS
478 return 0;
479
77145f1c
BS
480fail_dispinit:
481 nouveau_display_destroy(dev);
482fail_dispctor:
77145f1c
BS
483 nouveau_bios_takedown(dev);
484fail_bios:
ebb945a9 485 nouveau_ttm_fini(drm);
77145f1c 486fail_ttm:
77145f1c 487 nouveau_vga_fini(drm);
94580299 488fail_device:
0ad72863 489 nvif_device_fini(&drm->device);
94580299
BS
490 nouveau_cli_destroy(&drm->client);
491 return ret;
492}
493
5b8a43ae 494static int
94580299
BS
495nouveau_drm_unload(struct drm_device *dev)
496{
77145f1c 497 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 498
5addcf0a 499 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
500 nouveau_fbcon_fini(dev);
501 nouveau_accel_fini(drm);
b9ed919f 502 nouveau_hwmon_fini(dev);
b126a200 503 nouveau_debugfs_fini(drm);
77145f1c 504
9430738d
BS
505 if (dev->mode_config.num_crtc)
506 nouveau_display_fini(dev);
77145f1c
BS
507 nouveau_display_destroy(dev);
508
77145f1c 509 nouveau_bios_takedown(dev);
94580299 510
ebb945a9 511 nouveau_ttm_fini(drm);
77145f1c 512 nouveau_vga_fini(drm);
cb75d97e 513
0ad72863 514 nvif_device_fini(&drm->device);
5addcf0a
DA
515 if (drm->hdmi_device)
516 pci_dev_put(drm->hdmi_device);
94580299
BS
517 nouveau_cli_destroy(&drm->client);
518 return 0;
519}
520
8ba9ff11
AC
521void
522nouveau_drm_device_remove(struct drm_device *dev)
94580299 523{
77145f1c 524 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 525 struct nvkm_client *client;
76ecea5b 526 struct nvkm_device *device;
77145f1c 527
7d3428cd 528 dev->irq_enabled = false;
989aa5b7 529 client = nvxx_client(&drm->client.base);
4e7e62d6 530 device = nvkm_device_find(client->device);
77145f1c
BS
531 drm_put_dev(dev);
532
e781dc8f 533 nvkm_device_del(&device);
94580299 534}
8ba9ff11
AC
535
536static void
537nouveau_drm_remove(struct pci_dev *pdev)
538{
539 struct drm_device *dev = pci_get_drvdata(pdev);
540
541 nouveau_drm_device_remove(dev);
542}
94580299 543
cd897837 544static int
05c63c2f 545nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 546{
77145f1c 547 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
548 struct nouveau_cli *cli;
549 int ret;
550
6fbb702e
BS
551 if (dev->mode_config.num_crtc) {
552 NV_INFO(drm, "suspending console...\n");
553 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 554 NV_INFO(drm, "suspending display...\n");
6fbb702e 555 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
556 if (ret)
557 return ret;
558 }
94580299 559
c52f4fa6 560 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
561 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
562
c52f4fa6 563 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
564 if (drm->cechan) {
565 ret = nouveau_channel_idle(drm->cechan);
566 if (ret)
f3980dc5 567 goto fail_display;
81dff21b
BS
568 }
569
570 if (drm->channel) {
571 ret = nouveau_channel_idle(drm->channel);
572 if (ret)
f3980dc5 573 goto fail_display;
81dff21b
BS
574 }
575
c52f4fa6 576 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 577 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
578 if (!nouveau_fence(drm)->suspend(drm)) {
579 ret = -ENOMEM;
580 goto fail_display;
581 }
ebb945a9
BS
582 }
583
94580299 584 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 585 ret = nvif_client_suspend(&cli->base);
94580299
BS
586 if (ret)
587 goto fail_client;
588 }
589
c52f4fa6 590 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 591 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
592 if (ret)
593 goto fail_client;
594
94580299
BS
595 return 0;
596
597fail_client:
598 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 599 nvif_client_resume(&cli->base);
94580299
BS
600 }
601
f3980dc5
IM
602 if (drm->fence && nouveau_fence(drm)->resume)
603 nouveau_fence(drm)->resume(drm);
604
605fail_display:
9430738d 606 if (dev->mode_config.num_crtc) {
c52f4fa6 607 NV_INFO(drm, "resuming display...\n");
6fbb702e 608 nouveau_display_resume(dev, runtime);
9430738d 609 }
94580299
BS
610 return ret;
611}
612
cd897837 613static int
6fbb702e 614nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
615{
616 struct nouveau_drm *drm = nouveau_drm(dev);
617 struct nouveau_cli *cli;
618
c52f4fa6 619 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 620 nvif_client_resume(&drm->client.base);
94580299 621
c52f4fa6 622 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
623 if (drm->fence && nouveau_fence(drm)->resume)
624 nouveau_fence(drm)->resume(drm);
625
94580299 626 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 627 nvif_client_resume(&cli->base);
94580299 628 }
cb75d97e 629
77145f1c 630 nouveau_run_vbios_init(dev);
77145f1c 631
9430738d 632 if (dev->mode_config.num_crtc) {
c52f4fa6 633 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
634 nouveau_display_resume(dev, runtime);
635 NV_INFO(drm, "resuming console...\n");
636 nouveau_fbcon_set_suspend(dev, 0);
9430738d 637 }
5addcf0a 638
77145f1c 639 return 0;
94580299
BS
640}
641
7bb6d442
BS
642int
643nouveau_pmops_suspend(struct device *dev)
644{
645 struct pci_dev *pdev = to_pci_dev(dev);
646 struct drm_device *drm_dev = pci_get_drvdata(pdev);
647 int ret;
648
649 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
650 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
651 return 0;
652
653 ret = nouveau_do_suspend(drm_dev, false);
654 if (ret)
655 return ret;
656
657 pci_save_state(pdev);
658 pci_disable_device(pdev);
7bb6d442 659 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 660 udelay(200);
7bb6d442
BS
661 return 0;
662}
663
664int
665nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
666{
667 struct pci_dev *pdev = to_pci_dev(dev);
668 struct drm_device *drm_dev = pci_get_drvdata(pdev);
669 int ret;
670
5addcf0a
DA
671 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
672 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
673 return 0;
674
675 pci_set_power_state(pdev, PCI_D0);
676 pci_restore_state(pdev);
677 ret = pci_enable_device(pdev);
678 if (ret)
679 return ret;
680 pci_set_master(pdev);
681
6fbb702e 682 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
683}
684
7bb6d442
BS
685static int
686nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
687{
688 struct pci_dev *pdev = to_pci_dev(dev);
689 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 690 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
691}
692
7bb6d442
BS
693static int
694nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
695{
696 struct pci_dev *pdev = to_pci_dev(dev);
697 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 698 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
699}
700
7bb6d442
BS
701static int
702nouveau_pmops_runtime_suspend(struct device *dev)
703{
704 struct pci_dev *pdev = to_pci_dev(dev);
705 struct drm_device *drm_dev = pci_get_drvdata(pdev);
706 int ret;
707
708 if (nouveau_runtime_pm == 0) {
709 pm_runtime_forbid(dev);
710 return -EBUSY;
711 }
712
713 /* are we optimus enabled? */
714 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
715 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
716 pm_runtime_forbid(dev);
717 return -EBUSY;
718 }
719
7bb6d442
BS
720 drm_kms_helper_poll_disable(drm_dev);
721 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
722 nouveau_switcheroo_optimus_dsm();
723 ret = nouveau_do_suspend(drm_dev, true);
724 pci_save_state(pdev);
725 pci_disable_device(pdev);
8c863944 726 pci_ignore_hotplug(pdev);
7bb6d442
BS
727 pci_set_power_state(pdev, PCI_D3cold);
728 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
729 return ret;
730}
731
732static int
733nouveau_pmops_runtime_resume(struct device *dev)
734{
735 struct pci_dev *pdev = to_pci_dev(dev);
736 struct drm_device *drm_dev = pci_get_drvdata(pdev);
737 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
738 int ret;
739
740 if (nouveau_runtime_pm == 0)
741 return -EINVAL;
742
743 pci_set_power_state(pdev, PCI_D0);
744 pci_restore_state(pdev);
745 ret = pci_enable_device(pdev);
746 if (ret)
747 return ret;
748 pci_set_master(pdev);
749
750 ret = nouveau_do_resume(drm_dev, true);
751 drm_kms_helper_poll_enable(drm_dev);
752 /* do magic */
a01ca78c 753 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
754 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
755 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
7bb6d442
BS
756 return ret;
757}
758
759static int
760nouveau_pmops_runtime_idle(struct device *dev)
761{
762 struct pci_dev *pdev = to_pci_dev(dev);
763 struct drm_device *drm_dev = pci_get_drvdata(pdev);
764 struct nouveau_drm *drm = nouveau_drm(drm_dev);
765 struct drm_crtc *crtc;
766
767 if (nouveau_runtime_pm == 0) {
768 pm_runtime_forbid(dev);
769 return -EBUSY;
770 }
771
772 /* are we optimus enabled? */
773 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
774 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
775 pm_runtime_forbid(dev);
776 return -EBUSY;
777 }
778
779 /* if we have a hdmi audio device - make sure it has a driver loaded */
780 if (drm->hdmi_device) {
781 if (!drm->hdmi_device->driver) {
782 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
783 pm_runtime_mark_last_busy(dev);
784 return -EBUSY;
785 }
786 }
787
788 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
789 if (crtc->enabled) {
790 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
791 return -EBUSY;
792 }
793 }
794 pm_runtime_mark_last_busy(dev);
795 pm_runtime_autosuspend(dev);
796 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
797 return 1;
798}
2d8b9ccb 799
5b8a43ae 800static int
ebb945a9
BS
801nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
802{
ebb945a9
BS
803 struct nouveau_drm *drm = nouveau_drm(dev);
804 struct nouveau_cli *cli;
a2896ced 805 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
806 int ret;
807
5addcf0a
DA
808 /* need to bring up power immediately if opening device */
809 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 810 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
811 return ret;
812
a2896ced
MS
813 get_task_comm(tmpname, current);
814 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 815
9ad97ede 816 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
420b9469 817
ebb945a9 818 if (ret)
5addcf0a 819 goto out_suspend;
ebb945a9 820
0ad72863
BS
821 cli->base.super = false;
822
967e7bde 823 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 824 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 825 0x1000, NULL, &cli->vm);
ebb945a9
BS
826 if (ret) {
827 nouveau_cli_destroy(cli);
5addcf0a 828 goto out_suspend;
ebb945a9 829 }
3ee6f5b5 830
989aa5b7 831 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
832 }
833
834 fpriv->driver_priv = cli;
835
836 mutex_lock(&drm->client.mutex);
837 list_add(&cli->head, &drm->clients);
838 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
839
840out_suspend:
841 pm_runtime_mark_last_busy(dev->dev);
842 pm_runtime_put_autosuspend(dev->dev);
843
844 return ret;
ebb945a9
BS
845}
846
5b8a43ae 847static void
ebb945a9
BS
848nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
849{
850 struct nouveau_cli *cli = nouveau_cli(fpriv);
851 struct nouveau_drm *drm = nouveau_drm(dev);
852
5addcf0a
DA
853 pm_runtime_get_sync(dev->dev);
854
ac8c7930 855 mutex_lock(&cli->mutex);
ebb945a9
BS
856 if (cli->abi16)
857 nouveau_abi16_fini(cli->abi16);
ac8c7930 858 mutex_unlock(&cli->mutex);
ebb945a9
BS
859
860 mutex_lock(&drm->client.mutex);
861 list_del(&cli->head);
862 mutex_unlock(&drm->client.mutex);
5addcf0a 863
ebb945a9
BS
864}
865
5b8a43ae 866static void
ebb945a9
BS
867nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
868{
869 struct nouveau_cli *cli = nouveau_cli(fpriv);
870 nouveau_cli_destroy(cli);
5addcf0a
DA
871 pm_runtime_mark_last_busy(dev->dev);
872 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
873}
874
baa70943 875static const struct drm_ioctl_desc
77145f1c 876nouveau_ioctls[] = {
f8c47144
DV
877 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
878 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
879 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
880 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
881 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
882 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
883 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
884 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
885 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
886 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
887 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
889};
890
27111a23
BS
891long
892nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 893{
27111a23
BS
894 struct drm_file *filp = file->private_data;
895 struct drm_device *dev = filp->minor->dev;
5addcf0a 896 long ret;
5addcf0a
DA
897
898 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 899 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
900 return ret;
901
27111a23
BS
902 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
903 case DRM_NOUVEAU_NVIF:
904 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
905 break;
906 default:
907 ret = drm_ioctl(file, cmd, arg);
908 break;
909 }
5addcf0a
DA
910
911 pm_runtime_mark_last_busy(dev->dev);
912 pm_runtime_put_autosuspend(dev->dev);
913 return ret;
914}
27111a23 915
77145f1c
BS
916static const struct file_operations
917nouveau_driver_fops = {
918 .owner = THIS_MODULE,
919 .open = drm_open,
920 .release = drm_release,
5addcf0a 921 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
922 .mmap = nouveau_ttm_mmap,
923 .poll = drm_poll,
77145f1c
BS
924 .read = drm_read,
925#if defined(CONFIG_COMPAT)
926 .compat_ioctl = nouveau_compat_ioctl,
927#endif
928 .llseek = noop_llseek,
929};
930
931static struct drm_driver
915b4d11 932driver_stub = {
77145f1c 933 .driver_features =
0e975980
PA
934 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
935 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
936
937 .load = nouveau_drm_load,
938 .unload = nouveau_drm_unload,
939 .open = nouveau_drm_open,
940 .preclose = nouveau_drm_preclose,
941 .postclose = nouveau_drm_postclose,
942 .lastclose = nouveau_vga_lastclose,
943
33b903e8 944#if defined(CONFIG_DEBUG_FS)
56c101af
KH
945 .debugfs_init = nouveau_drm_debugfs_init,
946 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
33b903e8
MS
947#endif
948
b44f8408 949 .get_vblank_counter = drm_vblank_no_hw_counter,
51cb4b39
BS
950 .enable_vblank = nouveau_display_vblank_enable,
951 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
952 .get_scanout_position = nouveau_display_scanoutpos,
953 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
954
955 .ioctls = nouveau_ioctls,
baa70943 956 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
957 .fops = &nouveau_driver_fops,
958
959 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
960 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
961 .gem_prime_export = drm_gem_prime_export,
962 .gem_prime_import = drm_gem_prime_import,
963 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 964 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 965 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
966 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
967 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
968 .gem_prime_vmap = nouveau_gem_prime_vmap,
969 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 970
a51e6ac4 971 .gem_free_object_unlocked = nouveau_gem_object_del,
77145f1c
BS
972 .gem_open_object = nouveau_gem_object_open,
973 .gem_close_object = nouveau_gem_object_close,
974
975 .dumb_create = nouveau_display_dumb_create,
976 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 977 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
978
979 .name = DRIVER_NAME,
980 .desc = DRIVER_DESC,
981#ifdef GIT_REVISION
982 .date = GIT_REVISION,
983#else
984 .date = DRIVER_DATE,
985#endif
986 .major = DRIVER_MAJOR,
987 .minor = DRIVER_MINOR,
988 .patchlevel = DRIVER_PATCHLEVEL,
989};
990
94580299
BS
991static struct pci_device_id
992nouveau_drm_pci_table[] = {
993 {
994 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
995 .class = PCI_BASE_CLASS_DISPLAY << 16,
996 .class_mask = 0xff << 16,
997 },
998 {
999 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1000 .class = PCI_BASE_CLASS_DISPLAY << 16,
1001 .class_mask = 0xff << 16,
1002 },
1003 {}
1004};
1005
703fa264
PM
1006static void nouveau_display_options(void)
1007{
1008 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1009
1010 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1011 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1012 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1013 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1014 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1015 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1016 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1017 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1018 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1019 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
703fa264
PM
1020}
1021
2d8b9ccb
DA
1022static const struct dev_pm_ops nouveau_pm_ops = {
1023 .suspend = nouveau_pmops_suspend,
1024 .resume = nouveau_pmops_resume,
1025 .freeze = nouveau_pmops_freeze,
1026 .thaw = nouveau_pmops_thaw,
1027 .poweroff = nouveau_pmops_freeze,
1028 .restore = nouveau_pmops_resume,
5addcf0a
DA
1029 .runtime_suspend = nouveau_pmops_runtime_suspend,
1030 .runtime_resume = nouveau_pmops_runtime_resume,
1031 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1032};
1033
94580299
BS
1034static struct pci_driver
1035nouveau_drm_pci_driver = {
1036 .name = "nouveau",
1037 .id_table = nouveau_drm_pci_table,
1038 .probe = nouveau_drm_probe,
1039 .remove = nouveau_drm_remove,
2d8b9ccb 1040 .driver.pm = &nouveau_pm_ops,
94580299
BS
1041};
1042
8ba9ff11 1043struct drm_device *
e396ecd1
AC
1044nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1045 struct platform_device *pdev,
47b2505e 1046 struct nvkm_device **pdevice)
420b9469 1047{
8ba9ff11
AC
1048 struct drm_device *drm;
1049 int err;
420b9469 1050
e396ecd1 1051 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
7974dd1b 1052 true, true, ~0ULL, pdevice);
8ba9ff11 1053 if (err)
e781dc8f 1054 goto err_free;
8ba9ff11 1055
915b4d11 1056 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1057 if (!drm) {
1058 err = -ENOMEM;
1059 goto err_free;
420b9469
AC
1060 }
1061
8ba9ff11
AC
1062 drm->platformdev = pdev;
1063 platform_set_drvdata(pdev, drm);
1064
1065 return drm;
1066
1067err_free:
e781dc8f 1068 nvkm_device_del(pdevice);
8ba9ff11
AC
1069
1070 return ERR_PTR(err);
420b9469
AC
1071}
1072
94580299
BS
1073static int __init
1074nouveau_drm_init(void)
1075{
915b4d11
DH
1076 driver_pci = driver_stub;
1077 driver_pci.set_busid = drm_pci_set_busid;
1078 driver_platform = driver_stub;
915b4d11 1079
703fa264
PM
1080 nouveau_display_options();
1081
77145f1c 1082 if (nouveau_modeset == -1) {
77145f1c
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1083 if (vgacon_text_force())
1084 nouveau_modeset = 0;
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1085 }
1086
1087 if (!nouveau_modeset)
1088 return 0;
1089
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1090#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1091 platform_driver_register(&nouveau_platform_driver);
1092#endif
1093
77145f1c 1094 nouveau_register_dsm_handler();
915b4d11 1095 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
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1096}
1097
1098static void __exit
1099nouveau_drm_exit(void)
1100{
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1101 if (!nouveau_modeset)
1102 return;
1103
915b4d11 1104 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1105 nouveau_unregister_dsm_handler();
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1106
1107#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1108 platform_driver_unregister(&nouveau_platform_driver);
1109#endif
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1110}
1111
1112module_init(nouveau_drm_init);
1113module_exit(nouveau_drm_exit);
1114
1115MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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1116MODULE_AUTHOR(DRIVER_AUTHOR);
1117MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1118MODULE_LICENSE("GPL and additional rights");