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Commit | Line | Data |
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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
c5fd936e | 26 | #include <linux/delay.h> |
94580299 BS |
27 | #include <linux/module.h> |
28 | #include <linux/pci.h> | |
5addcf0a DA |
29 | #include <linux/pm_runtime.h> |
30 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 31 | |
5addcf0a DA |
32 | #include "drmP.h" |
33 | #include "drm_crtc_helper.h" | |
fdb751ef | 34 | |
ebb945a9 | 35 | #include <core/gpuobj.h> |
c33e05a1 | 36 | #include <core/option.h> |
7974dd1b BS |
37 | #include <core/pci.h> |
38 | #include <core/tegra.h> | |
94580299 | 39 | |
923bc416 | 40 | #include <nvif/class.h> |
845f2725 | 41 | #include <nvif/cl0002.h> |
8ed1730c | 42 | #include <nvif/cla06f.h> |
538b269b BS |
43 | #include <nvif/if0004.h> |
44 | ||
4dc28134 | 45 | #include "nouveau_drv.h" |
ebb945a9 | 46 | #include "nouveau_dma.h" |
77145f1c BS |
47 | #include "nouveau_ttm.h" |
48 | #include "nouveau_gem.h" | |
77145f1c | 49 | #include "nouveau_vga.h" |
8d021d71 | 50 | #include "nouveau_led.h" |
b9ed919f | 51 | #include "nouveau_hwmon.h" |
77145f1c BS |
52 | #include "nouveau_acpi.h" |
53 | #include "nouveau_bios.h" | |
54 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
55 | #include "nouveau_abi16.h" |
56 | #include "nouveau_fbcon.h" | |
57 | #include "nouveau_fence.h" | |
33b903e8 | 58 | #include "nouveau_debugfs.h" |
27111a23 | 59 | #include "nouveau_usif.h" |
703fa264 | 60 | #include "nouveau_connector.h" |
055a65d5 | 61 | #include "nouveau_platform.h" |
ebb945a9 | 62 | |
94580299 BS |
63 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
64 | static char *nouveau_config; | |
65 | module_param_named(config, nouveau_config, charp, 0400); | |
66 | ||
67 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
68 | static char *nouveau_debug; | |
69 | module_param_named(debug, nouveau_debug, charp, 0400); | |
70 | ||
ebb945a9 BS |
71 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
72 | static int nouveau_noaccel = 0; | |
73 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
74 | ||
9430738d BS |
75 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
76 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
77 | int nouveau_modeset = -1; | |
77145f1c BS |
78 | module_param_named(modeset, nouveau_modeset, int, 0400); |
79 | ||
5addcf0a DA |
80 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
81 | int nouveau_runtime_pm = -1; | |
82 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
83 | ||
915b4d11 DH |
84 | static struct drm_driver driver_stub; |
85 | static struct drm_driver driver_pci; | |
86 | static struct drm_driver driver_platform; | |
77145f1c | 87 | |
94580299 | 88 | static u64 |
420b9469 | 89 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
90 | { |
91 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
92 | name |= pdev->bus->number << 16; | |
93 | name |= PCI_SLOT(pdev->devfn) << 8; | |
94 | return name | PCI_FUNC(pdev->devfn); | |
95 | } | |
96 | ||
420b9469 AC |
97 | static u64 |
98 | nouveau_platform_name(struct platform_device *platformdev) | |
99 | { | |
100 | return platformdev->id; | |
101 | } | |
102 | ||
103 | static u64 | |
104 | nouveau_name(struct drm_device *dev) | |
105 | { | |
106 | if (dev->pdev) | |
107 | return nouveau_pci_name(dev->pdev); | |
108 | else | |
109 | return nouveau_platform_name(dev->platformdev); | |
110 | } | |
111 | ||
94580299 | 112 | static int |
9ad97ede | 113 | nouveau_cli_create(struct drm_device *dev, const char *sname, |
fa6df8c1 | 114 | int size, void **pcli) |
94580299 | 115 | { |
0ad72863 | 116 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
9ad97ede | 117 | int ret; |
0ad72863 | 118 | if (cli) { |
9ad97ede BS |
119 | snprintf(cli->name, sizeof(cli->name), "%s", sname); |
120 | cli->dev = dev; | |
121 | ||
a01ca78c | 122 | ret = nvif_client_init(NULL, cli->name, nouveau_name(dev), |
9ad97ede BS |
123 | nouveau_config, nouveau_debug, |
124 | &cli->base); | |
27111a23 | 125 | if (ret == 0) { |
0ad72863 | 126 | mutex_init(&cli->mutex); |
27111a23 BS |
127 | usif_client_init(cli); |
128 | } | |
94580299 | 129 | return ret; |
dd5700ea | 130 | } |
0ad72863 | 131 | return -ENOMEM; |
94580299 BS |
132 | } |
133 | ||
134 | static void | |
135 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
136 | { | |
be83cd4e | 137 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
0ad72863 | 138 | nvif_client_fini(&cli->base); |
27111a23 | 139 | usif_client_fini(cli); |
f5654d95 | 140 | kfree(cli); |
94580299 BS |
141 | } |
142 | ||
ebb945a9 BS |
143 | static void |
144 | nouveau_accel_fini(struct nouveau_drm *drm) | |
145 | { | |
fbd58ebd | 146 | nouveau_channel_idle(drm->channel); |
0ad72863 | 147 | nvif_object_fini(&drm->ntfy); |
f027f491 | 148 | nvkm_gpuobj_del(&drm->notify); |
fbd58ebd | 149 | nvif_notify_fini(&drm->flip); |
0ad72863 | 150 | nvif_object_fini(&drm->nvsw); |
fbd58ebd BS |
151 | nouveau_channel_del(&drm->channel); |
152 | ||
153 | nouveau_channel_idle(drm->cechan); | |
0ad72863 | 154 | nvif_object_fini(&drm->ttm.copy); |
fbd58ebd BS |
155 | nouveau_channel_del(&drm->cechan); |
156 | ||
ebb945a9 BS |
157 | if (drm->fence) |
158 | nouveau_fence(drm)->dtor(drm); | |
159 | } | |
160 | ||
161 | static void | |
162 | nouveau_accel_init(struct nouveau_drm *drm) | |
163 | { | |
967e7bde | 164 | struct nvif_device *device = &drm->device; |
41a63406 | 165 | struct nvif_sclass *sclass; |
49981046 | 166 | u32 arg0, arg1; |
41a63406 | 167 | int ret, i, n; |
ebb945a9 | 168 | |
967e7bde | 169 | if (nouveau_noaccel) |
ebb945a9 BS |
170 | return; |
171 | ||
172 | /* initialise synchronisation routines */ | |
967e7bde BS |
173 | /*XXX: this is crap, but the fence/channel stuff is a little |
174 | * backwards in some places. this will be fixed. | |
175 | */ | |
41a63406 | 176 | ret = n = nvif_object_sclass_get(&device->object, &sclass); |
967e7bde BS |
177 | if (ret < 0) |
178 | return; | |
179 | ||
41a63406 BS |
180 | for (ret = -ENOSYS, i = 0; i < n; i++) { |
181 | switch (sclass[i].oclass) { | |
bbf8906b | 182 | case NV03_CHANNEL_DMA: |
967e7bde BS |
183 | ret = nv04_fence_create(drm); |
184 | break; | |
bbf8906b | 185 | case NV10_CHANNEL_DMA: |
967e7bde BS |
186 | ret = nv10_fence_create(drm); |
187 | break; | |
bbf8906b BS |
188 | case NV17_CHANNEL_DMA: |
189 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
190 | ret = nv17_fence_create(drm); |
191 | break; | |
bbf8906b | 192 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
193 | ret = nv50_fence_create(drm); |
194 | break; | |
bbf8906b | 195 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
196 | ret = nv84_fence_create(drm); |
197 | break; | |
bbf8906b BS |
198 | case FERMI_CHANNEL_GPFIFO: |
199 | case KEPLER_CHANNEL_GPFIFO_A: | |
63f8c9b7 | 200 | case KEPLER_CHANNEL_GPFIFO_B: |
a1020afe | 201 | case MAXWELL_CHANNEL_GPFIFO_A: |
e8ff9794 | 202 | case PASCAL_CHANNEL_GPFIFO_A: |
967e7bde BS |
203 | ret = nvc0_fence_create(drm); |
204 | break; | |
205 | default: | |
206 | break; | |
207 | } | |
208 | } | |
209 | ||
41a63406 | 210 | nvif_object_sclass_put(&sclass); |
ebb945a9 BS |
211 | if (ret) { |
212 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
213 | nouveau_accel_fini(drm); | |
214 | return; | |
215 | } | |
216 | ||
967e7bde | 217 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
fcf3f91c | 218 | ret = nouveau_channel_new(drm, &drm->device, |
1f5ff7f5 BS |
219 | NVA06F_V0_ENGINE_CE0 | |
220 | NVA06F_V0_ENGINE_CE1, | |
bbf8906b | 221 | 0, &drm->cechan); |
49981046 BS |
222 | if (ret) |
223 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
224 | ||
1f5ff7f5 | 225 | arg0 = NVA06F_V0_ENGINE_GR; |
49469800 | 226 | arg1 = 1; |
00fc6f6f | 227 | } else |
967e7bde BS |
228 | if (device->info.chipset >= 0xa3 && |
229 | device->info.chipset != 0xaa && | |
230 | device->info.chipset != 0xac) { | |
fcf3f91c | 231 | ret = nouveau_channel_new(drm, &drm->device, |
0ad72863 | 232 | NvDmaFB, NvDmaTT, &drm->cechan); |
00fc6f6f BS |
233 | if (ret) |
234 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
235 | ||
236 | arg0 = NvDmaFB; | |
237 | arg1 = NvDmaTT; | |
49981046 BS |
238 | } else { |
239 | arg0 = NvDmaFB; | |
240 | arg1 = NvDmaTT; | |
241 | } | |
242 | ||
fcf3f91c | 243 | ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel); |
ebb945a9 BS |
244 | if (ret) { |
245 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
246 | nouveau_accel_fini(drm); | |
247 | return; | |
248 | } | |
249 | ||
a01ca78c | 250 | ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, |
0ad72863 | 251 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); |
69a6146d | 252 | if (ret == 0) { |
69a6146d BS |
253 | ret = RING_SPACE(drm->channel, 2); |
254 | if (ret == 0) { | |
967e7bde | 255 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
256 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
257 | OUT_RING (drm->channel, NVDRM_NVSW); | |
258 | } else | |
967e7bde | 259 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
260 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
261 | OUT_RING (drm->channel, 0x001f0000); | |
262 | } | |
263 | } | |
898a2b32 BS |
264 | |
265 | ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete, | |
538b269b BS |
266 | false, NV04_NVSW_NTFY_UEVENT, |
267 | NULL, 0, 0, &drm->flip); | |
898a2b32 BS |
268 | if (ret == 0) |
269 | ret = nvif_notify_get(&drm->flip); | |
270 | if (ret) { | |
271 | nouveau_accel_fini(drm); | |
272 | return; | |
273 | } | |
69a6146d BS |
274 | } |
275 | ||
276 | if (ret) { | |
277 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
278 | nouveau_accel_fini(drm); | |
279 | return; | |
280 | } | |
281 | ||
967e7bde | 282 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
f027f491 BS |
283 | ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false, |
284 | NULL, &drm->notify); | |
ebb945a9 BS |
285 | if (ret) { |
286 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
287 | nouveau_accel_fini(drm); | |
288 | return; | |
289 | } | |
290 | ||
a01ca78c | 291 | ret = nvif_object_init(&drm->channel->user, NvNotify0, |
4acfd707 BS |
292 | NV_DMA_IN_MEMORY, |
293 | &(struct nv_dma_v0) { | |
294 | .target = NV_DMA_V0_TARGET_VRAM, | |
295 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
296 | .start = drm->notify->addr, |
297 | .limit = drm->notify->addr + 31 | |
4acfd707 | 298 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 299 | &drm->ntfy); |
ebb945a9 BS |
300 | if (ret) { |
301 | nouveau_accel_fini(drm); | |
302 | return; | |
303 | } | |
304 | } | |
305 | ||
306 | ||
49981046 | 307 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
308 | } |
309 | ||
56550d94 GKH |
310 | static int nouveau_drm_probe(struct pci_dev *pdev, |
311 | const struct pci_device_id *pent) | |
94580299 | 312 | { |
be83cd4e | 313 | struct nvkm_device *device; |
ebb945a9 BS |
314 | struct apertures_struct *aper; |
315 | bool boot = false; | |
94580299 BS |
316 | int ret; |
317 | ||
b00e5334 | 318 | if (vga_switcheroo_client_probe_defer(pdev)) |
98b3a340 LW |
319 | return -EPROBE_DEFER; |
320 | ||
0e67bed2 BS |
321 | /* We need to check that the chipset is supported before booting |
322 | * fbdev off the hardware, as there's no way to put it back. | |
323 | */ | |
324 | ret = nvkm_device_pci_new(pdev, NULL, "error", true, false, 0, &device); | |
325 | if (ret) | |
326 | return ret; | |
327 | ||
328 | nvkm_device_del(&device); | |
329 | ||
330 | /* Remove conflicting drivers (vesafb, efifb etc). */ | |
ebb945a9 BS |
331 | aper = alloc_apertures(3); |
332 | if (!aper) | |
333 | return -ENOMEM; | |
334 | ||
335 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
336 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
337 | aper->count = 1; | |
338 | ||
339 | if (pci_resource_len(pdev, 2)) { | |
340 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
341 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
342 | aper->count++; | |
343 | } | |
344 | ||
345 | if (pci_resource_len(pdev, 3)) { | |
346 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
347 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
348 | aper->count++; | |
349 | } | |
350 | ||
351 | #ifdef CONFIG_X86 | |
352 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
353 | #endif | |
771fa0e4 | 354 | if (nouveau_modeset != 2) |
44adece5 | 355 | drm_fb_helper_remove_conflicting_framebuffers(aper, "nouveaufb", boot); |
83ef7777 | 356 | kfree(aper); |
ebb945a9 | 357 | |
7974dd1b BS |
358 | ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, |
359 | true, true, ~0ULL, &device); | |
94580299 BS |
360 | if (ret) |
361 | return ret; | |
362 | ||
363 | pci_set_master(pdev); | |
364 | ||
915b4d11 | 365 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 366 | if (ret) { |
e781dc8f | 367 | nvkm_device_del(&device); |
94580299 BS |
368 | return ret; |
369 | } | |
370 | ||
371 | return 0; | |
372 | } | |
373 | ||
5addcf0a DA |
374 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
375 | ||
376 | static void | |
46941b0f | 377 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 378 | { |
46941b0f | 379 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 380 | |
420b9469 | 381 | if (!pdev) { |
f2a0adad | 382 | NV_DEBUG(drm, "not a PCI device; no HDMI\n"); |
420b9469 AC |
383 | drm->hdmi_device = NULL; |
384 | return; | |
385 | } | |
386 | ||
5addcf0a DA |
387 | /* subfunction one is a hdmi audio device? */ |
388 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
389 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
390 | ||
391 | if (!drm->hdmi_device) { | |
46941b0f | 392 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
393 | return; |
394 | } | |
395 | ||
396 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 397 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
398 | pci_dev_put(drm->hdmi_device); |
399 | drm->hdmi_device = NULL; | |
400 | return; | |
401 | } | |
402 | } | |
403 | ||
5b8a43ae | 404 | static int |
94580299 BS |
405 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
406 | { | |
94580299 BS |
407 | struct nouveau_drm *drm; |
408 | int ret; | |
409 | ||
9ad97ede | 410 | ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm); |
94580299 BS |
411 | if (ret) |
412 | return ret; | |
413 | ||
77145f1c BS |
414 | dev->dev_private = drm; |
415 | drm->dev = dev; | |
989aa5b7 | 416 | nvxx_client(&drm->client.base)->debug = |
be83cd4e | 417 | nvkm_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 418 | |
94580299 | 419 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 420 | spin_lock_init(&drm->tile.lock); |
94580299 | 421 | |
46941b0f | 422 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 423 | |
fcf3f91c | 424 | ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE, |
586491e6 | 425 | &(struct nv_device_v0) { |
94580299 | 426 | .device = ~0, |
586491e6 | 427 | }, sizeof(struct nv_device_v0), |
0ad72863 | 428 | &drm->device); |
94580299 BS |
429 | if (ret) |
430 | goto fail_device; | |
431 | ||
7d3428cd IM |
432 | dev->irq_enabled = true; |
433 | ||
77145f1c BS |
434 | /* workaround an odd issue on nvc1 by disabling the device's |
435 | * nosnoop capability. hopefully won't cause issues until a | |
436 | * better fix is found - assuming there is one... | |
437 | */ | |
967e7bde | 438 | if (drm->device.info.chipset == 0xc1) |
a01ca78c | 439 | nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000); |
ebb945a9 | 440 | |
77145f1c | 441 | nouveau_vga_init(drm); |
cb75d97e | 442 | |
967e7bde | 443 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
2100292c BS |
444 | if (!nvxx_device(&drm->device)->mmu) { |
445 | ret = -ENOSYS; | |
446 | goto fail_device; | |
447 | } | |
448 | ||
be83cd4e | 449 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 450 | 0x1000, NULL, &drm->client.vm); |
ebb945a9 BS |
451 | if (ret) |
452 | goto fail_device; | |
3ee6f5b5 | 453 | |
989aa5b7 | 454 | nvxx_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
455 | } |
456 | ||
457 | ret = nouveau_ttm_init(drm); | |
94580299 | 458 | if (ret) |
77145f1c BS |
459 | goto fail_ttm; |
460 | ||
461 | ret = nouveau_bios_init(dev); | |
462 | if (ret) | |
463 | goto fail_bios; | |
464 | ||
77145f1c | 465 | ret = nouveau_display_create(dev); |
ebb945a9 | 466 | if (ret) |
77145f1c BS |
467 | goto fail_dispctor; |
468 | ||
469 | if (dev->mode_config.num_crtc) { | |
470 | ret = nouveau_display_init(dev); | |
471 | if (ret) | |
472 | goto fail_dispinit; | |
473 | } | |
474 | ||
b126a200 | 475 | nouveau_debugfs_init(drm); |
b9ed919f | 476 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
477 | nouveau_accel_init(drm); |
478 | nouveau_fbcon_init(dev); | |
8d021d71 | 479 | nouveau_led_init(dev); |
5addcf0a DA |
480 | |
481 | if (nouveau_runtime_pm != 0) { | |
482 | pm_runtime_use_autosuspend(dev->dev); | |
483 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
484 | pm_runtime_set_active(dev->dev); | |
485 | pm_runtime_allow(dev->dev); | |
486 | pm_runtime_mark_last_busy(dev->dev); | |
487 | pm_runtime_put(dev->dev); | |
488 | } | |
94580299 BS |
489 | return 0; |
490 | ||
77145f1c BS |
491 | fail_dispinit: |
492 | nouveau_display_destroy(dev); | |
493 | fail_dispctor: | |
77145f1c BS |
494 | nouveau_bios_takedown(dev); |
495 | fail_bios: | |
ebb945a9 | 496 | nouveau_ttm_fini(drm); |
77145f1c | 497 | fail_ttm: |
77145f1c | 498 | nouveau_vga_fini(drm); |
94580299 | 499 | fail_device: |
0ad72863 | 500 | nvif_device_fini(&drm->device); |
94580299 BS |
501 | nouveau_cli_destroy(&drm->client); |
502 | return ret; | |
503 | } | |
504 | ||
5b8a43ae | 505 | static int |
94580299 BS |
506 | nouveau_drm_unload(struct drm_device *dev) |
507 | { | |
77145f1c | 508 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 509 | |
c1b16b45 LW |
510 | if (nouveau_runtime_pm != 0) { |
511 | pm_runtime_get_sync(dev->dev); | |
55c868a3 | 512 | pm_runtime_forbid(dev->dev); |
c1b16b45 LW |
513 | } |
514 | ||
8d021d71 | 515 | nouveau_led_fini(dev); |
ebb945a9 BS |
516 | nouveau_fbcon_fini(dev); |
517 | nouveau_accel_fini(drm); | |
b9ed919f | 518 | nouveau_hwmon_fini(dev); |
b126a200 | 519 | nouveau_debugfs_fini(drm); |
77145f1c | 520 | |
9430738d | 521 | if (dev->mode_config.num_crtc) |
3b4c0abb | 522 | nouveau_display_fini(dev, false); |
77145f1c BS |
523 | nouveau_display_destroy(dev); |
524 | ||
77145f1c | 525 | nouveau_bios_takedown(dev); |
94580299 | 526 | |
ebb945a9 | 527 | nouveau_ttm_fini(drm); |
77145f1c | 528 | nouveau_vga_fini(drm); |
cb75d97e | 529 | |
0ad72863 | 530 | nvif_device_fini(&drm->device); |
5addcf0a DA |
531 | if (drm->hdmi_device) |
532 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
533 | nouveau_cli_destroy(&drm->client); |
534 | return 0; | |
535 | } | |
536 | ||
8ba9ff11 AC |
537 | void |
538 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 539 | { |
77145f1c | 540 | struct nouveau_drm *drm = nouveau_drm(dev); |
be83cd4e | 541 | struct nvkm_client *client; |
76ecea5b | 542 | struct nvkm_device *device; |
77145f1c | 543 | |
7d3428cd | 544 | dev->irq_enabled = false; |
989aa5b7 | 545 | client = nvxx_client(&drm->client.base); |
4e7e62d6 | 546 | device = nvkm_device_find(client->device); |
77145f1c BS |
547 | drm_put_dev(dev); |
548 | ||
e781dc8f | 549 | nvkm_device_del(&device); |
94580299 | 550 | } |
8ba9ff11 AC |
551 | |
552 | static void | |
553 | nouveau_drm_remove(struct pci_dev *pdev) | |
554 | { | |
555 | struct drm_device *dev = pci_get_drvdata(pdev); | |
556 | ||
557 | nouveau_drm_device_remove(dev); | |
558 | } | |
94580299 | 559 | |
cd897837 | 560 | static int |
05c63c2f | 561 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 562 | { |
77145f1c | 563 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
564 | struct nouveau_cli *cli; |
565 | int ret; | |
566 | ||
8d021d71 MP |
567 | nouveau_led_suspend(dev); |
568 | ||
6fbb702e BS |
569 | if (dev->mode_config.num_crtc) { |
570 | NV_INFO(drm, "suspending console...\n"); | |
571 | nouveau_fbcon_set_suspend(dev, 1); | |
c52f4fa6 | 572 | NV_INFO(drm, "suspending display...\n"); |
6fbb702e | 573 | ret = nouveau_display_suspend(dev, runtime); |
9430738d BS |
574 | if (ret) |
575 | return ret; | |
576 | } | |
94580299 | 577 | |
c52f4fa6 | 578 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
579 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
580 | ||
c52f4fa6 | 581 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
582 | if (drm->cechan) { |
583 | ret = nouveau_channel_idle(drm->cechan); | |
584 | if (ret) | |
f3980dc5 | 585 | goto fail_display; |
81dff21b BS |
586 | } |
587 | ||
588 | if (drm->channel) { | |
589 | ret = nouveau_channel_idle(drm->channel); | |
590 | if (ret) | |
f3980dc5 | 591 | goto fail_display; |
81dff21b BS |
592 | } |
593 | ||
c52f4fa6 | 594 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 595 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
596 | if (!nouveau_fence(drm)->suspend(drm)) { |
597 | ret = -ENOMEM; | |
598 | goto fail_display; | |
599 | } | |
ebb945a9 BS |
600 | } |
601 | ||
94580299 | 602 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 603 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
604 | if (ret) |
605 | goto fail_client; | |
606 | } | |
607 | ||
c52f4fa6 | 608 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 609 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
610 | if (ret) |
611 | goto fail_client; | |
612 | ||
94580299 BS |
613 | return 0; |
614 | ||
615 | fail_client: | |
616 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 617 | nvif_client_resume(&cli->base); |
94580299 BS |
618 | } |
619 | ||
f3980dc5 IM |
620 | if (drm->fence && nouveau_fence(drm)->resume) |
621 | nouveau_fence(drm)->resume(drm); | |
622 | ||
623 | fail_display: | |
9430738d | 624 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 625 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e | 626 | nouveau_display_resume(dev, runtime); |
9430738d | 627 | } |
94580299 BS |
628 | return ret; |
629 | } | |
630 | ||
cd897837 | 631 | static int |
6fbb702e | 632 | nouveau_do_resume(struct drm_device *dev, bool runtime) |
2d8b9ccb DA |
633 | { |
634 | struct nouveau_drm *drm = nouveau_drm(dev); | |
635 | struct nouveau_cli *cli; | |
636 | ||
c52f4fa6 | 637 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 638 | nvif_client_resume(&drm->client.base); |
94580299 | 639 | |
c52f4fa6 | 640 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
641 | if (drm->fence && nouveau_fence(drm)->resume) |
642 | nouveau_fence(drm)->resume(drm); | |
643 | ||
94580299 | 644 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 645 | nvif_client_resume(&cli->base); |
94580299 | 646 | } |
cb75d97e | 647 | |
77145f1c | 648 | nouveau_run_vbios_init(dev); |
77145f1c | 649 | |
9430738d | 650 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 651 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e BS |
652 | nouveau_display_resume(dev, runtime); |
653 | NV_INFO(drm, "resuming console...\n"); | |
654 | nouveau_fbcon_set_suspend(dev, 0); | |
9430738d | 655 | } |
5addcf0a | 656 | |
8d021d71 MP |
657 | nouveau_led_resume(dev); |
658 | ||
77145f1c | 659 | return 0; |
94580299 BS |
660 | } |
661 | ||
7bb6d442 BS |
662 | int |
663 | nouveau_pmops_suspend(struct device *dev) | |
664 | { | |
665 | struct pci_dev *pdev = to_pci_dev(dev); | |
666 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
667 | int ret; | |
668 | ||
669 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || | |
670 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
671 | return 0; | |
672 | ||
673 | ret = nouveau_do_suspend(drm_dev, false); | |
674 | if (ret) | |
675 | return ret; | |
676 | ||
677 | pci_save_state(pdev); | |
678 | pci_disable_device(pdev); | |
7bb6d442 | 679 | pci_set_power_state(pdev, PCI_D3hot); |
c5fd936e | 680 | udelay(200); |
7bb6d442 BS |
681 | return 0; |
682 | } | |
683 | ||
684 | int | |
685 | nouveau_pmops_resume(struct device *dev) | |
2d8b9ccb DA |
686 | { |
687 | struct pci_dev *pdev = to_pci_dev(dev); | |
688 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
689 | int ret; | |
690 | ||
5addcf0a DA |
691 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
692 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
693 | return 0; |
694 | ||
695 | pci_set_power_state(pdev, PCI_D0); | |
696 | pci_restore_state(pdev); | |
697 | ret = pci_enable_device(pdev); | |
698 | if (ret) | |
699 | return ret; | |
700 | pci_set_master(pdev); | |
701 | ||
0b2fe659 HG |
702 | ret = nouveau_do_resume(drm_dev, false); |
703 | ||
704 | /* Monitors may have been connected / disconnected during suspend */ | |
705 | schedule_work(&nouveau_drm(drm_dev)->hpd_work); | |
706 | ||
707 | return ret; | |
2d8b9ccb DA |
708 | } |
709 | ||
7bb6d442 BS |
710 | static int |
711 | nouveau_pmops_freeze(struct device *dev) | |
2d8b9ccb DA |
712 | { |
713 | struct pci_dev *pdev = to_pci_dev(dev); | |
714 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 715 | return nouveau_do_suspend(drm_dev, false); |
2d8b9ccb DA |
716 | } |
717 | ||
7bb6d442 BS |
718 | static int |
719 | nouveau_pmops_thaw(struct device *dev) | |
2d8b9ccb DA |
720 | { |
721 | struct pci_dev *pdev = to_pci_dev(dev); | |
722 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 723 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
724 | } |
725 | ||
7bb6d442 BS |
726 | static int |
727 | nouveau_pmops_runtime_suspend(struct device *dev) | |
728 | { | |
729 | struct pci_dev *pdev = to_pci_dev(dev); | |
730 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
731 | int ret; | |
732 | ||
733 | if (nouveau_runtime_pm == 0) { | |
734 | pm_runtime_forbid(dev); | |
735 | return -EBUSY; | |
736 | } | |
737 | ||
738 | /* are we optimus enabled? */ | |
739 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
740 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
741 | pm_runtime_forbid(dev); | |
742 | return -EBUSY; | |
743 | } | |
744 | ||
7bb6d442 BS |
745 | drm_kms_helper_poll_disable(drm_dev); |
746 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
747 | nouveau_switcheroo_optimus_dsm(); | |
748 | ret = nouveau_do_suspend(drm_dev, true); | |
749 | pci_save_state(pdev); | |
750 | pci_disable_device(pdev); | |
8c863944 | 751 | pci_ignore_hotplug(pdev); |
7bb6d442 BS |
752 | pci_set_power_state(pdev, PCI_D3cold); |
753 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
754 | return ret; | |
755 | } | |
756 | ||
757 | static int | |
758 | nouveau_pmops_runtime_resume(struct device *dev) | |
759 | { | |
760 | struct pci_dev *pdev = to_pci_dev(dev); | |
761 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
762 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; | |
763 | int ret; | |
764 | ||
765 | if (nouveau_runtime_pm == 0) | |
766 | return -EINVAL; | |
767 | ||
768 | pci_set_power_state(pdev, PCI_D0); | |
769 | pci_restore_state(pdev); | |
770 | ret = pci_enable_device(pdev); | |
771 | if (ret) | |
772 | return ret; | |
773 | pci_set_master(pdev); | |
774 | ||
775 | ret = nouveau_do_resume(drm_dev, true); | |
776 | drm_kms_helper_poll_enable(drm_dev); | |
777 | /* do magic */ | |
a01ca78c | 778 | nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); |
7bb6d442 BS |
779 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
780 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
0b2fe659 HG |
781 | |
782 | /* Monitors may have been connected / disconnected during suspend */ | |
783 | schedule_work(&nouveau_drm(drm_dev)->hpd_work); | |
784 | ||
7bb6d442 BS |
785 | return ret; |
786 | } | |
787 | ||
788 | static int | |
789 | nouveau_pmops_runtime_idle(struct device *dev) | |
790 | { | |
791 | struct pci_dev *pdev = to_pci_dev(dev); | |
792 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
793 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
794 | struct drm_crtc *crtc; | |
795 | ||
796 | if (nouveau_runtime_pm == 0) { | |
797 | pm_runtime_forbid(dev); | |
798 | return -EBUSY; | |
799 | } | |
800 | ||
801 | /* are we optimus enabled? */ | |
802 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
803 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
804 | pm_runtime_forbid(dev); | |
805 | return -EBUSY; | |
806 | } | |
807 | ||
808 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
809 | if (drm->hdmi_device) { | |
810 | if (!drm->hdmi_device->driver) { | |
811 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
812 | pm_runtime_mark_last_busy(dev); | |
813 | return -EBUSY; | |
814 | } | |
815 | } | |
816 | ||
817 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
818 | if (crtc->enabled) { | |
819 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
820 | return -EBUSY; | |
821 | } | |
822 | } | |
823 | pm_runtime_mark_last_busy(dev); | |
824 | pm_runtime_autosuspend(dev); | |
825 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
826 | return 1; | |
827 | } | |
2d8b9ccb | 828 | |
5b8a43ae | 829 | static int |
ebb945a9 BS |
830 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
831 | { | |
ebb945a9 BS |
832 | struct nouveau_drm *drm = nouveau_drm(dev); |
833 | struct nouveau_cli *cli; | |
a2896ced | 834 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
835 | int ret; |
836 | ||
5addcf0a DA |
837 | /* need to bring up power immediately if opening device */ |
838 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 839 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
840 | return ret; |
841 | ||
a2896ced MS |
842 | get_task_comm(tmpname, current); |
843 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 844 | |
9ad97ede | 845 | ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli); |
420b9469 | 846 | |
ebb945a9 | 847 | if (ret) |
5addcf0a | 848 | goto out_suspend; |
ebb945a9 | 849 | |
0ad72863 BS |
850 | cli->base.super = false; |
851 | ||
967e7bde | 852 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 853 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 854 | 0x1000, NULL, &cli->vm); |
ebb945a9 BS |
855 | if (ret) { |
856 | nouveau_cli_destroy(cli); | |
5addcf0a | 857 | goto out_suspend; |
ebb945a9 | 858 | } |
3ee6f5b5 | 859 | |
989aa5b7 | 860 | nvxx_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
861 | } |
862 | ||
863 | fpriv->driver_priv = cli; | |
864 | ||
865 | mutex_lock(&drm->client.mutex); | |
866 | list_add(&cli->head, &drm->clients); | |
867 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
868 | |
869 | out_suspend: | |
870 | pm_runtime_mark_last_busy(dev->dev); | |
871 | pm_runtime_put_autosuspend(dev->dev); | |
872 | ||
873 | return ret; | |
ebb945a9 BS |
874 | } |
875 | ||
5b8a43ae | 876 | static void |
ebb945a9 BS |
877 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
878 | { | |
879 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
880 | struct nouveau_drm *drm = nouveau_drm(dev); | |
881 | ||
5addcf0a DA |
882 | pm_runtime_get_sync(dev->dev); |
883 | ||
ac8c7930 | 884 | mutex_lock(&cli->mutex); |
ebb945a9 BS |
885 | if (cli->abi16) |
886 | nouveau_abi16_fini(cli->abi16); | |
ac8c7930 | 887 | mutex_unlock(&cli->mutex); |
ebb945a9 BS |
888 | |
889 | mutex_lock(&drm->client.mutex); | |
890 | list_del(&cli->head); | |
891 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 892 | |
ebb945a9 BS |
893 | } |
894 | ||
5b8a43ae | 895 | static void |
ebb945a9 BS |
896 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
897 | { | |
898 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
899 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
900 | pm_runtime_mark_last_busy(dev->dev); |
901 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
902 | } |
903 | ||
baa70943 | 904 | static const struct drm_ioctl_desc |
77145f1c | 905 | nouveau_ioctls[] = { |
f8c47144 DV |
906 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), |
907 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | |
908 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
909 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
910 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
911 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
912 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
913 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), | |
914 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), | |
915 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), | |
916 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), | |
917 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
918 | }; |
919 | ||
27111a23 BS |
920 | long |
921 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 922 | { |
27111a23 BS |
923 | struct drm_file *filp = file->private_data; |
924 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 925 | long ret; |
5addcf0a DA |
926 | |
927 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 928 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
929 | return ret; |
930 | ||
27111a23 BS |
931 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
932 | case DRM_NOUVEAU_NVIF: | |
933 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
934 | break; | |
935 | default: | |
936 | ret = drm_ioctl(file, cmd, arg); | |
937 | break; | |
938 | } | |
5addcf0a DA |
939 | |
940 | pm_runtime_mark_last_busy(dev->dev); | |
941 | pm_runtime_put_autosuspend(dev->dev); | |
942 | return ret; | |
943 | } | |
27111a23 | 944 | |
77145f1c BS |
945 | static const struct file_operations |
946 | nouveau_driver_fops = { | |
947 | .owner = THIS_MODULE, | |
948 | .open = drm_open, | |
949 | .release = drm_release, | |
5addcf0a | 950 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
951 | .mmap = nouveau_ttm_mmap, |
952 | .poll = drm_poll, | |
77145f1c BS |
953 | .read = drm_read, |
954 | #if defined(CONFIG_COMPAT) | |
955 | .compat_ioctl = nouveau_compat_ioctl, | |
956 | #endif | |
957 | .llseek = noop_llseek, | |
958 | }; | |
959 | ||
960 | static struct drm_driver | |
915b4d11 | 961 | driver_stub = { |
77145f1c | 962 | .driver_features = |
0e975980 PA |
963 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | |
964 | DRIVER_KMS_LEGACY_CONTEXT, | |
77145f1c BS |
965 | |
966 | .load = nouveau_drm_load, | |
967 | .unload = nouveau_drm_unload, | |
968 | .open = nouveau_drm_open, | |
969 | .preclose = nouveau_drm_preclose, | |
970 | .postclose = nouveau_drm_postclose, | |
971 | .lastclose = nouveau_vga_lastclose, | |
972 | ||
33b903e8 | 973 | #if defined(CONFIG_DEBUG_FS) |
56c101af KH |
974 | .debugfs_init = nouveau_drm_debugfs_init, |
975 | .debugfs_cleanup = nouveau_drm_debugfs_cleanup, | |
33b903e8 MS |
976 | #endif |
977 | ||
b44f8408 | 978 | .get_vblank_counter = drm_vblank_no_hw_counter, |
51cb4b39 BS |
979 | .enable_vblank = nouveau_display_vblank_enable, |
980 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
981 | .get_scanout_position = nouveau_display_scanoutpos, |
982 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
983 | |
984 | .ioctls = nouveau_ioctls, | |
baa70943 | 985 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
986 | .fops = &nouveau_driver_fops, |
987 | ||
988 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
989 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
990 | .gem_prime_export = drm_gem_prime_export, |
991 | .gem_prime_import = drm_gem_prime_import, | |
992 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 993 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 994 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
995 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
996 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
997 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
998 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 999 | |
a51e6ac4 | 1000 | .gem_free_object_unlocked = nouveau_gem_object_del, |
77145f1c BS |
1001 | .gem_open_object = nouveau_gem_object_open, |
1002 | .gem_close_object = nouveau_gem_object_close, | |
1003 | ||
1004 | .dumb_create = nouveau_display_dumb_create, | |
1005 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 1006 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
1007 | |
1008 | .name = DRIVER_NAME, | |
1009 | .desc = DRIVER_DESC, | |
1010 | #ifdef GIT_REVISION | |
1011 | .date = GIT_REVISION, | |
1012 | #else | |
1013 | .date = DRIVER_DATE, | |
1014 | #endif | |
1015 | .major = DRIVER_MAJOR, | |
1016 | .minor = DRIVER_MINOR, | |
1017 | .patchlevel = DRIVER_PATCHLEVEL, | |
1018 | }; | |
1019 | ||
94580299 BS |
1020 | static struct pci_device_id |
1021 | nouveau_drm_pci_table[] = { | |
1022 | { | |
1023 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
1024 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
1025 | .class_mask = 0xff << 16, | |
1026 | }, | |
1027 | { | |
1028 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
1029 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
1030 | .class_mask = 0xff << 16, | |
1031 | }, | |
1032 | {} | |
1033 | }; | |
1034 | ||
703fa264 PM |
1035 | static void nouveau_display_options(void) |
1036 | { | |
1037 | DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); | |
1038 | ||
1039 | DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); | |
1040 | DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); | |
1041 | DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); | |
1042 | DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); | |
1043 | DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); | |
1044 | DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); | |
1045 | DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); | |
1046 | DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); | |
1047 | DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); | |
1048 | DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); | |
f3a8b664 | 1049 | DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz); |
703fa264 PM |
1050 | } |
1051 | ||
2d8b9ccb DA |
1052 | static const struct dev_pm_ops nouveau_pm_ops = { |
1053 | .suspend = nouveau_pmops_suspend, | |
1054 | .resume = nouveau_pmops_resume, | |
1055 | .freeze = nouveau_pmops_freeze, | |
1056 | .thaw = nouveau_pmops_thaw, | |
1057 | .poweroff = nouveau_pmops_freeze, | |
1058 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1059 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1060 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1061 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1062 | }; |
1063 | ||
94580299 BS |
1064 | static struct pci_driver |
1065 | nouveau_drm_pci_driver = { | |
1066 | .name = "nouveau", | |
1067 | .id_table = nouveau_drm_pci_table, | |
1068 | .probe = nouveau_drm_probe, | |
1069 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1070 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1071 | }; |
1072 | ||
8ba9ff11 | 1073 | struct drm_device * |
e396ecd1 AC |
1074 | nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, |
1075 | struct platform_device *pdev, | |
47b2505e | 1076 | struct nvkm_device **pdevice) |
420b9469 | 1077 | { |
8ba9ff11 AC |
1078 | struct drm_device *drm; |
1079 | int err; | |
420b9469 | 1080 | |
e396ecd1 | 1081 | err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, |
7974dd1b | 1082 | true, true, ~0ULL, pdevice); |
8ba9ff11 | 1083 | if (err) |
e781dc8f | 1084 | goto err_free; |
8ba9ff11 | 1085 | |
915b4d11 | 1086 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
0f288605 TG |
1087 | if (IS_ERR(drm)) { |
1088 | err = PTR_ERR(drm); | |
8ba9ff11 | 1089 | goto err_free; |
420b9469 AC |
1090 | } |
1091 | ||
8ba9ff11 AC |
1092 | drm->platformdev = pdev; |
1093 | platform_set_drvdata(pdev, drm); | |
1094 | ||
1095 | return drm; | |
1096 | ||
1097 | err_free: | |
e781dc8f | 1098 | nvkm_device_del(pdevice); |
8ba9ff11 AC |
1099 | |
1100 | return ERR_PTR(err); | |
420b9469 AC |
1101 | } |
1102 | ||
94580299 BS |
1103 | static int __init |
1104 | nouveau_drm_init(void) | |
1105 | { | |
915b4d11 DH |
1106 | driver_pci = driver_stub; |
1107 | driver_pci.set_busid = drm_pci_set_busid; | |
1108 | driver_platform = driver_stub; | |
915b4d11 | 1109 | |
703fa264 PM |
1110 | nouveau_display_options(); |
1111 | ||
77145f1c | 1112 | if (nouveau_modeset == -1) { |
77145f1c BS |
1113 | if (vgacon_text_force()) |
1114 | nouveau_modeset = 0; | |
77145f1c BS |
1115 | } |
1116 | ||
1117 | if (!nouveau_modeset) | |
1118 | return 0; | |
1119 | ||
055a65d5 AC |
1120 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER |
1121 | platform_driver_register(&nouveau_platform_driver); | |
1122 | #endif | |
1123 | ||
77145f1c | 1124 | nouveau_register_dsm_handler(); |
915b4d11 | 1125 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1126 | } |
1127 | ||
1128 | static void __exit | |
1129 | nouveau_drm_exit(void) | |
1130 | { | |
77145f1c BS |
1131 | if (!nouveau_modeset) |
1132 | return; | |
1133 | ||
915b4d11 | 1134 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1135 | nouveau_unregister_dsm_handler(); |
055a65d5 AC |
1136 | |
1137 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER | |
1138 | platform_driver_unregister(&nouveau_platform_driver); | |
1139 | #endif | |
94580299 BS |
1140 | } |
1141 | ||
1142 | module_init(nouveau_drm_init); | |
1143 | module_exit(nouveau_drm_exit); | |
1144 | ||
1145 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1146 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1147 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1148 | MODULE_LICENSE("GPL and additional rights"); |