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drm/nouveau/core: split device index enum out on its own
[people/arne_f/kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
94580299
BS
26#include <linux/module.h>
27#include <linux/pci.h>
5addcf0a
DA
28#include <linux/pm_runtime.h>
29#include <linux/vga_switcheroo.h>
fdb751ef 30
5addcf0a
DA
31#include "drmP.h"
32#include "drm_crtc_helper.h"
fdb751ef 33
94580299 34#include <core/device.h>
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
94580299 37
94580299 38#include "nouveau_drm.h"
ebb945a9 39#include "nouveau_dma.h"
77145f1c
BS
40#include "nouveau_ttm.h"
41#include "nouveau_gem.h"
cb75d97e 42#include "nouveau_agp.h"
77145f1c 43#include "nouveau_vga.h"
26fdd78c 44#include "nouveau_sysfs.h"
b9ed919f 45#include "nouveau_hwmon.h"
77145f1c
BS
46#include "nouveau_acpi.h"
47#include "nouveau_bios.h"
48#include "nouveau_ioctl.h"
ebb945a9
BS
49#include "nouveau_abi16.h"
50#include "nouveau_fbcon.h"
51#include "nouveau_fence.h"
33b903e8 52#include "nouveau_debugfs.h"
27111a23 53#include "nouveau_usif.h"
703fa264 54#include "nouveau_connector.h"
055a65d5 55#include "nouveau_platform.h"
ebb945a9 56
94580299
BS
57MODULE_PARM_DESC(config, "option string to pass to driver core");
58static char *nouveau_config;
59module_param_named(config, nouveau_config, charp, 0400);
60
61MODULE_PARM_DESC(debug, "debug string to pass to driver core");
62static char *nouveau_debug;
63module_param_named(debug, nouveau_debug, charp, 0400);
64
ebb945a9
BS
65MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
66static int nouveau_noaccel = 0;
67module_param_named(noaccel, nouveau_noaccel, int, 0400);
68
9430738d
BS
69MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
70 "0 = disabled, 1 = enabled, 2 = headless)");
71int nouveau_modeset = -1;
77145f1c
BS
72module_param_named(modeset, nouveau_modeset, int, 0400);
73
5addcf0a
DA
74MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
75int nouveau_runtime_pm = -1;
76module_param_named(runpm, nouveau_runtime_pm, int, 0400);
77
915b4d11
DH
78static struct drm_driver driver_stub;
79static struct drm_driver driver_pci;
80static struct drm_driver driver_platform;
77145f1c 81
94580299 82static u64
420b9469 83nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
84{
85 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
86 name |= pdev->bus->number << 16;
87 name |= PCI_SLOT(pdev->devfn) << 8;
88 return name | PCI_FUNC(pdev->devfn);
89}
90
420b9469
AC
91static u64
92nouveau_platform_name(struct platform_device *platformdev)
93{
94 return platformdev->id;
95}
96
97static u64
98nouveau_name(struct drm_device *dev)
99{
100 if (dev->pdev)
101 return nouveau_pci_name(dev->pdev);
102 else
103 return nouveau_platform_name(dev->platformdev);
104}
105
94580299 106static int
420b9469 107nouveau_cli_create(u64 name, const char *sname,
fa6df8c1 108 int size, void **pcli)
94580299 109{
0ad72863
BS
110 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
111 if (cli) {
112 int ret = nvif_client_init(NULL, NULL, sname, name,
113 nouveau_config, nouveau_debug,
114 &cli->base);
27111a23 115 if (ret == 0) {
0ad72863 116 mutex_init(&cli->mutex);
27111a23
BS
117 usif_client_init(cli);
118 }
94580299 119 return ret;
dd5700ea 120 }
0ad72863 121 return -ENOMEM;
94580299
BS
122}
123
124static void
125nouveau_cli_destroy(struct nouveau_cli *cli)
126{
0ad72863
BS
127 nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL);
128 nvif_client_fini(&cli->base);
27111a23 129 usif_client_fini(cli);
94580299
BS
130}
131
ebb945a9
BS
132static void
133nouveau_accel_fini(struct nouveau_drm *drm)
134{
ebb945a9 135 nouveau_channel_del(&drm->channel);
0ad72863
BS
136 nvif_object_fini(&drm->ntfy);
137 nouveau_gpuobj_ref(NULL, &drm->notify);
138 nvif_object_fini(&drm->nvsw);
49981046 139 nouveau_channel_del(&drm->cechan);
0ad72863 140 nvif_object_fini(&drm->ttm.copy);
ebb945a9
BS
141 if (drm->fence)
142 nouveau_fence(drm)->dtor(drm);
143}
144
145static void
146nouveau_accel_init(struct nouveau_drm *drm)
147{
967e7bde 148 struct nvif_device *device = &drm->device;
49981046 149 u32 arg0, arg1;
967e7bde
BS
150 u32 sclass[16];
151 int ret, i;
ebb945a9 152
967e7bde 153 if (nouveau_noaccel)
ebb945a9
BS
154 return;
155
156 /* initialise synchronisation routines */
967e7bde
BS
157 /*XXX: this is crap, but the fence/channel stuff is a little
158 * backwards in some places. this will be fixed.
159 */
0ad72863 160 ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass));
967e7bde
BS
161 if (ret < 0)
162 return;
163
164 for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) {
165 switch (sclass[i]) {
bbf8906b 166 case NV03_CHANNEL_DMA:
967e7bde
BS
167 ret = nv04_fence_create(drm);
168 break;
bbf8906b 169 case NV10_CHANNEL_DMA:
967e7bde
BS
170 ret = nv10_fence_create(drm);
171 break;
bbf8906b
BS
172 case NV17_CHANNEL_DMA:
173 case NV40_CHANNEL_DMA:
967e7bde
BS
174 ret = nv17_fence_create(drm);
175 break;
bbf8906b 176 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
177 ret = nv50_fence_create(drm);
178 break;
bbf8906b 179 case G82_CHANNEL_GPFIFO:
967e7bde
BS
180 ret = nv84_fence_create(drm);
181 break;
bbf8906b
BS
182 case FERMI_CHANNEL_GPFIFO:
183 case KEPLER_CHANNEL_GPFIFO_A:
967e7bde
BS
184 ret = nvc0_fence_create(drm);
185 break;
186 default:
187 break;
188 }
189 }
190
ebb945a9
BS
191 if (ret) {
192 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
193 nouveau_accel_fini(drm);
194 return;
195 }
196
967e7bde 197 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
0ad72863 198 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
bbf8906b
BS
199 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
200 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
201 0, &drm->cechan);
49981046
BS
202 if (ret)
203 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
204
bbf8906b 205 arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
49469800 206 arg1 = 1;
00fc6f6f 207 } else
967e7bde
BS
208 if (device->info.chipset >= 0xa3 &&
209 device->info.chipset != 0xaa &&
210 device->info.chipset != 0xac) {
0ad72863
BS
211 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
212 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
213 if (ret)
214 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
215
216 arg0 = NvDmaFB;
217 arg1 = NvDmaTT;
49981046
BS
218 } else {
219 arg0 = NvDmaFB;
220 arg1 = NvDmaTT;
221 }
222
0ad72863
BS
223 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
224 &drm->channel);
ebb945a9
BS
225 if (ret) {
226 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
227 nouveau_accel_fini(drm);
228 return;
229 }
230
0ad72863
BS
231 ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
232 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 233 if (ret == 0) {
8700287b 234 struct nouveau_sw_chan *swch;
69a6146d
BS
235 ret = RING_SPACE(drm->channel, 2);
236 if (ret == 0) {
967e7bde 237 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
238 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
239 OUT_RING (drm->channel, NVDRM_NVSW);
240 } else
967e7bde 241 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
242 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
243 OUT_RING (drm->channel, 0x001f0000);
244 }
245 }
0ad72863 246 swch = (void *)nvkm_object(&drm->nvsw)->parent;
69a6146d
BS
247 swch->flip = nouveau_flip_complete;
248 swch->flip_data = drm->channel;
249 }
250
251 if (ret) {
252 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
253 nouveau_accel_fini(drm);
254 return;
255 }
256
967e7bde
BS
257 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
258 ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32,
259 0, 0, &drm->notify);
ebb945a9
BS
260 if (ret) {
261 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
262 nouveau_accel_fini(drm);
263 return;
264 }
265
0ad72863 266 ret = nvif_object_init(drm->channel->object, NULL, NvNotify0,
4acfd707
BS
267 NV_DMA_IN_MEMORY,
268 &(struct nv_dma_v0) {
269 .target = NV_DMA_V0_TARGET_VRAM,
270 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
271 .start = drm->notify->addr,
272 .limit = drm->notify->addr + 31
4acfd707 273 }, sizeof(struct nv_dma_v0),
0ad72863 274 &drm->ntfy);
ebb945a9
BS
275 if (ret) {
276 nouveau_accel_fini(drm);
277 return;
278 }
279 }
280
281
49981046 282 nouveau_bo_move_init(drm);
ebb945a9
BS
283}
284
56550d94
GKH
285static int nouveau_drm_probe(struct pci_dev *pdev,
286 const struct pci_device_id *pent)
94580299
BS
287{
288 struct nouveau_device *device;
ebb945a9
BS
289 struct apertures_struct *aper;
290 bool boot = false;
94580299
BS
291 int ret;
292
ebb945a9
BS
293 /* remove conflicting drivers (vesafb, efifb etc) */
294 aper = alloc_apertures(3);
295 if (!aper)
296 return -ENOMEM;
297
298 aper->ranges[0].base = pci_resource_start(pdev, 1);
299 aper->ranges[0].size = pci_resource_len(pdev, 1);
300 aper->count = 1;
301
302 if (pci_resource_len(pdev, 2)) {
303 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
304 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
305 aper->count++;
306 }
307
308 if (pci_resource_len(pdev, 3)) {
309 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
310 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
311 aper->count++;
312 }
313
314#ifdef CONFIG_X86
315 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
316#endif
771fa0e4
BS
317 if (nouveau_modeset != 2)
318 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 319 kfree(aper);
ebb945a9 320
420b9469
AC
321 ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
322 nouveau_pci_name(pdev), pci_name(pdev),
94580299
BS
323 nouveau_config, nouveau_debug, &device);
324 if (ret)
325 return ret;
326
327 pci_set_master(pdev);
328
915b4d11 329 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 330 if (ret) {
ebb945a9 331 nouveau_object_ref(NULL, (struct nouveau_object **)&device);
94580299
BS
332 return ret;
333 }
334
335 return 0;
336}
337
5addcf0a
DA
338#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
339
340static void
46941b0f 341nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 342{
46941b0f 343 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 344
420b9469 345 if (!pdev) {
40189b0c 346 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
347 drm->hdmi_device = NULL;
348 return;
349 }
350
5addcf0a
DA
351 /* subfunction one is a hdmi audio device? */
352 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
353 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
354
355 if (!drm->hdmi_device) {
46941b0f 356 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
357 return;
358 }
359
360 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 361 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
362 pci_dev_put(drm->hdmi_device);
363 drm->hdmi_device = NULL;
364 return;
365 }
366}
367
5b8a43ae 368static int
94580299
BS
369nouveau_drm_load(struct drm_device *dev, unsigned long flags)
370{
371 struct pci_dev *pdev = dev->pdev;
372 struct nouveau_drm *drm;
373 int ret;
374
420b9469
AC
375 ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
376 (void **)&drm);
94580299
BS
377 if (ret)
378 return ret;
379
77145f1c
BS
380 dev->dev_private = drm;
381 drm->dev = dev;
0ad72863
BS
382 nvkm_client(&drm->client.base)->debug =
383 nouveau_dbgopt(nouveau_debug, "DRM");
77145f1c 384
94580299 385 INIT_LIST_HEAD(&drm->clients);
ebb945a9 386 spin_lock_init(&drm->tile.lock);
94580299 387
46941b0f 388 nouveau_get_hdmi_dev(drm);
5addcf0a 389
cb75d97e
BS
390 /* make sure AGP controller is in a consistent state before we
391 * (possibly) execute vbios init tables (see nouveau_agp.h)
392 */
420b9469 393 if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
586491e6
BS
394 const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY |
395 NV_DEVICE_V0_DISABLE_MMIO;
cb75d97e
BS
396 /* dummy device object, doesn't init anything, but allows
397 * agp code access to registers
398 */
0ad72863 399 ret = nvif_device_init(&drm->client.base.base, NULL,
586491e6
BS
400 NVDRM_DEVICE, NV_DEVICE,
401 &(struct nv_device_v0) {
cb75d97e 402 .device = ~0,
586491e6 403 .disable = ~enables,
cb75d97e 404 .debug0 = ~0,
586491e6 405 }, sizeof(struct nv_device_v0),
0ad72863 406 &drm->device);
cb75d97e 407 if (ret)
ebb945a9 408 goto fail_device;
cb75d97e
BS
409
410 nouveau_agp_reset(drm);
0ad72863 411 nvif_device_fini(&drm->device);
cb75d97e
BS
412 }
413
0ad72863 414 ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE,
586491e6
BS
415 NV_DEVICE,
416 &(struct nv_device_v0) {
94580299
BS
417 .device = ~0,
418 .disable = 0,
419 .debug0 = 0,
586491e6 420 }, sizeof(struct nv_device_v0),
0ad72863 421 &drm->device);
94580299
BS
422 if (ret)
423 goto fail_device;
424
7d3428cd
IM
425 dev->irq_enabled = true;
426
77145f1c
BS
427 /* workaround an odd issue on nvc1 by disabling the device's
428 * nosnoop capability. hopefully won't cause issues until a
429 * better fix is found - assuming there is one...
430 */
967e7bde
BS
431 if (drm->device.info.chipset == 0xc1)
432 nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 433
77145f1c 434 nouveau_vga_init(drm);
cb75d97e
BS
435 nouveau_agp_init(drm);
436
967e7bde
BS
437 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
438 ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
3ee6f5b5 439 0x1000, &drm->client.vm);
ebb945a9
BS
440 if (ret)
441 goto fail_device;
3ee6f5b5 442
0ad72863 443 nvkm_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
444 }
445
446 ret = nouveau_ttm_init(drm);
94580299 447 if (ret)
77145f1c
BS
448 goto fail_ttm;
449
450 ret = nouveau_bios_init(dev);
451 if (ret)
452 goto fail_bios;
453
77145f1c 454 ret = nouveau_display_create(dev);
ebb945a9 455 if (ret)
77145f1c
BS
456 goto fail_dispctor;
457
458 if (dev->mode_config.num_crtc) {
459 ret = nouveau_display_init(dev);
460 if (ret)
461 goto fail_dispinit;
462 }
463
26fdd78c 464 nouveau_sysfs_init(dev);
b9ed919f 465 nouveau_hwmon_init(dev);
ebb945a9
BS
466 nouveau_accel_init(drm);
467 nouveau_fbcon_init(dev);
5addcf0a
DA
468
469 if (nouveau_runtime_pm != 0) {
470 pm_runtime_use_autosuspend(dev->dev);
471 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
472 pm_runtime_set_active(dev->dev);
473 pm_runtime_allow(dev->dev);
474 pm_runtime_mark_last_busy(dev->dev);
475 pm_runtime_put(dev->dev);
476 }
94580299
BS
477 return 0;
478
77145f1c
BS
479fail_dispinit:
480 nouveau_display_destroy(dev);
481fail_dispctor:
77145f1c
BS
482 nouveau_bios_takedown(dev);
483fail_bios:
ebb945a9 484 nouveau_ttm_fini(drm);
77145f1c
BS
485fail_ttm:
486 nouveau_agp_fini(drm);
487 nouveau_vga_fini(drm);
94580299 488fail_device:
0ad72863 489 nvif_device_fini(&drm->device);
94580299
BS
490 nouveau_cli_destroy(&drm->client);
491 return ret;
492}
493
5b8a43ae 494static int
94580299
BS
495nouveau_drm_unload(struct drm_device *dev)
496{
77145f1c 497 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 498
5addcf0a 499 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
500 nouveau_fbcon_fini(dev);
501 nouveau_accel_fini(drm);
b9ed919f 502 nouveau_hwmon_fini(dev);
26fdd78c 503 nouveau_sysfs_fini(dev);
77145f1c 504
9430738d
BS
505 if (dev->mode_config.num_crtc)
506 nouveau_display_fini(dev);
77145f1c
BS
507 nouveau_display_destroy(dev);
508
77145f1c 509 nouveau_bios_takedown(dev);
94580299 510
ebb945a9 511 nouveau_ttm_fini(drm);
cb75d97e 512 nouveau_agp_fini(drm);
77145f1c 513 nouveau_vga_fini(drm);
cb75d97e 514
0ad72863 515 nvif_device_fini(&drm->device);
5addcf0a
DA
516 if (drm->hdmi_device)
517 pci_dev_put(drm->hdmi_device);
94580299
BS
518 nouveau_cli_destroy(&drm->client);
519 return 0;
520}
521
8ba9ff11
AC
522void
523nouveau_drm_device_remove(struct drm_device *dev)
94580299 524{
77145f1c 525 struct nouveau_drm *drm = nouveau_drm(dev);
0ad72863 526 struct nouveau_client *client;
ebb945a9 527 struct nouveau_object *device;
77145f1c 528
7d3428cd 529 dev->irq_enabled = false;
0ad72863
BS
530 client = nvkm_client(&drm->client.base);
531 device = client->device;
77145f1c
BS
532 drm_put_dev(dev);
533
ebb945a9
BS
534 nouveau_object_ref(NULL, &device);
535 nouveau_object_debug();
94580299 536}
8ba9ff11
AC
537
538static void
539nouveau_drm_remove(struct pci_dev *pdev)
540{
541 struct drm_device *dev = pci_get_drvdata(pdev);
542
543 nouveau_drm_device_remove(dev);
544}
94580299 545
cd897837 546static int
05c63c2f 547nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 548{
77145f1c 549 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
550 struct nouveau_cli *cli;
551 int ret;
552
6fbb702e
BS
553 if (dev->mode_config.num_crtc) {
554 NV_INFO(drm, "suspending console...\n");
555 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 556 NV_INFO(drm, "suspending display...\n");
6fbb702e 557 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
558 if (ret)
559 return ret;
560 }
94580299 561
c52f4fa6 562 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
563 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
564
c52f4fa6 565 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
566 if (drm->cechan) {
567 ret = nouveau_channel_idle(drm->cechan);
568 if (ret)
f3980dc5 569 goto fail_display;
81dff21b
BS
570 }
571
572 if (drm->channel) {
573 ret = nouveau_channel_idle(drm->channel);
574 if (ret)
f3980dc5 575 goto fail_display;
81dff21b
BS
576 }
577
c52f4fa6 578 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 579 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
580 if (!nouveau_fence(drm)->suspend(drm)) {
581 ret = -ENOMEM;
582 goto fail_display;
583 }
ebb945a9
BS
584 }
585
94580299 586 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 587 ret = nvif_client_suspend(&cli->base);
94580299
BS
588 if (ret)
589 goto fail_client;
590 }
591
c52f4fa6 592 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 593 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
594 if (ret)
595 goto fail_client;
596
cb75d97e 597 nouveau_agp_fini(drm);
94580299
BS
598 return 0;
599
600fail_client:
601 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 602 nvif_client_resume(&cli->base);
94580299
BS
603 }
604
f3980dc5
IM
605 if (drm->fence && nouveau_fence(drm)->resume)
606 nouveau_fence(drm)->resume(drm);
607
608fail_display:
9430738d 609 if (dev->mode_config.num_crtc) {
c52f4fa6 610 NV_INFO(drm, "resuming display...\n");
6fbb702e 611 nouveau_display_resume(dev, runtime);
9430738d 612 }
94580299
BS
613 return ret;
614}
615
cd897837 616static int
6fbb702e 617nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
618{
619 struct nouveau_drm *drm = nouveau_drm(dev);
620 struct nouveau_cli *cli;
621
c52f4fa6 622 NV_INFO(drm, "re-enabling device...\n");
94580299 623
cb75d97e
BS
624 nouveau_agp_reset(drm);
625
c52f4fa6 626 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 627 nvif_client_resume(&drm->client.base);
ebb945a9 628 nouveau_agp_init(drm);
94580299 629
c52f4fa6 630 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
631 if (drm->fence && nouveau_fence(drm)->resume)
632 nouveau_fence(drm)->resume(drm);
633
94580299 634 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 635 nvif_client_resume(&cli->base);
94580299 636 }
cb75d97e 637
77145f1c 638 nouveau_run_vbios_init(dev);
77145f1c 639
9430738d 640 if (dev->mode_config.num_crtc) {
c52f4fa6 641 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
642 nouveau_display_resume(dev, runtime);
643 NV_INFO(drm, "resuming console...\n");
644 nouveau_fbcon_set_suspend(dev, 0);
9430738d 645 }
5addcf0a 646
77145f1c 647 return 0;
94580299
BS
648}
649
7bb6d442
BS
650int
651nouveau_pmops_suspend(struct device *dev)
652{
653 struct pci_dev *pdev = to_pci_dev(dev);
654 struct drm_device *drm_dev = pci_get_drvdata(pdev);
655 int ret;
656
657 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
658 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
659 return 0;
660
661 ret = nouveau_do_suspend(drm_dev, false);
662 if (ret)
663 return ret;
664
665 pci_save_state(pdev);
666 pci_disable_device(pdev);
7bb6d442
BS
667 pci_set_power_state(pdev, PCI_D3hot);
668 return 0;
669}
670
671int
672nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
673{
674 struct pci_dev *pdev = to_pci_dev(dev);
675 struct drm_device *drm_dev = pci_get_drvdata(pdev);
676 int ret;
677
5addcf0a
DA
678 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
679 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
680 return 0;
681
682 pci_set_power_state(pdev, PCI_D0);
683 pci_restore_state(pdev);
684 ret = pci_enable_device(pdev);
685 if (ret)
686 return ret;
687 pci_set_master(pdev);
688
6fbb702e 689 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
690}
691
7bb6d442
BS
692static int
693nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
694{
695 struct pci_dev *pdev = to_pci_dev(dev);
696 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 697 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
698}
699
7bb6d442
BS
700static int
701nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
702{
703 struct pci_dev *pdev = to_pci_dev(dev);
704 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 705 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
706}
707
7bb6d442
BS
708static int
709nouveau_pmops_runtime_suspend(struct device *dev)
710{
711 struct pci_dev *pdev = to_pci_dev(dev);
712 struct drm_device *drm_dev = pci_get_drvdata(pdev);
713 int ret;
714
715 if (nouveau_runtime_pm == 0) {
716 pm_runtime_forbid(dev);
717 return -EBUSY;
718 }
719
720 /* are we optimus enabled? */
721 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
722 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
723 pm_runtime_forbid(dev);
724 return -EBUSY;
725 }
726
727 nv_debug_level(SILENT);
728 drm_kms_helper_poll_disable(drm_dev);
729 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
730 nouveau_switcheroo_optimus_dsm();
731 ret = nouveau_do_suspend(drm_dev, true);
732 pci_save_state(pdev);
733 pci_disable_device(pdev);
8c863944 734 pci_ignore_hotplug(pdev);
7bb6d442
BS
735 pci_set_power_state(pdev, PCI_D3cold);
736 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
737 return ret;
738}
739
740static int
741nouveau_pmops_runtime_resume(struct device *dev)
742{
743 struct pci_dev *pdev = to_pci_dev(dev);
744 struct drm_device *drm_dev = pci_get_drvdata(pdev);
745 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
746 int ret;
747
748 if (nouveau_runtime_pm == 0)
749 return -EINVAL;
750
751 pci_set_power_state(pdev, PCI_D0);
752 pci_restore_state(pdev);
753 ret = pci_enable_device(pdev);
754 if (ret)
755 return ret;
756 pci_set_master(pdev);
757
758 ret = nouveau_do_resume(drm_dev, true);
759 drm_kms_helper_poll_enable(drm_dev);
760 /* do magic */
761 nvif_mask(device, 0x88488, (1 << 25), (1 << 25));
762 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
763 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
764 nv_debug_level(NORMAL);
765 return ret;
766}
767
768static int
769nouveau_pmops_runtime_idle(struct device *dev)
770{
771 struct pci_dev *pdev = to_pci_dev(dev);
772 struct drm_device *drm_dev = pci_get_drvdata(pdev);
773 struct nouveau_drm *drm = nouveau_drm(drm_dev);
774 struct drm_crtc *crtc;
775
776 if (nouveau_runtime_pm == 0) {
777 pm_runtime_forbid(dev);
778 return -EBUSY;
779 }
780
781 /* are we optimus enabled? */
782 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
783 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
784 pm_runtime_forbid(dev);
785 return -EBUSY;
786 }
787
788 /* if we have a hdmi audio device - make sure it has a driver loaded */
789 if (drm->hdmi_device) {
790 if (!drm->hdmi_device->driver) {
791 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
792 pm_runtime_mark_last_busy(dev);
793 return -EBUSY;
794 }
795 }
796
797 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
798 if (crtc->enabled) {
799 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
800 return -EBUSY;
801 }
802 }
803 pm_runtime_mark_last_busy(dev);
804 pm_runtime_autosuspend(dev);
805 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
806 return 1;
807}
2d8b9ccb 808
5b8a43ae 809static int
ebb945a9
BS
810nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
811{
ebb945a9
BS
812 struct nouveau_drm *drm = nouveau_drm(dev);
813 struct nouveau_cli *cli;
a2896ced 814 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
815 int ret;
816
5addcf0a
DA
817 /* need to bring up power immediately if opening device */
818 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 819 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
820 return ret;
821
a2896ced
MS
822 get_task_comm(tmpname, current);
823 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 824
420b9469
AC
825 ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
826 (void **)&cli);
827
ebb945a9 828 if (ret)
5addcf0a 829 goto out_suspend;
ebb945a9 830
0ad72863
BS
831 cli->base.super = false;
832
967e7bde
BS
833 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
834 ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
3ee6f5b5 835 0x1000, &cli->vm);
ebb945a9
BS
836 if (ret) {
837 nouveau_cli_destroy(cli);
5addcf0a 838 goto out_suspend;
ebb945a9 839 }
3ee6f5b5 840
0ad72863 841 nvkm_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
842 }
843
844 fpriv->driver_priv = cli;
845
846 mutex_lock(&drm->client.mutex);
847 list_add(&cli->head, &drm->clients);
848 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
849
850out_suspend:
851 pm_runtime_mark_last_busy(dev->dev);
852 pm_runtime_put_autosuspend(dev->dev);
853
854 return ret;
ebb945a9
BS
855}
856
5b8a43ae 857static void
ebb945a9
BS
858nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
859{
860 struct nouveau_cli *cli = nouveau_cli(fpriv);
861 struct nouveau_drm *drm = nouveau_drm(dev);
862
5addcf0a
DA
863 pm_runtime_get_sync(dev->dev);
864
ebb945a9
BS
865 if (cli->abi16)
866 nouveau_abi16_fini(cli->abi16);
867
868 mutex_lock(&drm->client.mutex);
869 list_del(&cli->head);
870 mutex_unlock(&drm->client.mutex);
5addcf0a 871
ebb945a9
BS
872}
873
5b8a43ae 874static void
ebb945a9
BS
875nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
876{
877 struct nouveau_cli *cli = nouveau_cli(fpriv);
878 nouveau_cli_destroy(cli);
5addcf0a
DA
879 pm_runtime_mark_last_busy(dev->dev);
880 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
881}
882
baa70943 883static const struct drm_ioctl_desc
77145f1c 884nouveau_ioctls[] = {
7d761258 885 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c 886 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
7d761258
MP
887 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
889 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
890 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
891 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
892 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
893 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
894 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
895 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
896 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
897};
898
27111a23
BS
899long
900nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 901{
27111a23
BS
902 struct drm_file *filp = file->private_data;
903 struct drm_device *dev = filp->minor->dev;
5addcf0a 904 long ret;
5addcf0a
DA
905
906 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 907 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
908 return ret;
909
27111a23
BS
910 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
911 case DRM_NOUVEAU_NVIF:
912 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
913 break;
914 default:
915 ret = drm_ioctl(file, cmd, arg);
916 break;
917 }
5addcf0a
DA
918
919 pm_runtime_mark_last_busy(dev->dev);
920 pm_runtime_put_autosuspend(dev->dev);
921 return ret;
922}
27111a23 923
77145f1c
BS
924static const struct file_operations
925nouveau_driver_fops = {
926 .owner = THIS_MODULE,
927 .open = drm_open,
928 .release = drm_release,
5addcf0a 929 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
930 .mmap = nouveau_ttm_mmap,
931 .poll = drm_poll,
77145f1c
BS
932 .read = drm_read,
933#if defined(CONFIG_COMPAT)
934 .compat_ioctl = nouveau_compat_ioctl,
935#endif
936 .llseek = noop_llseek,
937};
938
939static struct drm_driver
915b4d11 940driver_stub = {
77145f1c 941 .driver_features =
4cb4ea39 942 DRIVER_USE_AGP |
7d761258 943 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
77145f1c
BS
944
945 .load = nouveau_drm_load,
946 .unload = nouveau_drm_unload,
947 .open = nouveau_drm_open,
948 .preclose = nouveau_drm_preclose,
949 .postclose = nouveau_drm_postclose,
950 .lastclose = nouveau_vga_lastclose,
951
33b903e8
MS
952#if defined(CONFIG_DEBUG_FS)
953 .debugfs_init = nouveau_debugfs_init,
954 .debugfs_cleanup = nouveau_debugfs_takedown,
955#endif
956
77145f1c 957 .get_vblank_counter = drm_vblank_count,
51cb4b39
BS
958 .enable_vblank = nouveau_display_vblank_enable,
959 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
960 .get_scanout_position = nouveau_display_scanoutpos,
961 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
962
963 .ioctls = nouveau_ioctls,
baa70943 964 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
965 .fops = &nouveau_driver_fops,
966
967 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
968 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
969 .gem_prime_export = drm_gem_prime_export,
970 .gem_prime_import = drm_gem_prime_import,
971 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 972 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 973 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
974 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
975 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
976 .gem_prime_vmap = nouveau_gem_prime_vmap,
977 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 978
77145f1c
BS
979 .gem_free_object = nouveau_gem_object_del,
980 .gem_open_object = nouveau_gem_object_open,
981 .gem_close_object = nouveau_gem_object_close,
982
983 .dumb_create = nouveau_display_dumb_create,
984 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 985 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
986
987 .name = DRIVER_NAME,
988 .desc = DRIVER_DESC,
989#ifdef GIT_REVISION
990 .date = GIT_REVISION,
991#else
992 .date = DRIVER_DATE,
993#endif
994 .major = DRIVER_MAJOR,
995 .minor = DRIVER_MINOR,
996 .patchlevel = DRIVER_PATCHLEVEL,
997};
998
94580299
BS
999static struct pci_device_id
1000nouveau_drm_pci_table[] = {
1001 {
1002 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1003 .class = PCI_BASE_CLASS_DISPLAY << 16,
1004 .class_mask = 0xff << 16,
1005 },
1006 {
1007 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1008 .class = PCI_BASE_CLASS_DISPLAY << 16,
1009 .class_mask = 0xff << 16,
1010 },
1011 {}
1012};
1013
703fa264
PM
1014static void nouveau_display_options(void)
1015{
1016 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1017
1018 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1019 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1020 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1021 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1022 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1023 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1024 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1025 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1026 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1027 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1028 DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate);
1029}
1030
2d8b9ccb
DA
1031static const struct dev_pm_ops nouveau_pm_ops = {
1032 .suspend = nouveau_pmops_suspend,
1033 .resume = nouveau_pmops_resume,
1034 .freeze = nouveau_pmops_freeze,
1035 .thaw = nouveau_pmops_thaw,
1036 .poweroff = nouveau_pmops_freeze,
1037 .restore = nouveau_pmops_resume,
5addcf0a
DA
1038 .runtime_suspend = nouveau_pmops_runtime_suspend,
1039 .runtime_resume = nouveau_pmops_runtime_resume,
1040 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1041};
1042
94580299
BS
1043static struct pci_driver
1044nouveau_drm_pci_driver = {
1045 .name = "nouveau",
1046 .id_table = nouveau_drm_pci_table,
1047 .probe = nouveau_drm_probe,
1048 .remove = nouveau_drm_remove,
2d8b9ccb 1049 .driver.pm = &nouveau_pm_ops,
94580299
BS
1050};
1051
8ba9ff11
AC
1052struct drm_device *
1053nouveau_platform_device_create_(struct platform_device *pdev, int size,
1054 void **pobject)
420b9469 1055{
8ba9ff11
AC
1056 struct drm_device *drm;
1057 int err;
420b9469 1058
8ba9ff11 1059 err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM,
420b9469
AC
1060 nouveau_platform_name(pdev),
1061 dev_name(&pdev->dev), nouveau_config,
8ba9ff11
AC
1062 nouveau_debug, size, pobject);
1063 if (err)
1064 return ERR_PTR(err);
1065
915b4d11 1066 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1067 if (!drm) {
1068 err = -ENOMEM;
1069 goto err_free;
420b9469
AC
1070 }
1071
8ba9ff11
AC
1072 err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
1073 if (err < 0)
1074 goto err_free;
1075
1076 drm->platformdev = pdev;
1077 platform_set_drvdata(pdev, drm);
1078
1079 return drm;
1080
1081err_free:
1082 nouveau_object_ref(NULL, (struct nouveau_object **)pobject);
1083
1084 return ERR_PTR(err);
420b9469
AC
1085}
1086
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1087static int __init
1088nouveau_drm_init(void)
1089{
915b4d11
DH
1090 driver_pci = driver_stub;
1091 driver_pci.set_busid = drm_pci_set_busid;
1092 driver_platform = driver_stub;
1093 driver_platform.set_busid = drm_platform_set_busid;
1094
703fa264
PM
1095 nouveau_display_options();
1096
77145f1c
BS
1097 if (nouveau_modeset == -1) {
1098#ifdef CONFIG_VGA_CONSOLE
1099 if (vgacon_text_force())
1100 nouveau_modeset = 0;
77145f1c 1101#endif
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1102 }
1103
1104 if (!nouveau_modeset)
1105 return 0;
1106
055a65d5
AC
1107#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1108 platform_driver_register(&nouveau_platform_driver);
1109#endif
1110
77145f1c 1111 nouveau_register_dsm_handler();
915b4d11 1112 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
94580299
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1113}
1114
1115static void __exit
1116nouveau_drm_exit(void)
1117{
77145f1c
BS
1118 if (!nouveau_modeset)
1119 return;
1120
915b4d11 1121 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1122 nouveau_unregister_dsm_handler();
055a65d5
AC
1123
1124#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1125 platform_driver_unregister(&nouveau_platform_driver);
1126#endif
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1127}
1128
1129module_init(nouveau_drm_init);
1130module_exit(nouveau_drm_exit);
1131
1132MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
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1133MODULE_AUTHOR(DRIVER_AUTHOR);
1134MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1135MODULE_LICENSE("GPL and additional rights");