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[people/arne_f/kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
5addcf0a
DA
32#include "drmP.h"
33#include "drm_crtc_helper.h"
fdb751ef 34
94580299 35#include <core/device.h>
ebb945a9 36#include <core/gpuobj.h>
c33e05a1 37#include <core/option.h>
94580299 38
94580299 39#include "nouveau_drm.h"
ebb945a9 40#include "nouveau_dma.h"
77145f1c
BS
41#include "nouveau_ttm.h"
42#include "nouveau_gem.h"
cb75d97e 43#include "nouveau_agp.h"
77145f1c 44#include "nouveau_vga.h"
26fdd78c 45#include "nouveau_sysfs.h"
b9ed919f 46#include "nouveau_hwmon.h"
77145f1c
BS
47#include "nouveau_acpi.h"
48#include "nouveau_bios.h"
49#include "nouveau_ioctl.h"
ebb945a9
BS
50#include "nouveau_abi16.h"
51#include "nouveau_fbcon.h"
52#include "nouveau_fence.h"
33b903e8 53#include "nouveau_debugfs.h"
27111a23 54#include "nouveau_usif.h"
703fa264 55#include "nouveau_connector.h"
055a65d5 56#include "nouveau_platform.h"
ebb945a9 57
94580299
BS
58MODULE_PARM_DESC(config, "option string to pass to driver core");
59static char *nouveau_config;
60module_param_named(config, nouveau_config, charp, 0400);
61
62MODULE_PARM_DESC(debug, "debug string to pass to driver core");
63static char *nouveau_debug;
64module_param_named(debug, nouveau_debug, charp, 0400);
65
ebb945a9
BS
66MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
67static int nouveau_noaccel = 0;
68module_param_named(noaccel, nouveau_noaccel, int, 0400);
69
9430738d
BS
70MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
71 "0 = disabled, 1 = enabled, 2 = headless)");
72int nouveau_modeset = -1;
77145f1c
BS
73module_param_named(modeset, nouveau_modeset, int, 0400);
74
5addcf0a
DA
75MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
76int nouveau_runtime_pm = -1;
77module_param_named(runpm, nouveau_runtime_pm, int, 0400);
78
915b4d11
DH
79static struct drm_driver driver_stub;
80static struct drm_driver driver_pci;
81static struct drm_driver driver_platform;
77145f1c 82
94580299 83static u64
420b9469 84nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
85{
86 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
87 name |= pdev->bus->number << 16;
88 name |= PCI_SLOT(pdev->devfn) << 8;
89 return name | PCI_FUNC(pdev->devfn);
90}
91
420b9469
AC
92static u64
93nouveau_platform_name(struct platform_device *platformdev)
94{
95 return platformdev->id;
96}
97
98static u64
99nouveau_name(struct drm_device *dev)
100{
101 if (dev->pdev)
102 return nouveau_pci_name(dev->pdev);
103 else
104 return nouveau_platform_name(dev->platformdev);
105}
106
94580299 107static int
420b9469 108nouveau_cli_create(u64 name, const char *sname,
fa6df8c1 109 int size, void **pcli)
94580299 110{
0ad72863
BS
111 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
112 if (cli) {
113 int ret = nvif_client_init(NULL, NULL, sname, name,
114 nouveau_config, nouveau_debug,
115 &cli->base);
27111a23 116 if (ret == 0) {
0ad72863 117 mutex_init(&cli->mutex);
27111a23
BS
118 usif_client_init(cli);
119 }
94580299 120 return ret;
dd5700ea 121 }
0ad72863 122 return -ENOMEM;
94580299
BS
123}
124
125static void
126nouveau_cli_destroy(struct nouveau_cli *cli)
127{
be83cd4e 128 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
0ad72863 129 nvif_client_fini(&cli->base);
27111a23 130 usif_client_fini(cli);
94580299
BS
131}
132
ebb945a9
BS
133static void
134nouveau_accel_fini(struct nouveau_drm *drm)
135{
ebb945a9 136 nouveau_channel_del(&drm->channel);
0ad72863 137 nvif_object_fini(&drm->ntfy);
be83cd4e 138 nvkm_gpuobj_ref(NULL, &drm->notify);
0ad72863 139 nvif_object_fini(&drm->nvsw);
49981046 140 nouveau_channel_del(&drm->cechan);
0ad72863 141 nvif_object_fini(&drm->ttm.copy);
ebb945a9
BS
142 if (drm->fence)
143 nouveau_fence(drm)->dtor(drm);
144}
145
146static void
147nouveau_accel_init(struct nouveau_drm *drm)
148{
967e7bde 149 struct nvif_device *device = &drm->device;
49981046 150 u32 arg0, arg1;
967e7bde
BS
151 u32 sclass[16];
152 int ret, i;
ebb945a9 153
967e7bde 154 if (nouveau_noaccel)
ebb945a9
BS
155 return;
156
157 /* initialise synchronisation routines */
967e7bde
BS
158 /*XXX: this is crap, but the fence/channel stuff is a little
159 * backwards in some places. this will be fixed.
160 */
0ad72863 161 ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass));
967e7bde
BS
162 if (ret < 0)
163 return;
164
165 for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) {
166 switch (sclass[i]) {
bbf8906b 167 case NV03_CHANNEL_DMA:
967e7bde
BS
168 ret = nv04_fence_create(drm);
169 break;
bbf8906b 170 case NV10_CHANNEL_DMA:
967e7bde
BS
171 ret = nv10_fence_create(drm);
172 break;
bbf8906b
BS
173 case NV17_CHANNEL_DMA:
174 case NV40_CHANNEL_DMA:
967e7bde
BS
175 ret = nv17_fence_create(drm);
176 break;
bbf8906b 177 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
178 ret = nv50_fence_create(drm);
179 break;
bbf8906b 180 case G82_CHANNEL_GPFIFO:
967e7bde
BS
181 ret = nv84_fence_create(drm);
182 break;
bbf8906b
BS
183 case FERMI_CHANNEL_GPFIFO:
184 case KEPLER_CHANNEL_GPFIFO_A:
a1020afe 185 case MAXWELL_CHANNEL_GPFIFO_A:
967e7bde
BS
186 ret = nvc0_fence_create(drm);
187 break;
188 default:
189 break;
190 }
191 }
192
ebb945a9
BS
193 if (ret) {
194 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
195 nouveau_accel_fini(drm);
196 return;
197 }
198
967e7bde 199 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
0ad72863 200 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
bbf8906b
BS
201 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
202 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
203 0, &drm->cechan);
49981046
BS
204 if (ret)
205 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
206
bbf8906b 207 arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
49469800 208 arg1 = 1;
00fc6f6f 209 } else
967e7bde
BS
210 if (device->info.chipset >= 0xa3 &&
211 device->info.chipset != 0xaa &&
212 device->info.chipset != 0xac) {
0ad72863
BS
213 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
214 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
215 if (ret)
216 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
217
218 arg0 = NvDmaFB;
219 arg1 = NvDmaTT;
49981046
BS
220 } else {
221 arg0 = NvDmaFB;
222 arg1 = NvDmaTT;
223 }
224
0ad72863
BS
225 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
226 &drm->channel);
ebb945a9
BS
227 if (ret) {
228 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
229 nouveau_accel_fini(drm);
230 return;
231 }
232
0ad72863
BS
233 ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
234 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 235 if (ret == 0) {
be83cd4e 236 struct nvkm_sw_chan *swch;
69a6146d
BS
237 ret = RING_SPACE(drm->channel, 2);
238 if (ret == 0) {
967e7bde 239 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
240 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
241 OUT_RING (drm->channel, NVDRM_NVSW);
242 } else
967e7bde 243 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
244 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
245 OUT_RING (drm->channel, 0x001f0000);
246 }
247 }
989aa5b7 248 swch = (void *)nvxx_object(&drm->nvsw)->parent;
69a6146d
BS
249 swch->flip = nouveau_flip_complete;
250 swch->flip_data = drm->channel;
251 }
252
253 if (ret) {
254 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
255 nouveau_accel_fini(drm);
256 return;
257 }
258
967e7bde 259 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
be83cd4e
BS
260 ret = nvkm_gpuobj_new(nvxx_object(&drm->device), NULL, 32,
261 0, 0, &drm->notify);
ebb945a9
BS
262 if (ret) {
263 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
264 nouveau_accel_fini(drm);
265 return;
266 }
267
0ad72863 268 ret = nvif_object_init(drm->channel->object, NULL, NvNotify0,
4acfd707
BS
269 NV_DMA_IN_MEMORY,
270 &(struct nv_dma_v0) {
271 .target = NV_DMA_V0_TARGET_VRAM,
272 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
273 .start = drm->notify->addr,
274 .limit = drm->notify->addr + 31
4acfd707 275 }, sizeof(struct nv_dma_v0),
0ad72863 276 &drm->ntfy);
ebb945a9
BS
277 if (ret) {
278 nouveau_accel_fini(drm);
279 return;
280 }
281 }
282
283
49981046 284 nouveau_bo_move_init(drm);
ebb945a9
BS
285}
286
56550d94
GKH
287static int nouveau_drm_probe(struct pci_dev *pdev,
288 const struct pci_device_id *pent)
94580299 289{
be83cd4e 290 struct nvkm_device *device;
ebb945a9
BS
291 struct apertures_struct *aper;
292 bool boot = false;
94580299
BS
293 int ret;
294
ebb945a9
BS
295 /* remove conflicting drivers (vesafb, efifb etc) */
296 aper = alloc_apertures(3);
297 if (!aper)
298 return -ENOMEM;
299
300 aper->ranges[0].base = pci_resource_start(pdev, 1);
301 aper->ranges[0].size = pci_resource_len(pdev, 1);
302 aper->count = 1;
303
304 if (pci_resource_len(pdev, 2)) {
305 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
306 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
307 aper->count++;
308 }
309
310 if (pci_resource_len(pdev, 3)) {
311 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
312 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
313 aper->count++;
314 }
315
316#ifdef CONFIG_X86
317 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
318#endif
771fa0e4
BS
319 if (nouveau_modeset != 2)
320 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 321 kfree(aper);
ebb945a9 322
be83cd4e
BS
323 ret = nvkm_device_create(pdev, NVKM_BUS_PCI,
324 nouveau_pci_name(pdev), pci_name(pdev),
325 nouveau_config, nouveau_debug, &device);
94580299
BS
326 if (ret)
327 return ret;
328
329 pci_set_master(pdev);
330
915b4d11 331 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 332 if (ret) {
be83cd4e 333 nvkm_object_ref(NULL, (struct nvkm_object **)&device);
94580299
BS
334 return ret;
335 }
336
337 return 0;
338}
339
5addcf0a
DA
340#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
341
342static void
46941b0f 343nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 344{
46941b0f 345 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 346
420b9469 347 if (!pdev) {
40189b0c 348 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
349 drm->hdmi_device = NULL;
350 return;
351 }
352
5addcf0a
DA
353 /* subfunction one is a hdmi audio device? */
354 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
355 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
356
357 if (!drm->hdmi_device) {
46941b0f 358 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
359 return;
360 }
361
362 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 363 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
364 pci_dev_put(drm->hdmi_device);
365 drm->hdmi_device = NULL;
366 return;
367 }
368}
369
5b8a43ae 370static int
94580299
BS
371nouveau_drm_load(struct drm_device *dev, unsigned long flags)
372{
373 struct pci_dev *pdev = dev->pdev;
374 struct nouveau_drm *drm;
375 int ret;
376
420b9469
AC
377 ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
378 (void **)&drm);
94580299
BS
379 if (ret)
380 return ret;
381
77145f1c
BS
382 dev->dev_private = drm;
383 drm->dev = dev;
989aa5b7 384 nvxx_client(&drm->client.base)->debug =
be83cd4e 385 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 386
94580299 387 INIT_LIST_HEAD(&drm->clients);
ebb945a9 388 spin_lock_init(&drm->tile.lock);
94580299 389
46941b0f 390 nouveau_get_hdmi_dev(drm);
5addcf0a 391
cb75d97e
BS
392 /* make sure AGP controller is in a consistent state before we
393 * (possibly) execute vbios init tables (see nouveau_agp.h)
394 */
420b9469 395 if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
586491e6
BS
396 const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY |
397 NV_DEVICE_V0_DISABLE_MMIO;
cb75d97e
BS
398 /* dummy device object, doesn't init anything, but allows
399 * agp code access to registers
400 */
0ad72863 401 ret = nvif_device_init(&drm->client.base.base, NULL,
586491e6
BS
402 NVDRM_DEVICE, NV_DEVICE,
403 &(struct nv_device_v0) {
cb75d97e 404 .device = ~0,
586491e6 405 .disable = ~enables,
cb75d97e 406 .debug0 = ~0,
586491e6 407 }, sizeof(struct nv_device_v0),
0ad72863 408 &drm->device);
cb75d97e 409 if (ret)
ebb945a9 410 goto fail_device;
cb75d97e
BS
411
412 nouveau_agp_reset(drm);
0ad72863 413 nvif_device_fini(&drm->device);
cb75d97e
BS
414 }
415
0ad72863 416 ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE,
586491e6
BS
417 NV_DEVICE,
418 &(struct nv_device_v0) {
94580299
BS
419 .device = ~0,
420 .disable = 0,
421 .debug0 = 0,
586491e6 422 }, sizeof(struct nv_device_v0),
0ad72863 423 &drm->device);
94580299
BS
424 if (ret)
425 goto fail_device;
426
7d3428cd
IM
427 dev->irq_enabled = true;
428
77145f1c
BS
429 /* workaround an odd issue on nvc1 by disabling the device's
430 * nosnoop capability. hopefully won't cause issues until a
431 * better fix is found - assuming there is one...
432 */
967e7bde
BS
433 if (drm->device.info.chipset == 0xc1)
434 nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 435
77145f1c 436 nouveau_vga_init(drm);
cb75d97e
BS
437 nouveau_agp_init(drm);
438
967e7bde 439 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e
BS
440 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
441 0x1000, &drm->client.vm);
ebb945a9
BS
442 if (ret)
443 goto fail_device;
3ee6f5b5 444
989aa5b7 445 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
446 }
447
448 ret = nouveau_ttm_init(drm);
94580299 449 if (ret)
77145f1c
BS
450 goto fail_ttm;
451
452 ret = nouveau_bios_init(dev);
453 if (ret)
454 goto fail_bios;
455
77145f1c 456 ret = nouveau_display_create(dev);
ebb945a9 457 if (ret)
77145f1c
BS
458 goto fail_dispctor;
459
460 if (dev->mode_config.num_crtc) {
461 ret = nouveau_display_init(dev);
462 if (ret)
463 goto fail_dispinit;
464 }
465
26fdd78c 466 nouveau_sysfs_init(dev);
b9ed919f 467 nouveau_hwmon_init(dev);
ebb945a9
BS
468 nouveau_accel_init(drm);
469 nouveau_fbcon_init(dev);
5addcf0a
DA
470
471 if (nouveau_runtime_pm != 0) {
472 pm_runtime_use_autosuspend(dev->dev);
473 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
474 pm_runtime_set_active(dev->dev);
475 pm_runtime_allow(dev->dev);
476 pm_runtime_mark_last_busy(dev->dev);
477 pm_runtime_put(dev->dev);
478 }
94580299
BS
479 return 0;
480
77145f1c
BS
481fail_dispinit:
482 nouveau_display_destroy(dev);
483fail_dispctor:
77145f1c
BS
484 nouveau_bios_takedown(dev);
485fail_bios:
ebb945a9 486 nouveau_ttm_fini(drm);
77145f1c
BS
487fail_ttm:
488 nouveau_agp_fini(drm);
489 nouveau_vga_fini(drm);
94580299 490fail_device:
0ad72863 491 nvif_device_fini(&drm->device);
94580299
BS
492 nouveau_cli_destroy(&drm->client);
493 return ret;
494}
495
5b8a43ae 496static int
94580299
BS
497nouveau_drm_unload(struct drm_device *dev)
498{
77145f1c 499 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 500
5addcf0a 501 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
502 nouveau_fbcon_fini(dev);
503 nouveau_accel_fini(drm);
b9ed919f 504 nouveau_hwmon_fini(dev);
26fdd78c 505 nouveau_sysfs_fini(dev);
77145f1c 506
9430738d
BS
507 if (dev->mode_config.num_crtc)
508 nouveau_display_fini(dev);
77145f1c
BS
509 nouveau_display_destroy(dev);
510
77145f1c 511 nouveau_bios_takedown(dev);
94580299 512
ebb945a9 513 nouveau_ttm_fini(drm);
cb75d97e 514 nouveau_agp_fini(drm);
77145f1c 515 nouveau_vga_fini(drm);
cb75d97e 516
0ad72863 517 nvif_device_fini(&drm->device);
5addcf0a
DA
518 if (drm->hdmi_device)
519 pci_dev_put(drm->hdmi_device);
94580299
BS
520 nouveau_cli_destroy(&drm->client);
521 return 0;
522}
523
8ba9ff11
AC
524void
525nouveau_drm_device_remove(struct drm_device *dev)
94580299 526{
77145f1c 527 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e
BS
528 struct nvkm_client *client;
529 struct nvkm_object *device;
77145f1c 530
7d3428cd 531 dev->irq_enabled = false;
989aa5b7 532 client = nvxx_client(&drm->client.base);
0ad72863 533 device = client->device;
77145f1c
BS
534 drm_put_dev(dev);
535
be83cd4e
BS
536 nvkm_object_ref(NULL, &device);
537 nvkm_object_debug();
94580299 538}
8ba9ff11
AC
539
540static void
541nouveau_drm_remove(struct pci_dev *pdev)
542{
543 struct drm_device *dev = pci_get_drvdata(pdev);
544
545 nouveau_drm_device_remove(dev);
546}
94580299 547
cd897837 548static int
05c63c2f 549nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 550{
77145f1c 551 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
552 struct nouveau_cli *cli;
553 int ret;
554
6fbb702e
BS
555 if (dev->mode_config.num_crtc) {
556 NV_INFO(drm, "suspending console...\n");
557 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 558 NV_INFO(drm, "suspending display...\n");
6fbb702e 559 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
560 if (ret)
561 return ret;
562 }
94580299 563
c52f4fa6 564 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
565 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
566
c52f4fa6 567 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
568 if (drm->cechan) {
569 ret = nouveau_channel_idle(drm->cechan);
570 if (ret)
f3980dc5 571 goto fail_display;
81dff21b
BS
572 }
573
574 if (drm->channel) {
575 ret = nouveau_channel_idle(drm->channel);
576 if (ret)
f3980dc5 577 goto fail_display;
81dff21b
BS
578 }
579
c52f4fa6 580 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 581 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
582 if (!nouveau_fence(drm)->suspend(drm)) {
583 ret = -ENOMEM;
584 goto fail_display;
585 }
ebb945a9
BS
586 }
587
94580299 588 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 589 ret = nvif_client_suspend(&cli->base);
94580299
BS
590 if (ret)
591 goto fail_client;
592 }
593
c52f4fa6 594 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 595 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
596 if (ret)
597 goto fail_client;
598
cb75d97e 599 nouveau_agp_fini(drm);
94580299
BS
600 return 0;
601
602fail_client:
603 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 604 nvif_client_resume(&cli->base);
94580299
BS
605 }
606
f3980dc5
IM
607 if (drm->fence && nouveau_fence(drm)->resume)
608 nouveau_fence(drm)->resume(drm);
609
610fail_display:
9430738d 611 if (dev->mode_config.num_crtc) {
c52f4fa6 612 NV_INFO(drm, "resuming display...\n");
6fbb702e 613 nouveau_display_resume(dev, runtime);
9430738d 614 }
94580299
BS
615 return ret;
616}
617
cd897837 618static int
6fbb702e 619nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
620{
621 struct nouveau_drm *drm = nouveau_drm(dev);
622 struct nouveau_cli *cli;
623
c52f4fa6 624 NV_INFO(drm, "re-enabling device...\n");
94580299 625
cb75d97e
BS
626 nouveau_agp_reset(drm);
627
c52f4fa6 628 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 629 nvif_client_resume(&drm->client.base);
ebb945a9 630 nouveau_agp_init(drm);
94580299 631
c52f4fa6 632 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
633 if (drm->fence && nouveau_fence(drm)->resume)
634 nouveau_fence(drm)->resume(drm);
635
94580299 636 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 637 nvif_client_resume(&cli->base);
94580299 638 }
cb75d97e 639
77145f1c 640 nouveau_run_vbios_init(dev);
77145f1c 641
9430738d 642 if (dev->mode_config.num_crtc) {
c52f4fa6 643 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
644 nouveau_display_resume(dev, runtime);
645 NV_INFO(drm, "resuming console...\n");
646 nouveau_fbcon_set_suspend(dev, 0);
9430738d 647 }
5addcf0a 648
77145f1c 649 return 0;
94580299
BS
650}
651
7bb6d442
BS
652int
653nouveau_pmops_suspend(struct device *dev)
654{
655 struct pci_dev *pdev = to_pci_dev(dev);
656 struct drm_device *drm_dev = pci_get_drvdata(pdev);
657 int ret;
658
659 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
660 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
661 return 0;
662
663 ret = nouveau_do_suspend(drm_dev, false);
664 if (ret)
665 return ret;
666
667 pci_save_state(pdev);
668 pci_disable_device(pdev);
7bb6d442 669 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 670 udelay(200);
7bb6d442
BS
671 return 0;
672}
673
674int
675nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
676{
677 struct pci_dev *pdev = to_pci_dev(dev);
678 struct drm_device *drm_dev = pci_get_drvdata(pdev);
679 int ret;
680
5addcf0a
DA
681 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
682 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
683 return 0;
684
685 pci_set_power_state(pdev, PCI_D0);
686 pci_restore_state(pdev);
687 ret = pci_enable_device(pdev);
688 if (ret)
689 return ret;
690 pci_set_master(pdev);
691
6fbb702e 692 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
693}
694
7bb6d442
BS
695static int
696nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
697{
698 struct pci_dev *pdev = to_pci_dev(dev);
699 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 700 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
701}
702
7bb6d442
BS
703static int
704nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
705{
706 struct pci_dev *pdev = to_pci_dev(dev);
707 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 708 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
709}
710
7bb6d442
BS
711static int
712nouveau_pmops_runtime_suspend(struct device *dev)
713{
714 struct pci_dev *pdev = to_pci_dev(dev);
715 struct drm_device *drm_dev = pci_get_drvdata(pdev);
716 int ret;
717
718 if (nouveau_runtime_pm == 0) {
719 pm_runtime_forbid(dev);
720 return -EBUSY;
721 }
722
723 /* are we optimus enabled? */
724 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
725 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
726 pm_runtime_forbid(dev);
727 return -EBUSY;
728 }
729
730 nv_debug_level(SILENT);
731 drm_kms_helper_poll_disable(drm_dev);
732 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
733 nouveau_switcheroo_optimus_dsm();
734 ret = nouveau_do_suspend(drm_dev, true);
735 pci_save_state(pdev);
736 pci_disable_device(pdev);
8c863944 737 pci_ignore_hotplug(pdev);
7bb6d442
BS
738 pci_set_power_state(pdev, PCI_D3cold);
739 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
740 return ret;
741}
742
743static int
744nouveau_pmops_runtime_resume(struct device *dev)
745{
746 struct pci_dev *pdev = to_pci_dev(dev);
747 struct drm_device *drm_dev = pci_get_drvdata(pdev);
748 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
749 int ret;
750
751 if (nouveau_runtime_pm == 0)
752 return -EINVAL;
753
754 pci_set_power_state(pdev, PCI_D0);
755 pci_restore_state(pdev);
756 ret = pci_enable_device(pdev);
757 if (ret)
758 return ret;
759 pci_set_master(pdev);
760
761 ret = nouveau_do_resume(drm_dev, true);
762 drm_kms_helper_poll_enable(drm_dev);
763 /* do magic */
764 nvif_mask(device, 0x88488, (1 << 25), (1 << 25));
765 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
766 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
767 nv_debug_level(NORMAL);
768 return ret;
769}
770
771static int
772nouveau_pmops_runtime_idle(struct device *dev)
773{
774 struct pci_dev *pdev = to_pci_dev(dev);
775 struct drm_device *drm_dev = pci_get_drvdata(pdev);
776 struct nouveau_drm *drm = nouveau_drm(drm_dev);
777 struct drm_crtc *crtc;
778
779 if (nouveau_runtime_pm == 0) {
780 pm_runtime_forbid(dev);
781 return -EBUSY;
782 }
783
784 /* are we optimus enabled? */
785 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
786 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
787 pm_runtime_forbid(dev);
788 return -EBUSY;
789 }
790
791 /* if we have a hdmi audio device - make sure it has a driver loaded */
792 if (drm->hdmi_device) {
793 if (!drm->hdmi_device->driver) {
794 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
795 pm_runtime_mark_last_busy(dev);
796 return -EBUSY;
797 }
798 }
799
800 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
801 if (crtc->enabled) {
802 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
803 return -EBUSY;
804 }
805 }
806 pm_runtime_mark_last_busy(dev);
807 pm_runtime_autosuspend(dev);
808 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
809 return 1;
810}
2d8b9ccb 811
5b8a43ae 812static int
ebb945a9
BS
813nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
814{
ebb945a9
BS
815 struct nouveau_drm *drm = nouveau_drm(dev);
816 struct nouveau_cli *cli;
a2896ced 817 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
818 int ret;
819
5addcf0a
DA
820 /* need to bring up power immediately if opening device */
821 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 822 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
823 return ret;
824
a2896ced
MS
825 get_task_comm(tmpname, current);
826 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 827
420b9469
AC
828 ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
829 (void **)&cli);
830
ebb945a9 831 if (ret)
5addcf0a 832 goto out_suspend;
ebb945a9 833
0ad72863
BS
834 cli->base.super = false;
835
967e7bde 836 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e
BS
837 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
838 0x1000, &cli->vm);
ebb945a9
BS
839 if (ret) {
840 nouveau_cli_destroy(cli);
5addcf0a 841 goto out_suspend;
ebb945a9 842 }
3ee6f5b5 843
989aa5b7 844 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
845 }
846
847 fpriv->driver_priv = cli;
848
849 mutex_lock(&drm->client.mutex);
850 list_add(&cli->head, &drm->clients);
851 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
852
853out_suspend:
854 pm_runtime_mark_last_busy(dev->dev);
855 pm_runtime_put_autosuspend(dev->dev);
856
857 return ret;
ebb945a9
BS
858}
859
5b8a43ae 860static void
ebb945a9
BS
861nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
862{
863 struct nouveau_cli *cli = nouveau_cli(fpriv);
864 struct nouveau_drm *drm = nouveau_drm(dev);
865
5addcf0a
DA
866 pm_runtime_get_sync(dev->dev);
867
ebb945a9
BS
868 if (cli->abi16)
869 nouveau_abi16_fini(cli->abi16);
870
871 mutex_lock(&drm->client.mutex);
872 list_del(&cli->head);
873 mutex_unlock(&drm->client.mutex);
5addcf0a 874
ebb945a9
BS
875}
876
5b8a43ae 877static void
ebb945a9
BS
878nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
879{
880 struct nouveau_cli *cli = nouveau_cli(fpriv);
881 nouveau_cli_destroy(cli);
5addcf0a
DA
882 pm_runtime_mark_last_busy(dev->dev);
883 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
884}
885
baa70943 886static const struct drm_ioctl_desc
77145f1c 887nouveau_ioctls[] = {
7d761258 888 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c 889 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
7d761258
MP
890 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
891 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
892 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
893 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
894 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
895 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
896 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
897 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
898 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
899 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
900};
901
27111a23
BS
902long
903nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 904{
27111a23
BS
905 struct drm_file *filp = file->private_data;
906 struct drm_device *dev = filp->minor->dev;
5addcf0a 907 long ret;
5addcf0a
DA
908
909 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 910 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
911 return ret;
912
27111a23
BS
913 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
914 case DRM_NOUVEAU_NVIF:
915 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
916 break;
917 default:
918 ret = drm_ioctl(file, cmd, arg);
919 break;
920 }
5addcf0a
DA
921
922 pm_runtime_mark_last_busy(dev->dev);
923 pm_runtime_put_autosuspend(dev->dev);
924 return ret;
925}
27111a23 926
77145f1c
BS
927static const struct file_operations
928nouveau_driver_fops = {
929 .owner = THIS_MODULE,
930 .open = drm_open,
931 .release = drm_release,
5addcf0a 932 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
933 .mmap = nouveau_ttm_mmap,
934 .poll = drm_poll,
77145f1c
BS
935 .read = drm_read,
936#if defined(CONFIG_COMPAT)
937 .compat_ioctl = nouveau_compat_ioctl,
938#endif
939 .llseek = noop_llseek,
940};
941
942static struct drm_driver
915b4d11 943driver_stub = {
77145f1c 944 .driver_features =
4cb4ea39 945 DRIVER_USE_AGP |
7d761258 946 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
77145f1c
BS
947
948 .load = nouveau_drm_load,
949 .unload = nouveau_drm_unload,
950 .open = nouveau_drm_open,
951 .preclose = nouveau_drm_preclose,
952 .postclose = nouveau_drm_postclose,
953 .lastclose = nouveau_vga_lastclose,
954
33b903e8
MS
955#if defined(CONFIG_DEBUG_FS)
956 .debugfs_init = nouveau_debugfs_init,
957 .debugfs_cleanup = nouveau_debugfs_takedown,
958#endif
959
77145f1c 960 .get_vblank_counter = drm_vblank_count,
51cb4b39
BS
961 .enable_vblank = nouveau_display_vblank_enable,
962 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
963 .get_scanout_position = nouveau_display_scanoutpos,
964 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
965
966 .ioctls = nouveau_ioctls,
baa70943 967 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
968 .fops = &nouveau_driver_fops,
969
970 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
971 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
972 .gem_prime_export = drm_gem_prime_export,
973 .gem_prime_import = drm_gem_prime_import,
974 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 975 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 976 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
977 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
978 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
979 .gem_prime_vmap = nouveau_gem_prime_vmap,
980 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 981
77145f1c
BS
982 .gem_free_object = nouveau_gem_object_del,
983 .gem_open_object = nouveau_gem_object_open,
984 .gem_close_object = nouveau_gem_object_close,
985
986 .dumb_create = nouveau_display_dumb_create,
987 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 988 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
989
990 .name = DRIVER_NAME,
991 .desc = DRIVER_DESC,
992#ifdef GIT_REVISION
993 .date = GIT_REVISION,
994#else
995 .date = DRIVER_DATE,
996#endif
997 .major = DRIVER_MAJOR,
998 .minor = DRIVER_MINOR,
999 .patchlevel = DRIVER_PATCHLEVEL,
1000};
1001
94580299
BS
1002static struct pci_device_id
1003nouveau_drm_pci_table[] = {
1004 {
1005 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1006 .class = PCI_BASE_CLASS_DISPLAY << 16,
1007 .class_mask = 0xff << 16,
1008 },
1009 {
1010 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1011 .class = PCI_BASE_CLASS_DISPLAY << 16,
1012 .class_mask = 0xff << 16,
1013 },
1014 {}
1015};
1016
703fa264
PM
1017static void nouveau_display_options(void)
1018{
1019 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1020
1021 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1022 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1023 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1024 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1025 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1026 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1027 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1028 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1029 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1030 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1031 DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate);
1032}
1033
2d8b9ccb
DA
1034static const struct dev_pm_ops nouveau_pm_ops = {
1035 .suspend = nouveau_pmops_suspend,
1036 .resume = nouveau_pmops_resume,
1037 .freeze = nouveau_pmops_freeze,
1038 .thaw = nouveau_pmops_thaw,
1039 .poweroff = nouveau_pmops_freeze,
1040 .restore = nouveau_pmops_resume,
5addcf0a
DA
1041 .runtime_suspend = nouveau_pmops_runtime_suspend,
1042 .runtime_resume = nouveau_pmops_runtime_resume,
1043 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1044};
1045
94580299
BS
1046static struct pci_driver
1047nouveau_drm_pci_driver = {
1048 .name = "nouveau",
1049 .id_table = nouveau_drm_pci_table,
1050 .probe = nouveau_drm_probe,
1051 .remove = nouveau_drm_remove,
2d8b9ccb 1052 .driver.pm = &nouveau_pm_ops,
94580299
BS
1053};
1054
8ba9ff11
AC
1055struct drm_device *
1056nouveau_platform_device_create_(struct platform_device *pdev, int size,
1057 void **pobject)
420b9469 1058{
8ba9ff11
AC
1059 struct drm_device *drm;
1060 int err;
420b9469 1061
be83cd4e
BS
1062 err = nvkm_device_create_(pdev, NVKM_BUS_PLATFORM,
1063 nouveau_platform_name(pdev),
1064 dev_name(&pdev->dev), nouveau_config,
1065 nouveau_debug, size, pobject);
8ba9ff11
AC
1066 if (err)
1067 return ERR_PTR(err);
1068
915b4d11 1069 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1070 if (!drm) {
1071 err = -ENOMEM;
1072 goto err_free;
420b9469
AC
1073 }
1074
8ba9ff11
AC
1075 err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
1076 if (err < 0)
1077 goto err_free;
1078
1079 drm->platformdev = pdev;
1080 platform_set_drvdata(pdev, drm);
1081
1082 return drm;
1083
1084err_free:
be83cd4e 1085 nvkm_object_ref(NULL, (struct nvkm_object **)pobject);
8ba9ff11
AC
1086
1087 return ERR_PTR(err);
420b9469
AC
1088}
1089
94580299
BS
1090static int __init
1091nouveau_drm_init(void)
1092{
915b4d11
DH
1093 driver_pci = driver_stub;
1094 driver_pci.set_busid = drm_pci_set_busid;
1095 driver_platform = driver_stub;
1096 driver_platform.set_busid = drm_platform_set_busid;
1097
703fa264
PM
1098 nouveau_display_options();
1099
77145f1c
BS
1100 if (nouveau_modeset == -1) {
1101#ifdef CONFIG_VGA_CONSOLE
1102 if (vgacon_text_force())
1103 nouveau_modeset = 0;
77145f1c 1104#endif
77145f1c
BS
1105 }
1106
1107 if (!nouveau_modeset)
1108 return 0;
1109
055a65d5
AC
1110#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1111 platform_driver_register(&nouveau_platform_driver);
1112#endif
1113
77145f1c 1114 nouveau_register_dsm_handler();
915b4d11 1115 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
94580299
BS
1116}
1117
1118static void __exit
1119nouveau_drm_exit(void)
1120{
77145f1c
BS
1121 if (!nouveau_modeset)
1122 return;
1123
915b4d11 1124 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1125 nouveau_unregister_dsm_handler();
055a65d5
AC
1126
1127#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1128 platform_driver_unregister(&nouveau_platform_driver);
1129#endif
94580299
BS
1130}
1131
1132module_init(nouveau_drm_init);
1133module_exit(nouveau_drm_exit);
1134
1135MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
77145f1c
BS
1136MODULE_AUTHOR(DRIVER_AUTHOR);
1137MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1138MODULE_LICENSE("GPL and additional rights");