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[people/arne_f/kernel.git] / drivers / gpu / drm / nouveau / nouveau_drm.c
CommitLineData
94580299
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
77145f1c 25#include <linux/console.h>
c5fd936e 26#include <linux/delay.h>
94580299
BS
27#include <linux/module.h>
28#include <linux/pci.h>
5addcf0a
DA
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
fdb751ef 31
5addcf0a
DA
32#include "drmP.h"
33#include "drm_crtc_helper.h"
fdb751ef 34
ebb945a9 35#include <core/gpuobj.h>
c33e05a1 36#include <core/option.h>
7974dd1b
BS
37#include <core/pci.h>
38#include <core/tegra.h>
94580299 39
94580299 40#include "nouveau_drm.h"
ebb945a9 41#include "nouveau_dma.h"
77145f1c
BS
42#include "nouveau_ttm.h"
43#include "nouveau_gem.h"
cb75d97e 44#include "nouveau_agp.h"
77145f1c 45#include "nouveau_vga.h"
26fdd78c 46#include "nouveau_sysfs.h"
b9ed919f 47#include "nouveau_hwmon.h"
77145f1c
BS
48#include "nouveau_acpi.h"
49#include "nouveau_bios.h"
50#include "nouveau_ioctl.h"
ebb945a9
BS
51#include "nouveau_abi16.h"
52#include "nouveau_fbcon.h"
53#include "nouveau_fence.h"
33b903e8 54#include "nouveau_debugfs.h"
27111a23 55#include "nouveau_usif.h"
703fa264 56#include "nouveau_connector.h"
055a65d5 57#include "nouveau_platform.h"
ebb945a9 58
94580299
BS
59MODULE_PARM_DESC(config, "option string to pass to driver core");
60static char *nouveau_config;
61module_param_named(config, nouveau_config, charp, 0400);
62
63MODULE_PARM_DESC(debug, "debug string to pass to driver core");
64static char *nouveau_debug;
65module_param_named(debug, nouveau_debug, charp, 0400);
66
ebb945a9
BS
67MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
68static int nouveau_noaccel = 0;
69module_param_named(noaccel, nouveau_noaccel, int, 0400);
70
9430738d
BS
71MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
72 "0 = disabled, 1 = enabled, 2 = headless)");
73int nouveau_modeset = -1;
77145f1c
BS
74module_param_named(modeset, nouveau_modeset, int, 0400);
75
5addcf0a
DA
76MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
77int nouveau_runtime_pm = -1;
78module_param_named(runpm, nouveau_runtime_pm, int, 0400);
79
915b4d11
DH
80static struct drm_driver driver_stub;
81static struct drm_driver driver_pci;
82static struct drm_driver driver_platform;
77145f1c 83
94580299 84static u64
420b9469 85nouveau_pci_name(struct pci_dev *pdev)
94580299
BS
86{
87 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
88 name |= pdev->bus->number << 16;
89 name |= PCI_SLOT(pdev->devfn) << 8;
90 return name | PCI_FUNC(pdev->devfn);
91}
92
420b9469
AC
93static u64
94nouveau_platform_name(struct platform_device *platformdev)
95{
96 return platformdev->id;
97}
98
99static u64
100nouveau_name(struct drm_device *dev)
101{
102 if (dev->pdev)
103 return nouveau_pci_name(dev->pdev);
104 else
105 return nouveau_platform_name(dev->platformdev);
106}
107
94580299 108static int
9ad97ede 109nouveau_cli_create(struct drm_device *dev, const char *sname,
fa6df8c1 110 int size, void **pcli)
94580299 111{
0ad72863 112 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
9ad97ede 113 int ret;
0ad72863 114 if (cli) {
9ad97ede
BS
115 snprintf(cli->name, sizeof(cli->name), "%s", sname);
116 cli->dev = dev;
117
a01ca78c 118 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
9ad97ede
BS
119 nouveau_config, nouveau_debug,
120 &cli->base);
27111a23 121 if (ret == 0) {
0ad72863 122 mutex_init(&cli->mutex);
27111a23
BS
123 usif_client_init(cli);
124 }
94580299 125 return ret;
dd5700ea 126 }
0ad72863 127 return -ENOMEM;
94580299
BS
128}
129
130static void
131nouveau_cli_destroy(struct nouveau_cli *cli)
132{
be83cd4e 133 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
0ad72863 134 nvif_client_fini(&cli->base);
27111a23 135 usif_client_fini(cli);
f5654d95 136 kfree(cli);
94580299
BS
137}
138
ebb945a9
BS
139static void
140nouveau_accel_fini(struct nouveau_drm *drm)
141{
ebb945a9 142 nouveau_channel_del(&drm->channel);
0ad72863 143 nvif_object_fini(&drm->ntfy);
f027f491 144 nvkm_gpuobj_del(&drm->notify);
0ad72863 145 nvif_object_fini(&drm->nvsw);
49981046 146 nouveau_channel_del(&drm->cechan);
0ad72863 147 nvif_object_fini(&drm->ttm.copy);
ebb945a9
BS
148 if (drm->fence)
149 nouveau_fence(drm)->dtor(drm);
150}
151
152static void
153nouveau_accel_init(struct nouveau_drm *drm)
154{
967e7bde 155 struct nvif_device *device = &drm->device;
41a63406 156 struct nvif_sclass *sclass;
49981046 157 u32 arg0, arg1;
41a63406 158 int ret, i, n;
ebb945a9 159
967e7bde 160 if (nouveau_noaccel)
ebb945a9
BS
161 return;
162
163 /* initialise synchronisation routines */
967e7bde
BS
164 /*XXX: this is crap, but the fence/channel stuff is a little
165 * backwards in some places. this will be fixed.
166 */
41a63406 167 ret = n = nvif_object_sclass_get(&device->object, &sclass);
967e7bde
BS
168 if (ret < 0)
169 return;
170
41a63406
BS
171 for (ret = -ENOSYS, i = 0; i < n; i++) {
172 switch (sclass[i].oclass) {
bbf8906b 173 case NV03_CHANNEL_DMA:
967e7bde
BS
174 ret = nv04_fence_create(drm);
175 break;
bbf8906b 176 case NV10_CHANNEL_DMA:
967e7bde
BS
177 ret = nv10_fence_create(drm);
178 break;
bbf8906b
BS
179 case NV17_CHANNEL_DMA:
180 case NV40_CHANNEL_DMA:
967e7bde
BS
181 ret = nv17_fence_create(drm);
182 break;
bbf8906b 183 case NV50_CHANNEL_GPFIFO:
967e7bde
BS
184 ret = nv50_fence_create(drm);
185 break;
bbf8906b 186 case G82_CHANNEL_GPFIFO:
967e7bde
BS
187 ret = nv84_fence_create(drm);
188 break;
bbf8906b
BS
189 case FERMI_CHANNEL_GPFIFO:
190 case KEPLER_CHANNEL_GPFIFO_A:
a1020afe 191 case MAXWELL_CHANNEL_GPFIFO_A:
967e7bde
BS
192 ret = nvc0_fence_create(drm);
193 break;
194 default:
195 break;
196 }
197 }
198
41a63406 199 nvif_object_sclass_put(&sclass);
ebb945a9
BS
200 if (ret) {
201 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
202 nouveau_accel_fini(drm);
203 return;
204 }
205
967e7bde 206 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
0ad72863 207 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
bbf8906b
BS
208 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
209 KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
210 0, &drm->cechan);
49981046
BS
211 if (ret)
212 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
213
bbf8906b 214 arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
49469800 215 arg1 = 1;
00fc6f6f 216 } else
967e7bde
BS
217 if (device->info.chipset >= 0xa3 &&
218 device->info.chipset != 0xaa &&
219 device->info.chipset != 0xac) {
0ad72863
BS
220 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
221 NvDmaFB, NvDmaTT, &drm->cechan);
00fc6f6f
BS
222 if (ret)
223 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
224
225 arg0 = NvDmaFB;
226 arg1 = NvDmaTT;
49981046
BS
227 } else {
228 arg0 = NvDmaFB;
229 arg1 = NvDmaTT;
230 }
231
0ad72863
BS
232 ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
233 &drm->channel);
ebb945a9
BS
234 if (ret) {
235 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
236 nouveau_accel_fini(drm);
237 return;
238 }
239
a01ca78c 240 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
0ad72863 241 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
69a6146d 242 if (ret == 0) {
be83cd4e 243 struct nvkm_sw_chan *swch;
69a6146d
BS
244 ret = RING_SPACE(drm->channel, 2);
245 if (ret == 0) {
967e7bde 246 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
69a6146d
BS
247 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
248 OUT_RING (drm->channel, NVDRM_NVSW);
249 } else
967e7bde 250 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
69a6146d
BS
251 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
252 OUT_RING (drm->channel, 0x001f0000);
253 }
254 }
989aa5b7 255 swch = (void *)nvxx_object(&drm->nvsw)->parent;
69a6146d
BS
256 swch->flip = nouveau_flip_complete;
257 swch->flip_data = drm->channel;
258 }
259
260 if (ret) {
261 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
262 nouveau_accel_fini(drm);
263 return;
264 }
265
967e7bde 266 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
f027f491
BS
267 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
268 NULL, &drm->notify);
ebb945a9
BS
269 if (ret) {
270 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
271 nouveau_accel_fini(drm);
272 return;
273 }
274
a01ca78c 275 ret = nvif_object_init(&drm->channel->user, NvNotify0,
4acfd707
BS
276 NV_DMA_IN_MEMORY,
277 &(struct nv_dma_v0) {
278 .target = NV_DMA_V0_TARGET_VRAM,
279 .access = NV_DMA_V0_ACCESS_RDWR,
ebb945a9
BS
280 .start = drm->notify->addr,
281 .limit = drm->notify->addr + 31
4acfd707 282 }, sizeof(struct nv_dma_v0),
0ad72863 283 &drm->ntfy);
ebb945a9
BS
284 if (ret) {
285 nouveau_accel_fini(drm);
286 return;
287 }
288 }
289
290
49981046 291 nouveau_bo_move_init(drm);
ebb945a9
BS
292}
293
56550d94
GKH
294static int nouveau_drm_probe(struct pci_dev *pdev,
295 const struct pci_device_id *pent)
94580299 296{
be83cd4e 297 struct nvkm_device *device;
ebb945a9
BS
298 struct apertures_struct *aper;
299 bool boot = false;
94580299
BS
300 int ret;
301
ebb945a9
BS
302 /* remove conflicting drivers (vesafb, efifb etc) */
303 aper = alloc_apertures(3);
304 if (!aper)
305 return -ENOMEM;
306
307 aper->ranges[0].base = pci_resource_start(pdev, 1);
308 aper->ranges[0].size = pci_resource_len(pdev, 1);
309 aper->count = 1;
310
311 if (pci_resource_len(pdev, 2)) {
312 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
313 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
314 aper->count++;
315 }
316
317 if (pci_resource_len(pdev, 3)) {
318 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
319 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
320 aper->count++;
321 }
322
323#ifdef CONFIG_X86
324 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
325#endif
771fa0e4
BS
326 if (nouveau_modeset != 2)
327 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
83ef7777 328 kfree(aper);
ebb945a9 329
7974dd1b
BS
330 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
331 true, true, ~0ULL, &device);
94580299
BS
332 if (ret)
333 return ret;
334
335 pci_set_master(pdev);
336
915b4d11 337 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
94580299 338 if (ret) {
e781dc8f 339 nvkm_device_del(&device);
94580299
BS
340 return ret;
341 }
342
343 return 0;
344}
345
5addcf0a
DA
346#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
347
348static void
46941b0f 349nouveau_get_hdmi_dev(struct nouveau_drm *drm)
5addcf0a 350{
46941b0f 351 struct pci_dev *pdev = drm->dev->pdev;
5addcf0a 352
420b9469 353 if (!pdev) {
40189b0c 354 DRM_INFO("not a PCI device; no HDMI\n");
420b9469
AC
355 drm->hdmi_device = NULL;
356 return;
357 }
358
5addcf0a
DA
359 /* subfunction one is a hdmi audio device? */
360 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
361 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
362
363 if (!drm->hdmi_device) {
46941b0f 364 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
5addcf0a
DA
365 return;
366 }
367
368 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
46941b0f 369 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
5addcf0a
DA
370 pci_dev_put(drm->hdmi_device);
371 drm->hdmi_device = NULL;
372 return;
373 }
374}
375
5b8a43ae 376static int
94580299
BS
377nouveau_drm_load(struct drm_device *dev, unsigned long flags)
378{
94580299
BS
379 struct nouveau_drm *drm;
380 int ret;
381
9ad97ede 382 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
94580299
BS
383 if (ret)
384 return ret;
385
77145f1c
BS
386 dev->dev_private = drm;
387 drm->dev = dev;
989aa5b7 388 nvxx_client(&drm->client.base)->debug =
be83cd4e 389 nvkm_dbgopt(nouveau_debug, "DRM");
77145f1c 390
94580299 391 INIT_LIST_HEAD(&drm->clients);
ebb945a9 392 spin_lock_init(&drm->tile.lock);
94580299 393
46941b0f 394 nouveau_get_hdmi_dev(drm);
5addcf0a 395
a01ca78c
BS
396 ret = nvif_device_init(&drm->client.base.object,
397 NVDRM_DEVICE, NV_DEVICE,
586491e6 398 &(struct nv_device_v0) {
94580299 399 .device = ~0,
586491e6 400 }, sizeof(struct nv_device_v0),
0ad72863 401 &drm->device);
94580299
BS
402 if (ret)
403 goto fail_device;
404
7d3428cd
IM
405 dev->irq_enabled = true;
406
77145f1c
BS
407 /* workaround an odd issue on nvc1 by disabling the device's
408 * nosnoop capability. hopefully won't cause issues until a
409 * better fix is found - assuming there is one...
410 */
967e7bde 411 if (drm->device.info.chipset == 0xc1)
a01ca78c 412 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
ebb945a9 413
77145f1c 414 nouveau_vga_init(drm);
cb75d97e
BS
415 nouveau_agp_init(drm);
416
967e7bde 417 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 418 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 419 0x1000, NULL, &drm->client.vm);
ebb945a9
BS
420 if (ret)
421 goto fail_device;
3ee6f5b5 422
989aa5b7 423 nvxx_client(&drm->client.base)->vm = drm->client.vm;
ebb945a9
BS
424 }
425
426 ret = nouveau_ttm_init(drm);
94580299 427 if (ret)
77145f1c
BS
428 goto fail_ttm;
429
430 ret = nouveau_bios_init(dev);
431 if (ret)
432 goto fail_bios;
433
77145f1c 434 ret = nouveau_display_create(dev);
ebb945a9 435 if (ret)
77145f1c
BS
436 goto fail_dispctor;
437
438 if (dev->mode_config.num_crtc) {
439 ret = nouveau_display_init(dev);
440 if (ret)
441 goto fail_dispinit;
442 }
443
26fdd78c 444 nouveau_sysfs_init(dev);
b9ed919f 445 nouveau_hwmon_init(dev);
ebb945a9
BS
446 nouveau_accel_init(drm);
447 nouveau_fbcon_init(dev);
5addcf0a
DA
448
449 if (nouveau_runtime_pm != 0) {
450 pm_runtime_use_autosuspend(dev->dev);
451 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
452 pm_runtime_set_active(dev->dev);
453 pm_runtime_allow(dev->dev);
454 pm_runtime_mark_last_busy(dev->dev);
455 pm_runtime_put(dev->dev);
456 }
94580299
BS
457 return 0;
458
77145f1c
BS
459fail_dispinit:
460 nouveau_display_destroy(dev);
461fail_dispctor:
77145f1c
BS
462 nouveau_bios_takedown(dev);
463fail_bios:
ebb945a9 464 nouveau_ttm_fini(drm);
77145f1c
BS
465fail_ttm:
466 nouveau_agp_fini(drm);
467 nouveau_vga_fini(drm);
94580299 468fail_device:
0ad72863 469 nvif_device_fini(&drm->device);
94580299
BS
470 nouveau_cli_destroy(&drm->client);
471 return ret;
472}
473
5b8a43ae 474static int
94580299
BS
475nouveau_drm_unload(struct drm_device *dev)
476{
77145f1c 477 struct nouveau_drm *drm = nouveau_drm(dev);
94580299 478
5addcf0a 479 pm_runtime_get_sync(dev->dev);
ebb945a9
BS
480 nouveau_fbcon_fini(dev);
481 nouveau_accel_fini(drm);
b9ed919f 482 nouveau_hwmon_fini(dev);
26fdd78c 483 nouveau_sysfs_fini(dev);
77145f1c 484
9430738d
BS
485 if (dev->mode_config.num_crtc)
486 nouveau_display_fini(dev);
77145f1c
BS
487 nouveau_display_destroy(dev);
488
77145f1c 489 nouveau_bios_takedown(dev);
94580299 490
ebb945a9 491 nouveau_ttm_fini(drm);
cb75d97e 492 nouveau_agp_fini(drm);
77145f1c 493 nouveau_vga_fini(drm);
cb75d97e 494
0ad72863 495 nvif_device_fini(&drm->device);
5addcf0a
DA
496 if (drm->hdmi_device)
497 pci_dev_put(drm->hdmi_device);
94580299
BS
498 nouveau_cli_destroy(&drm->client);
499 return 0;
500}
501
8ba9ff11
AC
502void
503nouveau_drm_device_remove(struct drm_device *dev)
94580299 504{
77145f1c 505 struct nouveau_drm *drm = nouveau_drm(dev);
be83cd4e 506 struct nvkm_client *client;
76ecea5b 507 struct nvkm_device *device;
77145f1c 508
7d3428cd 509 dev->irq_enabled = false;
989aa5b7 510 client = nvxx_client(&drm->client.base);
4e7e62d6 511 device = nvkm_device_find(client->device);
77145f1c
BS
512 drm_put_dev(dev);
513
e781dc8f 514 nvkm_device_del(&device);
94580299 515}
8ba9ff11
AC
516
517static void
518nouveau_drm_remove(struct pci_dev *pdev)
519{
520 struct drm_device *dev = pci_get_drvdata(pdev);
521
522 nouveau_drm_device_remove(dev);
523}
94580299 524
cd897837 525static int
05c63c2f 526nouveau_do_suspend(struct drm_device *dev, bool runtime)
94580299 527{
77145f1c 528 struct nouveau_drm *drm = nouveau_drm(dev);
94580299
BS
529 struct nouveau_cli *cli;
530 int ret;
531
6fbb702e
BS
532 if (dev->mode_config.num_crtc) {
533 NV_INFO(drm, "suspending console...\n");
534 nouveau_fbcon_set_suspend(dev, 1);
c52f4fa6 535 NV_INFO(drm, "suspending display...\n");
6fbb702e 536 ret = nouveau_display_suspend(dev, runtime);
9430738d
BS
537 if (ret)
538 return ret;
539 }
94580299 540
c52f4fa6 541 NV_INFO(drm, "evicting buffers...\n");
ebb945a9
BS
542 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
543
c52f4fa6 544 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
81dff21b
BS
545 if (drm->cechan) {
546 ret = nouveau_channel_idle(drm->cechan);
547 if (ret)
f3980dc5 548 goto fail_display;
81dff21b
BS
549 }
550
551 if (drm->channel) {
552 ret = nouveau_channel_idle(drm->channel);
553 if (ret)
f3980dc5 554 goto fail_display;
81dff21b
BS
555 }
556
c52f4fa6 557 NV_INFO(drm, "suspending client object trees...\n");
ebb945a9 558 if (drm->fence && nouveau_fence(drm)->suspend) {
f3980dc5
IM
559 if (!nouveau_fence(drm)->suspend(drm)) {
560 ret = -ENOMEM;
561 goto fail_display;
562 }
ebb945a9
BS
563 }
564
94580299 565 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 566 ret = nvif_client_suspend(&cli->base);
94580299
BS
567 if (ret)
568 goto fail_client;
569 }
570
c52f4fa6 571 NV_INFO(drm, "suspending kernel object tree...\n");
0ad72863 572 ret = nvif_client_suspend(&drm->client.base);
94580299
BS
573 if (ret)
574 goto fail_client;
575
cb75d97e 576 nouveau_agp_fini(drm);
94580299
BS
577 return 0;
578
579fail_client:
580 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
0ad72863 581 nvif_client_resume(&cli->base);
94580299
BS
582 }
583
f3980dc5
IM
584 if (drm->fence && nouveau_fence(drm)->resume)
585 nouveau_fence(drm)->resume(drm);
586
587fail_display:
9430738d 588 if (dev->mode_config.num_crtc) {
c52f4fa6 589 NV_INFO(drm, "resuming display...\n");
6fbb702e 590 nouveau_display_resume(dev, runtime);
9430738d 591 }
94580299
BS
592 return ret;
593}
594
cd897837 595static int
6fbb702e 596nouveau_do_resume(struct drm_device *dev, bool runtime)
2d8b9ccb
DA
597{
598 struct nouveau_drm *drm = nouveau_drm(dev);
599 struct nouveau_cli *cli;
600
c52f4fa6 601 NV_INFO(drm, "re-enabling device...\n");
94580299 602
cb75d97e
BS
603 nouveau_agp_reset(drm);
604
c52f4fa6 605 NV_INFO(drm, "resuming kernel object tree...\n");
0ad72863 606 nvif_client_resume(&drm->client.base);
ebb945a9 607 nouveau_agp_init(drm);
94580299 608
c52f4fa6 609 NV_INFO(drm, "resuming client object trees...\n");
81dff21b
BS
610 if (drm->fence && nouveau_fence(drm)->resume)
611 nouveau_fence(drm)->resume(drm);
612
94580299 613 list_for_each_entry(cli, &drm->clients, head) {
0ad72863 614 nvif_client_resume(&cli->base);
94580299 615 }
cb75d97e 616
77145f1c 617 nouveau_run_vbios_init(dev);
77145f1c 618
9430738d 619 if (dev->mode_config.num_crtc) {
c52f4fa6 620 NV_INFO(drm, "resuming display...\n");
6fbb702e
BS
621 nouveau_display_resume(dev, runtime);
622 NV_INFO(drm, "resuming console...\n");
623 nouveau_fbcon_set_suspend(dev, 0);
9430738d 624 }
5addcf0a 625
77145f1c 626 return 0;
94580299
BS
627}
628
7bb6d442
BS
629int
630nouveau_pmops_suspend(struct device *dev)
631{
632 struct pci_dev *pdev = to_pci_dev(dev);
633 struct drm_device *drm_dev = pci_get_drvdata(pdev);
634 int ret;
635
636 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
637 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
638 return 0;
639
640 ret = nouveau_do_suspend(drm_dev, false);
641 if (ret)
642 return ret;
643
644 pci_save_state(pdev);
645 pci_disable_device(pdev);
7bb6d442 646 pci_set_power_state(pdev, PCI_D3hot);
c5fd936e 647 udelay(200);
7bb6d442
BS
648 return 0;
649}
650
651int
652nouveau_pmops_resume(struct device *dev)
2d8b9ccb
DA
653{
654 struct pci_dev *pdev = to_pci_dev(dev);
655 struct drm_device *drm_dev = pci_get_drvdata(pdev);
656 int ret;
657
5addcf0a
DA
658 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
659 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
2d8b9ccb
DA
660 return 0;
661
662 pci_set_power_state(pdev, PCI_D0);
663 pci_restore_state(pdev);
664 ret = pci_enable_device(pdev);
665 if (ret)
666 return ret;
667 pci_set_master(pdev);
668
6fbb702e 669 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
670}
671
7bb6d442
BS
672static int
673nouveau_pmops_freeze(struct device *dev)
2d8b9ccb
DA
674{
675 struct pci_dev *pdev = to_pci_dev(dev);
676 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 677 return nouveau_do_suspend(drm_dev, false);
2d8b9ccb
DA
678}
679
7bb6d442
BS
680static int
681nouveau_pmops_thaw(struct device *dev)
2d8b9ccb
DA
682{
683 struct pci_dev *pdev = to_pci_dev(dev);
684 struct drm_device *drm_dev = pci_get_drvdata(pdev);
6fbb702e 685 return nouveau_do_resume(drm_dev, false);
2d8b9ccb
DA
686}
687
7bb6d442
BS
688static int
689nouveau_pmops_runtime_suspend(struct device *dev)
690{
691 struct pci_dev *pdev = to_pci_dev(dev);
692 struct drm_device *drm_dev = pci_get_drvdata(pdev);
693 int ret;
694
695 if (nouveau_runtime_pm == 0) {
696 pm_runtime_forbid(dev);
697 return -EBUSY;
698 }
699
700 /* are we optimus enabled? */
701 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
702 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
703 pm_runtime_forbid(dev);
704 return -EBUSY;
705 }
706
7bb6d442
BS
707 drm_kms_helper_poll_disable(drm_dev);
708 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
709 nouveau_switcheroo_optimus_dsm();
710 ret = nouveau_do_suspend(drm_dev, true);
711 pci_save_state(pdev);
712 pci_disable_device(pdev);
8c863944 713 pci_ignore_hotplug(pdev);
7bb6d442
BS
714 pci_set_power_state(pdev, PCI_D3cold);
715 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
716 return ret;
717}
718
719static int
720nouveau_pmops_runtime_resume(struct device *dev)
721{
722 struct pci_dev *pdev = to_pci_dev(dev);
723 struct drm_device *drm_dev = pci_get_drvdata(pdev);
724 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
725 int ret;
726
727 if (nouveau_runtime_pm == 0)
728 return -EINVAL;
729
730 pci_set_power_state(pdev, PCI_D0);
731 pci_restore_state(pdev);
732 ret = pci_enable_device(pdev);
733 if (ret)
734 return ret;
735 pci_set_master(pdev);
736
737 ret = nouveau_do_resume(drm_dev, true);
738 drm_kms_helper_poll_enable(drm_dev);
739 /* do magic */
a01ca78c 740 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
7bb6d442
BS
741 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
742 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
7bb6d442
BS
743 return ret;
744}
745
746static int
747nouveau_pmops_runtime_idle(struct device *dev)
748{
749 struct pci_dev *pdev = to_pci_dev(dev);
750 struct drm_device *drm_dev = pci_get_drvdata(pdev);
751 struct nouveau_drm *drm = nouveau_drm(drm_dev);
752 struct drm_crtc *crtc;
753
754 if (nouveau_runtime_pm == 0) {
755 pm_runtime_forbid(dev);
756 return -EBUSY;
757 }
758
759 /* are we optimus enabled? */
760 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
761 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
762 pm_runtime_forbid(dev);
763 return -EBUSY;
764 }
765
766 /* if we have a hdmi audio device - make sure it has a driver loaded */
767 if (drm->hdmi_device) {
768 if (!drm->hdmi_device->driver) {
769 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
770 pm_runtime_mark_last_busy(dev);
771 return -EBUSY;
772 }
773 }
774
775 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
776 if (crtc->enabled) {
777 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
778 return -EBUSY;
779 }
780 }
781 pm_runtime_mark_last_busy(dev);
782 pm_runtime_autosuspend(dev);
783 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
784 return 1;
785}
2d8b9ccb 786
5b8a43ae 787static int
ebb945a9
BS
788nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
789{
ebb945a9
BS
790 struct nouveau_drm *drm = nouveau_drm(dev);
791 struct nouveau_cli *cli;
a2896ced 792 char name[32], tmpname[TASK_COMM_LEN];
ebb945a9
BS
793 int ret;
794
5addcf0a
DA
795 /* need to bring up power immediately if opening device */
796 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 797 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
798 return ret;
799
a2896ced
MS
800 get_task_comm(tmpname, current);
801 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
fa6df8c1 802
9ad97ede 803 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
420b9469 804
ebb945a9 805 if (ret)
5addcf0a 806 goto out_suspend;
ebb945a9 807
0ad72863
BS
808 cli->base.super = false;
809
967e7bde 810 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
be83cd4e 811 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
1de68568 812 0x1000, NULL, &cli->vm);
ebb945a9
BS
813 if (ret) {
814 nouveau_cli_destroy(cli);
5addcf0a 815 goto out_suspend;
ebb945a9 816 }
3ee6f5b5 817
989aa5b7 818 nvxx_client(&cli->base)->vm = cli->vm;
ebb945a9
BS
819 }
820
821 fpriv->driver_priv = cli;
822
823 mutex_lock(&drm->client.mutex);
824 list_add(&cli->head, &drm->clients);
825 mutex_unlock(&drm->client.mutex);
5addcf0a
DA
826
827out_suspend:
828 pm_runtime_mark_last_busy(dev->dev);
829 pm_runtime_put_autosuspend(dev->dev);
830
831 return ret;
ebb945a9
BS
832}
833
5b8a43ae 834static void
ebb945a9
BS
835nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
836{
837 struct nouveau_cli *cli = nouveau_cli(fpriv);
838 struct nouveau_drm *drm = nouveau_drm(dev);
839
5addcf0a
DA
840 pm_runtime_get_sync(dev->dev);
841
ac8c7930 842 mutex_lock(&cli->mutex);
ebb945a9
BS
843 if (cli->abi16)
844 nouveau_abi16_fini(cli->abi16);
ac8c7930 845 mutex_unlock(&cli->mutex);
ebb945a9
BS
846
847 mutex_lock(&drm->client.mutex);
848 list_del(&cli->head);
849 mutex_unlock(&drm->client.mutex);
5addcf0a 850
ebb945a9
BS
851}
852
5b8a43ae 853static void
ebb945a9
BS
854nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
855{
856 struct nouveau_cli *cli = nouveau_cli(fpriv);
857 nouveau_cli_destroy(cli);
5addcf0a
DA
858 pm_runtime_mark_last_busy(dev->dev);
859 pm_runtime_put_autosuspend(dev->dev);
ebb945a9
BS
860}
861
baa70943 862static const struct drm_ioctl_desc
77145f1c 863nouveau_ioctls[] = {
7d761258 864 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c 865 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
7d761258
MP
866 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
867 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
868 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
869 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
870 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
871 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
872 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
873 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
874 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
875 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
77145f1c
BS
876};
877
27111a23
BS
878long
879nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
5addcf0a 880{
27111a23
BS
881 struct drm_file *filp = file->private_data;
882 struct drm_device *dev = filp->minor->dev;
5addcf0a 883 long ret;
5addcf0a
DA
884
885 ret = pm_runtime_get_sync(dev->dev);
b6c4285a 886 if (ret < 0 && ret != -EACCES)
5addcf0a
DA
887 return ret;
888
27111a23
BS
889 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
890 case DRM_NOUVEAU_NVIF:
891 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
892 break;
893 default:
894 ret = drm_ioctl(file, cmd, arg);
895 break;
896 }
5addcf0a
DA
897
898 pm_runtime_mark_last_busy(dev->dev);
899 pm_runtime_put_autosuspend(dev->dev);
900 return ret;
901}
27111a23 902
77145f1c
BS
903static const struct file_operations
904nouveau_driver_fops = {
905 .owner = THIS_MODULE,
906 .open = drm_open,
907 .release = drm_release,
5addcf0a 908 .unlocked_ioctl = nouveau_drm_ioctl,
77145f1c
BS
909 .mmap = nouveau_ttm_mmap,
910 .poll = drm_poll,
77145f1c
BS
911 .read = drm_read,
912#if defined(CONFIG_COMPAT)
913 .compat_ioctl = nouveau_compat_ioctl,
914#endif
915 .llseek = noop_llseek,
916};
917
918static struct drm_driver
915b4d11 919driver_stub = {
77145f1c 920 .driver_features =
4cb4ea39 921 DRIVER_USE_AGP |
0e975980
PA
922 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
923 DRIVER_KMS_LEGACY_CONTEXT,
77145f1c
BS
924
925 .load = nouveau_drm_load,
926 .unload = nouveau_drm_unload,
927 .open = nouveau_drm_open,
928 .preclose = nouveau_drm_preclose,
929 .postclose = nouveau_drm_postclose,
930 .lastclose = nouveau_vga_lastclose,
931
33b903e8
MS
932#if defined(CONFIG_DEBUG_FS)
933 .debugfs_init = nouveau_debugfs_init,
934 .debugfs_cleanup = nouveau_debugfs_takedown,
935#endif
936
77145f1c 937 .get_vblank_counter = drm_vblank_count,
51cb4b39
BS
938 .enable_vblank = nouveau_display_vblank_enable,
939 .disable_vblank = nouveau_display_vblank_disable,
d83ef853
BS
940 .get_scanout_position = nouveau_display_scanoutpos,
941 .get_vblank_timestamp = nouveau_display_vblstamp,
77145f1c
BS
942
943 .ioctls = nouveau_ioctls,
baa70943 944 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
77145f1c
BS
945 .fops = &nouveau_driver_fops,
946
947 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
948 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
ab9ccb96
AP
949 .gem_prime_export = drm_gem_prime_export,
950 .gem_prime_import = drm_gem_prime_import,
951 .gem_prime_pin = nouveau_gem_prime_pin,
3aac4502 952 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
1af7c7dd 953 .gem_prime_unpin = nouveau_gem_prime_unpin,
ab9ccb96
AP
954 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
955 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
956 .gem_prime_vmap = nouveau_gem_prime_vmap,
957 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
77145f1c 958
77145f1c
BS
959 .gem_free_object = nouveau_gem_object_del,
960 .gem_open_object = nouveau_gem_object_open,
961 .gem_close_object = nouveau_gem_object_close,
962
963 .dumb_create = nouveau_display_dumb_create,
964 .dumb_map_offset = nouveau_display_dumb_map_offset,
43387b37 965 .dumb_destroy = drm_gem_dumb_destroy,
77145f1c
BS
966
967 .name = DRIVER_NAME,
968 .desc = DRIVER_DESC,
969#ifdef GIT_REVISION
970 .date = GIT_REVISION,
971#else
972 .date = DRIVER_DATE,
973#endif
974 .major = DRIVER_MAJOR,
975 .minor = DRIVER_MINOR,
976 .patchlevel = DRIVER_PATCHLEVEL,
977};
978
94580299
BS
979static struct pci_device_id
980nouveau_drm_pci_table[] = {
981 {
982 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
983 .class = PCI_BASE_CLASS_DISPLAY << 16,
984 .class_mask = 0xff << 16,
985 },
986 {
987 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
988 .class = PCI_BASE_CLASS_DISPLAY << 16,
989 .class_mask = 0xff << 16,
990 },
991 {}
992};
993
703fa264
PM
994static void nouveau_display_options(void)
995{
996 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
997
998 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
999 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1000 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1001 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1002 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1003 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1004 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1005 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1006 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1007 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1008 DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate);
1009}
1010
2d8b9ccb
DA
1011static const struct dev_pm_ops nouveau_pm_ops = {
1012 .suspend = nouveau_pmops_suspend,
1013 .resume = nouveau_pmops_resume,
1014 .freeze = nouveau_pmops_freeze,
1015 .thaw = nouveau_pmops_thaw,
1016 .poweroff = nouveau_pmops_freeze,
1017 .restore = nouveau_pmops_resume,
5addcf0a
DA
1018 .runtime_suspend = nouveau_pmops_runtime_suspend,
1019 .runtime_resume = nouveau_pmops_runtime_resume,
1020 .runtime_idle = nouveau_pmops_runtime_idle,
2d8b9ccb
DA
1021};
1022
94580299
BS
1023static struct pci_driver
1024nouveau_drm_pci_driver = {
1025 .name = "nouveau",
1026 .id_table = nouveau_drm_pci_table,
1027 .probe = nouveau_drm_probe,
1028 .remove = nouveau_drm_remove,
2d8b9ccb 1029 .driver.pm = &nouveau_pm_ops,
94580299
BS
1030};
1031
8ba9ff11 1032struct drm_device *
47b2505e
BS
1033nouveau_platform_device_create(struct platform_device *pdev,
1034 struct nvkm_device **pdevice)
420b9469 1035{
8ba9ff11
AC
1036 struct drm_device *drm;
1037 int err;
420b9469 1038
7974dd1b
BS
1039 err = nvkm_device_tegra_new(pdev, nouveau_config, nouveau_debug,
1040 true, true, ~0ULL, pdevice);
8ba9ff11 1041 if (err)
e781dc8f 1042 goto err_free;
8ba9ff11 1043
915b4d11 1044 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
8ba9ff11
AC
1045 if (!drm) {
1046 err = -ENOMEM;
1047 goto err_free;
420b9469
AC
1048 }
1049
8ba9ff11
AC
1050 err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
1051 if (err < 0)
1052 goto err_free;
1053
1054 drm->platformdev = pdev;
1055 platform_set_drvdata(pdev, drm);
1056
1057 return drm;
1058
1059err_free:
e781dc8f 1060 nvkm_device_del(pdevice);
8ba9ff11
AC
1061
1062 return ERR_PTR(err);
420b9469
AC
1063}
1064
94580299
BS
1065static int __init
1066nouveau_drm_init(void)
1067{
915b4d11
DH
1068 driver_pci = driver_stub;
1069 driver_pci.set_busid = drm_pci_set_busid;
1070 driver_platform = driver_stub;
1071 driver_platform.set_busid = drm_platform_set_busid;
1072
703fa264
PM
1073 nouveau_display_options();
1074
77145f1c
BS
1075 if (nouveau_modeset == -1) {
1076#ifdef CONFIG_VGA_CONSOLE
1077 if (vgacon_text_force())
1078 nouveau_modeset = 0;
77145f1c 1079#endif
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1080 }
1081
1082 if (!nouveau_modeset)
1083 return 0;
1084
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1085#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1086 platform_driver_register(&nouveau_platform_driver);
1087#endif
1088
77145f1c 1089 nouveau_register_dsm_handler();
915b4d11 1090 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
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1091}
1092
1093static void __exit
1094nouveau_drm_exit(void)
1095{
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1096 if (!nouveau_modeset)
1097 return;
1098
915b4d11 1099 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
77145f1c 1100 nouveau_unregister_dsm_handler();
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1101
1102#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1103 platform_driver_unregister(&nouveau_platform_driver);
1104#endif
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1105}
1106
1107module_init(nouveau_drm_init);
1108module_exit(nouveau_drm_exit);
1109
1110MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
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1111MODULE_AUTHOR(DRIVER_AUTHOR);
1112MODULE_DESCRIPTION(DRIVER_DESC);
94580299 1113MODULE_LICENSE("GPL and additional rights");