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94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
94580299 BS |
26 | #include <linux/module.h> |
27 | #include <linux/pci.h> | |
28 | ||
29 | #include <core/device.h> | |
30 | #include <core/client.h> | |
ebb945a9 | 31 | #include <core/gpuobj.h> |
94580299 BS |
32 | #include <core/class.h> |
33 | ||
34 | #include <subdev/device.h> | |
ebb945a9 | 35 | #include <subdev/vm.h> |
94580299 | 36 | |
1d7c71a3 BS |
37 | #include <engine/disp.h> |
38 | ||
94580299 | 39 | #include "nouveau_drm.h" |
77145f1c | 40 | #include "nouveau_irq.h" |
ebb945a9 | 41 | #include "nouveau_dma.h" |
77145f1c BS |
42 | #include "nouveau_ttm.h" |
43 | #include "nouveau_gem.h" | |
cb75d97e | 44 | #include "nouveau_agp.h" |
77145f1c BS |
45 | #include "nouveau_vga.h" |
46 | #include "nouveau_pm.h" | |
47 | #include "nouveau_acpi.h" | |
48 | #include "nouveau_bios.h" | |
49 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
50 | #include "nouveau_abi16.h" |
51 | #include "nouveau_fbcon.h" | |
52 | #include "nouveau_fence.h" | |
53 | ||
94580299 BS |
54 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
55 | static char *nouveau_config; | |
56 | module_param_named(config, nouveau_config, charp, 0400); | |
57 | ||
58 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
59 | static char *nouveau_debug; | |
60 | module_param_named(debug, nouveau_debug, charp, 0400); | |
61 | ||
ebb945a9 BS |
62 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
63 | static int nouveau_noaccel = 0; | |
64 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
65 | ||
9430738d BS |
66 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
67 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
68 | int nouveau_modeset = -1; | |
77145f1c BS |
69 | module_param_named(modeset, nouveau_modeset, int, 0400); |
70 | ||
71 | static struct drm_driver driver; | |
72 | ||
1d7c71a3 BS |
73 | static int |
74 | nouveau_drm_vblank_enable(struct drm_device *dev, int head) | |
75 | { | |
76 | struct nouveau_drm *drm = nouveau_drm(dev); | |
77 | struct nouveau_disp *pdisp = nouveau_disp(drm->device); | |
78 | nouveau_event_get(pdisp->vblank, head, &drm->vblank); | |
79 | return 0; | |
80 | } | |
81 | ||
82 | static void | |
83 | nouveau_drm_vblank_disable(struct drm_device *dev, int head) | |
84 | { | |
85 | struct nouveau_drm *drm = nouveau_drm(dev); | |
86 | struct nouveau_disp *pdisp = nouveau_disp(drm->device); | |
87 | nouveau_event_put(pdisp->vblank, head, &drm->vblank); | |
88 | } | |
89 | ||
90 | static int | |
91 | nouveau_drm_vblank_handler(struct nouveau_eventh *event, int head) | |
92 | { | |
93 | struct nouveau_drm *drm = | |
94 | container_of(event, struct nouveau_drm, vblank); | |
95 | drm_handle_vblank(drm->dev, head); | |
96 | return NVKM_EVENT_KEEP; | |
97 | } | |
98 | ||
94580299 BS |
99 | static u64 |
100 | nouveau_name(struct pci_dev *pdev) | |
101 | { | |
102 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
103 | name |= pdev->bus->number << 16; | |
104 | name |= PCI_SLOT(pdev->devfn) << 8; | |
105 | return name | PCI_FUNC(pdev->devfn); | |
106 | } | |
107 | ||
108 | static int | |
fa6df8c1 BS |
109 | nouveau_cli_create(struct pci_dev *pdev, const char *name, |
110 | int size, void **pcli) | |
94580299 BS |
111 | { |
112 | struct nouveau_cli *cli; | |
113 | int ret; | |
114 | ||
dd5700ea | 115 | *pcli = NULL; |
94580299 BS |
116 | ret = nouveau_client_create_(name, nouveau_name(pdev), nouveau_config, |
117 | nouveau_debug, size, pcli); | |
118 | cli = *pcli; | |
dd5700ea MS |
119 | if (ret) { |
120 | if (cli) | |
121 | nouveau_client_destroy(&cli->base); | |
122 | *pcli = NULL; | |
94580299 | 123 | return ret; |
dd5700ea | 124 | } |
94580299 BS |
125 | |
126 | mutex_init(&cli->mutex); | |
127 | return 0; | |
128 | } | |
129 | ||
130 | static void | |
131 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
132 | { | |
133 | struct nouveau_object *client = nv_object(cli); | |
ebb945a9 | 134 | nouveau_vm_ref(NULL, &cli->base.vm, NULL); |
94580299 BS |
135 | nouveau_client_fini(&cli->base, false); |
136 | atomic_set(&client->refcount, 1); | |
137 | nouveau_object_ref(NULL, &client); | |
138 | } | |
139 | ||
ebb945a9 BS |
140 | static void |
141 | nouveau_accel_fini(struct nouveau_drm *drm) | |
142 | { | |
143 | nouveau_gpuobj_ref(NULL, &drm->notify); | |
144 | nouveau_channel_del(&drm->channel); | |
49981046 | 145 | nouveau_channel_del(&drm->cechan); |
ebb945a9 BS |
146 | if (drm->fence) |
147 | nouveau_fence(drm)->dtor(drm); | |
148 | } | |
149 | ||
150 | static void | |
151 | nouveau_accel_init(struct nouveau_drm *drm) | |
152 | { | |
153 | struct nouveau_device *device = nv_device(drm->device); | |
154 | struct nouveau_object *object; | |
49981046 | 155 | u32 arg0, arg1; |
ebb945a9 BS |
156 | int ret; |
157 | ||
158 | if (nouveau_noaccel) | |
159 | return; | |
160 | ||
161 | /* initialise synchronisation routines */ | |
162 | if (device->card_type < NV_10) ret = nv04_fence_create(drm); | |
60e5cb79 BS |
163 | else if (device->chipset < 0x17) ret = nv10_fence_create(drm); |
164 | else if (device->card_type < NV_50) ret = nv17_fence_create(drm); | |
ace5a9b8 | 165 | else if (device->chipset < 0x84) ret = nv50_fence_create(drm); |
ebb945a9 BS |
166 | else if (device->card_type < NV_C0) ret = nv84_fence_create(drm); |
167 | else ret = nvc0_fence_create(drm); | |
168 | if (ret) { | |
169 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
170 | nouveau_accel_fini(drm); | |
171 | return; | |
172 | } | |
173 | ||
49981046 BS |
174 | if (device->card_type >= NV_E0) { |
175 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, | |
176 | NVDRM_CHAN + 1, | |
177 | NVE0_CHANNEL_IND_ENGINE_CE0 | | |
178 | NVE0_CHANNEL_IND_ENGINE_CE1, 0, | |
179 | &drm->cechan); | |
180 | if (ret) | |
181 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
182 | ||
183 | arg0 = NVE0_CHANNEL_IND_ENGINE_GR; | |
49469800 | 184 | arg1 = 1; |
49981046 BS |
185 | } else { |
186 | arg0 = NvDmaFB; | |
187 | arg1 = NvDmaTT; | |
188 | } | |
189 | ||
ebb945a9 | 190 | ret = nouveau_channel_new(drm, &drm->client, NVDRM_DEVICE, NVDRM_CHAN, |
49981046 | 191 | arg0, arg1, &drm->channel); |
ebb945a9 BS |
192 | if (ret) { |
193 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
194 | nouveau_accel_fini(drm); | |
195 | return; | |
196 | } | |
197 | ||
198 | if (device->card_type < NV_C0) { | |
199 | ret = nouveau_gpuobj_new(drm->device, NULL, 32, 0, 0, | |
200 | &drm->notify); | |
201 | if (ret) { | |
202 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
203 | nouveau_accel_fini(drm); | |
204 | return; | |
205 | } | |
206 | ||
207 | ret = nouveau_object_new(nv_object(drm), | |
208 | drm->channel->handle, NvNotify0, | |
209 | 0x003d, &(struct nv_dma_class) { | |
210 | .flags = NV_DMA_TARGET_VRAM | | |
211 | NV_DMA_ACCESS_RDWR, | |
212 | .start = drm->notify->addr, | |
213 | .limit = drm->notify->addr + 31 | |
214 | }, sizeof(struct nv_dma_class), | |
215 | &object); | |
216 | if (ret) { | |
217 | nouveau_accel_fini(drm); | |
218 | return; | |
219 | } | |
220 | } | |
221 | ||
222 | ||
49981046 | 223 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
224 | } |
225 | ||
56550d94 GKH |
226 | static int nouveau_drm_probe(struct pci_dev *pdev, |
227 | const struct pci_device_id *pent) | |
94580299 BS |
228 | { |
229 | struct nouveau_device *device; | |
ebb945a9 BS |
230 | struct apertures_struct *aper; |
231 | bool boot = false; | |
94580299 BS |
232 | int ret; |
233 | ||
ebb945a9 BS |
234 | /* remove conflicting drivers (vesafb, efifb etc) */ |
235 | aper = alloc_apertures(3); | |
236 | if (!aper) | |
237 | return -ENOMEM; | |
238 | ||
239 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
240 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
241 | aper->count = 1; | |
242 | ||
243 | if (pci_resource_len(pdev, 2)) { | |
244 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
245 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
246 | aper->count++; | |
247 | } | |
248 | ||
249 | if (pci_resource_len(pdev, 3)) { | |
250 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
251 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
252 | aper->count++; | |
253 | } | |
254 | ||
255 | #ifdef CONFIG_X86 | |
256 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
257 | #endif | |
258 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 259 | kfree(aper); |
ebb945a9 | 260 | |
94580299 BS |
261 | ret = nouveau_device_create(pdev, nouveau_name(pdev), pci_name(pdev), |
262 | nouveau_config, nouveau_debug, &device); | |
263 | if (ret) | |
264 | return ret; | |
265 | ||
266 | pci_set_master(pdev); | |
267 | ||
77145f1c | 268 | ret = drm_get_pci_dev(pdev, pent, &driver); |
94580299 | 269 | if (ret) { |
ebb945a9 | 270 | nouveau_object_ref(NULL, (struct nouveau_object **)&device); |
94580299 BS |
271 | return ret; |
272 | } | |
273 | ||
274 | return 0; | |
275 | } | |
276 | ||
5b8a43ae | 277 | static int |
94580299 BS |
278 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
279 | { | |
280 | struct pci_dev *pdev = dev->pdev; | |
ebb945a9 | 281 | struct nouveau_device *device; |
94580299 BS |
282 | struct nouveau_drm *drm; |
283 | int ret; | |
284 | ||
fa6df8c1 | 285 | ret = nouveau_cli_create(pdev, "DRM", sizeof(*drm), (void**)&drm); |
94580299 BS |
286 | if (ret) |
287 | return ret; | |
288 | ||
77145f1c BS |
289 | dev->dev_private = drm; |
290 | drm->dev = dev; | |
1d7c71a3 | 291 | drm->vblank.func = nouveau_drm_vblank_handler; |
77145f1c | 292 | |
94580299 | 293 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 294 | spin_lock_init(&drm->tile.lock); |
94580299 | 295 | |
cb75d97e BS |
296 | /* make sure AGP controller is in a consistent state before we |
297 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
298 | */ | |
299 | if (drm_pci_device_is_agp(dev) && dev->agp) { | |
300 | /* dummy device object, doesn't init anything, but allows | |
301 | * agp code access to registers | |
302 | */ | |
303 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, | |
304 | NVDRM_DEVICE, 0x0080, | |
305 | &(struct nv_device_class) { | |
306 | .device = ~0, | |
307 | .disable = | |
308 | ~(NV_DEVICE_DISABLE_MMIO | | |
309 | NV_DEVICE_DISABLE_IDENTIFY), | |
310 | .debug0 = ~0, | |
311 | }, sizeof(struct nv_device_class), | |
312 | &drm->device); | |
313 | if (ret) | |
ebb945a9 | 314 | goto fail_device; |
cb75d97e BS |
315 | |
316 | nouveau_agp_reset(drm); | |
317 | nouveau_object_del(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE); | |
318 | } | |
319 | ||
94580299 BS |
320 | ret = nouveau_object_new(nv_object(drm), NVDRM_CLIENT, NVDRM_DEVICE, |
321 | 0x0080, &(struct nv_device_class) { | |
322 | .device = ~0, | |
323 | .disable = 0, | |
324 | .debug0 = 0, | |
325 | }, sizeof(struct nv_device_class), | |
326 | &drm->device); | |
327 | if (ret) | |
328 | goto fail_device; | |
329 | ||
77145f1c BS |
330 | /* workaround an odd issue on nvc1 by disabling the device's |
331 | * nosnoop capability. hopefully won't cause issues until a | |
332 | * better fix is found - assuming there is one... | |
333 | */ | |
ebb945a9 | 334 | device = nv_device(drm->device); |
77145f1c BS |
335 | if (nv_device(drm->device)->chipset == 0xc1) |
336 | nv_mask(device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 337 | |
77145f1c | 338 | nouveau_vga_init(drm); |
cb75d97e BS |
339 | nouveau_agp_init(drm); |
340 | ||
ebb945a9 BS |
341 | if (device->card_type >= NV_50) { |
342 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
343 | 0x1000, &drm->client.base.vm); | |
344 | if (ret) | |
345 | goto fail_device; | |
346 | } | |
347 | ||
348 | ret = nouveau_ttm_init(drm); | |
94580299 | 349 | if (ret) |
77145f1c BS |
350 | goto fail_ttm; |
351 | ||
352 | ret = nouveau_bios_init(dev); | |
353 | if (ret) | |
354 | goto fail_bios; | |
355 | ||
356 | ret = nouveau_irq_init(dev); | |
357 | if (ret) | |
358 | goto fail_irq; | |
94580299 | 359 | |
77145f1c | 360 | ret = nouveau_display_create(dev); |
ebb945a9 | 361 | if (ret) |
77145f1c BS |
362 | goto fail_dispctor; |
363 | ||
364 | if (dev->mode_config.num_crtc) { | |
365 | ret = nouveau_display_init(dev); | |
366 | if (ret) | |
367 | goto fail_dispinit; | |
368 | } | |
369 | ||
370 | nouveau_pm_init(dev); | |
ebb945a9 BS |
371 | |
372 | nouveau_accel_init(drm); | |
373 | nouveau_fbcon_init(dev); | |
94580299 BS |
374 | return 0; |
375 | ||
77145f1c BS |
376 | fail_dispinit: |
377 | nouveau_display_destroy(dev); | |
378 | fail_dispctor: | |
379 | nouveau_irq_fini(dev); | |
380 | fail_irq: | |
381 | nouveau_bios_takedown(dev); | |
382 | fail_bios: | |
ebb945a9 | 383 | nouveau_ttm_fini(drm); |
77145f1c BS |
384 | fail_ttm: |
385 | nouveau_agp_fini(drm); | |
386 | nouveau_vga_fini(drm); | |
94580299 BS |
387 | fail_device: |
388 | nouveau_cli_destroy(&drm->client); | |
389 | return ret; | |
390 | } | |
391 | ||
5b8a43ae | 392 | static int |
94580299 BS |
393 | nouveau_drm_unload(struct drm_device *dev) |
394 | { | |
77145f1c | 395 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 396 | |
ebb945a9 BS |
397 | nouveau_fbcon_fini(dev); |
398 | nouveau_accel_fini(drm); | |
399 | ||
77145f1c BS |
400 | nouveau_pm_fini(dev); |
401 | ||
9430738d BS |
402 | if (dev->mode_config.num_crtc) |
403 | nouveau_display_fini(dev); | |
77145f1c BS |
404 | nouveau_display_destroy(dev); |
405 | ||
406 | nouveau_irq_fini(dev); | |
407 | nouveau_bios_takedown(dev); | |
94580299 | 408 | |
ebb945a9 | 409 | nouveau_ttm_fini(drm); |
cb75d97e | 410 | nouveau_agp_fini(drm); |
77145f1c | 411 | nouveau_vga_fini(drm); |
cb75d97e | 412 | |
94580299 BS |
413 | nouveau_cli_destroy(&drm->client); |
414 | return 0; | |
415 | } | |
416 | ||
417 | static void | |
418 | nouveau_drm_remove(struct pci_dev *pdev) | |
419 | { | |
77145f1c BS |
420 | struct drm_device *dev = pci_get_drvdata(pdev); |
421 | struct nouveau_drm *drm = nouveau_drm(dev); | |
ebb945a9 | 422 | struct nouveau_object *device; |
77145f1c BS |
423 | |
424 | device = drm->client.base.device; | |
425 | drm_put_dev(dev); | |
426 | ||
ebb945a9 BS |
427 | nouveau_object_ref(NULL, &device); |
428 | nouveau_object_debug(); | |
94580299 BS |
429 | } |
430 | ||
cd897837 | 431 | static int |
2d8b9ccb | 432 | nouveau_do_suspend(struct drm_device *dev) |
94580299 | 433 | { |
77145f1c | 434 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
435 | struct nouveau_cli *cli; |
436 | int ret; | |
437 | ||
9430738d BS |
438 | if (dev->mode_config.num_crtc) { |
439 | NV_INFO(drm, "suspending fbcon...\n"); | |
440 | nouveau_fbcon_set_suspend(dev, 1); | |
ebb945a9 | 441 | |
9430738d BS |
442 | NV_INFO(drm, "suspending display...\n"); |
443 | ret = nouveau_display_suspend(dev); | |
444 | if (ret) | |
445 | return ret; | |
446 | } | |
94580299 | 447 | |
ebb945a9 BS |
448 | NV_INFO(drm, "evicting buffers...\n"); |
449 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); | |
450 | ||
451 | if (drm->fence && nouveau_fence(drm)->suspend) { | |
452 | if (!nouveau_fence(drm)->suspend(drm)) | |
453 | return -ENOMEM; | |
454 | } | |
455 | ||
456 | NV_INFO(drm, "suspending client object trees...\n"); | |
94580299 BS |
457 | list_for_each_entry(cli, &drm->clients, head) { |
458 | ret = nouveau_client_fini(&cli->base, true); | |
459 | if (ret) | |
460 | goto fail_client; | |
461 | } | |
462 | ||
463 | ret = nouveau_client_fini(&drm->client.base, true); | |
464 | if (ret) | |
465 | goto fail_client; | |
466 | ||
cb75d97e | 467 | nouveau_agp_fini(drm); |
94580299 BS |
468 | return 0; |
469 | ||
470 | fail_client: | |
471 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
472 | nouveau_client_init(&cli->base); | |
473 | } | |
474 | ||
9430738d BS |
475 | if (dev->mode_config.num_crtc) { |
476 | NV_INFO(drm, "resuming display...\n"); | |
477 | nouveau_display_resume(dev); | |
478 | } | |
94580299 BS |
479 | return ret; |
480 | } | |
481 | ||
2d8b9ccb | 482 | int nouveau_pmops_suspend(struct device *dev) |
94580299 | 483 | { |
2d8b9ccb DA |
484 | struct pci_dev *pdev = to_pci_dev(dev); |
485 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
94580299 BS |
486 | int ret; |
487 | ||
2d8b9ccb | 488 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) |
94580299 BS |
489 | return 0; |
490 | ||
2d8b9ccb | 491 | ret = nouveau_do_suspend(drm_dev); |
94580299 BS |
492 | if (ret) |
493 | return ret; | |
2d8b9ccb DA |
494 | |
495 | pci_save_state(pdev); | |
496 | pci_disable_device(pdev); | |
497 | pci_set_power_state(pdev, PCI_D3hot); | |
498 | ||
499 | return 0; | |
500 | } | |
501 | ||
cd897837 | 502 | static int |
2d8b9ccb DA |
503 | nouveau_do_resume(struct drm_device *dev) |
504 | { | |
505 | struct nouveau_drm *drm = nouveau_drm(dev); | |
506 | struct nouveau_cli *cli; | |
507 | ||
508 | NV_INFO(drm, "re-enabling device...\n"); | |
94580299 | 509 | |
cb75d97e BS |
510 | nouveau_agp_reset(drm); |
511 | ||
ebb945a9 | 512 | NV_INFO(drm, "resuming client object trees...\n"); |
94580299 | 513 | nouveau_client_init(&drm->client.base); |
ebb945a9 | 514 | nouveau_agp_init(drm); |
94580299 BS |
515 | |
516 | list_for_each_entry(cli, &drm->clients, head) { | |
517 | nouveau_client_init(&cli->base); | |
518 | } | |
cb75d97e | 519 | |
ebb945a9 BS |
520 | if (drm->fence && nouveau_fence(drm)->resume) |
521 | nouveau_fence(drm)->resume(drm); | |
94580299 | 522 | |
77145f1c BS |
523 | nouveau_run_vbios_init(dev); |
524 | nouveau_irq_postinstall(dev); | |
525 | nouveau_pm_resume(dev); | |
526 | ||
9430738d BS |
527 | if (dev->mode_config.num_crtc) { |
528 | NV_INFO(drm, "resuming display...\n"); | |
529 | nouveau_display_resume(dev); | |
530 | } | |
77145f1c | 531 | return 0; |
94580299 BS |
532 | } |
533 | ||
2d8b9ccb DA |
534 | int nouveau_pmops_resume(struct device *dev) |
535 | { | |
536 | struct pci_dev *pdev = to_pci_dev(dev); | |
537 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
538 | int ret; | |
539 | ||
540 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) | |
541 | return 0; | |
542 | ||
543 | pci_set_power_state(pdev, PCI_D0); | |
544 | pci_restore_state(pdev); | |
545 | ret = pci_enable_device(pdev); | |
546 | if (ret) | |
547 | return ret; | |
548 | pci_set_master(pdev); | |
549 | ||
550 | return nouveau_do_resume(drm_dev); | |
551 | } | |
552 | ||
553 | static int nouveau_pmops_freeze(struct device *dev) | |
554 | { | |
555 | struct pci_dev *pdev = to_pci_dev(dev); | |
556 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
557 | ||
558 | return nouveau_do_suspend(drm_dev); | |
559 | } | |
560 | ||
561 | static int nouveau_pmops_thaw(struct device *dev) | |
562 | { | |
563 | struct pci_dev *pdev = to_pci_dev(dev); | |
564 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
565 | ||
566 | return nouveau_do_resume(drm_dev); | |
567 | } | |
568 | ||
569 | ||
5b8a43ae | 570 | static int |
ebb945a9 BS |
571 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
572 | { | |
573 | struct pci_dev *pdev = dev->pdev; | |
574 | struct nouveau_drm *drm = nouveau_drm(dev); | |
575 | struct nouveau_cli *cli; | |
a2896ced | 576 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
577 | int ret; |
578 | ||
a2896ced MS |
579 | get_task_comm(tmpname, current); |
580 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 BS |
581 | |
582 | ret = nouveau_cli_create(pdev, name, sizeof(*cli), (void **)&cli); | |
ebb945a9 BS |
583 | if (ret) |
584 | return ret; | |
585 | ||
586 | if (nv_device(drm->device)->card_type >= NV_50) { | |
587 | ret = nouveau_vm_new(nv_device(drm->device), 0, (1ULL << 40), | |
588 | 0x1000, &cli->base.vm); | |
589 | if (ret) { | |
590 | nouveau_cli_destroy(cli); | |
591 | return ret; | |
592 | } | |
593 | } | |
594 | ||
595 | fpriv->driver_priv = cli; | |
596 | ||
597 | mutex_lock(&drm->client.mutex); | |
598 | list_add(&cli->head, &drm->clients); | |
599 | mutex_unlock(&drm->client.mutex); | |
600 | return 0; | |
601 | } | |
602 | ||
5b8a43ae | 603 | static void |
ebb945a9 BS |
604 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
605 | { | |
606 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
607 | struct nouveau_drm *drm = nouveau_drm(dev); | |
608 | ||
609 | if (cli->abi16) | |
610 | nouveau_abi16_fini(cli->abi16); | |
611 | ||
612 | mutex_lock(&drm->client.mutex); | |
613 | list_del(&cli->head); | |
614 | mutex_unlock(&drm->client.mutex); | |
615 | } | |
616 | ||
5b8a43ae | 617 | static void |
ebb945a9 BS |
618 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
619 | { | |
620 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
621 | nouveau_cli_destroy(cli); | |
622 | } | |
623 | ||
77145f1c BS |
624 | static struct drm_ioctl_desc |
625 | nouveau_ioctls[] = { | |
626 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH), | |
627 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | |
628 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH), | |
629 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH), | |
630 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH), | |
631 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH), | |
632 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH), | |
633 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH), | |
634 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH), | |
635 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH), | |
636 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH), | |
637 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH), | |
638 | }; | |
639 | ||
640 | static const struct file_operations | |
641 | nouveau_driver_fops = { | |
642 | .owner = THIS_MODULE, | |
643 | .open = drm_open, | |
644 | .release = drm_release, | |
645 | .unlocked_ioctl = drm_ioctl, | |
646 | .mmap = nouveau_ttm_mmap, | |
647 | .poll = drm_poll, | |
648 | .fasync = drm_fasync, | |
649 | .read = drm_read, | |
650 | #if defined(CONFIG_COMPAT) | |
651 | .compat_ioctl = nouveau_compat_ioctl, | |
652 | #endif | |
653 | .llseek = noop_llseek, | |
654 | }; | |
655 | ||
656 | static struct drm_driver | |
657 | driver = { | |
658 | .driver_features = | |
659 | DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG | | |
660 | DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | | |
661 | DRIVER_MODESET | DRIVER_PRIME, | |
662 | ||
663 | .load = nouveau_drm_load, | |
664 | .unload = nouveau_drm_unload, | |
665 | .open = nouveau_drm_open, | |
666 | .preclose = nouveau_drm_preclose, | |
667 | .postclose = nouveau_drm_postclose, | |
668 | .lastclose = nouveau_vga_lastclose, | |
669 | ||
670 | .irq_preinstall = nouveau_irq_preinstall, | |
671 | .irq_postinstall = nouveau_irq_postinstall, | |
672 | .irq_uninstall = nouveau_irq_uninstall, | |
673 | .irq_handler = nouveau_irq_handler, | |
674 | ||
675 | .get_vblank_counter = drm_vblank_count, | |
1d7c71a3 BS |
676 | .enable_vblank = nouveau_drm_vblank_enable, |
677 | .disable_vblank = nouveau_drm_vblank_disable, | |
77145f1c BS |
678 | |
679 | .ioctls = nouveau_ioctls, | |
680 | .fops = &nouveau_driver_fops, | |
681 | ||
682 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
683 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
684 | .gem_prime_export = nouveau_gem_prime_export, | |
685 | .gem_prime_import = nouveau_gem_prime_import, | |
686 | ||
687 | .gem_init_object = nouveau_gem_object_new, | |
688 | .gem_free_object = nouveau_gem_object_del, | |
689 | .gem_open_object = nouveau_gem_object_open, | |
690 | .gem_close_object = nouveau_gem_object_close, | |
691 | ||
692 | .dumb_create = nouveau_display_dumb_create, | |
693 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
694 | .dumb_destroy = nouveau_display_dumb_destroy, | |
695 | ||
696 | .name = DRIVER_NAME, | |
697 | .desc = DRIVER_DESC, | |
698 | #ifdef GIT_REVISION | |
699 | .date = GIT_REVISION, | |
700 | #else | |
701 | .date = DRIVER_DATE, | |
702 | #endif | |
703 | .major = DRIVER_MAJOR, | |
704 | .minor = DRIVER_MINOR, | |
705 | .patchlevel = DRIVER_PATCHLEVEL, | |
706 | }; | |
707 | ||
94580299 BS |
708 | static struct pci_device_id |
709 | nouveau_drm_pci_table[] = { | |
710 | { | |
711 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
712 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
713 | .class_mask = 0xff << 16, | |
714 | }, | |
715 | { | |
716 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
717 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
718 | .class_mask = 0xff << 16, | |
719 | }, | |
720 | {} | |
721 | }; | |
722 | ||
2d8b9ccb DA |
723 | static const struct dev_pm_ops nouveau_pm_ops = { |
724 | .suspend = nouveau_pmops_suspend, | |
725 | .resume = nouveau_pmops_resume, | |
726 | .freeze = nouveau_pmops_freeze, | |
727 | .thaw = nouveau_pmops_thaw, | |
728 | .poweroff = nouveau_pmops_freeze, | |
729 | .restore = nouveau_pmops_resume, | |
730 | }; | |
731 | ||
94580299 BS |
732 | static struct pci_driver |
733 | nouveau_drm_pci_driver = { | |
734 | .name = "nouveau", | |
735 | .id_table = nouveau_drm_pci_table, | |
736 | .probe = nouveau_drm_probe, | |
737 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 738 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
739 | }; |
740 | ||
741 | static int __init | |
742 | nouveau_drm_init(void) | |
743 | { | |
77145f1c BS |
744 | driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls); |
745 | ||
746 | if (nouveau_modeset == -1) { | |
747 | #ifdef CONFIG_VGA_CONSOLE | |
748 | if (vgacon_text_force()) | |
749 | nouveau_modeset = 0; | |
77145f1c | 750 | #endif |
77145f1c BS |
751 | } |
752 | ||
753 | if (!nouveau_modeset) | |
754 | return 0; | |
755 | ||
756 | nouveau_register_dsm_handler(); | |
757 | return drm_pci_init(&driver, &nouveau_drm_pci_driver); | |
94580299 BS |
758 | } |
759 | ||
760 | static void __exit | |
761 | nouveau_drm_exit(void) | |
762 | { | |
77145f1c BS |
763 | if (!nouveau_modeset) |
764 | return; | |
765 | ||
766 | drm_pci_exit(&driver, &nouveau_drm_pci_driver); | |
767 | nouveau_unregister_dsm_handler(); | |
94580299 BS |
768 | } |
769 | ||
770 | module_init(nouveau_drm_init); | |
771 | module_exit(nouveau_drm_exit); | |
772 | ||
773 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
774 | MODULE_AUTHOR(DRIVER_AUTHOR); |
775 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 776 | MODULE_LICENSE("GPL and additional rights"); |