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dff96888 | 1 | /* SPDX-License-Identifier: GPL-2.0 OR MIT */ |
fb1d9738 JB |
2 | /************************************************************************** |
3 | * | |
09881d29 | 4 | * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA |
fb1d9738 JB |
5 | * |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the | |
8 | * "Software"), to deal in the Software without restriction, including | |
9 | * without limitation the rights to use, copy, modify, merge, publish, | |
10 | * distribute, sub license, and/or sell copies of the Software, and to | |
11 | * permit persons to whom the Software is furnished to do so, subject to | |
12 | * the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice (including the | |
15 | * next paragraph) shall be included in all copies or substantial portions | |
16 | * of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, | |
22 | * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR | |
23 | * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE | |
24 | * USE OR OTHER DEALINGS IN THE SOFTWARE. | |
25 | * | |
26 | **************************************************************************/ | |
27 | ||
28 | #ifndef _VMWGFX_DRV_H_ | |
29 | #define _VMWGFX_DRV_H_ | |
30 | ||
760285e7 | 31 | #include <linux/suspend.h> |
d5c1f011 | 32 | #include <linux/sync_file.h> |
9e931f2e | 33 | #include <linux/hashtable.h> |
d5c1f011 SR |
34 | |
35 | #include <drm/drm_auth.h> | |
36 | #include <drm/drm_device.h> | |
37 | #include <drm/drm_file.h> | |
d5c1f011 SR |
38 | #include <drm/drm_rect.h> |
39 | ||
760285e7 | 40 | #include <drm/ttm/ttm_execbuf_util.h> |
a3185f91 CK |
41 | #include <drm/ttm/ttm_tt.h> |
42 | #include <drm/ttm/ttm_placement.h> | |
43 | #include <drm/ttm/ttm_bo.h> | |
d5c1f011 | 44 | |
d5c1f011 SR |
45 | #include "ttm_object.h" |
46 | ||
47 | #include "vmwgfx_fence.h" | |
48 | #include "vmwgfx_reg.h" | |
49 | #include "vmwgfx_validation.h" | |
50 | ||
51 | /* | |
52 | * FIXME: vmwgfx_drm.h needs to be last due to dependencies. | |
53 | * uapi headers should not depend on header files outside uapi/. | |
54 | */ | |
55 | #include <drm/vmwgfx_drm.h> | |
56 | ||
fb1d9738 | 57 | |
e300173f | 58 | #define VMWGFX_DRIVER_NAME "vmwgfx" |
94eb7de6 | 59 | #define VMWGFX_DRIVER_DATE "20211206" |
2ae7b03c | 60 | #define VMWGFX_DRIVER_MAJOR 2 |
94eb7de6 | 61 | #define VMWGFX_DRIVER_MINOR 20 |
c29758cd | 62 | #define VMWGFX_DRIVER_PATCHLEVEL 0 |
fb1d9738 | 63 | #define VMWGFX_FIFO_STATIC_SIZE (1024*1024) |
7c4f7780 | 64 | #define VMWGFX_MAX_DISPLAYS 16 |
be38ab6e | 65 | #define VMWGFX_CMD_BOUNCE_INIT_SIZE 32768 |
fb1d9738 | 66 | |
df42523c ZR |
67 | #define VMWGFX_MIN_INITIAL_WIDTH 1280 |
68 | #define VMWGFX_MIN_INITIAL_HEIGHT 800 | |
69 | ||
8772c0bb | 70 | #define VMWGFX_PCI_ID_SVGA2 0x0405 |
2cd80dbd | 71 | #define VMWGFX_PCI_ID_SVGA3 0x0406 |
8772c0bb | 72 | |
32160e6a ZR |
73 | /* |
74 | * This has to match get_count_order(SVGA_IRQFLAG_MAX) | |
75 | */ | |
76 | #define VMWGFX_MAX_NUM_IRQS 6 | |
77 | ||
3530bdc3 TH |
78 | /* |
79 | * Perhaps we should have sysfs entries for these. | |
80 | */ | |
81 | #define VMWGFX_NUM_GB_CONTEXT 256 | |
82 | #define VMWGFX_NUM_GB_SHADER 20000 | |
83 | #define VMWGFX_NUM_GB_SURFACE 32768 | |
7cba9062 | 84 | #define VMWGFX_NUM_GB_SCREEN_TARGET VMWGFX_MAX_DISPLAYS |
d80efd5c TH |
85 | #define VMWGFX_NUM_DXCONTEXT 256 |
86 | #define VMWGFX_NUM_DXQUERY 512 | |
3530bdc3 TH |
87 | #define VMWGFX_NUM_MOB (VMWGFX_NUM_GB_CONTEXT +\ |
88 | VMWGFX_NUM_GB_SHADER +\ | |
7cba9062 TH |
89 | VMWGFX_NUM_GB_SURFACE +\ |
90 | VMWGFX_NUM_GB_SCREEN_TARGET) | |
3530bdc3 | 91 | |
f6be2326 ZR |
92 | #define VMW_PL_GMR (TTM_PL_PRIV + 0) |
93 | #define VMW_PL_MOB (TTM_PL_PRIV + 1) | |
94 | #define VMW_PL_SYSTEM (TTM_PL_PRIV + 2) | |
135cba0d | 95 | |
ae2a1040 TH |
96 | #define VMW_RES_CONTEXT ttm_driver_type0 |
97 | #define VMW_RES_SURFACE ttm_driver_type1 | |
98 | #define VMW_RES_STREAM ttm_driver_type2 | |
99 | #define VMW_RES_FENCE ttm_driver_type3 | |
c74c162f | 100 | #define VMW_RES_SHADER ttm_driver_type4 |
9e931f2e | 101 | #define VMW_RES_HT_ORDER 12 |
ae2a1040 | 102 | |
da7ffb96 ZR |
103 | #define VMW_CURSOR_SNOOP_FORMAT SVGA3D_A8R8G8B8 |
104 | #define VMW_CURSOR_SNOOP_WIDTH 64 | |
105 | #define VMW_CURSOR_SNOOP_HEIGHT 64 | |
106 | ||
7a7a933e MK |
107 | #define MKSSTAT_CAPACITY_LOG2 5U |
108 | #define MKSSTAT_CAPACITY (1U << MKSSTAT_CAPACITY_LOG2) | |
109 | ||
fb1d9738 | 110 | struct vmw_fpriv { |
fb1d9738 | 111 | struct ttm_object_file *tfile; |
f9261b30 | 112 | bool gb_aware; /* user-space is guest-backed aware */ |
fb1d9738 JB |
113 | }; |
114 | ||
9da30cdd MM |
115 | struct vmwgfx_hash_item { |
116 | struct hlist_node head; | |
117 | unsigned long key; | |
118 | }; | |
119 | ||
fb1d9738 | 120 | |
c0951b79 TH |
121 | /** |
122 | * struct vmw_validate_buffer - Carries validation info about buffers. | |
123 | * | |
124 | * @base: Validation info for TTM. | |
125 | * @hash: Hash entry for quick lookup of the TTM buffer object. | |
126 | * | |
127 | * This structure contains also driver private validation info | |
128 | * on top of the info needed by TTM. | |
129 | */ | |
130 | struct vmw_validate_buffer { | |
131 | struct ttm_validate_buffer base; | |
2985c964 | 132 | struct vmwgfx_hash_item hash; |
96c5f0df | 133 | bool validate_as_mob; |
c0951b79 TH |
134 | }; |
135 | ||
136 | struct vmw_res_func; | |
13289241 TH |
137 | |
138 | ||
139 | /** | |
140 | * struct vmw-resource - base class for hardware resources | |
141 | * | |
142 | * @kref: For refcounting. | |
143 | * @dev_priv: Pointer to the device private for this resource. Immutable. | |
144 | * @id: Device id. Protected by @dev_priv::resource_lock. | |
668b2066 ZR |
145 | * @guest_memory_size: Guest memory buffer size. Immutable. |
146 | * @res_dirty: Resource contains data not yet in the guest memory buffer. | |
b7468b15 | 147 | * Protected by resource reserved. |
668b2066 ZR |
148 | * @guest_memory_dirty: Guest memory buffer contains data not yet in the HW |
149 | * resource. Protected by resource reserved. | |
b7468b15 | 150 | * @coherent: Emulate coherency by tracking vm accesses. |
668b2066 ZR |
151 | * @guest_memory_bo: The guest memory buffer if any. Protected by resource |
152 | * reserved. | |
153 | * @guest_memory_offset: Offset into the guest memory buffer if any. Protected | |
154 | * by resource reserved. Note that only a few resource types can have a | |
155 | * @guest_memory_offset different from zero. | |
13289241 TH |
156 | * @pin_count: The pin count for this resource. A pinned resource has a |
157 | * pin-count greater than zero. It is not on the resource LRU lists and its | |
668b2066 | 158 | * guest memory buffer is pinned. Hence it can't be evicted. |
13289241 | 159 | * @func: Method vtable for this resource. Immutable. |
668b2066 ZR |
160 | * @mob_node; Node for the MOB guest memory rbtree. Protected by |
161 | * @guest_memory_bo reserved. | |
13289241 | 162 | * @lru_head: List head for the LRU list. Protected by @dev_priv::resource_lock. |
13289241 TH |
163 | * @binding_head: List head for the context binding list. Protected by |
164 | * the @dev_priv::binding_mutex | |
165 | * @res_free: The resource destructor. | |
166 | * @hw_destroy: Callback to destroy the resource on the device, as part of | |
167 | * resource destruction. | |
168 | */ | |
09881d29 | 169 | struct vmw_bo; |
668b2066 | 170 | struct vmw_bo; |
b7468b15 | 171 | struct vmw_resource_dirty; |
fb1d9738 JB |
172 | struct vmw_resource { |
173 | struct kref kref; | |
174 | struct vmw_private *dev_priv; | |
fb1d9738 | 175 | int id; |
a0a63940 | 176 | u32 used_prio; |
668b2066 | 177 | unsigned long guest_memory_size; |
b7468b15 | 178 | u32 res_dirty : 1; |
668b2066 | 179 | u32 guest_memory_dirty : 1; |
b7468b15 | 180 | u32 coherent : 1; |
668b2066 ZR |
181 | struct vmw_bo *guest_memory_bo; |
182 | unsigned long guest_memory_offset; | |
13289241 | 183 | unsigned long pin_count; |
c0951b79 | 184 | const struct vmw_res_func *func; |
61335d7a | 185 | struct rb_node mob_node; |
13289241 | 186 | struct list_head lru_head; |
13289241 | 187 | struct list_head binding_head; |
b7468b15 | 188 | struct vmw_resource_dirty *dirty; |
fb1d9738 | 189 | void (*res_free) (struct vmw_resource *res); |
c0951b79 TH |
190 | void (*hw_destroy) (struct vmw_resource *res); |
191 | }; | |
192 | ||
18e4a466 TH |
193 | |
194 | /* | |
195 | * Resources that are managed using ioctls. | |
196 | */ | |
c0951b79 TH |
197 | enum vmw_res_type { |
198 | vmw_res_context, | |
199 | vmw_res_surface, | |
200 | vmw_res_stream, | |
c74c162f | 201 | vmw_res_shader, |
d80efd5c TH |
202 | vmw_res_dx_context, |
203 | vmw_res_cotable, | |
204 | vmw_res_view, | |
e8bead9c | 205 | vmw_res_streamoutput, |
c0951b79 | 206 | vmw_res_max |
fb1d9738 JB |
207 | }; |
208 | ||
18e4a466 TH |
209 | /* |
210 | * Resources that are managed using command streams. | |
211 | */ | |
212 | enum vmw_cmdbuf_res_type { | |
d80efd5c | 213 | vmw_cmdbuf_res_shader, |
e8bead9c DR |
214 | vmw_cmdbuf_res_view, |
215 | vmw_cmdbuf_res_streamoutput | |
18e4a466 TH |
216 | }; |
217 | ||
218 | struct vmw_cmdbuf_res_manager; | |
219 | ||
fb1d9738 | 220 | struct vmw_cursor_snooper { |
fb1d9738 JB |
221 | size_t age; |
222 | uint32_t *image; | |
223 | }; | |
224 | ||
2fcd5a73 | 225 | struct vmw_framebuffer; |
5bb39e81 | 226 | struct vmw_surface_offset; |
2fcd5a73 | 227 | |
26b82873 DR |
228 | /** |
229 | * struct vmw_surface_metadata - Metadata describing a surface. | |
230 | * | |
231 | * @flags: Device flags. | |
232 | * @format: Surface SVGA3D_x format. | |
233 | * @mip_levels: Mip level for each face. For GB first index is used only. | |
234 | * @multisample_count: Sample count. | |
235 | * @multisample_pattern: Sample patterns. | |
236 | * @quality_level: Quality level. | |
237 | * @autogen_filter: Filter for automatically generated mipmaps. | |
238 | * @array_size: Number of array elements for a 1D/2D texture. For cubemap | |
239 | texture number of faces * array_size. This should be 0 for pre | |
240 | SM4 device. | |
2a50f06d | 241 | * @buffer_byte_stride: Buffer byte stride. |
26b82873 DR |
242 | * @num_sizes: Size of @sizes. For GB surface this should always be 1. |
243 | * @base_size: Surface dimension. | |
244 | * @sizes: Array representing mip sizes. Legacy only. | |
245 | * @scanout: Whether this surface will be used for scanout. | |
246 | * | |
247 | * This tracks metadata for both legacy and guest backed surface. | |
248 | */ | |
249 | struct vmw_surface_metadata { | |
250 | u64 flags; | |
251 | u32 format; | |
252 | u32 mip_levels[DRM_VMW_MAX_SURFACE_FACES]; | |
253 | u32 multisample_count; | |
254 | u32 multisample_pattern; | |
255 | u32 quality_level; | |
256 | u32 autogen_filter; | |
257 | u32 array_size; | |
258 | u32 num_sizes; | |
2a50f06d | 259 | u32 buffer_byte_stride; |
c0951b79 | 260 | struct drm_vmw_size base_size; |
fb1d9738 | 261 | struct drm_vmw_size *sizes; |
5ffdb658 | 262 | bool scanout; |
26b82873 DR |
263 | }; |
264 | ||
265 | /** | |
266 | * struct vmw_surface: Resource structure for a surface. | |
267 | * | |
268 | * @res: The base resource for this surface. | |
269 | * @metadata: Metadata for this surface resource. | |
270 | * @snooper: Cursor data. Legacy surface only. | |
271 | * @offsets: Legacy surface only. | |
272 | * @view_list: List of views bound to this surface. | |
273 | */ | |
274 | struct vmw_surface { | |
275 | struct vmw_resource res; | |
276 | struct vmw_surface_metadata metadata; | |
fb1d9738 | 277 | struct vmw_cursor_snooper snooper; |
5bb39e81 | 278 | struct vmw_surface_offset *offsets; |
d80efd5c | 279 | struct list_head view_list; |
fb1d9738 JB |
280 | }; |
281 | ||
282 | struct vmw_fifo_state { | |
283 | unsigned long reserved_size; | |
b9eb1a61 TH |
284 | u32 *dynamic_buffer; |
285 | u32 *static_buffer; | |
fb1d9738 JB |
286 | unsigned long static_buffer_size; |
287 | bool using_bounce_buffer; | |
288 | uint32_t capabilities; | |
85b9e487 | 289 | struct mutex fifo_mutex; |
fb1d9738 JB |
290 | struct rw_semaphore rwsem; |
291 | }; | |
292 | ||
c0951b79 TH |
293 | /** |
294 | * struct vmw_res_cache_entry - resource information cache entry | |
9c079b8c TH |
295 | * @handle: User-space handle of a resource. |
296 | * @res: Non-ref-counted pointer to the resource. | |
297 | * @valid_handle: Whether the @handle member is valid. | |
c0951b79 TH |
298 | * @valid: Whether the entry is valid, which also implies that the execbuf |
299 | * code holds a reference to the resource, and it's placed on the | |
300 | * validation list. | |
c0951b79 TH |
301 | * |
302 | * Used to avoid frequent repeated user-space handle lookups of the | |
303 | * same resource. | |
304 | */ | |
305 | struct vmw_res_cache_entry { | |
c0951b79 TH |
306 | uint32_t handle; |
307 | struct vmw_resource *res; | |
9c079b8c TH |
308 | void *private; |
309 | unsigned short valid_handle; | |
310 | unsigned short valid; | |
c0951b79 TH |
311 | }; |
312 | ||
d92d9851 TH |
313 | /** |
314 | * enum vmw_dma_map_mode - indicate how to perform TTM page dma mappings. | |
315 | */ | |
316 | enum vmw_dma_map_mode { | |
d92d9851 TH |
317 | vmw_dma_alloc_coherent, /* Use TTM coherent pages */ |
318 | vmw_dma_map_populate, /* Unmap from DMA just after unpopulate */ | |
319 | vmw_dma_map_bind, /* Unmap from DMA just before unbind */ | |
320 | vmw_dma_map_max | |
321 | }; | |
322 | ||
323 | /** | |
324 | * struct vmw_sg_table - Scatter/gather table for binding, with additional | |
325 | * device-specific information. | |
326 | * | |
327 | * @sgt: Pointer to a struct sg_table with binding information | |
e1c05067 | 328 | * @num_regions: Number of regions with device-address contiguous pages |
d92d9851 TH |
329 | */ |
330 | struct vmw_sg_table { | |
331 | enum vmw_dma_map_mode mode; | |
332 | struct page **pages; | |
333 | const dma_addr_t *addrs; | |
334 | struct sg_table *sgt; | |
d92d9851 TH |
335 | unsigned long num_pages; |
336 | }; | |
337 | ||
338 | /** | |
339 | * struct vmw_piter - Page iterator that iterates over a list of pages | |
340 | * and DMA addresses that could be either a scatter-gather list or | |
341 | * arrays | |
342 | * | |
343 | * @pages: Array of page pointers to the pages. | |
344 | * @addrs: DMA addresses to the pages if coherent pages are used. | |
345 | * @iter: Scatter-gather page iterator. Current position in SG list. | |
346 | * @i: Current position in arrays. | |
347 | * @num_pages: Number of pages total. | |
348 | * @next: Function to advance the iterator. Returns false if past the list | |
349 | * of pages, true otherwise. | |
350 | * @dma_address: Function to return the DMA address of the current page. | |
351 | */ | |
352 | struct vmw_piter { | |
353 | struct page **pages; | |
354 | const dma_addr_t *addrs; | |
8dc39cfc | 355 | struct sg_dma_page_iter iter; |
d92d9851 TH |
356 | unsigned long i; |
357 | unsigned long num_pages; | |
358 | bool (*next)(struct vmw_piter *); | |
359 | dma_addr_t (*dma_address)(struct vmw_piter *); | |
d92d9851 TH |
360 | }; |
361 | ||
8afa13a0 ZR |
362 | |
363 | struct vmw_ttm_tt { | |
364 | struct ttm_tt dma_ttm; | |
365 | struct vmw_private *dev_priv; | |
366 | int gmr_id; | |
367 | struct vmw_mob *mob; | |
368 | int mem_type; | |
369 | struct sg_table sgt; | |
370 | struct vmw_sg_table vsgt; | |
371 | bool mapped; | |
372 | bool bound; | |
373 | }; | |
374 | ||
b5c3b1a6 | 375 | /* |
c8261a96 | 376 | * enum vmw_display_unit_type - Describes the display unit |
b5c3b1a6 | 377 | */ |
c8261a96 SY |
378 | enum vmw_display_unit_type { |
379 | vmw_du_invalid = 0, | |
380 | vmw_du_legacy, | |
35c05125 | 381 | vmw_du_screen_object, |
2b273544 ZR |
382 | vmw_du_screen_target, |
383 | vmw_du_max | |
b5c3b1a6 TH |
384 | }; |
385 | ||
9c079b8c TH |
386 | struct vmw_validation_context; |
387 | struct vmw_ctx_validation_info; | |
b5c3b1a6 | 388 | |
9c079b8c TH |
389 | /** |
390 | * struct vmw_sw_context - Command submission context | |
391 | * @res_ht: Pointer hash table used to find validation duplicates | |
392 | * @kernel: Whether the command buffer originates from kernel code rather | |
393 | * than from user-space | |
394 | * @fp: If @kernel is false, points to the file of the client. Otherwise | |
395 | * NULL | |
9c079b8c TH |
396 | * @cmd_bounce: Command bounce buffer used for command validation before |
397 | * copying to fifo space | |
398 | * @cmd_bounce_size: Current command bounce buffer size | |
399 | * @cur_query_bo: Current buffer object used as query result buffer | |
fc18afcf | 400 | * @bo_relocations: List of buffer object relocations |
9c079b8c TH |
401 | * @res_relocations: List of resource relocations |
402 | * @buf_start: Pointer to start of memory where command validation takes | |
403 | * place | |
404 | * @res_cache: Cache of recently looked up resources | |
405 | * @last_query_ctx: Last context that submitted a query | |
406 | * @needs_post_query_barrier: Whether a query barrier is needed after | |
407 | * command submission | |
9c079b8c TH |
408 | * @staged_bindings: Cached per-context binding tracker |
409 | * @staged_bindings_inuse: Whether the cached per-context binding tracker | |
410 | * is in use | |
411 | * @staged_cmd_res: List of staged command buffer managed resources in this | |
412 | * command buffer | |
413 | * @ctx_list: List of context resources referenced in this command buffer | |
414 | * @dx_ctx_node: Validation metadata of the current DX context | |
415 | * @dx_query_mob: The MOB used for DX queries | |
416 | * @dx_query_ctx: The DX context used for the last DX query | |
417 | * @man: Pointer to the command buffer managed resource manager | |
418 | * @ctx: The validation context | |
419 | */ | |
fb1d9738 | 420 | struct vmw_sw_context{ |
9e931f2e | 421 | DECLARE_HASHTABLE(res_ht, VMW_RES_HT_ORDER); |
9c079b8c | 422 | bool kernel; |
d5bde956 | 423 | struct vmw_fpriv *fp; |
8afa13a0 | 424 | struct drm_file *filp; |
be38ab6e TH |
425 | uint32_t *cmd_bounce; |
426 | uint32_t cmd_bounce_size; | |
09881d29 | 427 | struct vmw_bo *cur_query_bo; |
fc18afcf | 428 | struct list_head bo_relocations; |
c0951b79 TH |
429 | struct list_head res_relocations; |
430 | uint32_t *buf_start; | |
431 | struct vmw_res_cache_entry res_cache[vmw_res_max]; | |
432 | struct vmw_resource *last_query_ctx; | |
433 | bool needs_post_query_barrier; | |
d80efd5c TH |
434 | struct vmw_ctx_binding_state *staged_bindings; |
435 | bool staged_bindings_inuse; | |
18e4a466 | 436 | struct list_head staged_cmd_res; |
9c079b8c TH |
437 | struct list_head ctx_list; |
438 | struct vmw_ctx_validation_info *dx_ctx_node; | |
09881d29 | 439 | struct vmw_bo *dx_query_mob; |
d80efd5c TH |
440 | struct vmw_resource *dx_query_ctx; |
441 | struct vmw_cmdbuf_res_manager *man; | |
9c079b8c | 442 | struct vmw_validation_context *ctx; |
fb1d9738 JB |
443 | }; |
444 | ||
445 | struct vmw_legacy_display; | |
446 | struct vmw_overlay; | |
447 | ||
7c4f7780 TH |
448 | struct vmw_vga_topology_state { |
449 | uint32_t width; | |
450 | uint32_t height; | |
451 | uint32_t primary; | |
452 | uint32_t pos_x; | |
453 | uint32_t pos_y; | |
454 | }; | |
455 | ||
d80efd5c TH |
456 | |
457 | /* | |
458 | * struct vmw_otable - Guest Memory OBject table metadata | |
459 | * | |
460 | * @size: Size of the table (page-aligned). | |
461 | * @page_table: Pointer to a struct vmw_mob holding the page table. | |
462 | */ | |
463 | struct vmw_otable { | |
464 | unsigned long size; | |
465 | struct vmw_mob *page_table; | |
466 | bool enabled; | |
467 | }; | |
468 | ||
469 | struct vmw_otable_batch { | |
470 | unsigned num_otables; | |
471 | struct vmw_otable *otables; | |
472 | struct vmw_resource *context; | |
668b2066 | 473 | struct vmw_bo *otable_bo; |
d80efd5c TH |
474 | }; |
475 | ||
ef369904 TH |
476 | enum { |
477 | VMW_IRQTHREAD_FENCE, | |
478 | VMW_IRQTHREAD_CMDBUF, | |
479 | VMW_IRQTHREAD_MAX | |
480 | }; | |
481 | ||
878c6ecd DR |
482 | /** |
483 | * enum vmw_sm_type - Graphics context capability supported by device. | |
484 | * @VMW_SM_LEGACY: Pre DX context. | |
485 | * @VMW_SM_4: Context support upto SM4. | |
486 | * @VMW_SM_4_1: Context support upto SM4_1. | |
4dec2805 | 487 | * @VMW_SM_5: Context support up to SM5. |
4fb9326b | 488 | * @VMW_SM_5_1X: Adds support for sm5_1 and gl43 extensions. |
878c6ecd DR |
489 | * @VMW_SM_MAX: Should be the last. |
490 | */ | |
491 | enum vmw_sm_type { | |
492 | VMW_SM_LEGACY = 0, | |
493 | VMW_SM_4, | |
494 | VMW_SM_4_1, | |
4dec2805 | 495 | VMW_SM_5, |
4fb9326b | 496 | VMW_SM_5_1X, |
878c6ecd DR |
497 | VMW_SM_MAX |
498 | }; | |
499 | ||
fb1d9738 | 500 | struct vmw_private { |
9703bb32 | 501 | struct drm_device drm; |
8af8a109 | 502 | struct ttm_device bdev; |
fb1d9738 | 503 | |
293f86b3 | 504 | struct drm_vma_offset_manager vma_manager; |
baee602e | 505 | u32 pci_id; |
be4f77ac ZR |
506 | resource_size_t io_start; |
507 | resource_size_t vram_start; | |
508 | resource_size_t vram_size; | |
ebc9ac7c | 509 | resource_size_t max_primary_mem; |
c2aaa37d | 510 | u32 __iomem *rmmio; |
be4f77ac | 511 | u32 *fifo_mem; |
be4f77ac | 512 | resource_size_t fifo_mem_size; |
fb1d9738 JB |
513 | uint32_t fb_max_width; |
514 | uint32_t fb_max_height; | |
35c05125 SY |
515 | uint32_t texture_max_width; |
516 | uint32_t texture_max_height; | |
517 | uint32_t stdu_max_width; | |
518 | uint32_t stdu_max_height; | |
eb4f923b JB |
519 | uint32_t initial_width; |
520 | uint32_t initial_height; | |
fb1d9738 | 521 | uint32_t capabilities; |
3b4c2511 | 522 | uint32_t capabilities2; |
fb1d9738 | 523 | uint32_t max_gmr_ids; |
fb17f189 | 524 | uint32_t max_gmr_pages; |
6da768aa | 525 | uint32_t max_mob_pages; |
857aea1c | 526 | uint32_t max_mob_size; |
fb17f189 | 527 | uint32_t memory_size; |
135cba0d | 528 | bool has_gmr; |
3530bdc3 | 529 | bool has_mob; |
496eb6fd | 530 | spinlock_t hw_lock; |
04319d89 | 531 | bool assume_16bpp; |
32160e6a ZR |
532 | u32 irqs[VMWGFX_MAX_NUM_IRQS]; |
533 | u32 num_irq_vectors; | |
878c6ecd DR |
534 | |
535 | enum vmw_sm_type sm_type; | |
fb1d9738 | 536 | |
fb1d9738 JB |
537 | /* |
538 | * Framebuffer info. | |
539 | */ | |
540 | ||
c8261a96 | 541 | enum vmw_display_unit_type active_display_unit; |
fb1d9738 JB |
542 | struct vmw_legacy_display *ldu_priv; |
543 | struct vmw_overlay *overlay_priv; | |
578e609a | 544 | struct drm_property *hotplug_mode_update_property; |
76404ac0 | 545 | struct drm_property *implicit_placement_property; |
36cc79bc | 546 | spinlock_t cursor_lock; |
c3b9b165 | 547 | struct drm_atomic_state *suspend_state; |
fb1d9738 JB |
548 | |
549 | /* | |
550 | * Context and surface management. | |
551 | */ | |
552 | ||
13289241 | 553 | spinlock_t resource_lock; |
c0951b79 | 554 | struct idr res_idr[vmw_res_max]; |
fb1d9738 JB |
555 | |
556 | /* | |
557 | * A resource manager for kernel-only surfaces and | |
558 | * contexts. | |
559 | */ | |
560 | ||
561 | struct ttm_object_device *tdev; | |
562 | ||
563 | /* | |
564 | * Fencing and IRQs. | |
565 | */ | |
566 | ||
6bcd8d3c | 567 | atomic_t marker_seq; |
fb1d9738 JB |
568 | wait_queue_head_t fence_queue; |
569 | wait_queue_head_t fifo_queue; | |
496eb6fd TH |
570 | spinlock_t waiter_lock; |
571 | int fence_queue_waiters; /* Protected by waiter_lock */ | |
572 | int goal_queue_waiters; /* Protected by waiter_lock */ | |
d2e8851a TH |
573 | int cmdbuf_waiters; /* Protected by waiter_lock */ |
574 | int error_waiters; /* Protected by waiter_lock */ | |
575 | int fifo_queue_waiters; /* Protected by waiter_lock */ | |
6bcd8d3c | 576 | uint32_t last_read_seqno; |
ae2a1040 | 577 | struct vmw_fence_manager *fman; |
d2e8851a | 578 | uint32_t irq_mask; /* Updates protected by waiter_lock */ |
fb1d9738 JB |
579 | |
580 | /* | |
581 | * Device state | |
582 | */ | |
583 | ||
584 | uint32_t traces_state; | |
585 | uint32_t enable_state; | |
586 | uint32_t config_done_state; | |
587 | ||
588 | /** | |
589 | * Execbuf | |
590 | */ | |
591 | /** | |
592 | * Protected by the cmdbuf mutex. | |
593 | */ | |
594 | ||
595 | struct vmw_sw_context ctx; | |
fb1d9738 | 596 | struct mutex cmdbuf_mutex; |
173fb7d4 | 597 | struct mutex binding_mutex; |
fb1d9738 | 598 | |
fb1d9738 | 599 | /** |
9c84aeba | 600 | * PM management. |
fb1d9738 | 601 | */ |
d9f36a00 | 602 | struct notifier_block pm_nb; |
153b3d5b | 603 | bool refuse_hibernation; |
c3b9b165 | 604 | bool suspend_locked; |
30c78bb8 | 605 | |
153b3d5b | 606 | atomic_t num_fifo_resources; |
e2fa3a76 TH |
607 | |
608 | /* | |
609 | * Query processing. These members | |
610 | * are protected by the cmdbuf mutex. | |
611 | */ | |
612 | ||
09881d29 ZR |
613 | struct vmw_bo *dummy_query_bo; |
614 | struct vmw_bo *pinned_bo; | |
e2fa3a76 | 615 | uint32_t query_cid; |
c0951b79 | 616 | uint32_t query_cid_valid; |
e2fa3a76 | 617 | bool dummy_query_bo_pinned; |
5bb39e81 TH |
618 | |
619 | /* | |
620 | * Surface swapping. The "surface_lru" list is protected by the | |
621 | * resource lock in order to be able to destroy a surface and take | |
622 | * it off the lru atomically. "used_memory_size" is currently | |
623 | * protected by the cmdbuf mutex for simplicity. | |
624 | */ | |
625 | ||
c0951b79 | 626 | struct list_head res_lru[vmw_res_max]; |
5bb39e81 | 627 | uint32_t used_memory_size; |
d92d9851 TH |
628 | |
629 | /* | |
630 | * DMA mapping stuff. | |
631 | */ | |
632 | enum vmw_dma_map_mode map_mode; | |
3530bdc3 TH |
633 | |
634 | /* | |
635 | * Guest Backed stuff | |
636 | */ | |
d80efd5c | 637 | struct vmw_otable_batch otable_batch; |
3eab3d9e | 638 | |
2cd80dbd | 639 | struct vmw_fifo_state *fifo; |
3eab3d9e | 640 | struct vmw_cmdbuf_man *cman; |
ef369904 | 641 | DECLARE_BITMAP(irqthread_pending, VMW_IRQTHREAD_MAX); |
fd567467 | 642 | |
d92223ea | 643 | uint32 *devcaps; |
7a7a933e MK |
644 | |
645 | /* | |
646 | * mksGuestStat instance-descriptor and pid arrays | |
647 | */ | |
648 | struct page *mksstat_user_pages[MKSSTAT_CAPACITY]; | |
649 | atomic_t mksstat_user_pids[MKSSTAT_CAPACITY]; | |
650 | ||
651 | #if IS_ENABLED(CONFIG_DRM_VMWGFX_MKSSTATS) | |
652 | struct page *mksstat_kern_pages[MKSSTAT_CAPACITY]; | |
653 | u8 mksstat_kern_top_timer[MKSSTAT_CAPACITY]; | |
654 | atomic_t mksstat_kern_pids[MKSSTAT_CAPACITY]; | |
655 | #endif | |
fb1d9738 JB |
656 | }; |
657 | ||
c0951b79 TH |
658 | static inline struct vmw_surface *vmw_res_to_srf(struct vmw_resource *res) |
659 | { | |
660 | return container_of(res, struct vmw_surface, res); | |
661 | } | |
662 | ||
fb1d9738 JB |
663 | static inline struct vmw_private *vmw_priv(struct drm_device *dev) |
664 | { | |
665 | return (struct vmw_private *)dev->dev_private; | |
666 | } | |
667 | ||
668b2066 ZR |
668 | static inline struct vmw_private *vmw_priv_from_ttm(struct ttm_device *bdev) |
669 | { | |
670 | return container_of(bdev, struct vmw_private, bdev); | |
671 | } | |
672 | ||
fb1d9738 JB |
673 | static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv) |
674 | { | |
675 | return (struct vmw_fpriv *)file_priv->driver_priv; | |
676 | } | |
677 | ||
2cd80dbd ZR |
678 | /* |
679 | * SVGA v3 has mmio register access and lacks fifo cmds | |
680 | */ | |
681 | static inline bool vmw_is_svga_v3(const struct vmw_private *dev) | |
682 | { | |
683 | return dev->pci_id == VMWGFX_PCI_ID_SVGA3; | |
684 | } | |
685 | ||
496eb6fd TH |
686 | /* |
687 | * The locking here is fine-grained, so that it is performed once | |
688 | * for every read- and write operation. This is of course costly, but we | |
689 | * don't perform much register access in the timing critical paths anyway. | |
690 | * Instead we have the extra benefit of being sure that we don't forget | |
691 | * the hw lock around register accesses. | |
692 | */ | |
fb1d9738 JB |
693 | static inline void vmw_write(struct vmw_private *dev_priv, |
694 | unsigned int offset, uint32_t value) | |
695 | { | |
2cd80dbd ZR |
696 | if (vmw_is_svga_v3(dev_priv)) { |
697 | iowrite32(value, dev_priv->rmmio + offset); | |
698 | } else { | |
699 | spin_lock(&dev_priv->hw_lock); | |
700 | outl(offset, dev_priv->io_start + SVGA_INDEX_PORT); | |
701 | outl(value, dev_priv->io_start + SVGA_VALUE_PORT); | |
702 | spin_unlock(&dev_priv->hw_lock); | |
703 | } | |
fb1d9738 JB |
704 | } |
705 | ||
706 | static inline uint32_t vmw_read(struct vmw_private *dev_priv, | |
707 | unsigned int offset) | |
708 | { | |
496eb6fd | 709 | u32 val; |
fb1d9738 | 710 | |
2cd80dbd ZR |
711 | if (vmw_is_svga_v3(dev_priv)) { |
712 | val = ioread32(dev_priv->rmmio + offset); | |
713 | } else { | |
714 | spin_lock(&dev_priv->hw_lock); | |
715 | outl(offset, dev_priv->io_start + SVGA_INDEX_PORT); | |
716 | val = inl(dev_priv->io_start + SVGA_VALUE_PORT); | |
717 | spin_unlock(&dev_priv->hw_lock); | |
718 | } | |
496eb6fd | 719 | |
fb1d9738 JB |
720 | return val; |
721 | } | |
722 | ||
878c6ecd DR |
723 | /** |
724 | * has_sm4_context - Does the device support SM4 context. | |
725 | * @dev_priv: Device private. | |
726 | * | |
727 | * Return: Bool value if device support SM4 context or not. | |
728 | */ | |
729 | static inline bool has_sm4_context(const struct vmw_private *dev_priv) | |
730 | { | |
731 | return (dev_priv->sm_type >= VMW_SM_4); | |
732 | } | |
733 | ||
734 | /** | |
735 | * has_sm4_1_context - Does the device support SM4_1 context. | |
736 | * @dev_priv: Device private. | |
737 | * | |
738 | * Return: Bool value if device support SM4_1 context or not. | |
739 | */ | |
740 | static inline bool has_sm4_1_context(const struct vmw_private *dev_priv) | |
741 | { | |
742 | return (dev_priv->sm_type >= VMW_SM_4_1); | |
743 | } | |
744 | ||
4dec2805 DR |
745 | /** |
746 | * has_sm5_context - Does the device support SM5 context. | |
747 | * @dev_priv: Device private. | |
748 | * | |
749 | * Return: Bool value if device support SM5 context or not. | |
750 | */ | |
751 | static inline bool has_sm5_context(const struct vmw_private *dev_priv) | |
752 | { | |
753 | return (dev_priv->sm_type >= VMW_SM_5); | |
754 | } | |
755 | ||
4fb9326b ZR |
756 | /** |
757 | * has_gl43_context - Does the device support GL43 context. | |
758 | * @dev_priv: Device private. | |
759 | * | |
760 | * Return: Bool value if device support SM5 context or not. | |
761 | */ | |
762 | static inline bool has_gl43_context(const struct vmw_private *dev_priv) | |
763 | { | |
764 | return (dev_priv->sm_type >= VMW_SM_5_1X); | |
765 | } | |
766 | ||
767 | ||
768 | static inline u32 vmw_max_num_uavs(struct vmw_private *dev_priv) | |
769 | { | |
770 | return (has_gl43_context(dev_priv) ? | |
771 | SVGA3D_DX11_1_MAX_UAVIEWS : SVGA3D_MAX_UAVIEWS); | |
772 | } | |
773 | ||
153b3d5b TH |
774 | extern void vmw_svga_enable(struct vmw_private *dev_priv); |
775 | extern void vmw_svga_disable(struct vmw_private *dev_priv); | |
35d86fb6 | 776 | bool vmwgfx_supported(struct vmw_private *vmw); |
153b3d5b | 777 | |
30c78bb8 | 778 | |
fb1d9738 JB |
779 | /** |
780 | * GMR utilities - vmwgfx_gmr.c | |
781 | */ | |
782 | ||
783 | extern int vmw_gmr_bind(struct vmw_private *dev_priv, | |
d92d9851 | 784 | const struct vmw_sg_table *vsgt, |
135cba0d TH |
785 | unsigned long num_pages, |
786 | int gmr_id); | |
fb1d9738 JB |
787 | extern void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id); |
788 | ||
789 | /** | |
790 | * Resource utilities - vmwgfx_resource.c | |
791 | */ | |
c0951b79 | 792 | struct vmw_user_resource_conv; |
fb1d9738 | 793 | |
fb1d9738 JB |
794 | extern void vmw_resource_unreference(struct vmw_resource **p_res); |
795 | extern struct vmw_resource *vmw_resource_reference(struct vmw_resource *res); | |
30f82d81 TH |
796 | extern struct vmw_resource * |
797 | vmw_resource_reference_unless_doomed(struct vmw_resource *res); | |
fb80edb0 TH |
798 | extern int vmw_resource_validate(struct vmw_resource *res, bool intr, |
799 | bool dirtying); | |
1a4b172a TH |
800 | extern int vmw_resource_reserve(struct vmw_resource *res, bool interruptible, |
801 | bool no_backup); | |
c0951b79 | 802 | extern bool vmw_resource_needs_backup(const struct vmw_resource *res); |
551a6697 | 803 | extern int vmw_user_lookup_handle(struct vmw_private *dev_priv, |
8afa13a0 | 804 | struct drm_file *filp, |
551a6697 JB |
805 | uint32_t handle, |
806 | struct vmw_surface **out_surf, | |
09881d29 | 807 | struct vmw_bo **out_buf); |
c0951b79 TH |
808 | extern int vmw_user_resource_lookup_handle( |
809 | struct vmw_private *dev_priv, | |
810 | struct ttm_object_file *tfile, | |
811 | uint32_t handle, | |
812 | const struct vmw_user_resource_conv *converter, | |
813 | struct vmw_resource **p_res); | |
a309c719 | 814 | |
fb1d9738 JB |
815 | extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data, |
816 | struct drm_file *file_priv); | |
817 | extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data, | |
818 | struct drm_file *file_priv); | |
819 | extern int vmw_user_stream_lookup(struct vmw_private *dev_priv, | |
820 | struct ttm_object_file *tfile, | |
821 | uint32_t *inout_id, | |
822 | struct vmw_resource **out); | |
c0951b79 | 823 | extern void vmw_resource_unreserve(struct vmw_resource *res, |
a9f58c45 TH |
824 | bool dirty_set, |
825 | bool dirty, | |
668b2066 ZR |
826 | bool switch_guest_memory, |
827 | struct vmw_bo *new_guest_memory, | |
828 | unsigned long new_guest_memory_offset); | |
fd11a3c0 | 829 | extern void vmw_query_move_notify(struct ttm_buffer_object *bo, |
6cf9dc23 CK |
830 | struct ttm_resource *old_mem, |
831 | struct ttm_resource *new_mem); | |
09881d29 ZR |
832 | int vmw_query_readback_all(struct vmw_bo *dx_query_mob); |
833 | void vmw_resource_evict_all(struct vmw_private *dev_priv); | |
834 | void vmw_resource_unbind_list(struct vmw_bo *vbo); | |
a0a63940 TH |
835 | void vmw_resource_mob_attach(struct vmw_resource *res); |
836 | void vmw_resource_mob_detach(struct vmw_resource *res); | |
b7468b15 TH |
837 | void vmw_resource_dirty_update(struct vmw_resource *res, pgoff_t start, |
838 | pgoff_t end); | |
09881d29 | 839 | int vmw_resources_clean(struct vmw_bo *vbo, pgoff_t start, |
fb80edb0 | 840 | pgoff_t end, pgoff_t *num_prefault); |
a0a63940 TH |
841 | |
842 | /** | |
843 | * vmw_resource_mob_attached - Whether a resource currently has a mob attached | |
844 | * @res: The resource | |
845 | * | |
846 | * Return: true if the resource has a mob attached, false otherwise. | |
847 | */ | |
848 | static inline bool vmw_resource_mob_attached(const struct vmw_resource *res) | |
849 | { | |
61335d7a | 850 | return !RB_EMPTY_NODE(&res->mob_node); |
a0a63940 | 851 | } |
79273e1b | 852 | |
8afa13a0 ZR |
853 | /** |
854 | * GEM related functionality - vmwgfx_gem.c | |
855 | */ | |
91398b41 ZR |
856 | struct vmw_bo_params; |
857 | int vmw_gem_object_create(struct vmw_private *vmw, | |
858 | struct vmw_bo_params *params, | |
859 | struct vmw_bo **p_vbo); | |
8afa13a0 ZR |
860 | extern int vmw_gem_object_create_with_handle(struct vmw_private *dev_priv, |
861 | struct drm_file *filp, | |
862 | uint32_t size, | |
863 | uint32_t *handle, | |
09881d29 | 864 | struct vmw_bo **p_vbo); |
8afa13a0 ZR |
865 | extern int vmw_gem_object_create_ioctl(struct drm_device *dev, void *data, |
866 | struct drm_file *filp); | |
8afa13a0 ZR |
867 | extern void vmw_debugfs_gem_init(struct vmw_private *vdev); |
868 | ||
fb1d9738 JB |
869 | /** |
870 | * Misc Ioctl functionality - vmwgfx_ioctl.c | |
871 | */ | |
872 | ||
873 | extern int vmw_getparam_ioctl(struct drm_device *dev, void *data, | |
874 | struct drm_file *file_priv); | |
f63f6a59 TH |
875 | extern int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data, |
876 | struct drm_file *file_priv); | |
2fcd5a73 JB |
877 | extern int vmw_present_ioctl(struct drm_device *dev, void *data, |
878 | struct drm_file *file_priv); | |
879 | extern int vmw_present_readback_ioctl(struct drm_device *dev, void *data, | |
880 | struct drm_file *file_priv); | |
fb1d9738 JB |
881 | |
882 | /** | |
883 | * Fifo utilities - vmwgfx_fifo.c | |
884 | */ | |
885 | ||
2cd80dbd ZR |
886 | extern struct vmw_fifo_state *vmw_fifo_create(struct vmw_private *dev_priv); |
887 | extern void vmw_fifo_destroy(struct vmw_private *dev_priv); | |
888 | extern bool vmw_cmd_supported(struct vmw_private *vmw); | |
d80efd5c | 889 | extern void * |
8426ed9c ZR |
890 | vmw_cmd_ctx_reserve(struct vmw_private *dev_priv, uint32_t bytes, int ctx_id); |
891 | extern void vmw_cmd_commit(struct vmw_private *dev_priv, uint32_t bytes); | |
892 | extern void vmw_cmd_commit_flush(struct vmw_private *dev_priv, uint32_t bytes); | |
893 | extern int vmw_cmd_send_fence(struct vmw_private *dev_priv, uint32_t *seqno); | |
894 | extern bool vmw_supports_3d(struct vmw_private *dev_priv); | |
fb1d9738 | 895 | extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason); |
d7e1958d | 896 | extern bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv); |
8426ed9c ZR |
897 | extern int vmw_cmd_emit_dummy_query(struct vmw_private *dev_priv, |
898 | uint32_t cid); | |
899 | extern int vmw_cmd_flush(struct vmw_private *dev_priv, | |
900 | bool interruptible); | |
fb1d9738 | 901 | |
8426ed9c | 902 | #define VMW_CMD_CTX_RESERVE(__priv, __bytes, __ctx_id) \ |
11c45419 | 903 | ({ \ |
8426ed9c | 904 | vmw_cmd_ctx_reserve(__priv, __bytes, __ctx_id) ? : ({ \ |
11c45419 DR |
905 | DRM_ERROR("FIFO reserve failed at %s for %u bytes\n", \ |
906 | __func__, (unsigned int) __bytes); \ | |
907 | NULL; \ | |
908 | }); \ | |
909 | }) | |
910 | ||
8426ed9c ZR |
911 | #define VMW_CMD_RESERVE(__priv, __bytes) \ |
912 | VMW_CMD_CTX_RESERVE(__priv, __bytes, SVGA3D_INVALID_ID) | |
11c45419 | 913 | |
2cd80dbd ZR |
914 | |
915 | /** | |
916 | * vmw_fifo_caps - Returns the capabilities of the FIFO command | |
917 | * queue or 0 if fifo memory isn't present. | |
918 | * @dev_priv: The device private context | |
919 | */ | |
920 | static inline uint32_t vmw_fifo_caps(const struct vmw_private *dev_priv) | |
921 | { | |
922 | if (!dev_priv->fifo_mem || !dev_priv->fifo) | |
923 | return 0; | |
924 | return dev_priv->fifo->capabilities; | |
925 | } | |
926 | ||
927 | ||
928 | /** | |
929 | * vmw_is_cursor_bypass3_enabled - Returns TRUE iff Cursor Bypass 3 | |
930 | * is enabled in the FIFO. | |
931 | * @dev_priv: The device private context | |
932 | */ | |
933 | static inline bool | |
934 | vmw_is_cursor_bypass3_enabled(const struct vmw_private *dev_priv) | |
935 | { | |
936 | return (vmw_fifo_caps(dev_priv) & SVGA_FIFO_CAP_CURSOR_BYPASS_3) != 0; | |
937 | } | |
938 | ||
fb1d9738 | 939 | /** |
f1d34bfd | 940 | * TTM buffer object driver - vmwgfx_ttm_buffer.c |
fb1d9738 JB |
941 | */ |
942 | ||
308d17ef | 943 | extern const size_t vmw_tt_size; |
fb1d9738 | 944 | extern struct ttm_placement vmw_vram_placement; |
135cba0d | 945 | extern struct ttm_placement vmw_vram_gmr_placement; |
fb1d9738 | 946 | extern struct ttm_placement vmw_sys_placement; |
8af8a109 | 947 | extern struct ttm_device_funcs vmw_bo_driver; |
0fd53cfb TH |
948 | extern const struct vmw_sg_table * |
949 | vmw_bo_sg_table(struct ttm_buffer_object *bo); | |
668b2066 ZR |
950 | int vmw_bo_create_and_populate(struct vmw_private *dev_priv, |
951 | size_t bo_size, | |
952 | u32 domain, | |
953 | struct vmw_bo **bo_p); | |
56dc01f1 | 954 | |
d92d9851 TH |
955 | extern void vmw_piter_start(struct vmw_piter *viter, |
956 | const struct vmw_sg_table *vsgt, | |
957 | unsigned long p_offs); | |
958 | ||
959 | /** | |
960 | * vmw_piter_next - Advance the iterator one page. | |
961 | * | |
962 | * @viter: Pointer to the iterator to advance. | |
963 | * | |
964 | * Returns false if past the list of pages, true otherwise. | |
965 | */ | |
966 | static inline bool vmw_piter_next(struct vmw_piter *viter) | |
967 | { | |
968 | return viter->next(viter); | |
969 | } | |
970 | ||
971 | /** | |
972 | * vmw_piter_dma_addr - Return the DMA address of the current page. | |
973 | * | |
974 | * @viter: Pointer to the iterator | |
975 | * | |
976 | * Returns the DMA address of the page pointed to by @viter. | |
977 | */ | |
978 | static inline dma_addr_t vmw_piter_dma_addr(struct vmw_piter *viter) | |
979 | { | |
980 | return viter->dma_address(viter); | |
981 | } | |
982 | ||
983 | /** | |
984 | * vmw_piter_page - Return a pointer to the current page. | |
985 | * | |
986 | * @viter: Pointer to the iterator | |
987 | * | |
988 | * Returns the DMA address of the page pointed to by @viter. | |
989 | */ | |
990 | static inline struct page *vmw_piter_page(struct vmw_piter *viter) | |
991 | { | |
8d9a8d9b | 992 | return viter->pages[viter->i]; |
d92d9851 | 993 | } |
fb1d9738 JB |
994 | |
995 | /** | |
996 | * Command submission - vmwgfx_execbuf.c | |
997 | */ | |
998 | ||
cbfbe47f EV |
999 | extern int vmw_execbuf_ioctl(struct drm_device *dev, void *data, |
1000 | struct drm_file *file_priv); | |
922ade0d TH |
1001 | extern int vmw_execbuf_process(struct drm_file *file_priv, |
1002 | struct vmw_private *dev_priv, | |
1003 | void __user *user_commands, | |
1004 | void *kernel_commands, | |
1005 | uint32_t command_size, | |
1006 | uint64_t throttle_us, | |
d80efd5c | 1007 | uint32_t dx_context_handle, |
922ade0d | 1008 | struct drm_vmw_fence_rep __user |
bb1bd2f4 | 1009 | *user_fence_rep, |
c906965d SY |
1010 | struct vmw_fence_obj **out_fence, |
1011 | uint32_t flags); | |
c0951b79 TH |
1012 | extern void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv, |
1013 | struct vmw_fence_obj *fence); | |
1014 | extern void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv); | |
e2fa3a76 | 1015 | |
5bb39e81 TH |
1016 | extern int vmw_execbuf_fence_commands(struct drm_file *file_priv, |
1017 | struct vmw_private *dev_priv, | |
1018 | struct vmw_fence_obj **p_fence, | |
1019 | uint32_t *p_handle); | |
a0f90c88 | 1020 | extern int vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv, |
57c5ee79 TH |
1021 | struct vmw_fpriv *vmw_fp, |
1022 | int ret, | |
1023 | struct drm_vmw_fence_rep __user | |
1024 | *user_fence_rep, | |
1025 | struct vmw_fence_obj *fence, | |
c906965d | 1026 | uint32_t fence_handle, |
a0f90c88 | 1027 | int32_t out_fence_fd); |
65b97a2b | 1028 | bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd); |
5bb39e81 | 1029 | |
fb1d9738 JB |
1030 | /** |
1031 | * IRQs and wating - vmwgfx_irq.c | |
1032 | */ | |
1033 | ||
32160e6a | 1034 | extern int vmw_irq_install(struct vmw_private *dev_priv); |
fb1d9738 | 1035 | extern void vmw_irq_uninstall(struct drm_device *dev); |
6bcd8d3c TH |
1036 | extern bool vmw_seqno_passed(struct vmw_private *dev_priv, |
1037 | uint32_t seqno); | |
fb1d9738 JB |
1038 | extern int vmw_fallback_wait(struct vmw_private *dev_priv, |
1039 | bool lazy, | |
1040 | bool fifo_idle, | |
6bcd8d3c | 1041 | uint32_t seqno, |
fb1d9738 JB |
1042 | bool interruptible, |
1043 | unsigned long timeout); | |
2cd80dbd | 1044 | extern void vmw_update_seqno(struct vmw_private *dev_priv); |
ae2a1040 TH |
1045 | extern void vmw_seqno_waiter_add(struct vmw_private *dev_priv); |
1046 | extern void vmw_seqno_waiter_remove(struct vmw_private *dev_priv); | |
57c5ee79 TH |
1047 | extern void vmw_goal_waiter_add(struct vmw_private *dev_priv); |
1048 | extern void vmw_goal_waiter_remove(struct vmw_private *dev_priv); | |
3eab3d9e TH |
1049 | extern void vmw_generic_waiter_add(struct vmw_private *dev_priv, u32 flag, |
1050 | int *waiter_count); | |
1051 | extern void vmw_generic_waiter_remove(struct vmw_private *dev_priv, | |
1052 | u32 flag, int *waiter_count); | |
1925d456 | 1053 | |
fb1d9738 JB |
1054 | /** |
1055 | * Kernel modesetting - vmwgfx_kms.c | |
1056 | */ | |
1057 | ||
1058 | int vmw_kms_init(struct vmw_private *dev_priv); | |
1059 | int vmw_kms_close(struct vmw_private *dev_priv); | |
fb1d9738 JB |
1060 | int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data, |
1061 | struct drm_file *file_priv); | |
1062 | void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv); | |
1063 | void vmw_kms_cursor_snoop(struct vmw_surface *srf, | |
1064 | struct ttm_object_file *tfile, | |
1065 | struct ttm_buffer_object *bo, | |
1066 | SVGA3dCmdHeader *header); | |
0bef23f9 MD |
1067 | int vmw_kms_write_svga(struct vmw_private *vmw_priv, |
1068 | unsigned width, unsigned height, unsigned pitch, | |
1069 | unsigned bpp, unsigned depth); | |
e133e737 TH |
1070 | bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv, |
1071 | uint32_t pitch, | |
1072 | uint32_t height); | |
2fcd5a73 JB |
1073 | int vmw_kms_present(struct vmw_private *dev_priv, |
1074 | struct drm_file *file_priv, | |
1075 | struct vmw_framebuffer *vfb, | |
1076 | struct vmw_surface *surface, | |
1077 | uint32_t sid, int32_t destX, int32_t destY, | |
1078 | struct drm_vmw_rect *clips, | |
1079 | uint32_t num_clips); | |
cd2b89e7 TH |
1080 | int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data, |
1081 | struct drm_file *file_priv); | |
8fbf9d92 | 1082 | void vmw_kms_legacy_hotspot_clear(struct vmw_private *dev_priv); |
c3b9b165 TH |
1083 | int vmw_kms_suspend(struct drm_device *dev); |
1084 | int vmw_kms_resume(struct drm_device *dev); | |
140bcaa2 | 1085 | void vmw_kms_lost_device(struct drm_device *dev); |
fb1d9738 | 1086 | |
5e1782d2 DA |
1087 | int vmw_dumb_create(struct drm_file *file_priv, |
1088 | struct drm_device *dev, | |
1089 | struct drm_mode_create_dumb *args); | |
1a4b172a | 1090 | extern int vmw_resource_pin(struct vmw_resource *res, bool interruptible); |
ed93394c | 1091 | extern void vmw_resource_unpin(struct vmw_resource *res); |
d80efd5c | 1092 | extern enum vmw_res_type vmw_res_type(const struct vmw_resource *res); |
ed93394c | 1093 | |
fb1d9738 JB |
1094 | /** |
1095 | * Overlay control - vmwgfx_overlay.c | |
1096 | */ | |
1097 | ||
1098 | int vmw_overlay_init(struct vmw_private *dev_priv); | |
1099 | int vmw_overlay_close(struct vmw_private *dev_priv); | |
1100 | int vmw_overlay_ioctl(struct drm_device *dev, void *data, | |
1101 | struct drm_file *file_priv); | |
fb1d9738 JB |
1102 | int vmw_overlay_resume_all(struct vmw_private *dev_priv); |
1103 | int vmw_overlay_pause_all(struct vmw_private *dev_priv); | |
1104 | int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out); | |
1105 | int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id); | |
1106 | int vmw_overlay_num_overlays(struct vmw_private *dev_priv); | |
1107 | int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv); | |
1108 | ||
135cba0d TH |
1109 | /** |
1110 | * GMR Id manager | |
1111 | */ | |
1112 | ||
62161778 | 1113 | int vmw_gmrid_man_init(struct vmw_private *dev_priv, int type); |
6eee6675 | 1114 | void vmw_gmrid_man_fini(struct vmw_private *dev_priv, int type); |
135cba0d | 1115 | |
f6be2326 ZR |
1116 | /** |
1117 | * System memory manager | |
1118 | */ | |
1119 | int vmw_sys_man_init(struct vmw_private *dev_priv); | |
1120 | void vmw_sys_man_fini(struct vmw_private *dev_priv); | |
1121 | ||
69977ff5 TH |
1122 | /** |
1123 | * Prime - vmwgfx_prime.c | |
1124 | */ | |
1125 | ||
1126 | extern const struct dma_buf_ops vmw_prime_dmabuf_ops; | |
1127 | extern int vmw_prime_fd_to_handle(struct drm_device *dev, | |
1128 | struct drm_file *file_priv, | |
1129 | int fd, u32 *handle); | |
1130 | extern int vmw_prime_handle_to_fd(struct drm_device *dev, | |
1131 | struct drm_file *file_priv, | |
1132 | uint32_t handle, uint32_t flags, | |
1133 | int *prime_fd); | |
1134 | ||
3530bdc3 TH |
1135 | /* |
1136 | * MemoryOBject management - vmwgfx_mob.c | |
1137 | */ | |
1138 | struct vmw_mob; | |
1139 | extern int vmw_mob_bind(struct vmw_private *dev_priv, struct vmw_mob *mob, | |
0fd53cfb TH |
1140 | const struct vmw_sg_table *vsgt, |
1141 | unsigned long num_data_pages, int32_t mob_id); | |
3530bdc3 TH |
1142 | extern void vmw_mob_unbind(struct vmw_private *dev_priv, |
1143 | struct vmw_mob *mob); | |
1144 | extern void vmw_mob_destroy(struct vmw_mob *mob); | |
1145 | extern struct vmw_mob *vmw_mob_create(unsigned long data_pages); | |
1146 | extern int vmw_otables_setup(struct vmw_private *dev_priv); | |
1147 | extern void vmw_otables_takedown(struct vmw_private *dev_priv); | |
69977ff5 | 1148 | |
7086d099 TH |
1149 | /* |
1150 | * Context management - vmwgfx_context.c | |
1151 | */ | |
1152 | ||
1153 | extern const struct vmw_user_resource_conv *user_context_converter; | |
1154 | ||
7086d099 TH |
1155 | extern int vmw_context_define_ioctl(struct drm_device *dev, void *data, |
1156 | struct drm_file *file_priv); | |
d80efd5c TH |
1157 | extern int vmw_extended_context_define_ioctl(struct drm_device *dev, void *data, |
1158 | struct drm_file *file_priv); | |
7086d099 TH |
1159 | extern int vmw_context_destroy_ioctl(struct drm_device *dev, void *data, |
1160 | struct drm_file *file_priv); | |
30f82d81 | 1161 | extern struct list_head *vmw_context_binding_list(struct vmw_resource *ctx); |
18e4a466 TH |
1162 | extern struct vmw_cmdbuf_res_manager * |
1163 | vmw_context_res_man(struct vmw_resource *ctx); | |
d80efd5c TH |
1164 | extern struct vmw_resource *vmw_context_cotable(struct vmw_resource *ctx, |
1165 | SVGACOTableType cotable_type); | |
d80efd5c TH |
1166 | struct vmw_ctx_binding_state; |
1167 | extern struct vmw_ctx_binding_state * | |
1168 | vmw_context_binding_state(struct vmw_resource *ctx); | |
1169 | extern void vmw_dx_context_scrub_cotables(struct vmw_resource *ctx, | |
1170 | bool readback); | |
fd11a3c0 | 1171 | extern int vmw_context_bind_dx_query(struct vmw_resource *ctx_res, |
09881d29 ZR |
1172 | struct vmw_bo *mob); |
1173 | extern struct vmw_bo * | |
fd11a3c0 SY |
1174 | vmw_context_get_dx_query_mob(struct vmw_resource *ctx_res); |
1175 | ||
d80efd5c | 1176 | |
7086d099 TH |
1177 | /* |
1178 | * Surface management - vmwgfx_surface.c | |
1179 | */ | |
1180 | ||
1181 | extern const struct vmw_user_resource_conv *user_surface_converter; | |
1182 | ||
7086d099 TH |
1183 | extern int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data, |
1184 | struct drm_file *file_priv); | |
1185 | extern int vmw_surface_define_ioctl(struct drm_device *dev, void *data, | |
1186 | struct drm_file *file_priv); | |
1187 | extern int vmw_surface_reference_ioctl(struct drm_device *dev, void *data, | |
1188 | struct drm_file *file_priv); | |
1189 | extern int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data, | |
1190 | struct drm_file *file_priv); | |
1191 | extern int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data, | |
1192 | struct drm_file *file_priv); | |
14b1c33e DR |
1193 | extern int vmw_gb_surface_define_ext_ioctl(struct drm_device *dev, |
1194 | void *data, | |
1195 | struct drm_file *file_priv); | |
1196 | extern int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, | |
1197 | void *data, | |
1198 | struct drm_file *file_priv); | |
7086d099 | 1199 | |
504901db | 1200 | int vmw_gb_surface_define(struct vmw_private *dev_priv, |
504901db DR |
1201 | const struct vmw_surface_metadata *req, |
1202 | struct vmw_surface **srf_out); | |
1203 | ||
c74c162f TH |
1204 | /* |
1205 | * Shader management - vmwgfx_shader.c | |
1206 | */ | |
1207 | ||
7086d099 TH |
1208 | extern const struct vmw_user_resource_conv *user_shader_converter; |
1209 | ||
c74c162f TH |
1210 | extern int vmw_shader_define_ioctl(struct drm_device *dev, void *data, |
1211 | struct drm_file *file_priv); | |
1212 | extern int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data, | |
1213 | struct drm_file *file_priv); | |
18e4a466 TH |
1214 | extern int vmw_compat_shader_add(struct vmw_private *dev_priv, |
1215 | struct vmw_cmdbuf_res_manager *man, | |
d5bde956 TH |
1216 | u32 user_key, const void *bytecode, |
1217 | SVGA3dShaderType shader_type, | |
1218 | size_t size, | |
d5bde956 | 1219 | struct list_head *list); |
d80efd5c TH |
1220 | extern int vmw_shader_remove(struct vmw_cmdbuf_res_manager *man, |
1221 | u32 user_key, SVGA3dShaderType shader_type, | |
1222 | struct list_head *list); | |
1223 | extern int vmw_dx_shader_add(struct vmw_cmdbuf_res_manager *man, | |
1224 | struct vmw_resource *ctx, | |
1225 | u32 user_key, | |
1226 | SVGA3dShaderType shader_type, | |
1227 | struct list_head *list); | |
1228 | extern void vmw_dx_shader_cotable_list_scrub(struct vmw_private *dev_priv, | |
1229 | struct list_head *list, | |
1230 | bool readback); | |
1231 | ||
18e4a466 | 1232 | extern struct vmw_resource * |
d80efd5c TH |
1233 | vmw_shader_lookup(struct vmw_cmdbuf_res_manager *man, |
1234 | u32 user_key, SVGA3dShaderType shader_type); | |
18e4a466 | 1235 | |
e8bead9c DR |
1236 | /* |
1237 | * Streamoutput management | |
1238 | */ | |
1239 | struct vmw_resource * | |
1240 | vmw_dx_streamoutput_lookup(struct vmw_cmdbuf_res_manager *man, | |
1241 | u32 user_key); | |
1242 | int vmw_dx_streamoutput_add(struct vmw_cmdbuf_res_manager *man, | |
1243 | struct vmw_resource *ctx, | |
1244 | SVGA3dStreamOutputId user_key, | |
1245 | struct list_head *list); | |
1246 | void vmw_dx_streamoutput_set_size(struct vmw_resource *res, u32 size); | |
1247 | int vmw_dx_streamoutput_remove(struct vmw_cmdbuf_res_manager *man, | |
1248 | SVGA3dStreamOutputId user_key, | |
1249 | struct list_head *list); | |
1250 | void vmw_dx_streamoutput_cotable_list_scrub(struct vmw_private *dev_priv, | |
1251 | struct list_head *list, | |
1252 | bool readback); | |
1253 | ||
18e4a466 TH |
1254 | /* |
1255 | * Command buffer managed resources - vmwgfx_cmdbuf_res.c | |
1256 | */ | |
1257 | ||
1258 | extern struct vmw_cmdbuf_res_manager * | |
1259 | vmw_cmdbuf_res_man_create(struct vmw_private *dev_priv); | |
1260 | extern void vmw_cmdbuf_res_man_destroy(struct vmw_cmdbuf_res_manager *man); | |
18e4a466 TH |
1261 | extern struct vmw_resource * |
1262 | vmw_cmdbuf_res_lookup(struct vmw_cmdbuf_res_manager *man, | |
1263 | enum vmw_cmdbuf_res_type res_type, | |
1264 | u32 user_key); | |
1265 | extern void vmw_cmdbuf_res_revert(struct list_head *list); | |
1266 | extern void vmw_cmdbuf_res_commit(struct list_head *list); | |
1267 | extern int vmw_cmdbuf_res_add(struct vmw_cmdbuf_res_manager *man, | |
1268 | enum vmw_cmdbuf_res_type res_type, | |
1269 | u32 user_key, | |
1270 | struct vmw_resource *res, | |
1271 | struct list_head *list); | |
1272 | extern int vmw_cmdbuf_res_remove(struct vmw_cmdbuf_res_manager *man, | |
1273 | enum vmw_cmdbuf_res_type res_type, | |
1274 | u32 user_key, | |
d80efd5c TH |
1275 | struct list_head *list, |
1276 | struct vmw_resource **res); | |
d5bde956 | 1277 | |
d80efd5c TH |
1278 | /* |
1279 | * COTable management - vmwgfx_cotable.c | |
1280 | */ | |
1281 | extern const SVGACOTableType vmw_cotable_scrub_order[]; | |
1282 | extern struct vmw_resource *vmw_cotable_alloc(struct vmw_private *dev_priv, | |
1283 | struct vmw_resource *ctx, | |
1284 | u32 type); | |
1285 | extern int vmw_cotable_notify(struct vmw_resource *res, int id); | |
1286 | extern int vmw_cotable_scrub(struct vmw_resource *res, bool readback); | |
1287 | extern void vmw_cotable_add_resource(struct vmw_resource *ctx, | |
1288 | struct list_head *head); | |
c74c162f | 1289 | |
3eab3d9e TH |
1290 | /* |
1291 | * Command buffer managerment vmwgfx_cmdbuf.c | |
1292 | */ | |
1293 | struct vmw_cmdbuf_man; | |
1294 | struct vmw_cmdbuf_header; | |
1295 | ||
1296 | extern struct vmw_cmdbuf_man * | |
1297 | vmw_cmdbuf_man_create(struct vmw_private *dev_priv); | |
8426ed9c | 1298 | extern int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man, size_t size); |
3eab3d9e TH |
1299 | extern void vmw_cmdbuf_remove_pool(struct vmw_cmdbuf_man *man); |
1300 | extern void vmw_cmdbuf_man_destroy(struct vmw_cmdbuf_man *man); | |
1301 | extern int vmw_cmdbuf_idle(struct vmw_cmdbuf_man *man, bool interruptible, | |
1302 | unsigned long timeout); | |
1303 | extern void *vmw_cmdbuf_reserve(struct vmw_cmdbuf_man *man, size_t size, | |
1304 | int ctx_id, bool interruptible, | |
1305 | struct vmw_cmdbuf_header *header); | |
1306 | extern void vmw_cmdbuf_commit(struct vmw_cmdbuf_man *man, size_t size, | |
1307 | struct vmw_cmdbuf_header *header, | |
1308 | bool flush); | |
3eab3d9e TH |
1309 | extern void *vmw_cmdbuf_alloc(struct vmw_cmdbuf_man *man, |
1310 | size_t size, bool interruptible, | |
1311 | struct vmw_cmdbuf_header **p_header); | |
1312 | extern void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header); | |
1313 | extern int vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man, | |
1314 | bool interruptible); | |
ef369904 | 1315 | extern void vmw_cmdbuf_irqthread(struct vmw_cmdbuf_man *man); |
d5bde956 | 1316 | |
79273e1b TH |
1317 | /* CPU blit utilities - vmwgfx_blit.c */ |
1318 | ||
1319 | /** | |
1320 | * struct vmw_diff_cpy - CPU blit information structure | |
1321 | * | |
1322 | * @rect: The output bounding box rectangle. | |
1323 | * @line: The current line of the blit. | |
1324 | * @line_offset: Offset of the current line segment. | |
1325 | * @cpp: Bytes per pixel (granularity information). | |
1326 | * @memcpy: Which memcpy function to use. | |
1327 | */ | |
1328 | struct vmw_diff_cpy { | |
1329 | struct drm_rect rect; | |
1330 | size_t line; | |
1331 | size_t line_offset; | |
1332 | int cpp; | |
1333 | void (*do_cpy)(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src, | |
1334 | size_t n); | |
1335 | }; | |
1336 | ||
1337 | #define VMW_CPU_BLIT_INITIALIZER { \ | |
1338 | .do_cpy = vmw_memcpy, \ | |
1339 | } | |
1340 | ||
1341 | #define VMW_CPU_BLIT_DIFF_INITIALIZER(_cpp) { \ | |
1342 | .line = 0, \ | |
1343 | .line_offset = 0, \ | |
1344 | .rect = { .x1 = INT_MAX/2, \ | |
1345 | .y1 = INT_MAX/2, \ | |
1346 | .x2 = INT_MIN/2, \ | |
1347 | .y2 = INT_MIN/2 \ | |
1348 | }, \ | |
1349 | .cpp = _cpp, \ | |
1350 | .do_cpy = vmw_diff_memcpy, \ | |
1351 | } | |
1352 | ||
1353 | void vmw_diff_memcpy(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src, | |
1354 | size_t n); | |
1355 | ||
1356 | void vmw_memcpy(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src, size_t n); | |
1357 | ||
1358 | int vmw_bo_cpu_blit(struct ttm_buffer_object *dst, | |
1359 | u32 dst_offset, u32 dst_stride, | |
1360 | struct ttm_buffer_object *src, | |
1361 | u32 src_offset, u32 src_stride, | |
1362 | u32 w, u32 h, | |
1363 | struct vmw_diff_cpy *diff); | |
c74c162f | 1364 | |
6ff67ae7 | 1365 | /* Host messaging -vmwgfx_msg.c: */ |
35d86fb6 | 1366 | void vmw_disable_backdoor(void); |
6ff67ae7 TH |
1367 | int vmw_host_get_guestinfo(const char *guest_info_param, |
1368 | char *buffer, size_t *length); | |
523375c9 | 1369 | __printf(1, 2) int vmw_host_printf(const char *fmt, ...); |
cb92a323 RS |
1370 | int vmw_msg_ioctl(struct drm_device *dev, void *data, |
1371 | struct drm_file *file_priv); | |
6ff67ae7 | 1372 | |
7a7a933e MK |
1373 | /* Host mksGuestStats -vmwgfx_msg.c: */ |
1374 | int vmw_mksstat_get_kern_slot(pid_t pid, struct vmw_private *dev_priv); | |
1375 | ||
1376 | int vmw_mksstat_reset_ioctl(struct drm_device *dev, void *data, | |
1377 | struct drm_file *file_priv); | |
1378 | int vmw_mksstat_add_ioctl(struct drm_device *dev, void *data, | |
1379 | struct drm_file *file_priv); | |
1380 | int vmw_mksstat_remove_ioctl(struct drm_device *dev, void *data, | |
1381 | struct drm_file *file_priv); | |
1382 | int vmw_mksstat_remove_all(struct vmw_private *dev_priv); | |
1383 | ||
5724f899 DR |
1384 | /* VMW logging */ |
1385 | ||
1386 | /** | |
1387 | * VMW_DEBUG_USER - Debug output for user-space debugging. | |
1388 | * | |
1389 | * @fmt: printf() like format string. | |
1390 | * | |
1391 | * This macro is for logging user-space error and debugging messages for e.g. | |
1392 | * command buffer execution errors due to malformed commands, invalid context, | |
1393 | * etc. | |
1394 | */ | |
1395 | #define VMW_DEBUG_USER(fmt, ...) \ | |
1396 | DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__) | |
1397 | ||
b7468b15 | 1398 | /* Resource dirtying - vmwgfx_page_dirty.c */ |
09881d29 ZR |
1399 | void vmw_bo_dirty_scan(struct vmw_bo *vbo); |
1400 | int vmw_bo_dirty_add(struct vmw_bo *vbo); | |
b7468b15 TH |
1401 | void vmw_bo_dirty_transfer_to_res(struct vmw_resource *res); |
1402 | void vmw_bo_dirty_clear_res(struct vmw_resource *res); | |
09881d29 ZR |
1403 | void vmw_bo_dirty_release(struct vmw_bo *vbo); |
1404 | void vmw_bo_dirty_unmap(struct vmw_bo *vbo, | |
fb80edb0 | 1405 | pgoff_t start, pgoff_t end); |
b7468b15 TH |
1406 | vm_fault_t vmw_bo_vm_fault(struct vm_fault *vmf); |
1407 | vm_fault_t vmw_bo_vm_mkwrite(struct vm_fault *vmf); | |
1408 | ||
b7468b15 | 1409 | |
745adc3f DR |
1410 | /** |
1411 | * VMW_DEBUG_KMS - Debug output for kernel mode-setting | |
1412 | * | |
1413 | * This macro is for debugging vmwgfx mode-setting code. | |
1414 | */ | |
1415 | #define VMW_DEBUG_KMS(fmt, ...) \ | |
1416 | DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__) | |
1417 | ||
fb1d9738 JB |
1418 | /** |
1419 | * Inline helper functions | |
1420 | */ | |
1421 | ||
1422 | static inline void vmw_surface_unreference(struct vmw_surface **srf) | |
1423 | { | |
1424 | struct vmw_surface *tmp_srf = *srf; | |
1425 | struct vmw_resource *res = &tmp_srf->res; | |
1426 | *srf = NULL; | |
1427 | ||
1428 | vmw_resource_unreference(&res); | |
1429 | } | |
1430 | ||
1431 | static inline struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf) | |
1432 | { | |
1433 | (void) vmw_resource_reference(&srf->res); | |
1434 | return srf; | |
1435 | } | |
1436 | ||
153b3d5b TH |
1437 | static inline void vmw_fifo_resource_inc(struct vmw_private *dev_priv) |
1438 | { | |
1439 | atomic_inc(&dev_priv->num_fifo_resources); | |
1440 | } | |
1441 | ||
1442 | static inline void vmw_fifo_resource_dec(struct vmw_private *dev_priv) | |
1443 | { | |
1444 | atomic_dec(&dev_priv->num_fifo_resources); | |
1445 | } | |
b76ff5ea TH |
1446 | |
1447 | /** | |
be4f77ac | 1448 | * vmw_fifo_mem_read - Perform a MMIO read from the fifo memory |
b76ff5ea | 1449 | * |
be4f77ac | 1450 | * @fifo_reg: The fifo register to read from |
b76ff5ea TH |
1451 | * |
1452 | * This function is intended to be equivalent to ioread32() on | |
1453 | * memremap'd memory, but without byteswapping. | |
1454 | */ | |
be4f77ac | 1455 | static inline u32 vmw_fifo_mem_read(struct vmw_private *vmw, uint32 fifo_reg) |
b76ff5ea | 1456 | { |
2cd80dbd | 1457 | BUG_ON(vmw_is_svga_v3(vmw)); |
be4f77ac | 1458 | return READ_ONCE(*(vmw->fifo_mem + fifo_reg)); |
b76ff5ea TH |
1459 | } |
1460 | ||
1461 | /** | |
be4f77ac | 1462 | * vmw_fifo_mem_write - Perform a MMIO write to volatile memory |
b76ff5ea | 1463 | * |
be4f77ac | 1464 | * @addr: The fifo register to write to |
b76ff5ea TH |
1465 | * |
1466 | * This function is intended to be equivalent to iowrite32 on | |
1467 | * memremap'd memory, but without byteswapping. | |
1468 | */ | |
be4f77ac ZR |
1469 | static inline void vmw_fifo_mem_write(struct vmw_private *vmw, u32 fifo_reg, |
1470 | u32 value) | |
b76ff5ea | 1471 | { |
2cd80dbd | 1472 | BUG_ON(vmw_is_svga_v3(vmw)); |
be4f77ac | 1473 | WRITE_ONCE(*(vmw->fifo_mem + fifo_reg), value); |
b76ff5ea | 1474 | } |
2cd80dbd ZR |
1475 | |
1476 | static inline u32 vmw_fence_read(struct vmw_private *dev_priv) | |
1477 | { | |
1478 | u32 fence; | |
1479 | if (vmw_is_svga_v3(dev_priv)) | |
1480 | fence = vmw_read(dev_priv, SVGA_REG_FENCE); | |
1481 | else | |
1482 | fence = vmw_fifo_mem_read(dev_priv, SVGA_FIFO_FENCE); | |
1483 | return fence; | |
1484 | } | |
1485 | ||
1486 | static inline void vmw_fence_write(struct vmw_private *dev_priv, | |
1487 | u32 fence) | |
1488 | { | |
1489 | BUG_ON(vmw_is_svga_v3(dev_priv)); | |
1490 | vmw_fifo_mem_write(dev_priv, SVGA_FIFO_FENCE, fence); | |
1491 | } | |
1492 | ||
1493 | static inline u32 vmw_irq_status_read(struct vmw_private *vmw) | |
1494 | { | |
1495 | u32 status; | |
1496 | if (vmw_is_svga_v3(vmw)) | |
1497 | status = vmw_read(vmw, SVGA_REG_IRQ_STATUS); | |
1498 | else | |
1499 | status = inl(vmw->io_start + SVGA_IRQSTATUS_PORT); | |
1500 | return status; | |
1501 | } | |
1502 | ||
1503 | static inline void vmw_irq_status_write(struct vmw_private *vmw, | |
1504 | uint32 status) | |
1505 | { | |
1506 | if (vmw_is_svga_v3(vmw)) | |
1507 | vmw_write(vmw, SVGA_REG_IRQ_STATUS, status); | |
1508 | else | |
1509 | outl(status, vmw->io_start + SVGA_IRQSTATUS_PORT); | |
1510 | } | |
1511 | ||
c593197b ZR |
1512 | static inline bool vmw_has_fences(struct vmw_private *vmw) |
1513 | { | |
1514 | if ((vmw->capabilities & (SVGA_CAP_COMMAND_BUFFERS | | |
1515 | SVGA_CAP_CMD_BUFFERS_2)) != 0) | |
1516 | return true; | |
1517 | return (vmw_fifo_caps(vmw) & SVGA_FIFO_CAP_FENCE) != 0; | |
1518 | } | |
1519 | ||
14abdfae ZR |
1520 | static inline bool vmw_shadertype_is_valid(enum vmw_sm_type shader_model, |
1521 | u32 shader_type) | |
1522 | { | |
1523 | SVGA3dShaderType max_allowed = SVGA3D_SHADERTYPE_PREDX_MAX; | |
1524 | ||
1525 | if (shader_model >= VMW_SM_5) | |
1526 | max_allowed = SVGA3D_SHADERTYPE_MAX; | |
1527 | else if (shader_model >= VMW_SM_4) | |
1528 | max_allowed = SVGA3D_SHADERTYPE_DX10_MAX; | |
1529 | return shader_type >= SVGA3D_SHADERTYPE_MIN && shader_type < max_allowed; | |
1530 | } | |
1531 | ||
fb1d9738 | 1532 | #endif |