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hv: switch to cpuhp state machine for synic init/cleanup
[thirdparty/kernel/stable.git] / drivers / hv / hv.c
CommitLineData
3e7ee490 1/*
3e7ee490
HJ
2 * Copyright (c) 2009, Microsoft Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
15 * Place - Suite 330, Boston, MA 02111-1307 USA.
16 *
17 * Authors:
18 * Haiyang Zhang <haiyangz@microsoft.com>
19 * Hank Janssen <hjanssen@microsoft.com>
20 *
21 */
0a46618d
HJ
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
a0086dc5
GKH
24#include <linux/kernel.h>
25#include <linux/mm.h>
5a0e3ad6 26#include <linux/slab.h>
b7c947f0 27#include <linux/vmalloc.h>
46a97191 28#include <linux/hyperv.h>
83ba0c4f 29#include <linux/version.h>
db11f12a 30#include <linux/interrupt.h>
4061ed9e 31#include <linux/clockchips.h>
407dd164 32#include <asm/hyperv.h>
4061ed9e 33#include <asm/mshyperv.h>
0f2a6619 34#include "hyperv_vmbus.h"
3e7ee490 35
454f18a9 36/* The one and only */
6a0aaa18
HZ
37struct hv_context hv_context = {
38 .synic_initialized = false,
39 .hypercall_page = NULL,
3e7ee490
HJ
40};
41
4061ed9e
S
42#define HV_TIMER_FREQUENCY (10 * 1000 * 1000) /* 100ns period */
43#define HV_MAX_MAX_DELTA_TICKS 0xffffffff
44#define HV_MIN_DELTA_TICKS 1
45
3e189519 46/*
d44890c8 47 * query_hypervisor_info - Get version info of the windows hypervisor
0831ad04 48 */
5fbebb2d
S
49unsigned int host_info_eax;
50unsigned int host_info_ebx;
51unsigned int host_info_ecx;
52unsigned int host_info_edx;
53
d44890c8 54static int query_hypervisor_info(void)
0831ad04
GKH
55{
56 unsigned int eax;
57 unsigned int ebx;
58 unsigned int ecx;
59 unsigned int edx;
b8dfb264 60 unsigned int max_leaf;
0831ad04 61 unsigned int op;
3e7ee490 62
0831ad04
GKH
63 /*
64 * Its assumed that this is called after confirming that Viridian
65 * is present. Query id and revision.
66 */
67 eax = 0;
68 ebx = 0;
69 ecx = 0;
70 edx = 0;
f6feebe0 71 op = HVCPUID_VENDOR_MAXFUNCTION;
0831ad04 72 cpuid(op, &eax, &ebx, &ecx, &edx);
3e7ee490 73
b8dfb264 74 max_leaf = eax;
0831ad04 75
b8dfb264 76 if (max_leaf >= HVCPUID_VERSION) {
0831ad04
GKH
77 eax = 0;
78 ebx = 0;
79 ecx = 0;
80 edx = 0;
f6feebe0 81 op = HVCPUID_VERSION;
0831ad04 82 cpuid(op, &eax, &ebx, &ecx, &edx);
5fbebb2d
S
83 host_info_eax = eax;
84 host_info_ebx = ebx;
85 host_info_ecx = ecx;
86 host_info_edx = edx;
0831ad04 87 }
b8dfb264 88 return max_leaf;
0831ad04 89}
3e7ee490 90
3e189519 91/*
a108393d 92 * hv_do_hypercall- Invoke the specified hypercall
0831ad04 93 */
a108393d 94u64 hv_do_hypercall(u64 control, void *input, void *output)
3e7ee490 95{
b8dfb264
HZ
96 u64 input_address = (input) ? virt_to_phys(input) : 0;
97 u64 output_address = (output) ? virt_to_phys(output) : 0;
dec317fd 98 void *hypercall_page = hv_context.hypercall_page;
d7646eaa
VK
99#ifdef CONFIG_X86_64
100 u64 hv_status = 0;
101
102 if (!hypercall_page)
103 return (u64)ULLONG_MAX;
3e7ee490 104
b8dfb264
HZ
105 __asm__ __volatile__("mov %0, %%r8" : : "r" (output_address) : "r8");
106 __asm__ __volatile__("call *%3" : "=a" (hv_status) :
107 "c" (control), "d" (input_address),
108 "m" (hypercall_page));
3e7ee490 109
b8dfb264 110 return hv_status;
3e7ee490
HJ
111
112#else
113
b8dfb264
HZ
114 u32 control_hi = control >> 32;
115 u32 control_lo = control & 0xFFFFFFFF;
116 u32 hv_status_hi = 1;
117 u32 hv_status_lo = 1;
b8dfb264
HZ
118 u32 input_address_hi = input_address >> 32;
119 u32 input_address_lo = input_address & 0xFFFFFFFF;
b8dfb264
HZ
120 u32 output_address_hi = output_address >> 32;
121 u32 output_address_lo = output_address & 0xFFFFFFFF;
d7646eaa
VK
122
123 if (!hypercall_page)
124 return (u64)ULLONG_MAX;
3e7ee490 125
b8dfb264
HZ
126 __asm__ __volatile__ ("call *%8" : "=d"(hv_status_hi),
127 "=a"(hv_status_lo) : "d" (control_hi),
128 "a" (control_lo), "b" (input_address_hi),
129 "c" (input_address_lo), "D"(output_address_hi),
130 "S"(output_address_lo), "m" (hypercall_page));
3e7ee490 131
b8dfb264 132 return hv_status_lo | ((u64)hv_status_hi << 32);
0831ad04 133#endif /* !x86_64 */
3e7ee490 134}
a108393d 135EXPORT_SYMBOL_GPL(hv_do_hypercall);
3e7ee490 136
ca9357bd 137#ifdef CONFIG_X86_64
a5a1d1c2 138static u64 read_hv_clock_tsc(struct clocksource *arg)
ca9357bd 139{
a5a1d1c2 140 u64 current_tick;
ca9357bd
S
141 struct ms_hyperv_tsc_page *tsc_pg = hv_context.tsc_page;
142
c35b82ef 143 if (tsc_pg->tsc_sequence != 0) {
ca9357bd
S
144 /*
145 * Use the tsc page to compute the value.
146 */
147
148 while (1) {
a5a1d1c2 149 u64 tmp;
ca9357bd
S
150 u32 sequence = tsc_pg->tsc_sequence;
151 u64 cur_tsc;
152 u64 scale = tsc_pg->tsc_scale;
153 s64 offset = tsc_pg->tsc_offset;
154
155 rdtscll(cur_tsc);
156 /* current_tick = ((cur_tsc *scale) >> 64) + offset */
157 asm("mulq %3"
158 : "=d" (current_tick), "=a" (tmp)
159 : "a" (cur_tsc), "r" (scale));
160
161 current_tick += offset;
162 if (tsc_pg->tsc_sequence == sequence)
163 return current_tick;
164
c35b82ef 165 if (tsc_pg->tsc_sequence != 0)
ca9357bd
S
166 continue;
167 /*
168 * Fallback using MSR method.
169 */
170 break;
171 }
172 }
173 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick);
174 return current_tick;
175}
176
177static struct clocksource hyperv_cs_tsc = {
178 .name = "hyperv_clocksource_tsc_page",
179 .rating = 425,
180 .read = read_hv_clock_tsc,
181 .mask = CLOCKSOURCE_MASK(64),
182 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
183};
184#endif
185
186
3e189519 187/*
d44890c8 188 * hv_init - Main initialization routine.
0831ad04
GKH
189 *
190 * This routine must be called before any other routines in here are called
191 */
d44890c8 192int hv_init(void)
3e7ee490 193{
b8dfb264
HZ
194 int max_leaf;
195 union hv_x64_msr_hypercall_contents hypercall_msr;
196 void *virtaddr = NULL;
3e7ee490 197
14c1bf8a 198 memset(hv_context.synic_event_page, 0, sizeof(void *) * NR_CPUS);
6a0aaa18 199 memset(hv_context.synic_message_page, 0,
14c1bf8a 200 sizeof(void *) * NR_CPUS);
b29ef354
S
201 memset(hv_context.post_msg_page, 0,
202 sizeof(void *) * NR_CPUS);
917ea427
S
203 memset(hv_context.vp_index, 0,
204 sizeof(int) * NR_CPUS);
db11f12a
S
205 memset(hv_context.event_dpc, 0,
206 sizeof(void *) * NR_CPUS);
d81274aa
S
207 memset(hv_context.msg_dpc, 0,
208 sizeof(void *) * NR_CPUS);
4061ed9e
S
209 memset(hv_context.clk_evt, 0,
210 sizeof(void *) * NR_CPUS);
3e7ee490 211
d44890c8 212 max_leaf = query_hypervisor_info();
3e7ee490 213
83ba0c4f
S
214 /*
215 * Write our OS ID.
216 */
217 hv_context.guestid = generate_guest_id(0, LINUX_VERSION_CODE, 0);
218 wrmsrl(HV_X64_MSR_GUEST_OS_ID, hv_context.guestid);
a73e6b7c 219
454f18a9 220 /* See if the hypercall page is already set */
b8dfb264 221 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
3e7ee490 222
df3493e0 223 virtaddr = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL_EXEC);
3e7ee490 224
98e08702 225 if (!virtaddr)
44939d37 226 goto cleanup;
3e7ee490 227
b8dfb264 228 hypercall_msr.enable = 1;
a73e6b7c 229
b8dfb264
HZ
230 hypercall_msr.guest_physical_address = vmalloc_to_pfn(virtaddr);
231 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
a73e6b7c
HJ
232
233 /* Confirm that hypercall page did get setup. */
b8dfb264
HZ
234 hypercall_msr.as_uint64 = 0;
235 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
a73e6b7c 236
98e08702 237 if (!hypercall_msr.enable)
44939d37 238 goto cleanup;
3e7ee490 239
b8dfb264 240 hv_context.hypercall_page = virtaddr;
a73e6b7c 241
ca9357bd
S
242#ifdef CONFIG_X86_64
243 if (ms_hyperv.features & HV_X64_MSR_REFERENCE_TSC_AVAILABLE) {
9220e39b
SM
244 union hv_x64_msr_hypercall_contents tsc_msr;
245 void *va_tsc;
246
ca9357bd
S
247 va_tsc = __vmalloc(PAGE_SIZE, GFP_KERNEL, PAGE_KERNEL);
248 if (!va_tsc)
249 goto cleanup;
250 hv_context.tsc_page = va_tsc;
251
252 rdmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
253
254 tsc_msr.enable = 1;
255 tsc_msr.guest_physical_address = vmalloc_to_pfn(va_tsc);
256
257 wrmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64);
258 clocksource_register_hz(&hyperv_cs_tsc, NSEC_PER_SEC/100);
259 }
260#endif
5433e003 261 return 0;
3e7ee490 262
44939d37 263cleanup:
b8dfb264
HZ
264 if (virtaddr) {
265 if (hypercall_msr.enable) {
266 hypercall_msr.as_uint64 = 0;
267 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
3e7ee490
HJ
268 }
269
b8dfb264 270 vfree(virtaddr);
3e7ee490 271 }
5433e003
S
272
273 return -ENOTSUPP;
3e7ee490
HJ
274}
275
3e189519 276/*
d44890c8 277 * hv_cleanup - Cleanup routine.
0831ad04
GKH
278 *
279 * This routine is called normally during driver unloading or exiting.
280 */
a9f61ca7 281void hv_cleanup(bool crash)
3e7ee490 282{
b8dfb264 283 union hv_x64_msr_hypercall_contents hypercall_msr;
3e7ee490 284
93e5bd06
S
285 /* Reset our OS id */
286 wrmsrl(HV_X64_MSR_GUEST_OS_ID, 0);
287
6a0aaa18 288 if (hv_context.hypercall_page) {
b8dfb264
HZ
289 hypercall_msr.as_uint64 = 0;
290 wrmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64);
a9f61ca7
VK
291 if (!crash)
292 vfree(hv_context.hypercall_page);
6a0aaa18 293 hv_context.hypercall_page = NULL;
3e7ee490 294 }
ca9357bd
S
295
296#ifdef CONFIG_X86_64
297 /*
298 * Cleanup the TSC page based CS.
299 */
300 if (ms_hyperv.features & HV_X64_MSR_REFERENCE_TSC_AVAILABLE) {
3ccb4fd8
VK
301 /*
302 * Crash can happen in an interrupt context and unregistering
303 * a clocksource is impossible and redundant in this case.
304 */
305 if (!oops_in_progress) {
306 clocksource_change_rating(&hyperv_cs_tsc, 10);
307 clocksource_unregister(&hyperv_cs_tsc);
308 }
ca9357bd
S
309
310 hypercall_msr.as_uint64 = 0;
311 wrmsrl(HV_X64_MSR_REFERENCE_TSC, hypercall_msr.as_uint64);
56ef6718 312 if (!crash) {
a9f61ca7 313 vfree(hv_context.tsc_page);
56ef6718
VK
314 hv_context.tsc_page = NULL;
315 }
ca9357bd
S
316 }
317#endif
3e7ee490
HJ
318}
319
3e189519 320/*
d44890c8 321 * hv_post_message - Post a message using the hypervisor message IPC.
0831ad04
GKH
322 *
323 * This involves a hypercall.
324 */
415f0a02 325int hv_post_message(union hv_connection_id connection_id,
b8dfb264
HZ
326 enum hv_message_type message_type,
327 void *payload, size_t payload_size)
3e7ee490 328{
3e7ee490 329
b8dfb264 330 struct hv_input_post_message *aligned_msg;
a108393d 331 u64 status;
3e7ee490 332
b8dfb264 333 if (payload_size > HV_MESSAGE_PAYLOAD_BYTE_COUNT)
39594abc 334 return -EMSGSIZE;
3e7ee490 335
b8dfb264 336 aligned_msg = (struct hv_input_post_message *)
b29ef354 337 hv_context.post_msg_page[get_cpu()];
3e7ee490 338
b8dfb264 339 aligned_msg->connectionid = connection_id;
b29ef354 340 aligned_msg->reserved = 0;
b8dfb264
HZ
341 aligned_msg->message_type = message_type;
342 aligned_msg->payload_size = payload_size;
343 memcpy((void *)aligned_msg->payload, payload, payload_size);
3e7ee490 344
a108393d 345 status = hv_do_hypercall(HVCALL_POST_MESSAGE, aligned_msg, NULL);
3e7ee490 346
b29ef354 347 put_cpu();
a108393d 348 return status & 0xFFFF;
3e7ee490
HJ
349}
350
4061ed9e
S
351static int hv_ce_set_next_event(unsigned long delta,
352 struct clock_event_device *evt)
353{
a5a1d1c2 354 u64 current_tick;
4061ed9e 355
bc609cb4 356 WARN_ON(!clockevent_state_oneshot(evt));
4061ed9e
S
357
358 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick);
359 current_tick += delta;
360 wrmsrl(HV_X64_MSR_STIMER0_COUNT, current_tick);
361 return 0;
362}
363
bc609cb4
VK
364static int hv_ce_shutdown(struct clock_event_device *evt)
365{
366 wrmsrl(HV_X64_MSR_STIMER0_COUNT, 0);
367 wrmsrl(HV_X64_MSR_STIMER0_CONFIG, 0);
368
369 return 0;
370}
371
372static int hv_ce_set_oneshot(struct clock_event_device *evt)
4061ed9e
S
373{
374 union hv_timer_config timer_cfg;
375
bc609cb4
VK
376 timer_cfg.enable = 1;
377 timer_cfg.auto_enable = 1;
378 timer_cfg.sintx = VMBUS_MESSAGE_SINT;
379 wrmsrl(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64);
380
381 return 0;
4061ed9e
S
382}
383
384static void hv_init_clockevent_device(struct clock_event_device *dev, int cpu)
385{
386 dev->name = "Hyper-V clockevent";
387 dev->features = CLOCK_EVT_FEAT_ONESHOT;
388 dev->cpumask = cpumask_of(cpu);
389 dev->rating = 1000;
e086748c
VK
390 /*
391 * Avoid settint dev->owner = THIS_MODULE deliberately as doing so will
392 * result in clockevents_config_and_register() taking additional
393 * references to the hv_vmbus module making it impossible to unload.
394 */
4061ed9e 395
bc609cb4
VK
396 dev->set_state_shutdown = hv_ce_shutdown;
397 dev->set_state_oneshot = hv_ce_set_oneshot;
4061ed9e
S
398 dev->set_next_event = hv_ce_set_next_event;
399}
400
2608fb65
JW
401
402int hv_synic_alloc(void)
403{
404 size_t size = sizeof(struct tasklet_struct);
4061ed9e 405 size_t ced_size = sizeof(struct clock_event_device);
2608fb65
JW
406 int cpu;
407
9f01ec53
S
408 hv_context.hv_numa_map = kzalloc(sizeof(struct cpumask) * nr_node_ids,
409 GFP_ATOMIC);
410 if (hv_context.hv_numa_map == NULL) {
411 pr_err("Unable to allocate NUMA map\n");
412 goto err;
413 }
414
421b8f20 415 for_each_present_cpu(cpu) {
2608fb65
JW
416 hv_context.event_dpc[cpu] = kmalloc(size, GFP_ATOMIC);
417 if (hv_context.event_dpc[cpu] == NULL) {
418 pr_err("Unable to allocate event dpc\n");
419 goto err;
420 }
421 tasklet_init(hv_context.event_dpc[cpu], vmbus_on_event, cpu);
422
d81274aa
S
423 hv_context.msg_dpc[cpu] = kmalloc(size, GFP_ATOMIC);
424 if (hv_context.msg_dpc[cpu] == NULL) {
425 pr_err("Unable to allocate event dpc\n");
426 goto err;
427 }
428 tasklet_init(hv_context.msg_dpc[cpu], vmbus_on_msg_dpc, cpu);
429
4061ed9e
S
430 hv_context.clk_evt[cpu] = kzalloc(ced_size, GFP_ATOMIC);
431 if (hv_context.clk_evt[cpu] == NULL) {
432 pr_err("Unable to allocate clock event device\n");
433 goto err;
434 }
9f01ec53 435
4061ed9e
S
436 hv_init_clockevent_device(hv_context.clk_evt[cpu], cpu);
437
2608fb65
JW
438 hv_context.synic_message_page[cpu] =
439 (void *)get_zeroed_page(GFP_ATOMIC);
440
441 if (hv_context.synic_message_page[cpu] == NULL) {
442 pr_err("Unable to allocate SYNIC message page\n");
443 goto err;
444 }
445
446 hv_context.synic_event_page[cpu] =
447 (void *)get_zeroed_page(GFP_ATOMIC);
448
449 if (hv_context.synic_event_page[cpu] == NULL) {
450 pr_err("Unable to allocate SYNIC event page\n");
451 goto err;
452 }
b29ef354
S
453
454 hv_context.post_msg_page[cpu] =
455 (void *)get_zeroed_page(GFP_ATOMIC);
456
457 if (hv_context.post_msg_page[cpu] == NULL) {
458 pr_err("Unable to allocate post msg page\n");
459 goto err;
460 }
3c7630d3
VK
461
462 INIT_LIST_HEAD(&hv_context.percpu_list[cpu]);
2608fb65
JW
463 }
464
465 return 0;
466err:
467 return -ENOMEM;
468}
469
8712954d 470static void hv_synic_free_cpu(int cpu)
2608fb65
JW
471{
472 kfree(hv_context.event_dpc[cpu]);
d81274aa 473 kfree(hv_context.msg_dpc[cpu]);
4061ed9e 474 kfree(hv_context.clk_evt[cpu]);
fdf91dae 475 if (hv_context.synic_event_page[cpu])
2608fb65
JW
476 free_page((unsigned long)hv_context.synic_event_page[cpu]);
477 if (hv_context.synic_message_page[cpu])
478 free_page((unsigned long)hv_context.synic_message_page[cpu]);
b29ef354
S
479 if (hv_context.post_msg_page[cpu])
480 free_page((unsigned long)hv_context.post_msg_page[cpu]);
2608fb65
JW
481}
482
483void hv_synic_free(void)
484{
485 int cpu;
486
9f01ec53 487 kfree(hv_context.hv_numa_map);
421b8f20 488 for_each_present_cpu(cpu)
2608fb65
JW
489 hv_synic_free_cpu(cpu);
490}
491
3e189519 492/*
d44890c8 493 * hv_synic_init - Initialize the Synthethic Interrupt Controller.
0831ad04
GKH
494 *
495 * If it is already initialized by another entity (ie x2v shim), we need to
496 * retrieve the initialized message and event pages. Otherwise, we create and
497 * initialize the message and event pages.
498 */
76d36ab7 499int hv_synic_init(unsigned int cpu)
3e7ee490 500{
0831ad04 501 u64 version;
eacb1b4d
GKH
502 union hv_synic_simp simp;
503 union hv_synic_siefp siefp;
b8dfb264 504 union hv_synic_sint shared_sint;
eacb1b4d 505 union hv_synic_scontrol sctrl;
917ea427 506 u64 vp_index;
a73e6b7c 507
6a0aaa18 508 if (!hv_context.hypercall_page)
76d36ab7 509 return -EFAULT;
3e7ee490 510
454f18a9 511 /* Check the version */
a51ed7d6 512 rdmsrl(HV_X64_MSR_SVERSION, version);
3e7ee490 513
a73e6b7c 514 /* Setup the Synic's message page */
f6feebe0
HZ
515 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
516 simp.simp_enabled = 1;
6a0aaa18 517 simp.base_simp_gpa = virt_to_phys(hv_context.synic_message_page[cpu])
a73e6b7c 518 >> PAGE_SHIFT;
3e7ee490 519
f6feebe0 520 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
3e7ee490 521
a73e6b7c 522 /* Setup the Synic's event page */
f6feebe0
HZ
523 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
524 siefp.siefp_enabled = 1;
6a0aaa18 525 siefp.base_siefp_gpa = virt_to_phys(hv_context.synic_event_page[cpu])
a73e6b7c
HJ
526 >> PAGE_SHIFT;
527
f6feebe0 528 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
0831ad04 529
0831ad04 530 /* Setup the shared SINT. */
b8dfb264 531 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 532
b8dfb264 533 shared_sint.as_uint64 = 0;
302a3c0f 534 shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
b8dfb264 535 shared_sint.masked = false;
b0209501 536 shared_sint.auto_eoi = true;
3e7ee490 537
b8dfb264 538 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 539
454f18a9 540 /* Enable the global synic bit */
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541 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
542 sctrl.enable = 1;
3e7ee490 543
f6feebe0 544 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
3e7ee490 545
6a0aaa18 546 hv_context.synic_initialized = true;
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547
548 /*
549 * Setup the mapping between Hyper-V's notion
550 * of cpuid and Linux' notion of cpuid.
551 * This array will be indexed using Linux cpuid.
552 */
553 rdmsrl(HV_X64_MSR_VP_INDEX, vp_index);
554 hv_context.vp_index[cpu] = (u32)vp_index;
3a28fa35 555
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556 /*
557 * Register the per-cpu clockevent source.
558 */
559 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE)
560 clockevents_config_and_register(hv_context.clk_evt[cpu],
561 HV_TIMER_FREQUENCY,
562 HV_MIN_DELTA_TICKS,
563 HV_MAX_MAX_DELTA_TICKS);
76d36ab7 564 return 0;
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565}
566
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567/*
568 * hv_synic_clockevents_cleanup - Cleanup clockevent devices
569 */
570void hv_synic_clockevents_cleanup(void)
571{
572 int cpu;
573
574 if (!(ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE))
575 return;
576
6ffc4b85 577 for_each_present_cpu(cpu)
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578 clockevents_unbind_device(hv_context.clk_evt[cpu], cpu);
579}
580
3e189519 581/*
d44890c8 582 * hv_synic_cleanup - Cleanup routine for hv_synic_init().
0831ad04 583 */
76d36ab7 584int hv_synic_cleanup(unsigned int cpu)
3e7ee490 585{
b8dfb264 586 union hv_synic_sint shared_sint;
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587 union hv_synic_simp simp;
588 union hv_synic_siefp siefp;
e72e7ac5 589 union hv_synic_scontrol sctrl;
3e7ee490 590
6a0aaa18 591 if (!hv_context.synic_initialized)
76d36ab7 592 return -EFAULT;
3e7ee490 593
e086748c 594 /* Turn off clockevent device */
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595 if (ms_hyperv.features & HV_X64_MSR_SYNTIMER_AVAILABLE) {
596 clockevents_unbind_device(hv_context.clk_evt[cpu], cpu);
bc609cb4 597 hv_ce_shutdown(hv_context.clk_evt[cpu]);
6ffc4b85 598 }
e086748c 599
b8dfb264 600 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 601
b8dfb264 602 shared_sint.masked = 1;
3e7ee490 603
7692fd4d 604 /* Need to correctly cleanup in the case of SMP!!! */
454f18a9 605 /* Disable the interrupt */
b8dfb264 606 wrmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
3e7ee490 607
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608 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
609 simp.simp_enabled = 0;
610 simp.base_simp_gpa = 0;
3e7ee490 611
f6feebe0 612 wrmsrl(HV_X64_MSR_SIMP, simp.as_uint64);
3e7ee490 613
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614 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
615 siefp.siefp_enabled = 0;
616 siefp.base_siefp_gpa = 0;
3e7ee490 617
f6feebe0 618 wrmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64);
3e7ee490 619
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620 /* Disable the global synic bit */
621 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
622 sctrl.enable = 0;
623 wrmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64);
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624
625 return 0;
3e7ee490 626}