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hwmon: (lm90) Drop critical attribute support for MAX6654
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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
LT
6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
LT
19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
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23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
LT
28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
6948708d
GR
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
16ba51b5
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38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be
39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
41 * limits. Extended range is available by setting the configuration register
42 * accordingly, and is done during initialization. Extended precision is only
43 * available at conversion rates of 1 Hz and slower. Note that extended
44 * precision is not enabled by default, as this driver initializes all chips
45 * to 2 Hz by design.
229d495d 46 *
1a51e068
DW
47 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
48 * MAX6692 chips made by Maxim. These are again similar to the LM86,
49 * but they use unsigned temperature values and can report temperatures
50 * from 0 to 145 degrees.
271dabf5 51 *
32c82a93
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52 * This driver also supports the MAX6680 and MAX6681, two other sensor
53 * chips made by Maxim. These are quite similar to the other Maxim
a874a10c
JD
54 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
55 * be treated identically.
32c82a93 56 *
06e1c0a2
GR
57 * This driver also supports the MAX6695 and MAX6696, two other sensor
58 * chips made by Maxim. These are also quite similar to other Maxim
59 * chips, but support three temperature sensors instead of two. MAX6695
60 * and MAX6696 only differ in the pinout so they can be treated identically.
61 *
5a4e5e6a
GR
62 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
63 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
64 * and extended mode. They are mostly compatible with LM90 except for a data
65 * format difference for the temperature value registers.
1da177e4 66 *
2ef01793
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67 * This driver also supports the SA56004 from Philips. This device is
68 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
69 *
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70 * This driver also supports the G781 from GMT. This device is compatible
71 * with the ADM1032.
72 *
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73 * This driver also supports TMP451 and TMP461 from Texas Instruments.
74 * Those devices are supported in both compatibility and extended mode.
75 * They are mostly compatible with ADT7461 except for local temperature
76 * low byte register and max conversion rate.
1daaceb2 77 *
1da177e4
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78 * Since the LM90 was the first chipset supported by this driver, most
79 * comments will refer to this chipset, but are actually general and
80 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
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81 */
82
1da177e4
LT
83#include <linux/module.h>
84#include <linux/init.h>
85#include <linux/slab.h>
86#include <linux/jiffies.h>
87#include <linux/i2c.h>
943b0830
MH
88#include <linux/hwmon.h>
89#include <linux/err.h>
9a61bf63 90#include <linux/mutex.h>
df8d57bf 91#include <linux/of_device.h>
0e39e01c 92#include <linux/sysfs.h>
109b1283 93#include <linux/interrupt.h>
3e0f964f 94#include <linux/regulator/consumer.h>
1da177e4
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95
96/*
97 * Addresses to scan
98 * Address is fully defined internally and cannot be changed except for
32c82a93 99 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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100 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
101 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
102 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
103 * have address 0x4d.
271dabf5 104 * MAX6647 has address 0x4e.
13c84951 105 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
229d495d
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106 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
107 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
2ef01793 108 * SA56004 can have address 0x48 through 0x4F.
1da177e4
LT
109 */
110
25e9c86d 111static const unsigned short normal_i2c[] = {
2ef01793
SD
112 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
113 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 114
13c84951 115enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
f8344f76 116 max6646, w83l771, max6696, sa56004, g781, tmp451, tmp461, max6654 };
1da177e4
LT
117
118/*
119 * The LM90 registers
120 */
121
122#define LM90_REG_R_MAN_ID 0xFE
123#define LM90_REG_R_CHIP_ID 0xFF
124#define LM90_REG_R_CONFIG1 0x03
125#define LM90_REG_W_CONFIG1 0x09
126#define LM90_REG_R_CONFIG2 0xBF
127#define LM90_REG_W_CONFIG2 0xBF
128#define LM90_REG_R_CONVRATE 0x04
129#define LM90_REG_W_CONVRATE 0x0A
130#define LM90_REG_R_STATUS 0x02
131#define LM90_REG_R_LOCAL_TEMP 0x00
132#define LM90_REG_R_LOCAL_HIGH 0x05
133#define LM90_REG_W_LOCAL_HIGH 0x0B
134#define LM90_REG_R_LOCAL_LOW 0x06
135#define LM90_REG_W_LOCAL_LOW 0x0C
136#define LM90_REG_R_LOCAL_CRIT 0x20
137#define LM90_REG_W_LOCAL_CRIT 0x20
138#define LM90_REG_R_REMOTE_TEMPH 0x01
139#define LM90_REG_R_REMOTE_TEMPL 0x10
140#define LM90_REG_R_REMOTE_OFFSH 0x11
141#define LM90_REG_W_REMOTE_OFFSH 0x11
142#define LM90_REG_R_REMOTE_OFFSL 0x12
143#define LM90_REG_W_REMOTE_OFFSL 0x12
144#define LM90_REG_R_REMOTE_HIGHH 0x07
145#define LM90_REG_W_REMOTE_HIGHH 0x0D
146#define LM90_REG_R_REMOTE_HIGHL 0x13
147#define LM90_REG_W_REMOTE_HIGHL 0x13
148#define LM90_REG_R_REMOTE_LOWH 0x08
149#define LM90_REG_W_REMOTE_LOWH 0x0E
150#define LM90_REG_R_REMOTE_LOWL 0x14
151#define LM90_REG_W_REMOTE_LOWL 0x14
152#define LM90_REG_R_REMOTE_CRIT 0x19
153#define LM90_REG_W_REMOTE_CRIT 0x19
154#define LM90_REG_R_TCRIT_HYST 0x21
155#define LM90_REG_W_TCRIT_HYST 0x21
156
229d495d 157/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
f65e1708
JD
158
159#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 160#define MAX6696_REG_R_STATUS2 0x12
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161#define MAX6659_REG_R_REMOTE_EMERG 0x16
162#define MAX6659_REG_W_REMOTE_EMERG 0x16
163#define MAX6659_REG_R_LOCAL_EMERG 0x17
164#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 165
2ef01793
SD
166/* SA56004 registers */
167
168#define SA56004_REG_R_LOCAL_TEMPL 0x22
169
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170#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
171
f8344f76 172/* TMP451/TMP461 registers */
1daaceb2 173#define TMP451_REG_R_LOCAL_TEMPL 0x15
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GR
174#define TMP451_REG_CONALERT 0x22
175
176#define TMP461_REG_CHEN 0x16
177#define TMP461_REG_DFC 0x24
1daaceb2 178
23b2d477
NC
179/*
180 * Device flags
181 */
88073bb1
GR
182#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
183/* Device features */
184#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 185#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 186#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
06e1c0a2
GR
187#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
188#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 189#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
f347e249
GR
190#define LM90_HAVE_EXTENDED_TEMP (1 << 8) /* extended temperature support*/
191#define LM90_PAUSE_FOR_CONFIG (1 << 9) /* Pause conversion for config */
16ba51b5 192#define LM90_HAVE_CRIT (1 << 10)/* Chip supports CRIT/OVERT register */
23b2d477 193
072de496
WN
194/* LM90 status */
195#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
196#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
197#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
198#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
199#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
200#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
201#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
202
203#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
204#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
205#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
206#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
207#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
208#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
209#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
210
1da177e4
LT
211/*
212 * Driver data (common to all clients)
213 */
214
9b0e8526
JD
215static const struct i2c_device_id lm90_id[] = {
216 { "adm1032", adm1032 },
217 { "adt7461", adt7461 },
5a4e5e6a 218 { "adt7461a", adt7461 },
ae544f64 219 { "g781", g781 },
9b0e8526
JD
220 { "lm90", lm90 },
221 { "lm86", lm86 },
97ae60bb
JD
222 { "lm89", lm86 },
223 { "lm99", lm99 },
271dabf5
BH
224 { "max6646", max6646 },
225 { "max6647", max6646 },
226 { "max6649", max6646 },
229d495d 227 { "max6654", max6654 },
9b0e8526
JD
228 { "max6657", max6657 },
229 { "max6658", max6657 },
13c84951 230 { "max6659", max6659 },
9b0e8526
JD
231 { "max6680", max6680 },
232 { "max6681", max6680 },
06e1c0a2
GR
233 { "max6695", max6696 },
234 { "max6696", max6696 },
5a4e5e6a 235 { "nct1008", adt7461 },
6771ea1f 236 { "w83l771", w83l771 },
2ef01793 237 { "sa56004", sa56004 },
1daaceb2 238 { "tmp451", tmp451 },
f8344f76 239 { "tmp461", tmp461 },
9b0e8526
JD
240 { }
241};
242MODULE_DEVICE_TABLE(i2c, lm90_id);
243
787afaa3 244static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
245 {
246 .compatible = "adi,adm1032",
247 .data = (void *)adm1032
248 },
249 {
250 .compatible = "adi,adt7461",
251 .data = (void *)adt7461
252 },
253 {
254 .compatible = "adi,adt7461a",
255 .data = (void *)adt7461
256 },
257 {
258 .compatible = "gmt,g781",
259 .data = (void *)g781
260 },
261 {
262 .compatible = "national,lm90",
263 .data = (void *)lm90
264 },
265 {
266 .compatible = "national,lm86",
267 .data = (void *)lm86
268 },
269 {
270 .compatible = "national,lm89",
271 .data = (void *)lm86
272 },
273 {
274 .compatible = "national,lm99",
275 .data = (void *)lm99
276 },
277 {
278 .compatible = "dallas,max6646",
279 .data = (void *)max6646
280 },
281 {
282 .compatible = "dallas,max6647",
283 .data = (void *)max6646
284 },
285 {
286 .compatible = "dallas,max6649",
287 .data = (void *)max6646
288 },
229d495d
JL
289 {
290 .compatible = "dallas,max6654",
291 .data = (void *)max6654
292 },
df8d57bf
JMC
293 {
294 .compatible = "dallas,max6657",
295 .data = (void *)max6657
296 },
297 {
298 .compatible = "dallas,max6658",
299 .data = (void *)max6657
300 },
301 {
302 .compatible = "dallas,max6659",
303 .data = (void *)max6659
304 },
305 {
306 .compatible = "dallas,max6680",
307 .data = (void *)max6680
308 },
309 {
310 .compatible = "dallas,max6681",
311 .data = (void *)max6680
312 },
313 {
314 .compatible = "dallas,max6695",
315 .data = (void *)max6696
316 },
317 {
318 .compatible = "dallas,max6696",
319 .data = (void *)max6696
320 },
321 {
322 .compatible = "onnn,nct1008",
323 .data = (void *)adt7461
324 },
325 {
326 .compatible = "winbond,w83l771",
327 .data = (void *)w83l771
328 },
329 {
330 .compatible = "nxp,sa56004",
331 .data = (void *)sa56004
332 },
333 {
334 .compatible = "ti,tmp451",
335 .data = (void *)tmp451
336 },
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GR
337 {
338 .compatible = "ti,tmp461",
339 .data = (void *)tmp461
340 },
df8d57bf
JMC
341 { },
342};
343MODULE_DEVICE_TABLE(of, lm90_of_match);
344
4667bcb8
GR
345/*
346 * chip type specific parameters
347 */
348struct lm90_params {
349 u32 flags; /* Capabilities */
350 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
351 /* Upper 8 bits for max6695/96 */
0c01b644 352 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 353 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
354};
355
356static const struct lm90_params lm90_params[] = {
357 [adm1032] = {
1179324c 358 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 359 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
4667bcb8 360 .alert_alarms = 0x7c,
0c01b644 361 .max_convrate = 10,
4667bcb8
GR
362 },
363 [adt7461] = {
1179324c 364 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5
GR
365 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
366 | LM90_HAVE_CRIT,
4667bcb8 367 .alert_alarms = 0x7c,
0c01b644 368 .max_convrate = 10,
4667bcb8 369 },
ae544f64
GR
370 [g781] = {
371 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 372 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT,
ae544f64
GR
373 .alert_alarms = 0x7c,
374 .max_convrate = 8,
375 },
4667bcb8 376 [lm86] = {
16ba51b5
GR
377 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
378 | LM90_HAVE_CRIT,
4667bcb8 379 .alert_alarms = 0x7b,
0c01b644 380 .max_convrate = 9,
4667bcb8
GR
381 },
382 [lm90] = {
16ba51b5
GR
383 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
384 | LM90_HAVE_CRIT,
4667bcb8 385 .alert_alarms = 0x7b,
0c01b644 386 .max_convrate = 9,
4667bcb8
GR
387 },
388 [lm99] = {
16ba51b5
GR
389 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
390 | LM90_HAVE_CRIT,
4667bcb8 391 .alert_alarms = 0x7b,
0c01b644 392 .max_convrate = 9,
4667bcb8
GR
393 },
394 [max6646] = {
16ba51b5 395 .flags = LM90_HAVE_CRIT,
4667bcb8 396 .alert_alarms = 0x7c,
0c01b644 397 .max_convrate = 6,
2ef01793 398 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8 399 },
229d495d
JL
400 [max6654] = {
401 .alert_alarms = 0x7c,
402 .max_convrate = 7,
403 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
404 },
4667bcb8 405 [max6657] = {
16ba51b5 406 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT,
4667bcb8 407 .alert_alarms = 0x7c,
0c01b644 408 .max_convrate = 8,
2ef01793 409 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
410 },
411 [max6659] = {
16ba51b5 412 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT,
4667bcb8 413 .alert_alarms = 0x7c,
0c01b644 414 .max_convrate = 8,
2ef01793 415 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
416 },
417 [max6680] = {
16ba51b5 418 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT,
4667bcb8 419 .alert_alarms = 0x7c,
0c01b644 420 .max_convrate = 7,
4667bcb8
GR
421 },
422 [max6696] = {
a095f687 423 .flags = LM90_HAVE_EMERGENCY
16ba51b5 424 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT,
e41fae2b 425 .alert_alarms = 0x1c7c,
0c01b644 426 .max_convrate = 6,
2ef01793 427 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
428 },
429 [w83l771] = {
16ba51b5 430 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT,
4667bcb8 431 .alert_alarms = 0x7c,
0c01b644 432 .max_convrate = 8,
4667bcb8 433 },
2ef01793 434 [sa56004] = {
16ba51b5 435 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT,
2ef01793
SD
436 .alert_alarms = 0x7b,
437 .max_convrate = 9,
438 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
439 },
1daaceb2
WN
440 [tmp451] = {
441 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 442 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT,
1daaceb2
WN
443 .alert_alarms = 0x7c,
444 .max_convrate = 9,
445 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 446 },
f8344f76
GR
447 [tmp461] = {
448 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
16ba51b5 449 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT,
f8344f76
GR
450 .alert_alarms = 0x7c,
451 .max_convrate = 9,
452 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
453 },
4667bcb8
GR
454};
455
40465d94
WN
456/*
457 * TEMP8 register index
458 */
459enum lm90_temp8_reg_index {
460 LOCAL_LOW = 0,
461 LOCAL_HIGH,
462 LOCAL_CRIT,
463 REMOTE_CRIT,
464 LOCAL_EMERG, /* max6659 and max6695/96 */
465 REMOTE_EMERG, /* max6659 and max6695/96 */
466 REMOTE2_CRIT, /* max6695/96 only */
467 REMOTE2_EMERG, /* max6695/96 only */
468 TEMP8_REG_NUM
469};
470
471/*
472 * TEMP11 register index
473 */
474enum lm90_temp11_reg_index {
475 REMOTE_TEMP = 0,
476 REMOTE_LOW,
477 REMOTE_HIGH,
478 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
479 LOCAL_TEMP,
480 REMOTE2_TEMP, /* max6695/96 only */
481 REMOTE2_LOW, /* max6695/96 only */
482 REMOTE2_HIGH, /* max6695/96 only */
483 TEMP11_REG_NUM
484};
485
1da177e4
LT
486/*
487 * Client data (each client gets its own)
488 */
489
490struct lm90_data {
1de8b250 491 struct i2c_client *client;
94dbd23e 492 struct device *hwmon_dev;
eb1c8f43
GR
493 u32 channel_config[4];
494 struct hwmon_channel_info temp_info;
495 const struct hwmon_channel_info *info[3];
496 struct hwmon_chip_info chip;
9a61bf63 497 struct mutex update_lock;
2f83ab77 498 bool valid; /* true if register values are valid */
1da177e4
LT
499 unsigned long last_updated; /* in jiffies */
500 int kind;
4667bcb8 501 u32 flags;
1da177e4 502
38bab98a 503 unsigned int update_interval; /* in milliseconds */
0c01b644 504
b849e5d1 505 u8 config; /* Current configuration register value */
95238364 506 u8 config_orig; /* Original configuration register value */
0c01b644 507 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
508 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
509 /* Upper 8 bits for max6695/96 */
0c01b644 510 u8 max_convrate; /* Maximum conversion rate */
2ef01793 511 u8 reg_local_ext; /* local extension register offset */
95238364 512
1da177e4 513 /* registers values */
40465d94
WN
514 s8 temp8[TEMP8_REG_NUM];
515 s16 temp11[TEMP11_REG_NUM];
1da177e4 516 u8 temp_hyst;
06e1c0a2 517 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
518};
519
15b66ab6
GR
520/*
521 * Support functions
522 */
523
524/*
525 * The ADM1032 supports PEC but not on write byte transactions, so we need
526 * to explicitly ask for a transaction without PEC.
527 */
528static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
529{
530 return i2c_smbus_xfer(client->adapter, client->addr,
531 client->flags & ~I2C_CLIENT_PEC,
532 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
533}
534
535/*
536 * It is assumed that client->update_lock is held (unless we are in
537 * detection or initialization steps). This matters when PEC is enabled,
538 * because we don't want the address pointer to change between the write
539 * byte and the read byte transactions.
540 */
37ad04d7 541static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
542{
543 int err;
544
545 if (client->flags & I2C_CLIENT_PEC) {
546 err = adm1032_write_byte(client, reg);
547 if (err >= 0)
548 err = i2c_smbus_read_byte(client);
549 } else
550 err = i2c_smbus_read_byte_data(client, reg);
551
37ad04d7 552 return err;
15b66ab6
GR
553}
554
37ad04d7 555static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 556{
37ad04d7 557 int oldh, newh, l;
15b66ab6
GR
558
559 /*
560 * There is a trick here. We have to read two registers to have the
561 * sensor temperature, but we have to beware a conversion could occur
25985edc 562 * between the readings. The datasheet says we should either use
15b66ab6
GR
563 * the one-shot conversion register, which we don't want to do
564 * (disables hardware monitoring) or monitor the busy bit, which is
565 * impossible (we can't read the values and monitor that bit at the
566 * exact same time). So the solution used here is to read the high
567 * byte once, then the low byte, then the high byte again. If the new
568 * high byte matches the old one, then we have a valid reading. Else
569 * we have to read the low byte again, and now we believe we have a
570 * correct reading.
571 */
37ad04d7
GR
572 oldh = lm90_read_reg(client, regh);
573 if (oldh < 0)
574 return oldh;
575 l = lm90_read_reg(client, regl);
576 if (l < 0)
577 return l;
578 newh = lm90_read_reg(client, regh);
579 if (newh < 0)
580 return newh;
15b66ab6 581 if (oldh != newh) {
37ad04d7
GR
582 l = lm90_read_reg(client, regl);
583 if (l < 0)
584 return l;
15b66ab6 585 }
37ad04d7 586 return (newh << 8) | l;
15b66ab6
GR
587}
588
7a1d220c
GR
589static int lm90_update_confreg(struct lm90_data *data, u8 config)
590{
591 if (data->config != config) {
592 int err;
593
594 err = i2c_smbus_write_byte_data(data->client,
595 LM90_REG_W_CONFIG1,
596 config);
597 if (err)
598 return err;
599 data->config = config;
600 }
601 return 0;
602}
603
15b66ab6
GR
604/*
605 * client->update_lock must be held when calling this function (unless we are
606 * in detection or initialization steps), and while a remote channel other
607 * than channel 0 is selected. Also, calling code must make sure to re-select
608 * external channel 0 before releasing the lock. This is necessary because
609 * various registers have different meanings as a result of selecting a
610 * non-default remote channel.
611 */
7a1d220c 612static int lm90_select_remote_channel(struct lm90_data *data, int channel)
15b66ab6 613{
7a1d220c
GR
614 int err = 0;
615
15b66ab6 616 if (data->kind == max6696) {
b849e5d1 617 u8 config = data->config & ~0x08;
b849e5d1 618
15b66ab6
GR
619 if (channel)
620 config |= 0x08;
7a1d220c 621 err = lm90_update_confreg(data, config);
15b66ab6 622 }
7a1d220c 623 return err;
15b66ab6
GR
624}
625
7a1d220c 626static int lm90_write_convrate(struct lm90_data *data, int val)
62456189 627{
b849e5d1 628 u8 config = data->config;
62456189 629 int err;
62456189
BY
630
631 /* Save config and pause conversion */
632 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
7a1d220c
GR
633 err = lm90_update_confreg(data, config | 0x40);
634 if (err < 0)
635 return err;
62456189
BY
636 }
637
638 /* Set conv rate */
7a1d220c 639 err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val);
62456189
BY
640
641 /* Revert change to config */
7a1d220c 642 lm90_update_confreg(data, config);
62456189
BY
643
644 return err;
645}
646
0c01b644
GR
647/*
648 * Set conversion rate.
649 * client->update_lock must be held when calling this function (unless we are
650 * in detection or initialization steps).
651 */
eb1c8f43
GR
652static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
653 unsigned int interval)
0c01b644 654{
0c01b644 655 unsigned int update_interval;
eb1c8f43 656 int i, err;
0c01b644
GR
657
658 /* Shift calculations to avoid rounding errors */
659 interval <<= 6;
660
661 /* find the nearest update rate */
662 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
663 i < data->max_convrate; i++, update_interval >>= 1)
664 if (interval >= update_interval * 3 / 4)
665 break;
666
7a1d220c 667 err = lm90_write_convrate(data, i);
0c01b644 668 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 669 return err;
0c01b644
GR
670}
671
10bfef47
GR
672static int lm90_update_limits(struct device *dev)
673{
674 struct lm90_data *data = dev_get_drvdata(dev);
675 struct i2c_client *client = data->client;
676 int val;
677
16ba51b5
GR
678 if (data->flags & LM90_HAVE_CRIT) {
679 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
680 if (val < 0)
681 return val;
682 data->temp8[LOCAL_CRIT] = val;
10bfef47 683
16ba51b5
GR
684 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
685 if (val < 0)
686 return val;
687 data->temp8[REMOTE_CRIT] = val;
10bfef47 688
16ba51b5
GR
689 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
690 if (val < 0)
691 return val;
692 data->temp_hyst = val;
693 }
10bfef47 694
be9d6374 695 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
696 if (val < 0)
697 return val;
698 data->temp11[REMOTE_LOW] = val << 8;
699
700 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
701 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
702 if (val < 0)
703 return val;
704 data->temp11[REMOTE_LOW] |= val;
705 }
706
707 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
708 if (val < 0)
709 return val;
710 data->temp11[REMOTE_HIGH] = val << 8;
711
712 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
713 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
714 if (val < 0)
715 return val;
716 data->temp11[REMOTE_HIGH] |= val;
717 }
718
719 if (data->flags & LM90_HAVE_OFFSET) {
720 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
721 LM90_REG_R_REMOTE_OFFSL);
722 if (val < 0)
723 return val;
724 data->temp11[REMOTE_OFFSET] = val;
725 }
726
727 if (data->flags & LM90_HAVE_EMERGENCY) {
728 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
729 if (val < 0)
730 return val;
731 data->temp8[LOCAL_EMERG] = val;
732
733 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
734 if (val < 0)
735 return val;
736 data->temp8[REMOTE_EMERG] = val;
737 }
738
739 if (data->kind == max6696) {
7a1d220c 740 val = lm90_select_remote_channel(data, 1);
10bfef47
GR
741 if (val < 0)
742 return val;
743
744 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
745 if (val < 0)
746 return val;
747 data->temp8[REMOTE2_CRIT] = val;
748
749 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
750 if (val < 0)
751 return val;
752 data->temp8[REMOTE2_EMERG] = val;
753
754 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
755 if (val < 0)
756 return val;
757 data->temp11[REMOTE2_LOW] = val << 8;
758
759 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
760 if (val < 0)
761 return val;
762 data->temp11[REMOTE2_HIGH] = val << 8;
763
7a1d220c 764 lm90_select_remote_channel(data, 0);
10bfef47
GR
765 }
766
767 return 0;
768}
769
eb1c8f43 770static int lm90_update_device(struct device *dev)
15b66ab6 771{
1de8b250
GR
772 struct lm90_data *data = dev_get_drvdata(dev);
773 struct i2c_client *client = data->client;
0c01b644 774 unsigned long next_update;
eb1c8f43 775 int val;
15b66ab6 776
10bfef47
GR
777 if (!data->valid) {
778 val = lm90_update_limits(dev);
779 if (val < 0)
eb1c8f43 780 return val;
10bfef47
GR
781 }
782
78c2c2fe
JD
783 next_update = data->last_updated +
784 msecs_to_jiffies(data->update_interval);
0c01b644 785 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 786 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 787
2f83ab77 788 data->valid = false;
10bfef47 789
37ad04d7
GR
790 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
791 if (val < 0)
eb1c8f43 792 return val;
37ad04d7
GR
793 data->temp8[LOCAL_LOW] = val;
794
795 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
796 if (val < 0)
eb1c8f43 797 return val;
37ad04d7
GR
798 data->temp8[LOCAL_HIGH] = val;
799
a095f687 800 if (data->reg_local_ext) {
37ad04d7
GR
801 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
802 data->reg_local_ext);
803 if (val < 0)
eb1c8f43 804 return val;
37ad04d7 805 data->temp11[LOCAL_TEMP] = val;
15b66ab6 806 } else {
37ad04d7
GR
807 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
808 if (val < 0)
eb1c8f43 809 return val;
37ad04d7 810 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 811 }
37ad04d7
GR
812 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
813 LM90_REG_R_REMOTE_TEMPL);
814 if (val < 0)
eb1c8f43 815 return val;
37ad04d7
GR
816 data->temp11[REMOTE_TEMP] = val;
817
37ad04d7
GR
818 val = lm90_read_reg(client, LM90_REG_R_STATUS);
819 if (val < 0)
eb1c8f43 820 return val;
37ad04d7 821 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
822
823 if (data->kind == max6696) {
7a1d220c 824 val = lm90_select_remote_channel(data, 1);
37ad04d7 825 if (val < 0)
eb1c8f43 826 return val;
37ad04d7 827
37ad04d7
GR
828 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
829 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43 830 if (val < 0) {
7a1d220c 831 lm90_select_remote_channel(data, 0);
eb1c8f43
GR
832 return val;
833 }
37ad04d7
GR
834 data->temp11[REMOTE2_TEMP] = val;
835
7a1d220c 836 lm90_select_remote_channel(data, 0);
15b66ab6 837
37ad04d7
GR
838 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
839 if (val < 0)
eb1c8f43 840 return val;
37ad04d7 841 data->alarms |= val << 8;
15b66ab6
GR
842 }
843
f36ffeab
GR
844 /*
845 * Re-enable ALERT# output if it was originally enabled and
846 * relevant alarms are all clear
847 */
37ad04d7
GR
848 if (!(data->config_orig & 0x80) &&
849 !(data->alarms & data->alert_alarms)) {
b849e5d1 850 if (data->config & 0x80) {
15b66ab6 851 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
7a1d220c 852 lm90_update_confreg(data, data->config & ~0x80);
15b66ab6
GR
853 }
854 }
855
856 data->last_updated = jiffies;
2f83ab77 857 data->valid = true;
15b66ab6
GR
858 }
859
eb1c8f43 860 return 0;
15b66ab6
GR
861}
862
cea50fe2
NC
863/*
864 * Conversions
865 * For local temperatures and limits, critical limits and the hysteresis
866 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
867 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
868 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
869 * Maxim chips use unsigned values.
cea50fe2
NC
870 */
871
9d4d3834 872static inline int temp_from_s8(s8 val)
cea50fe2
NC
873{
874 return val * 1000;
875}
876
271dabf5
BH
877static inline int temp_from_u8(u8 val)
878{
879 return val * 1000;
880}
881
9d4d3834 882static inline int temp_from_s16(s16 val)
cea50fe2
NC
883{
884 return val / 32 * 125;
885}
886
271dabf5
BH
887static inline int temp_from_u16(u16 val)
888{
889 return val / 32 * 125;
890}
891
9d4d3834 892static s8 temp_to_s8(long val)
cea50fe2
NC
893{
894 if (val <= -128000)
895 return -128;
896 if (val >= 127000)
897 return 127;
898 if (val < 0)
899 return (val - 500) / 1000;
900 return (val + 500) / 1000;
901}
902
271dabf5
BH
903static u8 temp_to_u8(long val)
904{
905 if (val <= 0)
906 return 0;
907 if (val >= 255000)
908 return 255;
909 return (val + 500) / 1000;
910}
911
9d4d3834 912static s16 temp_to_s16(long val)
cea50fe2
NC
913{
914 if (val <= -128000)
915 return 0x8000;
916 if (val >= 127875)
917 return 0x7FE0;
918 if (val < 0)
919 return (val - 62) / 125 * 32;
920 return (val + 62) / 125 * 32;
921}
922
923static u8 hyst_to_reg(long val)
924{
925 if (val <= 0)
926 return 0;
927 if (val >= 30500)
928 return 31;
929 return (val + 500) / 1000;
930}
931
932/*
23b2d477
NC
933 * ADT7461 in compatibility mode is almost identical to LM90 except that
934 * attempts to write values that are outside the range 0 < temp < 127 are
935 * treated as the boundary value.
936 *
937 * ADT7461 in "extended mode" operation uses unsigned integers offset by
938 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 939 */
9d4d3834 940static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 941{
23b2d477
NC
942 if (data->flags & LM90_FLAG_ADT7461_EXT)
943 return (val - 64) * 1000;
589f707c 944 return temp_from_s8(val);
cea50fe2
NC
945}
946
9d4d3834 947static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 948{
23b2d477
NC
949 if (data->flags & LM90_FLAG_ADT7461_EXT)
950 return (val - 0x4000) / 64 * 250;
589f707c 951 return temp_from_s16(val);
23b2d477
NC
952}
953
9d4d3834 954static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
955{
956 if (data->flags & LM90_FLAG_ADT7461_EXT) {
957 if (val <= -64000)
958 return 0;
959 if (val >= 191000)
960 return 0xFF;
961 return (val + 500 + 64000) / 1000;
23b2d477 962 }
589f707c
GR
963 if (val <= 0)
964 return 0;
965 if (val >= 127000)
966 return 127;
967 return (val + 500) / 1000;
23b2d477
NC
968}
969
9d4d3834 970static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
971{
972 if (data->flags & LM90_FLAG_ADT7461_EXT) {
973 if (val <= -64000)
974 return 0;
975 if (val >= 191750)
976 return 0xFFC0;
977 return (val + 64000 + 125) / 250 * 64;
23b2d477 978 }
589f707c
GR
979 if (val <= 0)
980 return 0;
981 if (val >= 127750)
982 return 0x7FC0;
983 return (val + 125) / 250 * 64;
cea50fe2
NC
984}
985
eb1c8f43 986/* pec used for ADM1032 only */
e57959a6 987static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 988 char *buf)
30d7394b 989{
eb1c8f43 990 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 991
eb1c8f43 992 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
993}
994
e57959a6
JL
995static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
996 const char *buf, size_t count)
30d7394b 997{
eb1c8f43 998 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
999 long val;
1000 int err;
1001
179c4fdb 1002 err = kstrtol(buf, 10, &val);
11e57812
GR
1003 if (err < 0)
1004 return err;
30d7394b 1005
eb1c8f43
GR
1006 switch (val) {
1007 case 0:
1008 client->flags &= ~I2C_CLIENT_PEC;
1009 break;
1010 case 1:
1011 client->flags |= I2C_CLIENT_PEC;
1012 break;
1013 default:
1014 return -EINVAL;
1015 }
06e1c0a2 1016
30d7394b 1017 return count;
1da177e4 1018}
30d7394b 1019
e57959a6 1020static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
1021
1022static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 1023{
eb1c8f43 1024 s16 temp11 = data->temp11[index];
23b2d477
NC
1025 int temp;
1026
f347e249 1027 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1028 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 1029 else if (data->kind == max6646)
eb1c8f43 1030 temp = temp_from_u16(temp11);
23b2d477 1031 else
eb1c8f43 1032 temp = temp_from_s16(temp11);
23b2d477 1033
97ae60bb 1034 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1035 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1036 temp += 16000;
1037
eb1c8f43 1038 return temp;
1da177e4 1039}
30d7394b 1040
eb1c8f43 1041static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 1042{
eb1c8f43 1043 static struct reg {
96512861
GR
1044 u8 high;
1045 u8 low;
eb1c8f43
GR
1046 } reg[] = {
1047 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1048 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
1049 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
1050 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1051 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 1052 };
1de8b250 1053 struct i2c_client *client = data->client;
eb1c8f43 1054 struct reg *regp = &reg[index];
11e57812
GR
1055 int err;
1056
97ae60bb 1057 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1058 if (data->kind == lm99 && index <= 2) {
1059 /* prevent integer underflow */
1060 val = max(val, -128000l);
97ae60bb 1061 val -= 16000;
b50aa496 1062 }
97ae60bb 1063
f347e249 1064 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
96512861 1065 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1066 else if (data->kind == max6646)
96512861 1067 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1068 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1069 data->temp11[index] = temp_to_s16(val);
88073bb1 1070 else
96512861 1071 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1072
7a1d220c 1073 lm90_select_remote_channel(data, index >= 3);
eb1c8f43 1074 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1075 data->temp11[index] >> 8);
eb1c8f43
GR
1076 if (err < 0)
1077 return err;
88073bb1 1078 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1079 err = i2c_smbus_write_byte_data(client, regp->low,
1080 data->temp11[index] & 0xff);
06e1c0a2 1081
7a1d220c 1082 lm90_select_remote_channel(data, 0);
eb1c8f43 1083 return err;
1da177e4 1084}
30d7394b 1085
eb1c8f43 1086static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1087{
eb1c8f43 1088 s8 temp8 = data->temp8[index];
23b2d477
NC
1089 int temp;
1090
f347e249 1091 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1092 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1093 else if (data->kind == max6646)
eb1c8f43 1094 temp = temp_from_u8(temp8);
23b2d477 1095 else
eb1c8f43 1096 temp = temp_from_s8(temp8);
23b2d477 1097
97ae60bb 1098 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1099 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1100 temp += 16000;
1101
eb1c8f43 1102 return temp;
1da177e4 1103}
1da177e4 1104
eb1c8f43 1105static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1106{
eb1c8f43
GR
1107 static const u8 reg[TEMP8_REG_NUM] = {
1108 LM90_REG_W_LOCAL_LOW,
1109 LM90_REG_W_LOCAL_HIGH,
1110 LM90_REG_W_LOCAL_CRIT,
1111 LM90_REG_W_REMOTE_CRIT,
1112 MAX6659_REG_W_LOCAL_EMERG,
1113 MAX6659_REG_W_REMOTE_EMERG,
1114 LM90_REG_W_REMOTE_CRIT,
1115 MAX6659_REG_W_REMOTE_EMERG,
1116 };
1de8b250 1117 struct i2c_client *client = data->client;
11e57812 1118 int err;
1da177e4 1119
eb1c8f43 1120 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1121 if (data->kind == lm99 && index == 3) {
1122 /* prevent integer underflow */
1123 val = max(val, -128000l);
eb1c8f43 1124 val -= 16000;
b50aa496 1125 }
11e57812 1126
f347e249 1127 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1128 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1129 else if (data->kind == max6646)
eb1c8f43 1130 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1131 else
eb1c8f43 1132 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1133
7a1d220c 1134 lm90_select_remote_channel(data, index >= 6);
eb1c8f43 1135 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
7a1d220c 1136 lm90_select_remote_channel(data, 0);
37ad04d7 1137
eb1c8f43 1138 return err;
1da177e4
LT
1139}
1140
eb1c8f43 1141static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1142{
eb1c8f43 1143 int temp;
37ad04d7 1144
f347e249 1145 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1146 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1147 else if (data->kind == max6646)
1148 temp = temp_from_u8(data->temp8[index]);
1149 else
1150 temp = temp_from_s8(data->temp8[index]);
2d45771e 1151
eb1c8f43
GR
1152 /* +16 degrees offset for temp2 for the LM99 */
1153 if (data->kind == lm99 && index == 3)
1154 temp += 16000;
0c01b644 1155
eb1c8f43 1156 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1157}
1158
eb1c8f43 1159static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1160{
1de8b250 1161 struct i2c_client *client = data->client;
eb1c8f43 1162 int temp;
0c01b644
GR
1163 int err;
1164
f347e249 1165 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1166 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1167 else if (data->kind == max6646)
1168 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1169 else
1170 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1171
55840b9e
GR
1172 /* prevent integer overflow/underflow */
1173 val = clamp_val(val, -128000l, 255000l);
b50aa496 1174
eb1c8f43
GR
1175 data->temp_hyst = hyst_to_reg(temp - val);
1176 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1177 data->temp_hyst);
1178 return err;
0c01b644
GR
1179}
1180
eb1c8f43
GR
1181static const u8 lm90_temp_index[3] = {
1182 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1183};
1184
eb1c8f43
GR
1185static const u8 lm90_temp_min_index[3] = {
1186 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1187};
1188
eb1c8f43
GR
1189static const u8 lm90_temp_max_index[3] = {
1190 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1191};
1192
eb1c8f43
GR
1193static const u8 lm90_temp_crit_index[3] = {
1194 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1195};
1196
eb1c8f43
GR
1197static const u8 lm90_temp_emerg_index[3] = {
1198 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1199};
1200
eb1c8f43 1201static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1202static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43
GR
1203static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1204static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1205static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1206
eb1c8f43
GR
1207static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1208{
1209 struct lm90_data *data = dev_get_drvdata(dev);
1210 int err;
06e1c0a2 1211
eb1c8f43
GR
1212 mutex_lock(&data->update_lock);
1213 err = lm90_update_device(dev);
1214 mutex_unlock(&data->update_lock);
1215 if (err)
1216 return err;
06e1c0a2 1217
eb1c8f43
GR
1218 switch (attr) {
1219 case hwmon_temp_input:
1220 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1221 break;
1222 case hwmon_temp_min_alarm:
1223 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1224 break;
1225 case hwmon_temp_max_alarm:
1226 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1227 break;
1228 case hwmon_temp_crit_alarm:
1229 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1230 break;
1231 case hwmon_temp_emergency_alarm:
1232 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1233 break;
1234 case hwmon_temp_fault:
1235 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1236 break;
1237 case hwmon_temp_min:
1238 if (channel == 0)
1239 *val = lm90_get_temp8(data,
1240 lm90_temp_min_index[channel]);
1241 else
1242 *val = lm90_get_temp11(data,
1243 lm90_temp_min_index[channel]);
1244 break;
1245 case hwmon_temp_max:
1246 if (channel == 0)
1247 *val = lm90_get_temp8(data,
1248 lm90_temp_max_index[channel]);
1249 else
1250 *val = lm90_get_temp11(data,
1251 lm90_temp_max_index[channel]);
1252 break;
1253 case hwmon_temp_crit:
1254 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1255 break;
1256 case hwmon_temp_crit_hyst:
1257 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1258 break;
1259 case hwmon_temp_emergency:
1260 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1261 break;
1262 case hwmon_temp_emergency_hyst:
1263 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1264 break;
1265 case hwmon_temp_offset:
1266 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1267 break;
1268 default:
1269 return -EOPNOTSUPP;
1270 }
1271 return 0;
1272}
06e1c0a2 1273
eb1c8f43
GR
1274static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1275{
1276 struct lm90_data *data = dev_get_drvdata(dev);
1277 int err;
06e1c0a2 1278
eb1c8f43 1279 mutex_lock(&data->update_lock);
06e1c0a2 1280
eb1c8f43
GR
1281 err = lm90_update_device(dev);
1282 if (err)
1283 goto error;
1284
1285 switch (attr) {
1286 case hwmon_temp_min:
1287 if (channel == 0)
1288 err = lm90_set_temp8(data,
1289 lm90_temp_min_index[channel],
1290 val);
1291 else
1292 err = lm90_set_temp11(data,
1293 lm90_temp_min_index[channel],
1294 val);
1295 break;
1296 case hwmon_temp_max:
1297 if (channel == 0)
1298 err = lm90_set_temp8(data,
1299 lm90_temp_max_index[channel],
1300 val);
1301 else
1302 err = lm90_set_temp11(data,
1303 lm90_temp_max_index[channel],
1304 val);
1305 break;
1306 case hwmon_temp_crit:
1307 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1308 break;
1309 case hwmon_temp_crit_hyst:
1310 err = lm90_set_temphyst(data, val);
1311 break;
1312 case hwmon_temp_emergency:
1313 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1314 break;
1315 case hwmon_temp_offset:
1316 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1317 break;
1318 default:
1319 err = -EOPNOTSUPP;
1320 break;
1321 }
1322error:
1323 mutex_unlock(&data->update_lock);
1324
1325 return err;
1326}
1327
1328static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1329{
eb1c8f43
GR
1330 switch (attr) {
1331 case hwmon_temp_input:
1332 case hwmon_temp_min_alarm:
1333 case hwmon_temp_max_alarm:
1334 case hwmon_temp_crit_alarm:
1335 case hwmon_temp_emergency_alarm:
1336 case hwmon_temp_emergency_hyst:
1337 case hwmon_temp_fault:
3334851d 1338 return 0444;
eb1c8f43
GR
1339 case hwmon_temp_min:
1340 case hwmon_temp_max:
1341 case hwmon_temp_crit:
1342 case hwmon_temp_emergency:
1343 case hwmon_temp_offset:
3334851d 1344 return 0644;
eb1c8f43
GR
1345 case hwmon_temp_crit_hyst:
1346 if (channel == 0)
3334851d
GR
1347 return 0644;
1348 return 0444;
eb1c8f43
GR
1349 default:
1350 return 0;
1351 }
c3df5806
JD
1352}
1353
eb1c8f43 1354static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1355{
eb1c8f43 1356 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1357 int err;
1358
eb1c8f43
GR
1359 mutex_lock(&data->update_lock);
1360 err = lm90_update_device(dev);
1361 mutex_unlock(&data->update_lock);
1362 if (err)
11e57812 1363 return err;
c3df5806 1364
eb1c8f43
GR
1365 switch (attr) {
1366 case hwmon_chip_update_interval:
1367 *val = data->update_interval;
c3df5806 1368 break;
eb1c8f43
GR
1369 case hwmon_chip_alarms:
1370 *val = data->alarms;
c3df5806
JD
1371 break;
1372 default:
eb1c8f43 1373 return -EOPNOTSUPP;
c3df5806
JD
1374 }
1375
eb1c8f43 1376 return 0;
c3df5806
JD
1377}
1378
eb1c8f43
GR
1379static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1380{
1381 struct lm90_data *data = dev_get_drvdata(dev);
1382 struct i2c_client *client = data->client;
1383 int err;
c3df5806 1384
eb1c8f43
GR
1385 mutex_lock(&data->update_lock);
1386
1387 err = lm90_update_device(dev);
1388 if (err)
1389 goto error;
1390
1391 switch (attr) {
1392 case hwmon_chip_update_interval:
1393 err = lm90_set_convrate(client, data,
1394 clamp_val(val, 0, 100000));
1395 break;
1396 default:
1397 err = -EOPNOTSUPP;
1398 break;
1399 }
1400error:
1401 mutex_unlock(&data->update_lock);
1402
1403 return err;
1404}
1405
1406static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1407{
1408 switch (attr) {
1409 case hwmon_chip_update_interval:
3334851d 1410 return 0644;
eb1c8f43 1411 case hwmon_chip_alarms:
3334851d 1412 return 0444;
eb1c8f43
GR
1413 default:
1414 return 0;
1415 }
1416}
1417
1418static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1419 u32 attr, int channel, long *val)
1420{
1421 switch (type) {
1422 case hwmon_chip:
1423 return lm90_chip_read(dev, attr, channel, val);
1424 case hwmon_temp:
1425 return lm90_temp_read(dev, attr, channel, val);
1426 default:
1427 return -EOPNOTSUPP;
1428 }
1429}
1430
1431static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1432 u32 attr, int channel, long val)
1433{
1434 switch (type) {
1435 case hwmon_chip:
1436 return lm90_chip_write(dev, attr, channel, val);
1437 case hwmon_temp:
1438 return lm90_temp_write(dev, attr, channel, val);
1439 default:
1440 return -EOPNOTSUPP;
1441 }
1442}
1443
1444static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1445 u32 attr, int channel)
1446{
1447 switch (type) {
1448 case hwmon_chip:
1449 return lm90_chip_is_visible(data, attr, channel);
1450 case hwmon_temp:
1451 return lm90_temp_is_visible(data, attr, channel);
1452 default:
1453 return 0;
1454 }
1455}
1da177e4 1456
15b66ab6 1457/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1458static int lm90_detect(struct i2c_client *client,
15b66ab6 1459 struct i2c_board_info *info)
8256fe0f 1460{
b2589ab0
JD
1461 struct i2c_adapter *adapter = client->adapter;
1462 int address = client->addr;
15b66ab6 1463 const char *name = NULL;
b2589ab0 1464 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1465
15b66ab6
GR
1466 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1467 return -ENODEV;
1da177e4 1468
8f2fa77c 1469 /* detection and identification */
b2589ab0
JD
1470 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1471 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1472 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1473 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1474 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1475 return -ENODEV;
1476
fce15c45 1477 if (man_id == 0x01 || man_id == 0x5C || man_id == 0xA1) {
b2589ab0
JD
1478 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1479 if (config2 < 0)
9b0e8526 1480 return -ENODEV;
fce15c45 1481 }
8f2fa77c 1482
f90be42f
JD
1483 if ((address == 0x4C || address == 0x4D)
1484 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1485 if ((config1 & 0x2A) == 0x00
1486 && (config2 & 0xF8) == 0x00
1487 && convrate <= 0x09) {
8f2fa77c
JD
1488 if (address == 0x4C
1489 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1490 name = "lm90";
32c82a93 1491 } else
8f2fa77c
JD
1492 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1493 name = "lm99";
1494 dev_info(&adapter->dev,
1495 "Assuming LM99 chip at 0x%02x\n",
1496 address);
1497 dev_info(&adapter->dev,
1498 "If it is an LM89, instantiate it "
1499 "with the new_device sysfs "
1500 "interface\n");
271dabf5 1501 } else
8f2fa77c
JD
1502 if (address == 0x4C
1503 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1504 name = "lm86";
1da177e4
LT
1505 }
1506 }
8f2fa77c
JD
1507 } else
1508 if ((address == 0x4C || address == 0x4D)
1509 && man_id == 0x41) { /* Analog Devices */
1510 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1511 && (config1 & 0x3F) == 0x00
1512 && convrate <= 0x0A) {
8f2fa77c 1513 name = "adm1032";
f36ffeab
GR
1514 /*
1515 * The ADM1032 supports PEC, but only if combined
1516 * transactions are not used.
1517 */
8f2fa77c
JD
1518 if (i2c_check_functionality(adapter,
1519 I2C_FUNC_SMBUS_BYTE))
1520 info->flags |= I2C_CLIENT_PEC;
1521 } else
1522 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1523 && (config1 & 0x1B) == 0x00
1524 && convrate <= 0x0A) {
8f2fa77c 1525 name = "adt7461";
5a4e5e6a
GR
1526 } else
1527 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1528 && (config1 & 0x1B) == 0x00
1529 && convrate <= 0x0A) {
5a4e5e6a 1530 name = "adt7461a";
8f2fa77c
JD
1531 }
1532 } else
1533 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1534 int emerg, emerg2, status2;
06e1c0a2
GR
1535
1536 /*
1537 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1538 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1539 * exists, both readings will reflect the same value. Otherwise,
1540 * the readings will be different.
1541 */
b2589ab0
JD
1542 emerg = i2c_smbus_read_byte_data(client,
1543 MAX6659_REG_R_REMOTE_EMERG);
1544 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1545 LM90_REG_R_MAN_ID);
b2589ab0 1546 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1547 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1548 status2 = i2c_smbus_read_byte_data(client,
1549 MAX6696_REG_R_STATUS2);
1550 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1551 return -ENODEV;
1552
8f2fa77c
JD
1553 /*
1554 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1555 * register. Reading from that address will return the last
1556 * read value, which in our case is those of the man_id
1557 * register. Likewise, the config1 register seems to lack a
1558 * low nibble, so the value will be those of the previous
1559 * read, so in our case those of the man_id register.
13c84951
GR
1560 * MAX6659 has a third set of upper temperature limit registers.
1561 * Those registers also return values on MAX6657 and MAX6658,
1562 * thus the only way to detect MAX6659 is by its address.
1563 * For this reason it will be mis-detected as MAX6657 if its
1564 * address is 0x4C.
8f2fa77c
JD
1565 */
1566 if (chip_id == man_id
13c84951 1567 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1568 && (config1 & 0x1F) == (man_id & 0x0F)
1569 && convrate <= 0x09) {
13c84951
GR
1570 if (address == 0x4C)
1571 name = "max6657";
1572 else
1573 name = "max6659";
8f2fa77c 1574 } else
06e1c0a2
GR
1575 /*
1576 * Even though MAX6695 and MAX6696 do not have a chip ID
1577 * register, reading it returns 0x01. Bit 4 of the config1
1578 * register is unused and should return zero when read. Bit 0 of
1579 * the status2 register is unused and should return zero when
1580 * read.
1581 *
1582 * MAX6695 and MAX6696 have an additional set of temperature
1583 * limit registers. We can detect those chips by checking if
1584 * one of those registers exists.
1585 */
1586 if (chip_id == 0x01
b2589ab0
JD
1587 && (config1 & 0x10) == 0x00
1588 && (status2 & 0x01) == 0x00
1589 && emerg == emerg2
1590 && convrate <= 0x07) {
06e1c0a2
GR
1591 name = "max6696";
1592 } else
8f2fa77c
JD
1593 /*
1594 * The chip_id register of the MAX6680 and MAX6681 holds the
1595 * revision of the chip. The lowest bit of the config1 register
1596 * is unused and should return zero when read, so should the
1597 * second to last bit of config1 (software reset).
1598 */
1599 if (chip_id == 0x01
b2589ab0
JD
1600 && (config1 & 0x03) == 0x00
1601 && convrate <= 0x07) {
8f2fa77c
JD
1602 name = "max6680";
1603 } else
1604 /*
1605 * The chip_id register of the MAX6646/6647/6649 holds the
1606 * revision of the chip. The lowest 6 bits of the config1
1607 * register are unused and should return zero when read.
1608 */
1609 if (chip_id == 0x59
b2589ab0
JD
1610 && (config1 & 0x3f) == 0x00
1611 && convrate <= 0x07) {
8f2fa77c 1612 name = "max6646";
229d495d
JL
1613 } else
1614 /*
1615 * The chip_id of the MAX6654 holds the revision of the chip.
1616 * The lowest 3 bits of the config1 register are unused and
1617 * should return zero when read.
1618 */
1619 if (chip_id == 0x08
1620 && (config1 & 0x07) == 0x00
1621 && convrate <= 0x07) {
1622 name = "max6654";
1da177e4 1623 }
6771ea1f
JD
1624 } else
1625 if (address == 0x4C
1626 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1627 if ((config1 & 0x2A) == 0x00
1628 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1629 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1630 && convrate <= 0x09) {
c4f99a2b
JD
1631 name = "w83l771";
1632 } else
1633 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1634 && convrate <= 0x08) {
c4f99a2b
JD
1635 name = "w83l771";
1636 }
6771ea1f 1637 }
2ef01793 1638 } else
6d101c58
JD
1639 if (address >= 0x48 && address <= 0x4F
1640 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1641 if (chip_id == 0x00
b2589ab0
JD
1642 && (config1 & 0x2A) == 0x00
1643 && (config2 & 0xFE) == 0x00
1644 && convrate <= 0x09) {
2ef01793
SD
1645 name = "sa56004";
1646 }
ae544f64
GR
1647 } else
1648 if ((address == 0x4C || address == 0x4D)
1649 && man_id == 0x47) { /* GMT */
1650 if (chip_id == 0x01 /* G781 */
1651 && (config1 & 0x3F) == 0x00
1652 && convrate <= 0x08)
1653 name = "g781";
1daaceb2 1654 } else
f8344f76
GR
1655 if (man_id == 0x55 && chip_id == 0x00 &&
1656 (config1 & 0x1B) == 0x00 && convrate <= 0x09) {
1657 int local_ext, conalert, chen, dfc;
1daaceb2
WN
1658
1659 local_ext = i2c_smbus_read_byte_data(client,
1660 TMP451_REG_R_LOCAL_TEMPL);
f8344f76
GR
1661 conalert = i2c_smbus_read_byte_data(client,
1662 TMP451_REG_CONALERT);
1663 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
1664 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
1665
1666 if ((local_ext & 0x0F) == 0x00 &&
1667 (conalert & 0xf1) == 0x01 &&
1668 (chen & 0xfc) == 0x00 &&
1669 (dfc & 0xfc) == 0x00) {
1670 if (address == 0x4c && !(chen & 0x03))
1671 name = "tmp451";
1672 else if (address >= 0x48 && address <= 0x4f)
1673 name = "tmp461";
1674 }
1da177e4
LT
1675 }
1676
8f2fa77c
JD
1677 if (!name) { /* identification failed */
1678 dev_dbg(&adapter->dev,
1679 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1680 "chip_id=0x%02X)\n", address, man_id, chip_id);
1681 return -ENODEV;
1da177e4 1682 }
8f2fa77c 1683
9b0e8526
JD
1684 strlcpy(info->type, name, I2C_NAME_SIZE);
1685
1686 return 0;
1687}
1688
1f17a444 1689static void lm90_restore_conf(void *_data)
f7001bb0 1690{
1f17a444
GR
1691 struct lm90_data *data = _data;
1692 struct i2c_client *client = data->client;
1693
f7001bb0 1694 /* Restore initial configuration */
7a1d220c 1695 lm90_write_convrate(data, data->convrate_orig);
f7001bb0
GR
1696 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1697 data->config_orig);
1698}
1699
37ad04d7 1700static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1701{
37ad04d7 1702 int config, convrate;
15b66ab6 1703
37ad04d7
GR
1704 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1705 if (convrate < 0)
1706 return convrate;
0c01b644
GR
1707 data->convrate_orig = convrate;
1708
15b66ab6
GR
1709 /*
1710 * Start the conversions.
1711 */
37ad04d7
GR
1712 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1713 if (config < 0)
1714 return config;
15b66ab6 1715 data->config_orig = config;
b849e5d1 1716 data->config = config;
15b66ab6 1717
62456189
BY
1718 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1719
15b66ab6 1720 /* Check Temperature Range Select */
f347e249 1721 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
15b66ab6
GR
1722 if (config & 0x04)
1723 data->flags |= LM90_FLAG_ADT7461_EXT;
1724 }
1725
1726 /*
1727 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1728 * 0.125 degree resolution) and range (0x08, extend range
1729 * to -64 degree) mode for the remote temperature sensor.
1730 */
1731 if (data->kind == max6680)
1732 config |= 0x18;
1733
229d495d
JL
1734 /*
1735 * Put MAX6654 into extended range (0x20, extend minimum range from
1736 * 0 degrees to -64 degrees). Note that extended resolution is not
1737 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
1738 * slower, which is intentionally not done by default.
1739 */
1740 if (data->kind == max6654)
1741 config |= 0x20;
1742
15b66ab6
GR
1743 /*
1744 * Select external channel 0 for max6695/96
1745 */
1746 if (data->kind == max6696)
1747 config &= ~0x08;
1748
2abdc357
DO
1749 /*
1750 * Interrupt is enabled by default on reset, but it may be disabled
1751 * by bootloader, unmask it.
1752 */
1753 if (client->irq)
1754 config &= ~0x80;
1755
15b66ab6 1756 config &= 0xBF; /* run */
7a1d220c 1757 lm90_update_confreg(data, config);
1f17a444 1758
c5fcf01b 1759 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1760}
1761
072de496
WN
1762static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1763{
1764 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1765 int st, st2 = 0;
072de496 1766
37ad04d7
GR
1767 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1768 if (st < 0)
1769 return false;
072de496 1770
37ad04d7
GR
1771 if (data->kind == max6696) {
1772 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1773 if (st2 < 0)
1774 return false;
1775 }
072de496
WN
1776
1777 *status = st | (st2 << 8);
1778
1779 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1780 return false;
1781
1782 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1783 (st2 & MAX6696_STATUS2_LOT2))
94dbd23e
DO
1784 dev_dbg(&client->dev,
1785 "temp%d out of range, please check!\n", 1);
072de496
WN
1786 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1787 (st2 & MAX6696_STATUS2_ROT2))
94dbd23e
DO
1788 dev_dbg(&client->dev,
1789 "temp%d out of range, please check!\n", 2);
072de496 1790 if (st & LM90_STATUS_ROPEN)
94dbd23e
DO
1791 dev_dbg(&client->dev,
1792 "temp%d diode open, please check!\n", 2);
072de496
WN
1793 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1794 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
94dbd23e
DO
1795 dev_dbg(&client->dev,
1796 "temp%d out of range, please check!\n", 3);
072de496 1797 if (st2 & MAX6696_STATUS2_R2OPEN)
94dbd23e
DO
1798 dev_dbg(&client->dev,
1799 "temp%d diode open, please check!\n", 3);
1800
1801 if (st & LM90_STATUS_LLOW)
1802 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1803 hwmon_temp_min, 0);
1804 if (st & LM90_STATUS_RLOW)
1805 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1806 hwmon_temp_min, 1);
1807 if (st2 & MAX6696_STATUS2_R2LOW)
1808 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1809 hwmon_temp_min, 2);
1810 if (st & LM90_STATUS_LHIGH)
1811 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1812 hwmon_temp_max, 0);
1813 if (st & LM90_STATUS_RHIGH)
1814 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1815 hwmon_temp_max, 1);
1816 if (st2 & MAX6696_STATUS2_R2HIGH)
1817 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1818 hwmon_temp_max, 2);
072de496
WN
1819
1820 return true;
1821}
1822
109b1283
WN
1823static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1824{
1825 struct i2c_client *client = dev_id;
1826 u16 status;
1827
1828 if (lm90_is_tripped(client, &status))
1829 return IRQ_HANDLED;
1830 else
1831 return IRQ_NONE;
1832}
1833
1f17a444
GR
1834static void lm90_remove_pec(void *dev)
1835{
1836 device_remove_file(dev, &dev_attr_pec);
1837}
1838
1839static void lm90_regulator_disable(void *regulator)
1840{
1841 regulator_disable(regulator);
1842}
1843
eb1c8f43
GR
1844
1845static const struct hwmon_ops lm90_ops = {
1846 .is_visible = lm90_is_visible,
1847 .read = lm90_read,
1848 .write = lm90_write,
1849};
1850
67487038 1851static int lm90_probe(struct i2c_client *client)
9b0e8526 1852{
b2589ab0 1853 struct device *dev = &client->dev;
e67776cc 1854 struct i2c_adapter *adapter = client->adapter;
eb1c8f43 1855 struct hwmon_channel_info *info;
3e0f964f 1856 struct regulator *regulator;
6e5f62b9 1857 struct device *hwmon_dev;
eb1c8f43 1858 struct lm90_data *data;
9b0e8526 1859 int err;
1da177e4 1860
3e0f964f
WN
1861 regulator = devm_regulator_get(dev, "vcc");
1862 if (IS_ERR(regulator))
1863 return PTR_ERR(regulator);
1864
1865 err = regulator_enable(regulator);
1866 if (err < 0) {
d89fa686 1867 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1868 return err;
1869 }
1870
c5fcf01b
GR
1871 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1872 if (err)
1873 return err;
1f17a444 1874
d89fa686 1875 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1876 if (!data)
1877 return -ENOMEM;
1878
1de8b250 1879 data->client = client;
b2589ab0 1880 i2c_set_clientdata(client, data);
9a61bf63 1881 mutex_init(&data->update_lock);
1da177e4 1882
9b0e8526 1883 /* Set the device type */
df8d57bf
JMC
1884 if (client->dev.of_node)
1885 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1886 else
67487038 1887 data->kind = i2c_match_id(lm90_id, client)->driver_data;
9b0e8526
JD
1888 if (data->kind == adm1032) {
1889 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1890 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1891 }
1da177e4 1892
f36ffeab
GR
1893 /*
1894 * Different devices have different alarm bits triggering the
1895 * ALERT# output
1896 */
4667bcb8 1897 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1898
88073bb1 1899 /* Set chip capabilities */
4667bcb8 1900 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1901
1902 data->chip.ops = &lm90_ops;
1903 data->chip.info = data->info;
1904
a4d41e67
GR
1905 data->info[0] = HWMON_CHANNEL_INFO(chip,
1906 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
1907 data->info[1] = &data->temp_info;
1908
1909 info = &data->temp_info;
1910 info->type = hwmon_temp;
1911 info->config = data->channel_config;
1912
1913 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
16ba51b5 1914 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM;
eb1c8f43 1915 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
16ba51b5
GR
1916 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM | HWMON_T_FAULT;
1917
1918 if (data->flags & LM90_HAVE_CRIT) {
1919 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
1920 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
1921 }
eb1c8f43
GR
1922
1923 if (data->flags & LM90_HAVE_OFFSET)
1924 data->channel_config[1] |= HWMON_T_OFFSET;
1925
1926 if (data->flags & LM90_HAVE_EMERGENCY) {
1927 data->channel_config[0] |= HWMON_T_EMERGENCY |
1928 HWMON_T_EMERGENCY_HYST;
1929 data->channel_config[1] |= HWMON_T_EMERGENCY |
1930 HWMON_T_EMERGENCY_HYST;
1931 }
1932
1933 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1934 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1935 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1936 }
1937
1938 if (data->flags & LM90_HAVE_TEMP3) {
1939 data->channel_config[2] = HWMON_T_INPUT |
1940 HWMON_T_MIN | HWMON_T_MAX |
1941 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1942 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1943 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1944 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1945 HWMON_T_FAULT;
1946 }
1947
a095f687 1948 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1949
0c01b644
GR
1950 /* Set maximum conversion rate */
1951 data->max_convrate = lm90_params[data->kind].max_convrate;
1952
1da177e4 1953 /* Initialize the LM90 chip */
37ad04d7
GR
1954 err = lm90_init_client(client, data);
1955 if (err < 0) {
1956 dev_err(dev, "Failed to initialize device\n");
1957 return err;
1958 }
1da177e4 1959
eb1c8f43
GR
1960 /*
1961 * The 'pec' attribute is attached to the i2c device and thus created
1962 * separately.
1963 */
b2589ab0
JD
1964 if (client->flags & I2C_CLIENT_PEC) {
1965 err = device_create_file(dev, &dev_attr_pec);
11e57812 1966 if (err)
1f17a444 1967 return err;
c5fcf01b
GR
1968 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1969 if (err)
1970 return err;
06e1c0a2 1971 }
0e39e01c 1972
eb1c8f43
GR
1973 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1974 data, &data->chip,
1975 NULL);
6e5f62b9
GR
1976 if (IS_ERR(hwmon_dev))
1977 return PTR_ERR(hwmon_dev);
943b0830 1978
94dbd23e
DO
1979 data->hwmon_dev = hwmon_dev;
1980
109b1283
WN
1981 if (client->irq) {
1982 dev_dbg(dev, "IRQ: %d\n", client->irq);
1983 err = devm_request_threaded_irq(dev, client->irq,
1984 NULL, lm90_irq_thread,
d97fb837 1985 IRQF_ONESHOT, "lm90", client);
109b1283
WN
1986 if (err < 0) {
1987 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1988 return err;
109b1283
WN
1989 }
1990 }
1991
1da177e4
LT
1992 return 0;
1993}
1994
b4f21054
BT
1995static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1996 unsigned int flag)
53de3342 1997{
072de496 1998 u16 alarms;
06e1c0a2 1999
b4f21054
BT
2000 if (type != I2C_PROTOCOL_SMBUS_ALERT)
2001 return;
2002
072de496 2003 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
2004 /*
2005 * Disable ALERT# output, because these chips don't implement
2006 * SMBus alert correctly; they should only hold the alert line
2007 * low briefly.
2008 */
072de496
WN
2009 struct lm90_data *data = i2c_get_clientdata(client);
2010
37ad04d7
GR
2011 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2012 (alarms & data->alert_alarms)) {
53de3342 2013 dev_dbg(&client->dev, "Disabling ALERT#\n");
7a1d220c 2014 lm90_update_confreg(data, data->config | 0x80);
53de3342 2015 }
072de496 2016 } else {
94dbd23e 2017 dev_dbg(&client->dev, "Everything OK\n");
53de3342
JD
2018 }
2019}
2020
4c7f85a3
DO
2021static int __maybe_unused lm90_suspend(struct device *dev)
2022{
2023 struct lm90_data *data = dev_get_drvdata(dev);
2024 struct i2c_client *client = data->client;
2025
2026 if (client->irq)
2027 disable_irq(client->irq);
2028
2029 return 0;
2030}
2031
2032static int __maybe_unused lm90_resume(struct device *dev)
2033{
2034 struct lm90_data *data = dev_get_drvdata(dev);
2035 struct i2c_client *client = data->client;
2036
2037 if (client->irq)
2038 enable_irq(client->irq);
2039
2040 return 0;
2041}
2042
2043static SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2044
15b66ab6
GR
2045static struct i2c_driver lm90_driver = {
2046 .class = I2C_CLASS_HWMON,
2047 .driver = {
2048 .name = "lm90",
df8d57bf 2049 .of_match_table = of_match_ptr(lm90_of_match),
4c7f85a3 2050 .pm = &lm90_pm_ops,
15b66ab6 2051 },
67487038 2052 .probe_new = lm90_probe,
15b66ab6
GR
2053 .alert = lm90_alert,
2054 .id_table = lm90_id,
2055 .detect = lm90_detect,
2056 .address_list = normal_i2c,
2057};
1da177e4 2058
f0967eea 2059module_i2c_driver(lm90_driver);
1da177e4 2060
7c81c60f 2061MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
2062MODULE_DESCRIPTION("LM90/ADM1032 driver");
2063MODULE_LICENSE("GPL");