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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
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6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
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19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
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23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
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28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
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32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
229d495d
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38 * This driver also supports the MAX6654 chip made by Maxim. This chip can
39 * be at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is
40 * otherwise similar to MAX6657/MAX6658/MAX6659. Extended range is available
41 * by setting the configuration register accordingly, and is done during
42 * initialization. Extended precision is only available at conversion rates
43 * of 1 Hz and slower. Note that extended precision is not enabled by
44 * default, as this driver initializes all chips to 2 Hz by design.
45 *
1a51e068
DW
46 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
47 * MAX6692 chips made by Maxim. These are again similar to the LM86,
48 * but they use unsigned temperature values and can report temperatures
49 * from 0 to 145 degrees.
271dabf5 50 *
32c82a93
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51 * This driver also supports the MAX6680 and MAX6681, two other sensor
52 * chips made by Maxim. These are quite similar to the other Maxim
a874a10c
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53 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
54 * be treated identically.
32c82a93 55 *
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56 * This driver also supports the MAX6695 and MAX6696, two other sensor
57 * chips made by Maxim. These are also quite similar to other Maxim
58 * chips, but support three temperature sensors instead of two. MAX6695
59 * and MAX6696 only differ in the pinout so they can be treated identically.
60 *
5a4e5e6a
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61 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
62 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
63 * and extended mode. They are mostly compatible with LM90 except for a data
64 * format difference for the temperature value registers.
1da177e4 65 *
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66 * This driver also supports the SA56004 from Philips. This device is
67 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
68 *
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69 * This driver also supports the G781 from GMT. This device is compatible
70 * with the ADM1032.
71 *
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72 * This driver also supports TMP451 and TMP461 from Texas Instruments.
73 * Those devices are supported in both compatibility and extended mode.
74 * They are mostly compatible with ADT7461 except for local temperature
75 * low byte register and max conversion rate.
1daaceb2 76 *
1da177e4
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77 * Since the LM90 was the first chipset supported by this driver, most
78 * comments will refer to this chipset, but are actually general and
79 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
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80 */
81
1da177e4
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82#include <linux/module.h>
83#include <linux/init.h>
84#include <linux/slab.h>
85#include <linux/jiffies.h>
86#include <linux/i2c.h>
943b0830
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87#include <linux/hwmon.h>
88#include <linux/err.h>
9a61bf63 89#include <linux/mutex.h>
df8d57bf 90#include <linux/of_device.h>
0e39e01c 91#include <linux/sysfs.h>
109b1283 92#include <linux/interrupt.h>
3e0f964f 93#include <linux/regulator/consumer.h>
1da177e4
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94
95/*
96 * Addresses to scan
97 * Address is fully defined internally and cannot be changed except for
32c82a93 98 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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99 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
100 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
101 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
102 * have address 0x4d.
271dabf5 103 * MAX6647 has address 0x4e.
13c84951 104 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
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105 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
106 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
2ef01793 107 * SA56004 can have address 0x48 through 0x4F.
1da177e4
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108 */
109
25e9c86d 110static const unsigned short normal_i2c[] = {
2ef01793
SD
111 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
112 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 113
13c84951 114enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
f8344f76 115 max6646, w83l771, max6696, sa56004, g781, tmp451, tmp461, max6654 };
1da177e4
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116
117/*
118 * The LM90 registers
119 */
120
121#define LM90_REG_R_MAN_ID 0xFE
122#define LM90_REG_R_CHIP_ID 0xFF
123#define LM90_REG_R_CONFIG1 0x03
124#define LM90_REG_W_CONFIG1 0x09
125#define LM90_REG_R_CONFIG2 0xBF
126#define LM90_REG_W_CONFIG2 0xBF
127#define LM90_REG_R_CONVRATE 0x04
128#define LM90_REG_W_CONVRATE 0x0A
129#define LM90_REG_R_STATUS 0x02
130#define LM90_REG_R_LOCAL_TEMP 0x00
131#define LM90_REG_R_LOCAL_HIGH 0x05
132#define LM90_REG_W_LOCAL_HIGH 0x0B
133#define LM90_REG_R_LOCAL_LOW 0x06
134#define LM90_REG_W_LOCAL_LOW 0x0C
135#define LM90_REG_R_LOCAL_CRIT 0x20
136#define LM90_REG_W_LOCAL_CRIT 0x20
137#define LM90_REG_R_REMOTE_TEMPH 0x01
138#define LM90_REG_R_REMOTE_TEMPL 0x10
139#define LM90_REG_R_REMOTE_OFFSH 0x11
140#define LM90_REG_W_REMOTE_OFFSH 0x11
141#define LM90_REG_R_REMOTE_OFFSL 0x12
142#define LM90_REG_W_REMOTE_OFFSL 0x12
143#define LM90_REG_R_REMOTE_HIGHH 0x07
144#define LM90_REG_W_REMOTE_HIGHH 0x0D
145#define LM90_REG_R_REMOTE_HIGHL 0x13
146#define LM90_REG_W_REMOTE_HIGHL 0x13
147#define LM90_REG_R_REMOTE_LOWH 0x08
148#define LM90_REG_W_REMOTE_LOWH 0x0E
149#define LM90_REG_R_REMOTE_LOWL 0x14
150#define LM90_REG_W_REMOTE_LOWL 0x14
151#define LM90_REG_R_REMOTE_CRIT 0x19
152#define LM90_REG_W_REMOTE_CRIT 0x19
153#define LM90_REG_R_TCRIT_HYST 0x21
154#define LM90_REG_W_TCRIT_HYST 0x21
155
229d495d 156/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
f65e1708
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157
158#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 159#define MAX6696_REG_R_STATUS2 0x12
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160#define MAX6659_REG_R_REMOTE_EMERG 0x16
161#define MAX6659_REG_W_REMOTE_EMERG 0x16
162#define MAX6659_REG_R_LOCAL_EMERG 0x17
163#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 164
2ef01793
SD
165/* SA56004 registers */
166
167#define SA56004_REG_R_LOCAL_TEMPL 0x22
168
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169#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
170
f8344f76 171/* TMP451/TMP461 registers */
1daaceb2 172#define TMP451_REG_R_LOCAL_TEMPL 0x15
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173#define TMP451_REG_CONALERT 0x22
174
175#define TMP461_REG_CHEN 0x16
176#define TMP461_REG_DFC 0x24
1daaceb2 177
23b2d477
NC
178/*
179 * Device flags
180 */
88073bb1
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181#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
182/* Device features */
183#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 184#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 185#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
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186#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
187#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 188#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
f347e249
GR
189#define LM90_HAVE_EXTENDED_TEMP (1 << 8) /* extended temperature support*/
190#define LM90_PAUSE_FOR_CONFIG (1 << 9) /* Pause conversion for config */
23b2d477 191
072de496
WN
192/* LM90 status */
193#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
194#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
195#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
196#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
197#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
198#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
199#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
200
201#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
202#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
203#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
204#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
205#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
206#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
207#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
208
1da177e4
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209/*
210 * Driver data (common to all clients)
211 */
212
9b0e8526
JD
213static const struct i2c_device_id lm90_id[] = {
214 { "adm1032", adm1032 },
215 { "adt7461", adt7461 },
5a4e5e6a 216 { "adt7461a", adt7461 },
ae544f64 217 { "g781", g781 },
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JD
218 { "lm90", lm90 },
219 { "lm86", lm86 },
97ae60bb
JD
220 { "lm89", lm86 },
221 { "lm99", lm99 },
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BH
222 { "max6646", max6646 },
223 { "max6647", max6646 },
224 { "max6649", max6646 },
229d495d 225 { "max6654", max6654 },
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226 { "max6657", max6657 },
227 { "max6658", max6657 },
13c84951 228 { "max6659", max6659 },
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229 { "max6680", max6680 },
230 { "max6681", max6680 },
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231 { "max6695", max6696 },
232 { "max6696", max6696 },
5a4e5e6a 233 { "nct1008", adt7461 },
6771ea1f 234 { "w83l771", w83l771 },
2ef01793 235 { "sa56004", sa56004 },
1daaceb2 236 { "tmp451", tmp451 },
f8344f76 237 { "tmp461", tmp461 },
9b0e8526
JD
238 { }
239};
240MODULE_DEVICE_TABLE(i2c, lm90_id);
241
787afaa3 242static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
243 {
244 .compatible = "adi,adm1032",
245 .data = (void *)adm1032
246 },
247 {
248 .compatible = "adi,adt7461",
249 .data = (void *)adt7461
250 },
251 {
252 .compatible = "adi,adt7461a",
253 .data = (void *)adt7461
254 },
255 {
256 .compatible = "gmt,g781",
257 .data = (void *)g781
258 },
259 {
260 .compatible = "national,lm90",
261 .data = (void *)lm90
262 },
263 {
264 .compatible = "national,lm86",
265 .data = (void *)lm86
266 },
267 {
268 .compatible = "national,lm89",
269 .data = (void *)lm86
270 },
271 {
272 .compatible = "national,lm99",
273 .data = (void *)lm99
274 },
275 {
276 .compatible = "dallas,max6646",
277 .data = (void *)max6646
278 },
279 {
280 .compatible = "dallas,max6647",
281 .data = (void *)max6646
282 },
283 {
284 .compatible = "dallas,max6649",
285 .data = (void *)max6646
286 },
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287 {
288 .compatible = "dallas,max6654",
289 .data = (void *)max6654
290 },
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291 {
292 .compatible = "dallas,max6657",
293 .data = (void *)max6657
294 },
295 {
296 .compatible = "dallas,max6658",
297 .data = (void *)max6657
298 },
299 {
300 .compatible = "dallas,max6659",
301 .data = (void *)max6659
302 },
303 {
304 .compatible = "dallas,max6680",
305 .data = (void *)max6680
306 },
307 {
308 .compatible = "dallas,max6681",
309 .data = (void *)max6680
310 },
311 {
312 .compatible = "dallas,max6695",
313 .data = (void *)max6696
314 },
315 {
316 .compatible = "dallas,max6696",
317 .data = (void *)max6696
318 },
319 {
320 .compatible = "onnn,nct1008",
321 .data = (void *)adt7461
322 },
323 {
324 .compatible = "winbond,w83l771",
325 .data = (void *)w83l771
326 },
327 {
328 .compatible = "nxp,sa56004",
329 .data = (void *)sa56004
330 },
331 {
332 .compatible = "ti,tmp451",
333 .data = (void *)tmp451
334 },
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335 {
336 .compatible = "ti,tmp461",
337 .data = (void *)tmp461
338 },
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339 { },
340};
341MODULE_DEVICE_TABLE(of, lm90_of_match);
342
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343/*
344 * chip type specific parameters
345 */
346struct lm90_params {
347 u32 flags; /* Capabilities */
348 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
349 /* Upper 8 bits for max6695/96 */
0c01b644 350 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 351 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
352};
353
354static const struct lm90_params lm90_params[] = {
355 [adm1032] = {
1179324c
GR
356 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
357 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 358 .alert_alarms = 0x7c,
0c01b644 359 .max_convrate = 10,
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GR
360 },
361 [adt7461] = {
1179324c 362 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f347e249 363 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP,
4667bcb8 364 .alert_alarms = 0x7c,
0c01b644 365 .max_convrate = 10,
4667bcb8 366 },
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GR
367 [g781] = {
368 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
369 | LM90_HAVE_BROKEN_ALERT,
370 .alert_alarms = 0x7c,
371 .max_convrate = 8,
372 },
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GR
373 [lm86] = {
374 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
375 .alert_alarms = 0x7b,
0c01b644 376 .max_convrate = 9,
4667bcb8
GR
377 },
378 [lm90] = {
379 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
380 .alert_alarms = 0x7b,
0c01b644 381 .max_convrate = 9,
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GR
382 },
383 [lm99] = {
384 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
385 .alert_alarms = 0x7b,
0c01b644 386 .max_convrate = 9,
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GR
387 },
388 [max6646] = {
4667bcb8 389 .alert_alarms = 0x7c,
0c01b644 390 .max_convrate = 6,
2ef01793 391 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8 392 },
229d495d
JL
393 [max6654] = {
394 .alert_alarms = 0x7c,
395 .max_convrate = 7,
396 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
397 },
4667bcb8 398 [max6657] = {
62456189 399 .flags = LM90_PAUSE_FOR_CONFIG,
4667bcb8 400 .alert_alarms = 0x7c,
0c01b644 401 .max_convrate = 8,
2ef01793 402 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
403 },
404 [max6659] = {
a095f687 405 .flags = LM90_HAVE_EMERGENCY,
4667bcb8 406 .alert_alarms = 0x7c,
0c01b644 407 .max_convrate = 8,
2ef01793 408 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
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GR
409 },
410 [max6680] = {
411 .flags = LM90_HAVE_OFFSET,
412 .alert_alarms = 0x7c,
0c01b644 413 .max_convrate = 7,
4667bcb8
GR
414 },
415 [max6696] = {
a095f687 416 .flags = LM90_HAVE_EMERGENCY
4667bcb8 417 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
e41fae2b 418 .alert_alarms = 0x1c7c,
0c01b644 419 .max_convrate = 6,
2ef01793 420 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
421 },
422 [w83l771] = {
423 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
424 .alert_alarms = 0x7c,
0c01b644 425 .max_convrate = 8,
4667bcb8 426 },
2ef01793 427 [sa56004] = {
a095f687 428 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
2ef01793
SD
429 .alert_alarms = 0x7b,
430 .max_convrate = 9,
431 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
432 },
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WN
433 [tmp451] = {
434 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
f347e249 435 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP,
1daaceb2
WN
436 .alert_alarms = 0x7c,
437 .max_convrate = 9,
438 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 439 },
f8344f76
GR
440 [tmp461] = {
441 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
442 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP,
443 .alert_alarms = 0x7c,
444 .max_convrate = 9,
445 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
446 },
4667bcb8
GR
447};
448
40465d94
WN
449/*
450 * TEMP8 register index
451 */
452enum lm90_temp8_reg_index {
453 LOCAL_LOW = 0,
454 LOCAL_HIGH,
455 LOCAL_CRIT,
456 REMOTE_CRIT,
457 LOCAL_EMERG, /* max6659 and max6695/96 */
458 REMOTE_EMERG, /* max6659 and max6695/96 */
459 REMOTE2_CRIT, /* max6695/96 only */
460 REMOTE2_EMERG, /* max6695/96 only */
461 TEMP8_REG_NUM
462};
463
464/*
465 * TEMP11 register index
466 */
467enum lm90_temp11_reg_index {
468 REMOTE_TEMP = 0,
469 REMOTE_LOW,
470 REMOTE_HIGH,
471 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
472 LOCAL_TEMP,
473 REMOTE2_TEMP, /* max6695/96 only */
474 REMOTE2_LOW, /* max6695/96 only */
475 REMOTE2_HIGH, /* max6695/96 only */
476 TEMP11_REG_NUM
477};
478
1da177e4
LT
479/*
480 * Client data (each client gets its own)
481 */
482
483struct lm90_data {
1de8b250 484 struct i2c_client *client;
94dbd23e 485 struct device *hwmon_dev;
eb1c8f43
GR
486 u32 channel_config[4];
487 struct hwmon_channel_info temp_info;
488 const struct hwmon_channel_info *info[3];
489 struct hwmon_chip_info chip;
9a61bf63 490 struct mutex update_lock;
2f83ab77 491 bool valid; /* true if register values are valid */
1da177e4
LT
492 unsigned long last_updated; /* in jiffies */
493 int kind;
4667bcb8 494 u32 flags;
1da177e4 495
38bab98a 496 unsigned int update_interval; /* in milliseconds */
0c01b644 497
b849e5d1 498 u8 config; /* Current configuration register value */
95238364 499 u8 config_orig; /* Original configuration register value */
0c01b644 500 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
501 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
502 /* Upper 8 bits for max6695/96 */
0c01b644 503 u8 max_convrate; /* Maximum conversion rate */
2ef01793 504 u8 reg_local_ext; /* local extension register offset */
95238364 505
1da177e4 506 /* registers values */
40465d94
WN
507 s8 temp8[TEMP8_REG_NUM];
508 s16 temp11[TEMP11_REG_NUM];
1da177e4 509 u8 temp_hyst;
06e1c0a2 510 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
511};
512
15b66ab6
GR
513/*
514 * Support functions
515 */
516
517/*
518 * The ADM1032 supports PEC but not on write byte transactions, so we need
519 * to explicitly ask for a transaction without PEC.
520 */
521static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
522{
523 return i2c_smbus_xfer(client->adapter, client->addr,
524 client->flags & ~I2C_CLIENT_PEC,
525 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
526}
527
528/*
529 * It is assumed that client->update_lock is held (unless we are in
530 * detection or initialization steps). This matters when PEC is enabled,
531 * because we don't want the address pointer to change between the write
532 * byte and the read byte transactions.
533 */
37ad04d7 534static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
535{
536 int err;
537
538 if (client->flags & I2C_CLIENT_PEC) {
539 err = adm1032_write_byte(client, reg);
540 if (err >= 0)
541 err = i2c_smbus_read_byte(client);
542 } else
543 err = i2c_smbus_read_byte_data(client, reg);
544
37ad04d7 545 return err;
15b66ab6
GR
546}
547
37ad04d7 548static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 549{
37ad04d7 550 int oldh, newh, l;
15b66ab6
GR
551
552 /*
553 * There is a trick here. We have to read two registers to have the
554 * sensor temperature, but we have to beware a conversion could occur
25985edc 555 * between the readings. The datasheet says we should either use
15b66ab6
GR
556 * the one-shot conversion register, which we don't want to do
557 * (disables hardware monitoring) or monitor the busy bit, which is
558 * impossible (we can't read the values and monitor that bit at the
559 * exact same time). So the solution used here is to read the high
560 * byte once, then the low byte, then the high byte again. If the new
561 * high byte matches the old one, then we have a valid reading. Else
562 * we have to read the low byte again, and now we believe we have a
563 * correct reading.
564 */
37ad04d7
GR
565 oldh = lm90_read_reg(client, regh);
566 if (oldh < 0)
567 return oldh;
568 l = lm90_read_reg(client, regl);
569 if (l < 0)
570 return l;
571 newh = lm90_read_reg(client, regh);
572 if (newh < 0)
573 return newh;
15b66ab6 574 if (oldh != newh) {
37ad04d7
GR
575 l = lm90_read_reg(client, regl);
576 if (l < 0)
577 return l;
15b66ab6 578 }
37ad04d7 579 return (newh << 8) | l;
15b66ab6
GR
580}
581
7a1d220c
GR
582static int lm90_update_confreg(struct lm90_data *data, u8 config)
583{
584 if (data->config != config) {
585 int err;
586
587 err = i2c_smbus_write_byte_data(data->client,
588 LM90_REG_W_CONFIG1,
589 config);
590 if (err)
591 return err;
592 data->config = config;
593 }
594 return 0;
595}
596
15b66ab6
GR
597/*
598 * client->update_lock must be held when calling this function (unless we are
599 * in detection or initialization steps), and while a remote channel other
600 * than channel 0 is selected. Also, calling code must make sure to re-select
601 * external channel 0 before releasing the lock. This is necessary because
602 * various registers have different meanings as a result of selecting a
603 * non-default remote channel.
604 */
7a1d220c 605static int lm90_select_remote_channel(struct lm90_data *data, int channel)
15b66ab6 606{
7a1d220c
GR
607 int err = 0;
608
15b66ab6 609 if (data->kind == max6696) {
b849e5d1 610 u8 config = data->config & ~0x08;
b849e5d1 611
15b66ab6
GR
612 if (channel)
613 config |= 0x08;
7a1d220c 614 err = lm90_update_confreg(data, config);
15b66ab6 615 }
7a1d220c 616 return err;
15b66ab6
GR
617}
618
7a1d220c 619static int lm90_write_convrate(struct lm90_data *data, int val)
62456189 620{
b849e5d1 621 u8 config = data->config;
62456189 622 int err;
62456189
BY
623
624 /* Save config and pause conversion */
625 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
7a1d220c
GR
626 err = lm90_update_confreg(data, config | 0x40);
627 if (err < 0)
628 return err;
62456189
BY
629 }
630
631 /* Set conv rate */
7a1d220c 632 err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val);
62456189
BY
633
634 /* Revert change to config */
7a1d220c 635 lm90_update_confreg(data, config);
62456189
BY
636
637 return err;
638}
639
0c01b644
GR
640/*
641 * Set conversion rate.
642 * client->update_lock must be held when calling this function (unless we are
643 * in detection or initialization steps).
644 */
eb1c8f43
GR
645static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
646 unsigned int interval)
0c01b644 647{
0c01b644 648 unsigned int update_interval;
eb1c8f43 649 int i, err;
0c01b644
GR
650
651 /* Shift calculations to avoid rounding errors */
652 interval <<= 6;
653
654 /* find the nearest update rate */
655 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
656 i < data->max_convrate; i++, update_interval >>= 1)
657 if (interval >= update_interval * 3 / 4)
658 break;
659
7a1d220c 660 err = lm90_write_convrate(data, i);
0c01b644 661 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 662 return err;
0c01b644
GR
663}
664
10bfef47
GR
665static int lm90_update_limits(struct device *dev)
666{
667 struct lm90_data *data = dev_get_drvdata(dev);
668 struct i2c_client *client = data->client;
669 int val;
670
671 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
672 if (val < 0)
673 return val;
674 data->temp8[LOCAL_CRIT] = val;
675
676 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
677 if (val < 0)
678 return val;
679 data->temp8[REMOTE_CRIT] = val;
680
681 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
682 if (val < 0)
683 return val;
684 data->temp_hyst = val;
685
be9d6374 686 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
687 if (val < 0)
688 return val;
689 data->temp11[REMOTE_LOW] = val << 8;
690
691 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
692 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
693 if (val < 0)
694 return val;
695 data->temp11[REMOTE_LOW] |= val;
696 }
697
698 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
699 if (val < 0)
700 return val;
701 data->temp11[REMOTE_HIGH] = val << 8;
702
703 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
704 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
705 if (val < 0)
706 return val;
707 data->temp11[REMOTE_HIGH] |= val;
708 }
709
710 if (data->flags & LM90_HAVE_OFFSET) {
711 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
712 LM90_REG_R_REMOTE_OFFSL);
713 if (val < 0)
714 return val;
715 data->temp11[REMOTE_OFFSET] = val;
716 }
717
718 if (data->flags & LM90_HAVE_EMERGENCY) {
719 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
720 if (val < 0)
721 return val;
722 data->temp8[LOCAL_EMERG] = val;
723
724 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
725 if (val < 0)
726 return val;
727 data->temp8[REMOTE_EMERG] = val;
728 }
729
730 if (data->kind == max6696) {
7a1d220c 731 val = lm90_select_remote_channel(data, 1);
10bfef47
GR
732 if (val < 0)
733 return val;
734
735 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
736 if (val < 0)
737 return val;
738 data->temp8[REMOTE2_CRIT] = val;
739
740 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
741 if (val < 0)
742 return val;
743 data->temp8[REMOTE2_EMERG] = val;
744
745 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
746 if (val < 0)
747 return val;
748 data->temp11[REMOTE2_LOW] = val << 8;
749
750 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
751 if (val < 0)
752 return val;
753 data->temp11[REMOTE2_HIGH] = val << 8;
754
7a1d220c 755 lm90_select_remote_channel(data, 0);
10bfef47
GR
756 }
757
758 return 0;
759}
760
eb1c8f43 761static int lm90_update_device(struct device *dev)
15b66ab6 762{
1de8b250
GR
763 struct lm90_data *data = dev_get_drvdata(dev);
764 struct i2c_client *client = data->client;
0c01b644 765 unsigned long next_update;
eb1c8f43 766 int val;
15b66ab6 767
10bfef47
GR
768 if (!data->valid) {
769 val = lm90_update_limits(dev);
770 if (val < 0)
eb1c8f43 771 return val;
10bfef47
GR
772 }
773
78c2c2fe
JD
774 next_update = data->last_updated +
775 msecs_to_jiffies(data->update_interval);
0c01b644 776 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 777 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 778
2f83ab77 779 data->valid = false;
10bfef47 780
37ad04d7
GR
781 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
782 if (val < 0)
eb1c8f43 783 return val;
37ad04d7
GR
784 data->temp8[LOCAL_LOW] = val;
785
786 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
787 if (val < 0)
eb1c8f43 788 return val;
37ad04d7
GR
789 data->temp8[LOCAL_HIGH] = val;
790
a095f687 791 if (data->reg_local_ext) {
37ad04d7
GR
792 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
793 data->reg_local_ext);
794 if (val < 0)
eb1c8f43 795 return val;
37ad04d7 796 data->temp11[LOCAL_TEMP] = val;
15b66ab6 797 } else {
37ad04d7
GR
798 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
799 if (val < 0)
eb1c8f43 800 return val;
37ad04d7 801 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 802 }
37ad04d7
GR
803 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
804 LM90_REG_R_REMOTE_TEMPL);
805 if (val < 0)
eb1c8f43 806 return val;
37ad04d7
GR
807 data->temp11[REMOTE_TEMP] = val;
808
37ad04d7
GR
809 val = lm90_read_reg(client, LM90_REG_R_STATUS);
810 if (val < 0)
eb1c8f43 811 return val;
37ad04d7 812 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
813
814 if (data->kind == max6696) {
7a1d220c 815 val = lm90_select_remote_channel(data, 1);
37ad04d7 816 if (val < 0)
eb1c8f43 817 return val;
37ad04d7 818
37ad04d7
GR
819 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
820 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43 821 if (val < 0) {
7a1d220c 822 lm90_select_remote_channel(data, 0);
eb1c8f43
GR
823 return val;
824 }
37ad04d7
GR
825 data->temp11[REMOTE2_TEMP] = val;
826
7a1d220c 827 lm90_select_remote_channel(data, 0);
15b66ab6 828
37ad04d7
GR
829 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
830 if (val < 0)
eb1c8f43 831 return val;
37ad04d7 832 data->alarms |= val << 8;
15b66ab6
GR
833 }
834
f36ffeab
GR
835 /*
836 * Re-enable ALERT# output if it was originally enabled and
837 * relevant alarms are all clear
838 */
37ad04d7
GR
839 if (!(data->config_orig & 0x80) &&
840 !(data->alarms & data->alert_alarms)) {
b849e5d1 841 if (data->config & 0x80) {
15b66ab6 842 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
7a1d220c 843 lm90_update_confreg(data, data->config & ~0x80);
15b66ab6
GR
844 }
845 }
846
847 data->last_updated = jiffies;
2f83ab77 848 data->valid = true;
15b66ab6
GR
849 }
850
eb1c8f43 851 return 0;
15b66ab6
GR
852}
853
cea50fe2
NC
854/*
855 * Conversions
856 * For local temperatures and limits, critical limits and the hysteresis
857 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
858 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
859 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
860 * Maxim chips use unsigned values.
cea50fe2
NC
861 */
862
9d4d3834 863static inline int temp_from_s8(s8 val)
cea50fe2
NC
864{
865 return val * 1000;
866}
867
271dabf5
BH
868static inline int temp_from_u8(u8 val)
869{
870 return val * 1000;
871}
872
9d4d3834 873static inline int temp_from_s16(s16 val)
cea50fe2
NC
874{
875 return val / 32 * 125;
876}
877
271dabf5
BH
878static inline int temp_from_u16(u16 val)
879{
880 return val / 32 * 125;
881}
882
9d4d3834 883static s8 temp_to_s8(long val)
cea50fe2
NC
884{
885 if (val <= -128000)
886 return -128;
887 if (val >= 127000)
888 return 127;
889 if (val < 0)
890 return (val - 500) / 1000;
891 return (val + 500) / 1000;
892}
893
271dabf5
BH
894static u8 temp_to_u8(long val)
895{
896 if (val <= 0)
897 return 0;
898 if (val >= 255000)
899 return 255;
900 return (val + 500) / 1000;
901}
902
9d4d3834 903static s16 temp_to_s16(long val)
cea50fe2
NC
904{
905 if (val <= -128000)
906 return 0x8000;
907 if (val >= 127875)
908 return 0x7FE0;
909 if (val < 0)
910 return (val - 62) / 125 * 32;
911 return (val + 62) / 125 * 32;
912}
913
914static u8 hyst_to_reg(long val)
915{
916 if (val <= 0)
917 return 0;
918 if (val >= 30500)
919 return 31;
920 return (val + 500) / 1000;
921}
922
923/*
23b2d477
NC
924 * ADT7461 in compatibility mode is almost identical to LM90 except that
925 * attempts to write values that are outside the range 0 < temp < 127 are
926 * treated as the boundary value.
927 *
928 * ADT7461 in "extended mode" operation uses unsigned integers offset by
929 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 930 */
9d4d3834 931static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 932{
23b2d477
NC
933 if (data->flags & LM90_FLAG_ADT7461_EXT)
934 return (val - 64) * 1000;
589f707c 935 return temp_from_s8(val);
cea50fe2
NC
936}
937
9d4d3834 938static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 939{
23b2d477
NC
940 if (data->flags & LM90_FLAG_ADT7461_EXT)
941 return (val - 0x4000) / 64 * 250;
589f707c 942 return temp_from_s16(val);
23b2d477
NC
943}
944
9d4d3834 945static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
946{
947 if (data->flags & LM90_FLAG_ADT7461_EXT) {
948 if (val <= -64000)
949 return 0;
950 if (val >= 191000)
951 return 0xFF;
952 return (val + 500 + 64000) / 1000;
23b2d477 953 }
589f707c
GR
954 if (val <= 0)
955 return 0;
956 if (val >= 127000)
957 return 127;
958 return (val + 500) / 1000;
23b2d477
NC
959}
960
9d4d3834 961static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
962{
963 if (data->flags & LM90_FLAG_ADT7461_EXT) {
964 if (val <= -64000)
965 return 0;
966 if (val >= 191750)
967 return 0xFFC0;
968 return (val + 64000 + 125) / 250 * 64;
23b2d477 969 }
589f707c
GR
970 if (val <= 0)
971 return 0;
972 if (val >= 127750)
973 return 0x7FC0;
974 return (val + 125) / 250 * 64;
cea50fe2
NC
975}
976
eb1c8f43 977/* pec used for ADM1032 only */
e57959a6 978static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 979 char *buf)
30d7394b 980{
eb1c8f43 981 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 982
eb1c8f43 983 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
984}
985
e57959a6
JL
986static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
987 const char *buf, size_t count)
30d7394b 988{
eb1c8f43 989 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
990 long val;
991 int err;
992
179c4fdb 993 err = kstrtol(buf, 10, &val);
11e57812
GR
994 if (err < 0)
995 return err;
30d7394b 996
eb1c8f43
GR
997 switch (val) {
998 case 0:
999 client->flags &= ~I2C_CLIENT_PEC;
1000 break;
1001 case 1:
1002 client->flags |= I2C_CLIENT_PEC;
1003 break;
1004 default:
1005 return -EINVAL;
1006 }
06e1c0a2 1007
30d7394b 1008 return count;
1da177e4 1009}
30d7394b 1010
e57959a6 1011static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
1012
1013static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 1014{
eb1c8f43 1015 s16 temp11 = data->temp11[index];
23b2d477
NC
1016 int temp;
1017
f347e249 1018 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1019 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 1020 else if (data->kind == max6646)
eb1c8f43 1021 temp = temp_from_u16(temp11);
23b2d477 1022 else
eb1c8f43 1023 temp = temp_from_s16(temp11);
23b2d477 1024
97ae60bb 1025 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1026 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1027 temp += 16000;
1028
eb1c8f43 1029 return temp;
1da177e4 1030}
30d7394b 1031
eb1c8f43 1032static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 1033{
eb1c8f43 1034 static struct reg {
96512861
GR
1035 u8 high;
1036 u8 low;
eb1c8f43
GR
1037 } reg[] = {
1038 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1039 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
1040 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
1041 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1042 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 1043 };
1de8b250 1044 struct i2c_client *client = data->client;
eb1c8f43 1045 struct reg *regp = &reg[index];
11e57812
GR
1046 int err;
1047
97ae60bb 1048 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1049 if (data->kind == lm99 && index <= 2) {
1050 /* prevent integer underflow */
1051 val = max(val, -128000l);
97ae60bb 1052 val -= 16000;
b50aa496 1053 }
97ae60bb 1054
f347e249 1055 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
96512861 1056 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1057 else if (data->kind == max6646)
96512861 1058 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1059 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1060 data->temp11[index] = temp_to_s16(val);
88073bb1 1061 else
96512861 1062 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1063
7a1d220c 1064 lm90_select_remote_channel(data, index >= 3);
eb1c8f43 1065 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1066 data->temp11[index] >> 8);
eb1c8f43
GR
1067 if (err < 0)
1068 return err;
88073bb1 1069 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1070 err = i2c_smbus_write_byte_data(client, regp->low,
1071 data->temp11[index] & 0xff);
06e1c0a2 1072
7a1d220c 1073 lm90_select_remote_channel(data, 0);
eb1c8f43 1074 return err;
1da177e4 1075}
30d7394b 1076
eb1c8f43 1077static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1078{
eb1c8f43 1079 s8 temp8 = data->temp8[index];
23b2d477
NC
1080 int temp;
1081
f347e249 1082 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1083 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1084 else if (data->kind == max6646)
eb1c8f43 1085 temp = temp_from_u8(temp8);
23b2d477 1086 else
eb1c8f43 1087 temp = temp_from_s8(temp8);
23b2d477 1088
97ae60bb 1089 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1090 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1091 temp += 16000;
1092
eb1c8f43 1093 return temp;
1da177e4 1094}
1da177e4 1095
eb1c8f43 1096static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1097{
eb1c8f43
GR
1098 static const u8 reg[TEMP8_REG_NUM] = {
1099 LM90_REG_W_LOCAL_LOW,
1100 LM90_REG_W_LOCAL_HIGH,
1101 LM90_REG_W_LOCAL_CRIT,
1102 LM90_REG_W_REMOTE_CRIT,
1103 MAX6659_REG_W_LOCAL_EMERG,
1104 MAX6659_REG_W_REMOTE_EMERG,
1105 LM90_REG_W_REMOTE_CRIT,
1106 MAX6659_REG_W_REMOTE_EMERG,
1107 };
1de8b250 1108 struct i2c_client *client = data->client;
11e57812 1109 int err;
1da177e4 1110
eb1c8f43 1111 /* +16 degrees offset for temp2 for the LM99 */
b50aa496
DO
1112 if (data->kind == lm99 && index == 3) {
1113 /* prevent integer underflow */
1114 val = max(val, -128000l);
eb1c8f43 1115 val -= 16000;
b50aa496 1116 }
11e57812 1117
f347e249 1118 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43 1119 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1120 else if (data->kind == max6646)
eb1c8f43 1121 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1122 else
eb1c8f43 1123 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1124
7a1d220c 1125 lm90_select_remote_channel(data, index >= 6);
eb1c8f43 1126 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
7a1d220c 1127 lm90_select_remote_channel(data, 0);
37ad04d7 1128
eb1c8f43 1129 return err;
1da177e4
LT
1130}
1131
eb1c8f43 1132static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1133{
eb1c8f43 1134 int temp;
37ad04d7 1135
f347e249 1136 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1137 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1138 else if (data->kind == max6646)
1139 temp = temp_from_u8(data->temp8[index]);
1140 else
1141 temp = temp_from_s8(data->temp8[index]);
2d45771e 1142
eb1c8f43
GR
1143 /* +16 degrees offset for temp2 for the LM99 */
1144 if (data->kind == lm99 && index == 3)
1145 temp += 16000;
0c01b644 1146
eb1c8f43 1147 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1148}
1149
eb1c8f43 1150static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1151{
1de8b250 1152 struct i2c_client *client = data->client;
eb1c8f43 1153 int temp;
0c01b644
GR
1154 int err;
1155
f347e249 1156 if (data->flags & LM90_HAVE_EXTENDED_TEMP)
eb1c8f43
GR
1157 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1158 else if (data->kind == max6646)
1159 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1160 else
1161 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1162
b50aa496
DO
1163 /* prevent integer underflow */
1164 val = max(val, -128000l);
1165
eb1c8f43
GR
1166 data->temp_hyst = hyst_to_reg(temp - val);
1167 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1168 data->temp_hyst);
1169 return err;
0c01b644
GR
1170}
1171
eb1c8f43
GR
1172static const u8 lm90_temp_index[3] = {
1173 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1174};
1175
eb1c8f43
GR
1176static const u8 lm90_temp_min_index[3] = {
1177 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1178};
1179
eb1c8f43
GR
1180static const u8 lm90_temp_max_index[3] = {
1181 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1182};
1183
eb1c8f43
GR
1184static const u8 lm90_temp_crit_index[3] = {
1185 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1186};
1187
eb1c8f43
GR
1188static const u8 lm90_temp_emerg_index[3] = {
1189 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1190};
1191
eb1c8f43 1192static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1193static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43
GR
1194static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1195static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1196static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1197
eb1c8f43
GR
1198static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1199{
1200 struct lm90_data *data = dev_get_drvdata(dev);
1201 int err;
06e1c0a2 1202
eb1c8f43
GR
1203 mutex_lock(&data->update_lock);
1204 err = lm90_update_device(dev);
1205 mutex_unlock(&data->update_lock);
1206 if (err)
1207 return err;
06e1c0a2 1208
eb1c8f43
GR
1209 switch (attr) {
1210 case hwmon_temp_input:
1211 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1212 break;
1213 case hwmon_temp_min_alarm:
1214 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1215 break;
1216 case hwmon_temp_max_alarm:
1217 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1218 break;
1219 case hwmon_temp_crit_alarm:
1220 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1221 break;
1222 case hwmon_temp_emergency_alarm:
1223 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1224 break;
1225 case hwmon_temp_fault:
1226 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1227 break;
1228 case hwmon_temp_min:
1229 if (channel == 0)
1230 *val = lm90_get_temp8(data,
1231 lm90_temp_min_index[channel]);
1232 else
1233 *val = lm90_get_temp11(data,
1234 lm90_temp_min_index[channel]);
1235 break;
1236 case hwmon_temp_max:
1237 if (channel == 0)
1238 *val = lm90_get_temp8(data,
1239 lm90_temp_max_index[channel]);
1240 else
1241 *val = lm90_get_temp11(data,
1242 lm90_temp_max_index[channel]);
1243 break;
1244 case hwmon_temp_crit:
1245 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1246 break;
1247 case hwmon_temp_crit_hyst:
1248 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1249 break;
1250 case hwmon_temp_emergency:
1251 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1252 break;
1253 case hwmon_temp_emergency_hyst:
1254 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1255 break;
1256 case hwmon_temp_offset:
1257 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1258 break;
1259 default:
1260 return -EOPNOTSUPP;
1261 }
1262 return 0;
1263}
06e1c0a2 1264
eb1c8f43
GR
1265static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1266{
1267 struct lm90_data *data = dev_get_drvdata(dev);
1268 int err;
06e1c0a2 1269
eb1c8f43 1270 mutex_lock(&data->update_lock);
06e1c0a2 1271
eb1c8f43
GR
1272 err = lm90_update_device(dev);
1273 if (err)
1274 goto error;
1275
1276 switch (attr) {
1277 case hwmon_temp_min:
1278 if (channel == 0)
1279 err = lm90_set_temp8(data,
1280 lm90_temp_min_index[channel],
1281 val);
1282 else
1283 err = lm90_set_temp11(data,
1284 lm90_temp_min_index[channel],
1285 val);
1286 break;
1287 case hwmon_temp_max:
1288 if (channel == 0)
1289 err = lm90_set_temp8(data,
1290 lm90_temp_max_index[channel],
1291 val);
1292 else
1293 err = lm90_set_temp11(data,
1294 lm90_temp_max_index[channel],
1295 val);
1296 break;
1297 case hwmon_temp_crit:
1298 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1299 break;
1300 case hwmon_temp_crit_hyst:
1301 err = lm90_set_temphyst(data, val);
1302 break;
1303 case hwmon_temp_emergency:
1304 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1305 break;
1306 case hwmon_temp_offset:
1307 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1308 break;
1309 default:
1310 err = -EOPNOTSUPP;
1311 break;
1312 }
1313error:
1314 mutex_unlock(&data->update_lock);
1315
1316 return err;
1317}
1318
1319static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1320{
eb1c8f43
GR
1321 switch (attr) {
1322 case hwmon_temp_input:
1323 case hwmon_temp_min_alarm:
1324 case hwmon_temp_max_alarm:
1325 case hwmon_temp_crit_alarm:
1326 case hwmon_temp_emergency_alarm:
1327 case hwmon_temp_emergency_hyst:
1328 case hwmon_temp_fault:
3334851d 1329 return 0444;
eb1c8f43
GR
1330 case hwmon_temp_min:
1331 case hwmon_temp_max:
1332 case hwmon_temp_crit:
1333 case hwmon_temp_emergency:
1334 case hwmon_temp_offset:
3334851d 1335 return 0644;
eb1c8f43
GR
1336 case hwmon_temp_crit_hyst:
1337 if (channel == 0)
3334851d
GR
1338 return 0644;
1339 return 0444;
eb1c8f43
GR
1340 default:
1341 return 0;
1342 }
c3df5806
JD
1343}
1344
eb1c8f43 1345static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1346{
eb1c8f43 1347 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1348 int err;
1349
eb1c8f43
GR
1350 mutex_lock(&data->update_lock);
1351 err = lm90_update_device(dev);
1352 mutex_unlock(&data->update_lock);
1353 if (err)
11e57812 1354 return err;
c3df5806 1355
eb1c8f43
GR
1356 switch (attr) {
1357 case hwmon_chip_update_interval:
1358 *val = data->update_interval;
c3df5806 1359 break;
eb1c8f43
GR
1360 case hwmon_chip_alarms:
1361 *val = data->alarms;
c3df5806
JD
1362 break;
1363 default:
eb1c8f43 1364 return -EOPNOTSUPP;
c3df5806
JD
1365 }
1366
eb1c8f43 1367 return 0;
c3df5806
JD
1368}
1369
eb1c8f43
GR
1370static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1371{
1372 struct lm90_data *data = dev_get_drvdata(dev);
1373 struct i2c_client *client = data->client;
1374 int err;
c3df5806 1375
eb1c8f43
GR
1376 mutex_lock(&data->update_lock);
1377
1378 err = lm90_update_device(dev);
1379 if (err)
1380 goto error;
1381
1382 switch (attr) {
1383 case hwmon_chip_update_interval:
1384 err = lm90_set_convrate(client, data,
1385 clamp_val(val, 0, 100000));
1386 break;
1387 default:
1388 err = -EOPNOTSUPP;
1389 break;
1390 }
1391error:
1392 mutex_unlock(&data->update_lock);
1393
1394 return err;
1395}
1396
1397static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1398{
1399 switch (attr) {
1400 case hwmon_chip_update_interval:
3334851d 1401 return 0644;
eb1c8f43 1402 case hwmon_chip_alarms:
3334851d 1403 return 0444;
eb1c8f43
GR
1404 default:
1405 return 0;
1406 }
1407}
1408
1409static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1410 u32 attr, int channel, long *val)
1411{
1412 switch (type) {
1413 case hwmon_chip:
1414 return lm90_chip_read(dev, attr, channel, val);
1415 case hwmon_temp:
1416 return lm90_temp_read(dev, attr, channel, val);
1417 default:
1418 return -EOPNOTSUPP;
1419 }
1420}
1421
1422static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1423 u32 attr, int channel, long val)
1424{
1425 switch (type) {
1426 case hwmon_chip:
1427 return lm90_chip_write(dev, attr, channel, val);
1428 case hwmon_temp:
1429 return lm90_temp_write(dev, attr, channel, val);
1430 default:
1431 return -EOPNOTSUPP;
1432 }
1433}
1434
1435static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1436 u32 attr, int channel)
1437{
1438 switch (type) {
1439 case hwmon_chip:
1440 return lm90_chip_is_visible(data, attr, channel);
1441 case hwmon_temp:
1442 return lm90_temp_is_visible(data, attr, channel);
1443 default:
1444 return 0;
1445 }
1446}
1da177e4 1447
15b66ab6 1448/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1449static int lm90_detect(struct i2c_client *client,
15b66ab6 1450 struct i2c_board_info *info)
8256fe0f 1451{
b2589ab0
JD
1452 struct i2c_adapter *adapter = client->adapter;
1453 int address = client->addr;
15b66ab6 1454 const char *name = NULL;
b2589ab0 1455 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1456
15b66ab6
GR
1457 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1458 return -ENODEV;
1da177e4 1459
8f2fa77c 1460 /* detection and identification */
b2589ab0
JD
1461 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1462 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1463 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1464 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1465 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1466 return -ENODEV;
1467
f90be42f 1468 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
b2589ab0
JD
1469 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1470 if (config2 < 0)
9b0e8526 1471 return -ENODEV;
f90be42f 1472 } else
b2589ab0 1473 config2 = 0; /* Make compiler happy */
8f2fa77c 1474
f90be42f
JD
1475 if ((address == 0x4C || address == 0x4D)
1476 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1477 if ((config1 & 0x2A) == 0x00
1478 && (config2 & 0xF8) == 0x00
1479 && convrate <= 0x09) {
8f2fa77c
JD
1480 if (address == 0x4C
1481 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1482 name = "lm90";
32c82a93 1483 } else
8f2fa77c
JD
1484 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1485 name = "lm99";
1486 dev_info(&adapter->dev,
1487 "Assuming LM99 chip at 0x%02x\n",
1488 address);
1489 dev_info(&adapter->dev,
1490 "If it is an LM89, instantiate it "
1491 "with the new_device sysfs "
1492 "interface\n");
271dabf5 1493 } else
8f2fa77c
JD
1494 if (address == 0x4C
1495 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1496 name = "lm86";
1da177e4
LT
1497 }
1498 }
8f2fa77c
JD
1499 } else
1500 if ((address == 0x4C || address == 0x4D)
1501 && man_id == 0x41) { /* Analog Devices */
1502 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1503 && (config1 & 0x3F) == 0x00
1504 && convrate <= 0x0A) {
8f2fa77c 1505 name = "adm1032";
f36ffeab
GR
1506 /*
1507 * The ADM1032 supports PEC, but only if combined
1508 * transactions are not used.
1509 */
8f2fa77c
JD
1510 if (i2c_check_functionality(adapter,
1511 I2C_FUNC_SMBUS_BYTE))
1512 info->flags |= I2C_CLIENT_PEC;
1513 } else
1514 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1515 && (config1 & 0x1B) == 0x00
1516 && convrate <= 0x0A) {
8f2fa77c 1517 name = "adt7461";
5a4e5e6a
GR
1518 } else
1519 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1520 && (config1 & 0x1B) == 0x00
1521 && convrate <= 0x0A) {
5a4e5e6a 1522 name = "adt7461a";
8f2fa77c
JD
1523 }
1524 } else
1525 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1526 int emerg, emerg2, status2;
06e1c0a2
GR
1527
1528 /*
1529 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1530 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1531 * exists, both readings will reflect the same value. Otherwise,
1532 * the readings will be different.
1533 */
b2589ab0
JD
1534 emerg = i2c_smbus_read_byte_data(client,
1535 MAX6659_REG_R_REMOTE_EMERG);
1536 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1537 LM90_REG_R_MAN_ID);
b2589ab0 1538 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1539 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1540 status2 = i2c_smbus_read_byte_data(client,
1541 MAX6696_REG_R_STATUS2);
1542 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1543 return -ENODEV;
1544
8f2fa77c
JD
1545 /*
1546 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1547 * register. Reading from that address will return the last
1548 * read value, which in our case is those of the man_id
1549 * register. Likewise, the config1 register seems to lack a
1550 * low nibble, so the value will be those of the previous
1551 * read, so in our case those of the man_id register.
13c84951
GR
1552 * MAX6659 has a third set of upper temperature limit registers.
1553 * Those registers also return values on MAX6657 and MAX6658,
1554 * thus the only way to detect MAX6659 is by its address.
1555 * For this reason it will be mis-detected as MAX6657 if its
1556 * address is 0x4C.
8f2fa77c
JD
1557 */
1558 if (chip_id == man_id
13c84951 1559 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1560 && (config1 & 0x1F) == (man_id & 0x0F)
1561 && convrate <= 0x09) {
13c84951
GR
1562 if (address == 0x4C)
1563 name = "max6657";
1564 else
1565 name = "max6659";
8f2fa77c 1566 } else
06e1c0a2
GR
1567 /*
1568 * Even though MAX6695 and MAX6696 do not have a chip ID
1569 * register, reading it returns 0x01. Bit 4 of the config1
1570 * register is unused and should return zero when read. Bit 0 of
1571 * the status2 register is unused and should return zero when
1572 * read.
1573 *
1574 * MAX6695 and MAX6696 have an additional set of temperature
1575 * limit registers. We can detect those chips by checking if
1576 * one of those registers exists.
1577 */
1578 if (chip_id == 0x01
b2589ab0
JD
1579 && (config1 & 0x10) == 0x00
1580 && (status2 & 0x01) == 0x00
1581 && emerg == emerg2
1582 && convrate <= 0x07) {
06e1c0a2
GR
1583 name = "max6696";
1584 } else
8f2fa77c
JD
1585 /*
1586 * The chip_id register of the MAX6680 and MAX6681 holds the
1587 * revision of the chip. The lowest bit of the config1 register
1588 * is unused and should return zero when read, so should the
1589 * second to last bit of config1 (software reset).
1590 */
1591 if (chip_id == 0x01
b2589ab0
JD
1592 && (config1 & 0x03) == 0x00
1593 && convrate <= 0x07) {
8f2fa77c
JD
1594 name = "max6680";
1595 } else
1596 /*
1597 * The chip_id register of the MAX6646/6647/6649 holds the
1598 * revision of the chip. The lowest 6 bits of the config1
1599 * register are unused and should return zero when read.
1600 */
1601 if (chip_id == 0x59
b2589ab0
JD
1602 && (config1 & 0x3f) == 0x00
1603 && convrate <= 0x07) {
8f2fa77c 1604 name = "max6646";
229d495d
JL
1605 } else
1606 /*
1607 * The chip_id of the MAX6654 holds the revision of the chip.
1608 * The lowest 3 bits of the config1 register are unused and
1609 * should return zero when read.
1610 */
1611 if (chip_id == 0x08
1612 && (config1 & 0x07) == 0x00
1613 && convrate <= 0x07) {
1614 name = "max6654";
1da177e4 1615 }
6771ea1f
JD
1616 } else
1617 if (address == 0x4C
1618 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1619 if ((config1 & 0x2A) == 0x00
1620 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1621 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1622 && convrate <= 0x09) {
c4f99a2b
JD
1623 name = "w83l771";
1624 } else
1625 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1626 && convrate <= 0x08) {
c4f99a2b
JD
1627 name = "w83l771";
1628 }
6771ea1f 1629 }
2ef01793 1630 } else
6d101c58
JD
1631 if (address >= 0x48 && address <= 0x4F
1632 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1633 if (chip_id == 0x00
b2589ab0
JD
1634 && (config1 & 0x2A) == 0x00
1635 && (config2 & 0xFE) == 0x00
1636 && convrate <= 0x09) {
2ef01793
SD
1637 name = "sa56004";
1638 }
ae544f64
GR
1639 } else
1640 if ((address == 0x4C || address == 0x4D)
1641 && man_id == 0x47) { /* GMT */
1642 if (chip_id == 0x01 /* G781 */
1643 && (config1 & 0x3F) == 0x00
1644 && convrate <= 0x08)
1645 name = "g781";
1daaceb2 1646 } else
f8344f76
GR
1647 if (man_id == 0x55 && chip_id == 0x00 &&
1648 (config1 & 0x1B) == 0x00 && convrate <= 0x09) {
1649 int local_ext, conalert, chen, dfc;
1daaceb2
WN
1650
1651 local_ext = i2c_smbus_read_byte_data(client,
1652 TMP451_REG_R_LOCAL_TEMPL);
f8344f76
GR
1653 conalert = i2c_smbus_read_byte_data(client,
1654 TMP451_REG_CONALERT);
1655 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
1656 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
1657
1658 if ((local_ext & 0x0F) == 0x00 &&
1659 (conalert & 0xf1) == 0x01 &&
1660 (chen & 0xfc) == 0x00 &&
1661 (dfc & 0xfc) == 0x00) {
1662 if (address == 0x4c && !(chen & 0x03))
1663 name = "tmp451";
1664 else if (address >= 0x48 && address <= 0x4f)
1665 name = "tmp461";
1666 }
1da177e4
LT
1667 }
1668
8f2fa77c
JD
1669 if (!name) { /* identification failed */
1670 dev_dbg(&adapter->dev,
1671 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1672 "chip_id=0x%02X)\n", address, man_id, chip_id);
1673 return -ENODEV;
1da177e4 1674 }
8f2fa77c 1675
9b0e8526
JD
1676 strlcpy(info->type, name, I2C_NAME_SIZE);
1677
1678 return 0;
1679}
1680
1f17a444 1681static void lm90_restore_conf(void *_data)
f7001bb0 1682{
1f17a444
GR
1683 struct lm90_data *data = _data;
1684 struct i2c_client *client = data->client;
1685
f7001bb0 1686 /* Restore initial configuration */
7a1d220c 1687 lm90_write_convrate(data, data->convrate_orig);
f7001bb0
GR
1688 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1689 data->config_orig);
1690}
1691
37ad04d7 1692static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1693{
37ad04d7 1694 int config, convrate;
15b66ab6 1695
37ad04d7
GR
1696 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1697 if (convrate < 0)
1698 return convrate;
0c01b644
GR
1699 data->convrate_orig = convrate;
1700
15b66ab6
GR
1701 /*
1702 * Start the conversions.
1703 */
37ad04d7
GR
1704 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1705 if (config < 0)
1706 return config;
15b66ab6 1707 data->config_orig = config;
b849e5d1 1708 data->config = config;
15b66ab6 1709
62456189
BY
1710 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1711
15b66ab6 1712 /* Check Temperature Range Select */
f347e249 1713 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
15b66ab6
GR
1714 if (config & 0x04)
1715 data->flags |= LM90_FLAG_ADT7461_EXT;
1716 }
1717
1718 /*
1719 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1720 * 0.125 degree resolution) and range (0x08, extend range
1721 * to -64 degree) mode for the remote temperature sensor.
1722 */
1723 if (data->kind == max6680)
1724 config |= 0x18;
1725
229d495d
JL
1726 /*
1727 * Put MAX6654 into extended range (0x20, extend minimum range from
1728 * 0 degrees to -64 degrees). Note that extended resolution is not
1729 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
1730 * slower, which is intentionally not done by default.
1731 */
1732 if (data->kind == max6654)
1733 config |= 0x20;
1734
15b66ab6
GR
1735 /*
1736 * Select external channel 0 for max6695/96
1737 */
1738 if (data->kind == max6696)
1739 config &= ~0x08;
1740
2abdc357
DO
1741 /*
1742 * Interrupt is enabled by default on reset, but it may be disabled
1743 * by bootloader, unmask it.
1744 */
1745 if (client->irq)
1746 config &= ~0x80;
1747
15b66ab6 1748 config &= 0xBF; /* run */
7a1d220c 1749 lm90_update_confreg(data, config);
1f17a444 1750
c5fcf01b 1751 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1752}
1753
072de496
WN
1754static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1755{
1756 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1757 int st, st2 = 0;
072de496 1758
37ad04d7
GR
1759 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1760 if (st < 0)
1761 return false;
072de496 1762
37ad04d7
GR
1763 if (data->kind == max6696) {
1764 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1765 if (st2 < 0)
1766 return false;
1767 }
072de496
WN
1768
1769 *status = st | (st2 << 8);
1770
1771 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1772 return false;
1773
1774 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1775 (st2 & MAX6696_STATUS2_LOT2))
94dbd23e
DO
1776 dev_dbg(&client->dev,
1777 "temp%d out of range, please check!\n", 1);
072de496
WN
1778 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1779 (st2 & MAX6696_STATUS2_ROT2))
94dbd23e
DO
1780 dev_dbg(&client->dev,
1781 "temp%d out of range, please check!\n", 2);
072de496 1782 if (st & LM90_STATUS_ROPEN)
94dbd23e
DO
1783 dev_dbg(&client->dev,
1784 "temp%d diode open, please check!\n", 2);
072de496
WN
1785 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1786 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
94dbd23e
DO
1787 dev_dbg(&client->dev,
1788 "temp%d out of range, please check!\n", 3);
072de496 1789 if (st2 & MAX6696_STATUS2_R2OPEN)
94dbd23e
DO
1790 dev_dbg(&client->dev,
1791 "temp%d diode open, please check!\n", 3);
1792
1793 if (st & LM90_STATUS_LLOW)
1794 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1795 hwmon_temp_min, 0);
1796 if (st & LM90_STATUS_RLOW)
1797 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1798 hwmon_temp_min, 1);
1799 if (st2 & MAX6696_STATUS2_R2LOW)
1800 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1801 hwmon_temp_min, 2);
1802 if (st & LM90_STATUS_LHIGH)
1803 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1804 hwmon_temp_max, 0);
1805 if (st & LM90_STATUS_RHIGH)
1806 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1807 hwmon_temp_max, 1);
1808 if (st2 & MAX6696_STATUS2_R2HIGH)
1809 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1810 hwmon_temp_max, 2);
072de496
WN
1811
1812 return true;
1813}
1814
109b1283
WN
1815static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1816{
1817 struct i2c_client *client = dev_id;
1818 u16 status;
1819
1820 if (lm90_is_tripped(client, &status))
1821 return IRQ_HANDLED;
1822 else
1823 return IRQ_NONE;
1824}
1825
1f17a444
GR
1826static void lm90_remove_pec(void *dev)
1827{
1828 device_remove_file(dev, &dev_attr_pec);
1829}
1830
1831static void lm90_regulator_disable(void *regulator)
1832{
1833 regulator_disable(regulator);
1834}
1835
eb1c8f43
GR
1836
1837static const struct hwmon_ops lm90_ops = {
1838 .is_visible = lm90_is_visible,
1839 .read = lm90_read,
1840 .write = lm90_write,
1841};
1842
67487038 1843static int lm90_probe(struct i2c_client *client)
9b0e8526 1844{
b2589ab0 1845 struct device *dev = &client->dev;
e67776cc 1846 struct i2c_adapter *adapter = client->adapter;
eb1c8f43 1847 struct hwmon_channel_info *info;
3e0f964f 1848 struct regulator *regulator;
6e5f62b9 1849 struct device *hwmon_dev;
eb1c8f43 1850 struct lm90_data *data;
9b0e8526 1851 int err;
1da177e4 1852
3e0f964f
WN
1853 regulator = devm_regulator_get(dev, "vcc");
1854 if (IS_ERR(regulator))
1855 return PTR_ERR(regulator);
1856
1857 err = regulator_enable(regulator);
1858 if (err < 0) {
d89fa686 1859 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1860 return err;
1861 }
1862
c5fcf01b
GR
1863 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1864 if (err)
1865 return err;
1f17a444 1866
d89fa686 1867 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1868 if (!data)
1869 return -ENOMEM;
1870
1de8b250 1871 data->client = client;
b2589ab0 1872 i2c_set_clientdata(client, data);
9a61bf63 1873 mutex_init(&data->update_lock);
1da177e4 1874
9b0e8526 1875 /* Set the device type */
df8d57bf
JMC
1876 if (client->dev.of_node)
1877 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1878 else
67487038 1879 data->kind = i2c_match_id(lm90_id, client)->driver_data;
9b0e8526
JD
1880 if (data->kind == adm1032) {
1881 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1882 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1883 }
1da177e4 1884
f36ffeab
GR
1885 /*
1886 * Different devices have different alarm bits triggering the
1887 * ALERT# output
1888 */
4667bcb8 1889 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1890
88073bb1 1891 /* Set chip capabilities */
4667bcb8 1892 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1893
1894 data->chip.ops = &lm90_ops;
1895 data->chip.info = data->info;
1896
a4d41e67
GR
1897 data->info[0] = HWMON_CHANNEL_INFO(chip,
1898 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
1899 data->info[1] = &data->temp_info;
1900
1901 info = &data->temp_info;
1902 info->type = hwmon_temp;
1903 info->config = data->channel_config;
1904
1905 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1906 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1907 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1908 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1909 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1910 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1911
1912 if (data->flags & LM90_HAVE_OFFSET)
1913 data->channel_config[1] |= HWMON_T_OFFSET;
1914
1915 if (data->flags & LM90_HAVE_EMERGENCY) {
1916 data->channel_config[0] |= HWMON_T_EMERGENCY |
1917 HWMON_T_EMERGENCY_HYST;
1918 data->channel_config[1] |= HWMON_T_EMERGENCY |
1919 HWMON_T_EMERGENCY_HYST;
1920 }
1921
1922 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1923 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1924 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1925 }
1926
1927 if (data->flags & LM90_HAVE_TEMP3) {
1928 data->channel_config[2] = HWMON_T_INPUT |
1929 HWMON_T_MIN | HWMON_T_MAX |
1930 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1931 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1932 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1933 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1934 HWMON_T_FAULT;
1935 }
1936
a095f687 1937 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1938
0c01b644
GR
1939 /* Set maximum conversion rate */
1940 data->max_convrate = lm90_params[data->kind].max_convrate;
1941
1da177e4 1942 /* Initialize the LM90 chip */
37ad04d7
GR
1943 err = lm90_init_client(client, data);
1944 if (err < 0) {
1945 dev_err(dev, "Failed to initialize device\n");
1946 return err;
1947 }
1da177e4 1948
eb1c8f43
GR
1949 /*
1950 * The 'pec' attribute is attached to the i2c device and thus created
1951 * separately.
1952 */
b2589ab0
JD
1953 if (client->flags & I2C_CLIENT_PEC) {
1954 err = device_create_file(dev, &dev_attr_pec);
11e57812 1955 if (err)
1f17a444 1956 return err;
c5fcf01b
GR
1957 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1958 if (err)
1959 return err;
06e1c0a2 1960 }
0e39e01c 1961
eb1c8f43
GR
1962 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1963 data, &data->chip,
1964 NULL);
6e5f62b9
GR
1965 if (IS_ERR(hwmon_dev))
1966 return PTR_ERR(hwmon_dev);
943b0830 1967
94dbd23e
DO
1968 data->hwmon_dev = hwmon_dev;
1969
109b1283
WN
1970 if (client->irq) {
1971 dev_dbg(dev, "IRQ: %d\n", client->irq);
1972 err = devm_request_threaded_irq(dev, client->irq,
1973 NULL, lm90_irq_thread,
d97fb837 1974 IRQF_ONESHOT, "lm90", client);
109b1283
WN
1975 if (err < 0) {
1976 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1977 return err;
109b1283
WN
1978 }
1979 }
1980
1da177e4
LT
1981 return 0;
1982}
1983
b4f21054
BT
1984static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1985 unsigned int flag)
53de3342 1986{
072de496 1987 u16 alarms;
06e1c0a2 1988
b4f21054
BT
1989 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1990 return;
1991
072de496 1992 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
1993 /*
1994 * Disable ALERT# output, because these chips don't implement
1995 * SMBus alert correctly; they should only hold the alert line
1996 * low briefly.
1997 */
072de496
WN
1998 struct lm90_data *data = i2c_get_clientdata(client);
1999
37ad04d7
GR
2000 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2001 (alarms & data->alert_alarms)) {
53de3342 2002 dev_dbg(&client->dev, "Disabling ALERT#\n");
7a1d220c 2003 lm90_update_confreg(data, data->config | 0x80);
53de3342 2004 }
072de496 2005 } else {
94dbd23e 2006 dev_dbg(&client->dev, "Everything OK\n");
53de3342
JD
2007 }
2008}
2009
4c7f85a3
DO
2010static int __maybe_unused lm90_suspend(struct device *dev)
2011{
2012 struct lm90_data *data = dev_get_drvdata(dev);
2013 struct i2c_client *client = data->client;
2014
2015 if (client->irq)
2016 disable_irq(client->irq);
2017
2018 return 0;
2019}
2020
2021static int __maybe_unused lm90_resume(struct device *dev)
2022{
2023 struct lm90_data *data = dev_get_drvdata(dev);
2024 struct i2c_client *client = data->client;
2025
2026 if (client->irq)
2027 enable_irq(client->irq);
2028
2029 return 0;
2030}
2031
2032static SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2033
15b66ab6
GR
2034static struct i2c_driver lm90_driver = {
2035 .class = I2C_CLASS_HWMON,
2036 .driver = {
2037 .name = "lm90",
df8d57bf 2038 .of_match_table = of_match_ptr(lm90_of_match),
4c7f85a3 2039 .pm = &lm90_pm_ops,
15b66ab6 2040 },
67487038 2041 .probe_new = lm90_probe,
15b66ab6
GR
2042 .alert = lm90_alert,
2043 .id_table = lm90_id,
2044 .detect = lm90_detect,
2045 .address_list = normal_i2c,
2046};
1da177e4 2047
f0967eea 2048module_i2c_driver(lm90_driver);
1da177e4 2049
7c81c60f 2050MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
2051MODULE_DESCRIPTION("LM90/ADM1032 driver");
2052MODULE_LICENSE("GPL");