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hwmon: (lm90) Unmask hardware interrupt
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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
LT
6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
LT
19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
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23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
LT
28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
6948708d
GR
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
229d495d
JL
38 * This driver also supports the MAX6654 chip made by Maxim. This chip can
39 * be at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is
40 * otherwise similar to MAX6657/MAX6658/MAX6659. Extended range is available
41 * by setting the configuration register accordingly, and is done during
42 * initialization. Extended precision is only available at conversion rates
43 * of 1 Hz and slower. Note that extended precision is not enabled by
44 * default, as this driver initializes all chips to 2 Hz by design.
45 *
1a51e068
DW
46 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
47 * MAX6692 chips made by Maxim. These are again similar to the LM86,
48 * but they use unsigned temperature values and can report temperatures
49 * from 0 to 145 degrees.
271dabf5 50 *
32c82a93
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51 * This driver also supports the MAX6680 and MAX6681, two other sensor
52 * chips made by Maxim. These are quite similar to the other Maxim
a874a10c
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53 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
54 * be treated identically.
32c82a93 55 *
06e1c0a2
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56 * This driver also supports the MAX6695 and MAX6696, two other sensor
57 * chips made by Maxim. These are also quite similar to other Maxim
58 * chips, but support three temperature sensors instead of two. MAX6695
59 * and MAX6696 only differ in the pinout so they can be treated identically.
60 *
5a4e5e6a
GR
61 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
62 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
63 * and extended mode. They are mostly compatible with LM90 except for a data
64 * format difference for the temperature value registers.
1da177e4 65 *
2ef01793
SD
66 * This driver also supports the SA56004 from Philips. This device is
67 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
68 *
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69 * This driver also supports the G781 from GMT. This device is compatible
70 * with the ADM1032.
71 *
1daaceb2
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72 * This driver also supports TMP451 from Texas Instruments. This device is
73 * supported in both compatibility and extended mode. It's mostly compatible
74 * with ADT7461 except for local temperature low byte register and max
75 * conversion rate.
76 *
1da177e4
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77 * Since the LM90 was the first chipset supported by this driver, most
78 * comments will refer to this chipset, but are actually general and
79 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
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80 */
81
1da177e4
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82#include <linux/module.h>
83#include <linux/init.h>
84#include <linux/slab.h>
85#include <linux/jiffies.h>
86#include <linux/i2c.h>
943b0830
MH
87#include <linux/hwmon.h>
88#include <linux/err.h>
9a61bf63 89#include <linux/mutex.h>
df8d57bf 90#include <linux/of_device.h>
0e39e01c 91#include <linux/sysfs.h>
109b1283 92#include <linux/interrupt.h>
3e0f964f 93#include <linux/regulator/consumer.h>
1da177e4
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94
95/*
96 * Addresses to scan
97 * Address is fully defined internally and cannot be changed except for
32c82a93 98 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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99 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
100 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
101 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
102 * have address 0x4d.
271dabf5 103 * MAX6647 has address 0x4e.
13c84951 104 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
229d495d
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105 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
106 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
2ef01793 107 * SA56004 can have address 0x48 through 0x4F.
1da177e4
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108 */
109
25e9c86d 110static const unsigned short normal_i2c[] = {
2ef01793
SD
111 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
112 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 113
13c84951 114enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
229d495d 115 max6646, w83l771, max6696, sa56004, g781, tmp451, max6654 };
1da177e4
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116
117/*
118 * The LM90 registers
119 */
120
121#define LM90_REG_R_MAN_ID 0xFE
122#define LM90_REG_R_CHIP_ID 0xFF
123#define LM90_REG_R_CONFIG1 0x03
124#define LM90_REG_W_CONFIG1 0x09
125#define LM90_REG_R_CONFIG2 0xBF
126#define LM90_REG_W_CONFIG2 0xBF
127#define LM90_REG_R_CONVRATE 0x04
128#define LM90_REG_W_CONVRATE 0x0A
129#define LM90_REG_R_STATUS 0x02
130#define LM90_REG_R_LOCAL_TEMP 0x00
131#define LM90_REG_R_LOCAL_HIGH 0x05
132#define LM90_REG_W_LOCAL_HIGH 0x0B
133#define LM90_REG_R_LOCAL_LOW 0x06
134#define LM90_REG_W_LOCAL_LOW 0x0C
135#define LM90_REG_R_LOCAL_CRIT 0x20
136#define LM90_REG_W_LOCAL_CRIT 0x20
137#define LM90_REG_R_REMOTE_TEMPH 0x01
138#define LM90_REG_R_REMOTE_TEMPL 0x10
139#define LM90_REG_R_REMOTE_OFFSH 0x11
140#define LM90_REG_W_REMOTE_OFFSH 0x11
141#define LM90_REG_R_REMOTE_OFFSL 0x12
142#define LM90_REG_W_REMOTE_OFFSL 0x12
143#define LM90_REG_R_REMOTE_HIGHH 0x07
144#define LM90_REG_W_REMOTE_HIGHH 0x0D
145#define LM90_REG_R_REMOTE_HIGHL 0x13
146#define LM90_REG_W_REMOTE_HIGHL 0x13
147#define LM90_REG_R_REMOTE_LOWH 0x08
148#define LM90_REG_W_REMOTE_LOWH 0x0E
149#define LM90_REG_R_REMOTE_LOWL 0x14
150#define LM90_REG_W_REMOTE_LOWL 0x14
151#define LM90_REG_R_REMOTE_CRIT 0x19
152#define LM90_REG_W_REMOTE_CRIT 0x19
153#define LM90_REG_R_TCRIT_HYST 0x21
154#define LM90_REG_W_TCRIT_HYST 0x21
155
229d495d 156/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
f65e1708
JD
157
158#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 159#define MAX6696_REG_R_STATUS2 0x12
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160#define MAX6659_REG_R_REMOTE_EMERG 0x16
161#define MAX6659_REG_W_REMOTE_EMERG 0x16
162#define MAX6659_REG_R_LOCAL_EMERG 0x17
163#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 164
2ef01793
SD
165/* SA56004 registers */
166
167#define SA56004_REG_R_LOCAL_TEMPL 0x22
168
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169#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
170
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171/* TMP451 registers */
172#define TMP451_REG_R_LOCAL_TEMPL 0x15
173
23b2d477
NC
174/*
175 * Device flags
176 */
88073bb1
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177#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
178/* Device features */
179#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 180#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 181#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
06e1c0a2
GR
182#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
183#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 184#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
62456189 185#define LM90_PAUSE_FOR_CONFIG (1 << 8) /* Pause conversion for config */
23b2d477 186
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WN
187/* LM90 status */
188#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
189#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
190#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
191#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
192#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
193#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
194#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
195
196#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
197#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
198#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
199#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
200#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
201#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
202#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
203
1da177e4
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204/*
205 * Driver data (common to all clients)
206 */
207
9b0e8526
JD
208static const struct i2c_device_id lm90_id[] = {
209 { "adm1032", adm1032 },
210 { "adt7461", adt7461 },
5a4e5e6a 211 { "adt7461a", adt7461 },
ae544f64 212 { "g781", g781 },
9b0e8526
JD
213 { "lm90", lm90 },
214 { "lm86", lm86 },
97ae60bb
JD
215 { "lm89", lm86 },
216 { "lm99", lm99 },
271dabf5
BH
217 { "max6646", max6646 },
218 { "max6647", max6646 },
219 { "max6649", max6646 },
229d495d 220 { "max6654", max6654 },
9b0e8526
JD
221 { "max6657", max6657 },
222 { "max6658", max6657 },
13c84951 223 { "max6659", max6659 },
9b0e8526
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224 { "max6680", max6680 },
225 { "max6681", max6680 },
06e1c0a2
GR
226 { "max6695", max6696 },
227 { "max6696", max6696 },
5a4e5e6a 228 { "nct1008", adt7461 },
6771ea1f 229 { "w83l771", w83l771 },
2ef01793 230 { "sa56004", sa56004 },
1daaceb2 231 { "tmp451", tmp451 },
9b0e8526
JD
232 { }
233};
234MODULE_DEVICE_TABLE(i2c, lm90_id);
235
787afaa3 236static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
237 {
238 .compatible = "adi,adm1032",
239 .data = (void *)adm1032
240 },
241 {
242 .compatible = "adi,adt7461",
243 .data = (void *)adt7461
244 },
245 {
246 .compatible = "adi,adt7461a",
247 .data = (void *)adt7461
248 },
249 {
250 .compatible = "gmt,g781",
251 .data = (void *)g781
252 },
253 {
254 .compatible = "national,lm90",
255 .data = (void *)lm90
256 },
257 {
258 .compatible = "national,lm86",
259 .data = (void *)lm86
260 },
261 {
262 .compatible = "national,lm89",
263 .data = (void *)lm86
264 },
265 {
266 .compatible = "national,lm99",
267 .data = (void *)lm99
268 },
269 {
270 .compatible = "dallas,max6646",
271 .data = (void *)max6646
272 },
273 {
274 .compatible = "dallas,max6647",
275 .data = (void *)max6646
276 },
277 {
278 .compatible = "dallas,max6649",
279 .data = (void *)max6646
280 },
229d495d
JL
281 {
282 .compatible = "dallas,max6654",
283 .data = (void *)max6654
284 },
df8d57bf
JMC
285 {
286 .compatible = "dallas,max6657",
287 .data = (void *)max6657
288 },
289 {
290 .compatible = "dallas,max6658",
291 .data = (void *)max6657
292 },
293 {
294 .compatible = "dallas,max6659",
295 .data = (void *)max6659
296 },
297 {
298 .compatible = "dallas,max6680",
299 .data = (void *)max6680
300 },
301 {
302 .compatible = "dallas,max6681",
303 .data = (void *)max6680
304 },
305 {
306 .compatible = "dallas,max6695",
307 .data = (void *)max6696
308 },
309 {
310 .compatible = "dallas,max6696",
311 .data = (void *)max6696
312 },
313 {
314 .compatible = "onnn,nct1008",
315 .data = (void *)adt7461
316 },
317 {
318 .compatible = "winbond,w83l771",
319 .data = (void *)w83l771
320 },
321 {
322 .compatible = "nxp,sa56004",
323 .data = (void *)sa56004
324 },
325 {
326 .compatible = "ti,tmp451",
327 .data = (void *)tmp451
328 },
329 { },
330};
331MODULE_DEVICE_TABLE(of, lm90_of_match);
332
4667bcb8
GR
333/*
334 * chip type specific parameters
335 */
336struct lm90_params {
337 u32 flags; /* Capabilities */
338 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
339 /* Upper 8 bits for max6695/96 */
0c01b644 340 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 341 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
342};
343
344static const struct lm90_params lm90_params[] = {
345 [adm1032] = {
1179324c
GR
346 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
347 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 348 .alert_alarms = 0x7c,
0c01b644 349 .max_convrate = 10,
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GR
350 },
351 [adt7461] = {
1179324c
GR
352 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
353 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 354 .alert_alarms = 0x7c,
0c01b644 355 .max_convrate = 10,
4667bcb8 356 },
ae544f64
GR
357 [g781] = {
358 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
359 | LM90_HAVE_BROKEN_ALERT,
360 .alert_alarms = 0x7c,
361 .max_convrate = 8,
362 },
4667bcb8
GR
363 [lm86] = {
364 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
365 .alert_alarms = 0x7b,
0c01b644 366 .max_convrate = 9,
4667bcb8
GR
367 },
368 [lm90] = {
369 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
370 .alert_alarms = 0x7b,
0c01b644 371 .max_convrate = 9,
4667bcb8
GR
372 },
373 [lm99] = {
374 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
375 .alert_alarms = 0x7b,
0c01b644 376 .max_convrate = 9,
4667bcb8
GR
377 },
378 [max6646] = {
4667bcb8 379 .alert_alarms = 0x7c,
0c01b644 380 .max_convrate = 6,
2ef01793 381 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8 382 },
229d495d
JL
383 [max6654] = {
384 .alert_alarms = 0x7c,
385 .max_convrate = 7,
386 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
387 },
4667bcb8 388 [max6657] = {
62456189 389 .flags = LM90_PAUSE_FOR_CONFIG,
4667bcb8 390 .alert_alarms = 0x7c,
0c01b644 391 .max_convrate = 8,
2ef01793 392 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
393 },
394 [max6659] = {
a095f687 395 .flags = LM90_HAVE_EMERGENCY,
4667bcb8 396 .alert_alarms = 0x7c,
0c01b644 397 .max_convrate = 8,
2ef01793 398 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
399 },
400 [max6680] = {
401 .flags = LM90_HAVE_OFFSET,
402 .alert_alarms = 0x7c,
0c01b644 403 .max_convrate = 7,
4667bcb8
GR
404 },
405 [max6696] = {
a095f687 406 .flags = LM90_HAVE_EMERGENCY
4667bcb8 407 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
e41fae2b 408 .alert_alarms = 0x1c7c,
0c01b644 409 .max_convrate = 6,
2ef01793 410 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
411 },
412 [w83l771] = {
413 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
414 .alert_alarms = 0x7c,
0c01b644 415 .max_convrate = 8,
4667bcb8 416 },
2ef01793 417 [sa56004] = {
a095f687 418 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
2ef01793
SD
419 .alert_alarms = 0x7b,
420 .max_convrate = 9,
421 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
422 },
1daaceb2
WN
423 [tmp451] = {
424 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
425 | LM90_HAVE_BROKEN_ALERT,
426 .alert_alarms = 0x7c,
427 .max_convrate = 9,
428 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 429 },
4667bcb8
GR
430};
431
40465d94
WN
432/*
433 * TEMP8 register index
434 */
435enum lm90_temp8_reg_index {
436 LOCAL_LOW = 0,
437 LOCAL_HIGH,
438 LOCAL_CRIT,
439 REMOTE_CRIT,
440 LOCAL_EMERG, /* max6659 and max6695/96 */
441 REMOTE_EMERG, /* max6659 and max6695/96 */
442 REMOTE2_CRIT, /* max6695/96 only */
443 REMOTE2_EMERG, /* max6695/96 only */
444 TEMP8_REG_NUM
445};
446
447/*
448 * TEMP11 register index
449 */
450enum lm90_temp11_reg_index {
451 REMOTE_TEMP = 0,
452 REMOTE_LOW,
453 REMOTE_HIGH,
454 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
455 LOCAL_TEMP,
456 REMOTE2_TEMP, /* max6695/96 only */
457 REMOTE2_LOW, /* max6695/96 only */
458 REMOTE2_HIGH, /* max6695/96 only */
459 TEMP11_REG_NUM
460};
461
1da177e4
LT
462/*
463 * Client data (each client gets its own)
464 */
465
466struct lm90_data {
1de8b250 467 struct i2c_client *client;
94dbd23e 468 struct device *hwmon_dev;
eb1c8f43
GR
469 u32 channel_config[4];
470 struct hwmon_channel_info temp_info;
471 const struct hwmon_channel_info *info[3];
472 struct hwmon_chip_info chip;
9a61bf63 473 struct mutex update_lock;
2f83ab77 474 bool valid; /* true if register values are valid */
1da177e4
LT
475 unsigned long last_updated; /* in jiffies */
476 int kind;
4667bcb8 477 u32 flags;
1da177e4 478
38bab98a 479 unsigned int update_interval; /* in milliseconds */
0c01b644 480
b849e5d1 481 u8 config; /* Current configuration register value */
95238364 482 u8 config_orig; /* Original configuration register value */
0c01b644 483 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
484 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
485 /* Upper 8 bits for max6695/96 */
0c01b644 486 u8 max_convrate; /* Maximum conversion rate */
2ef01793 487 u8 reg_local_ext; /* local extension register offset */
95238364 488
1da177e4 489 /* registers values */
40465d94
WN
490 s8 temp8[TEMP8_REG_NUM];
491 s16 temp11[TEMP11_REG_NUM];
1da177e4 492 u8 temp_hyst;
06e1c0a2 493 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
494};
495
15b66ab6
GR
496/*
497 * Support functions
498 */
499
500/*
501 * The ADM1032 supports PEC but not on write byte transactions, so we need
502 * to explicitly ask for a transaction without PEC.
503 */
504static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
505{
506 return i2c_smbus_xfer(client->adapter, client->addr,
507 client->flags & ~I2C_CLIENT_PEC,
508 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
509}
510
511/*
512 * It is assumed that client->update_lock is held (unless we are in
513 * detection or initialization steps). This matters when PEC is enabled,
514 * because we don't want the address pointer to change between the write
515 * byte and the read byte transactions.
516 */
37ad04d7 517static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
518{
519 int err;
520
521 if (client->flags & I2C_CLIENT_PEC) {
522 err = adm1032_write_byte(client, reg);
523 if (err >= 0)
524 err = i2c_smbus_read_byte(client);
525 } else
526 err = i2c_smbus_read_byte_data(client, reg);
527
37ad04d7 528 return err;
15b66ab6
GR
529}
530
37ad04d7 531static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 532{
37ad04d7 533 int oldh, newh, l;
15b66ab6
GR
534
535 /*
536 * There is a trick here. We have to read two registers to have the
537 * sensor temperature, but we have to beware a conversion could occur
25985edc 538 * between the readings. The datasheet says we should either use
15b66ab6
GR
539 * the one-shot conversion register, which we don't want to do
540 * (disables hardware monitoring) or monitor the busy bit, which is
541 * impossible (we can't read the values and monitor that bit at the
542 * exact same time). So the solution used here is to read the high
543 * byte once, then the low byte, then the high byte again. If the new
544 * high byte matches the old one, then we have a valid reading. Else
545 * we have to read the low byte again, and now we believe we have a
546 * correct reading.
547 */
37ad04d7
GR
548 oldh = lm90_read_reg(client, regh);
549 if (oldh < 0)
550 return oldh;
551 l = lm90_read_reg(client, regl);
552 if (l < 0)
553 return l;
554 newh = lm90_read_reg(client, regh);
555 if (newh < 0)
556 return newh;
15b66ab6 557 if (oldh != newh) {
37ad04d7
GR
558 l = lm90_read_reg(client, regl);
559 if (l < 0)
560 return l;
15b66ab6 561 }
37ad04d7 562 return (newh << 8) | l;
15b66ab6
GR
563}
564
7a1d220c
GR
565static int lm90_update_confreg(struct lm90_data *data, u8 config)
566{
567 if (data->config != config) {
568 int err;
569
570 err = i2c_smbus_write_byte_data(data->client,
571 LM90_REG_W_CONFIG1,
572 config);
573 if (err)
574 return err;
575 data->config = config;
576 }
577 return 0;
578}
579
15b66ab6
GR
580/*
581 * client->update_lock must be held when calling this function (unless we are
582 * in detection or initialization steps), and while a remote channel other
583 * than channel 0 is selected. Also, calling code must make sure to re-select
584 * external channel 0 before releasing the lock. This is necessary because
585 * various registers have different meanings as a result of selecting a
586 * non-default remote channel.
587 */
7a1d220c 588static int lm90_select_remote_channel(struct lm90_data *data, int channel)
15b66ab6 589{
7a1d220c
GR
590 int err = 0;
591
15b66ab6 592 if (data->kind == max6696) {
b849e5d1 593 u8 config = data->config & ~0x08;
b849e5d1 594
15b66ab6
GR
595 if (channel)
596 config |= 0x08;
7a1d220c 597 err = lm90_update_confreg(data, config);
15b66ab6 598 }
7a1d220c 599 return err;
15b66ab6
GR
600}
601
7a1d220c 602static int lm90_write_convrate(struct lm90_data *data, int val)
62456189 603{
b849e5d1 604 u8 config = data->config;
62456189 605 int err;
62456189
BY
606
607 /* Save config and pause conversion */
608 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
7a1d220c
GR
609 err = lm90_update_confreg(data, config | 0x40);
610 if (err < 0)
611 return err;
62456189
BY
612 }
613
614 /* Set conv rate */
7a1d220c 615 err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val);
62456189
BY
616
617 /* Revert change to config */
7a1d220c 618 lm90_update_confreg(data, config);
62456189
BY
619
620 return err;
621}
622
0c01b644
GR
623/*
624 * Set conversion rate.
625 * client->update_lock must be held when calling this function (unless we are
626 * in detection or initialization steps).
627 */
eb1c8f43
GR
628static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
629 unsigned int interval)
0c01b644 630{
0c01b644 631 unsigned int update_interval;
eb1c8f43 632 int i, err;
0c01b644
GR
633
634 /* Shift calculations to avoid rounding errors */
635 interval <<= 6;
636
637 /* find the nearest update rate */
638 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
639 i < data->max_convrate; i++, update_interval >>= 1)
640 if (interval >= update_interval * 3 / 4)
641 break;
642
7a1d220c 643 err = lm90_write_convrate(data, i);
0c01b644 644 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 645 return err;
0c01b644
GR
646}
647
10bfef47
GR
648static int lm90_update_limits(struct device *dev)
649{
650 struct lm90_data *data = dev_get_drvdata(dev);
651 struct i2c_client *client = data->client;
652 int val;
653
654 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
655 if (val < 0)
656 return val;
657 data->temp8[LOCAL_CRIT] = val;
658
659 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
660 if (val < 0)
661 return val;
662 data->temp8[REMOTE_CRIT] = val;
663
664 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
665 if (val < 0)
666 return val;
667 data->temp_hyst = val;
668
be9d6374 669 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
670 if (val < 0)
671 return val;
672 data->temp11[REMOTE_LOW] = val << 8;
673
674 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
675 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
676 if (val < 0)
677 return val;
678 data->temp11[REMOTE_LOW] |= val;
679 }
680
681 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
682 if (val < 0)
683 return val;
684 data->temp11[REMOTE_HIGH] = val << 8;
685
686 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
687 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
688 if (val < 0)
689 return val;
690 data->temp11[REMOTE_HIGH] |= val;
691 }
692
693 if (data->flags & LM90_HAVE_OFFSET) {
694 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
695 LM90_REG_R_REMOTE_OFFSL);
696 if (val < 0)
697 return val;
698 data->temp11[REMOTE_OFFSET] = val;
699 }
700
701 if (data->flags & LM90_HAVE_EMERGENCY) {
702 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
703 if (val < 0)
704 return val;
705 data->temp8[LOCAL_EMERG] = val;
706
707 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
708 if (val < 0)
709 return val;
710 data->temp8[REMOTE_EMERG] = val;
711 }
712
713 if (data->kind == max6696) {
7a1d220c 714 val = lm90_select_remote_channel(data, 1);
10bfef47
GR
715 if (val < 0)
716 return val;
717
718 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
719 if (val < 0)
720 return val;
721 data->temp8[REMOTE2_CRIT] = val;
722
723 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
724 if (val < 0)
725 return val;
726 data->temp8[REMOTE2_EMERG] = val;
727
728 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
729 if (val < 0)
730 return val;
731 data->temp11[REMOTE2_LOW] = val << 8;
732
733 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
734 if (val < 0)
735 return val;
736 data->temp11[REMOTE2_HIGH] = val << 8;
737
7a1d220c 738 lm90_select_remote_channel(data, 0);
10bfef47
GR
739 }
740
741 return 0;
742}
743
eb1c8f43 744static int lm90_update_device(struct device *dev)
15b66ab6 745{
1de8b250
GR
746 struct lm90_data *data = dev_get_drvdata(dev);
747 struct i2c_client *client = data->client;
0c01b644 748 unsigned long next_update;
eb1c8f43 749 int val;
15b66ab6 750
10bfef47
GR
751 if (!data->valid) {
752 val = lm90_update_limits(dev);
753 if (val < 0)
eb1c8f43 754 return val;
10bfef47
GR
755 }
756
78c2c2fe
JD
757 next_update = data->last_updated +
758 msecs_to_jiffies(data->update_interval);
0c01b644 759 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 760 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 761
2f83ab77 762 data->valid = false;
10bfef47 763
37ad04d7
GR
764 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
765 if (val < 0)
eb1c8f43 766 return val;
37ad04d7
GR
767 data->temp8[LOCAL_LOW] = val;
768
769 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
770 if (val < 0)
eb1c8f43 771 return val;
37ad04d7
GR
772 data->temp8[LOCAL_HIGH] = val;
773
a095f687 774 if (data->reg_local_ext) {
37ad04d7
GR
775 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
776 data->reg_local_ext);
777 if (val < 0)
eb1c8f43 778 return val;
37ad04d7 779 data->temp11[LOCAL_TEMP] = val;
15b66ab6 780 } else {
37ad04d7
GR
781 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
782 if (val < 0)
eb1c8f43 783 return val;
37ad04d7 784 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 785 }
37ad04d7
GR
786 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
787 LM90_REG_R_REMOTE_TEMPL);
788 if (val < 0)
eb1c8f43 789 return val;
37ad04d7
GR
790 data->temp11[REMOTE_TEMP] = val;
791
37ad04d7
GR
792 val = lm90_read_reg(client, LM90_REG_R_STATUS);
793 if (val < 0)
eb1c8f43 794 return val;
37ad04d7 795 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
796
797 if (data->kind == max6696) {
7a1d220c 798 val = lm90_select_remote_channel(data, 1);
37ad04d7 799 if (val < 0)
eb1c8f43 800 return val;
37ad04d7 801
37ad04d7
GR
802 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
803 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43 804 if (val < 0) {
7a1d220c 805 lm90_select_remote_channel(data, 0);
eb1c8f43
GR
806 return val;
807 }
37ad04d7
GR
808 data->temp11[REMOTE2_TEMP] = val;
809
7a1d220c 810 lm90_select_remote_channel(data, 0);
15b66ab6 811
37ad04d7
GR
812 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
813 if (val < 0)
eb1c8f43 814 return val;
37ad04d7 815 data->alarms |= val << 8;
15b66ab6
GR
816 }
817
f36ffeab
GR
818 /*
819 * Re-enable ALERT# output if it was originally enabled and
820 * relevant alarms are all clear
821 */
37ad04d7
GR
822 if (!(data->config_orig & 0x80) &&
823 !(data->alarms & data->alert_alarms)) {
b849e5d1 824 if (data->config & 0x80) {
15b66ab6 825 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
7a1d220c 826 lm90_update_confreg(data, data->config & ~0x80);
15b66ab6
GR
827 }
828 }
829
830 data->last_updated = jiffies;
2f83ab77 831 data->valid = true;
15b66ab6
GR
832 }
833
eb1c8f43 834 return 0;
15b66ab6
GR
835}
836
cea50fe2
NC
837/*
838 * Conversions
839 * For local temperatures and limits, critical limits and the hysteresis
840 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
841 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
842 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
843 * Maxim chips use unsigned values.
cea50fe2
NC
844 */
845
9d4d3834 846static inline int temp_from_s8(s8 val)
cea50fe2
NC
847{
848 return val * 1000;
849}
850
271dabf5
BH
851static inline int temp_from_u8(u8 val)
852{
853 return val * 1000;
854}
855
9d4d3834 856static inline int temp_from_s16(s16 val)
cea50fe2
NC
857{
858 return val / 32 * 125;
859}
860
271dabf5
BH
861static inline int temp_from_u16(u16 val)
862{
863 return val / 32 * 125;
864}
865
9d4d3834 866static s8 temp_to_s8(long val)
cea50fe2
NC
867{
868 if (val <= -128000)
869 return -128;
870 if (val >= 127000)
871 return 127;
872 if (val < 0)
873 return (val - 500) / 1000;
874 return (val + 500) / 1000;
875}
876
271dabf5
BH
877static u8 temp_to_u8(long val)
878{
879 if (val <= 0)
880 return 0;
881 if (val >= 255000)
882 return 255;
883 return (val + 500) / 1000;
884}
885
9d4d3834 886static s16 temp_to_s16(long val)
cea50fe2
NC
887{
888 if (val <= -128000)
889 return 0x8000;
890 if (val >= 127875)
891 return 0x7FE0;
892 if (val < 0)
893 return (val - 62) / 125 * 32;
894 return (val + 62) / 125 * 32;
895}
896
897static u8 hyst_to_reg(long val)
898{
899 if (val <= 0)
900 return 0;
901 if (val >= 30500)
902 return 31;
903 return (val + 500) / 1000;
904}
905
906/*
23b2d477
NC
907 * ADT7461 in compatibility mode is almost identical to LM90 except that
908 * attempts to write values that are outside the range 0 < temp < 127 are
909 * treated as the boundary value.
910 *
911 * ADT7461 in "extended mode" operation uses unsigned integers offset by
912 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 913 */
9d4d3834 914static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 915{
23b2d477
NC
916 if (data->flags & LM90_FLAG_ADT7461_EXT)
917 return (val - 64) * 1000;
589f707c 918 return temp_from_s8(val);
cea50fe2
NC
919}
920
9d4d3834 921static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 922{
23b2d477
NC
923 if (data->flags & LM90_FLAG_ADT7461_EXT)
924 return (val - 0x4000) / 64 * 250;
589f707c 925 return temp_from_s16(val);
23b2d477
NC
926}
927
9d4d3834 928static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
929{
930 if (data->flags & LM90_FLAG_ADT7461_EXT) {
931 if (val <= -64000)
932 return 0;
933 if (val >= 191000)
934 return 0xFF;
935 return (val + 500 + 64000) / 1000;
23b2d477 936 }
589f707c
GR
937 if (val <= 0)
938 return 0;
939 if (val >= 127000)
940 return 127;
941 return (val + 500) / 1000;
23b2d477
NC
942}
943
9d4d3834 944static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
945{
946 if (data->flags & LM90_FLAG_ADT7461_EXT) {
947 if (val <= -64000)
948 return 0;
949 if (val >= 191750)
950 return 0xFFC0;
951 return (val + 64000 + 125) / 250 * 64;
23b2d477 952 }
589f707c
GR
953 if (val <= 0)
954 return 0;
955 if (val >= 127750)
956 return 0x7FC0;
957 return (val + 125) / 250 * 64;
cea50fe2
NC
958}
959
eb1c8f43 960/* pec used for ADM1032 only */
e57959a6 961static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 962 char *buf)
30d7394b 963{
eb1c8f43 964 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 965
eb1c8f43 966 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
967}
968
e57959a6
JL
969static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
970 const char *buf, size_t count)
30d7394b 971{
eb1c8f43 972 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
973 long val;
974 int err;
975
179c4fdb 976 err = kstrtol(buf, 10, &val);
11e57812
GR
977 if (err < 0)
978 return err;
30d7394b 979
eb1c8f43
GR
980 switch (val) {
981 case 0:
982 client->flags &= ~I2C_CLIENT_PEC;
983 break;
984 case 1:
985 client->flags |= I2C_CLIENT_PEC;
986 break;
987 default:
988 return -EINVAL;
989 }
06e1c0a2 990
30d7394b 991 return count;
1da177e4 992}
30d7394b 993
e57959a6 994static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
995
996static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 997{
eb1c8f43 998 s16 temp11 = data->temp11[index];
23b2d477
NC
999 int temp;
1000
1daaceb2 1001 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1002 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 1003 else if (data->kind == max6646)
eb1c8f43 1004 temp = temp_from_u16(temp11);
23b2d477 1005 else
eb1c8f43 1006 temp = temp_from_s16(temp11);
23b2d477 1007
97ae60bb 1008 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1009 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1010 temp += 16000;
1011
eb1c8f43 1012 return temp;
1da177e4 1013}
30d7394b 1014
eb1c8f43 1015static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 1016{
eb1c8f43 1017 static struct reg {
96512861
GR
1018 u8 high;
1019 u8 low;
eb1c8f43
GR
1020 } reg[] = {
1021 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1022 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
1023 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
1024 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1025 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 1026 };
1de8b250 1027 struct i2c_client *client = data->client;
eb1c8f43 1028 struct reg *regp = &reg[index];
11e57812
GR
1029 int err;
1030
97ae60bb 1031 /* +16 degrees offset for temp2 for the LM99 */
96512861 1032 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1033 val -= 16000;
1034
1daaceb2 1035 if (data->kind == adt7461 || data->kind == tmp451)
96512861 1036 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1037 else if (data->kind == max6646)
96512861 1038 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1039 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1040 data->temp11[index] = temp_to_s16(val);
88073bb1 1041 else
96512861 1042 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1043
7a1d220c 1044 lm90_select_remote_channel(data, index >= 3);
eb1c8f43 1045 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1046 data->temp11[index] >> 8);
eb1c8f43
GR
1047 if (err < 0)
1048 return err;
88073bb1 1049 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1050 err = i2c_smbus_write_byte_data(client, regp->low,
1051 data->temp11[index] & 0xff);
06e1c0a2 1052
7a1d220c 1053 lm90_select_remote_channel(data, 0);
eb1c8f43 1054 return err;
1da177e4 1055}
30d7394b 1056
eb1c8f43 1057static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1058{
eb1c8f43 1059 s8 temp8 = data->temp8[index];
23b2d477
NC
1060 int temp;
1061
1daaceb2 1062 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1063 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1064 else if (data->kind == max6646)
eb1c8f43 1065 temp = temp_from_u8(temp8);
23b2d477 1066 else
eb1c8f43 1067 temp = temp_from_s8(temp8);
23b2d477 1068
97ae60bb 1069 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1070 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1071 temp += 16000;
1072
eb1c8f43 1073 return temp;
1da177e4 1074}
1da177e4 1075
eb1c8f43 1076static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1077{
eb1c8f43
GR
1078 static const u8 reg[TEMP8_REG_NUM] = {
1079 LM90_REG_W_LOCAL_LOW,
1080 LM90_REG_W_LOCAL_HIGH,
1081 LM90_REG_W_LOCAL_CRIT,
1082 LM90_REG_W_REMOTE_CRIT,
1083 MAX6659_REG_W_LOCAL_EMERG,
1084 MAX6659_REG_W_REMOTE_EMERG,
1085 LM90_REG_W_REMOTE_CRIT,
1086 MAX6659_REG_W_REMOTE_EMERG,
1087 };
1de8b250 1088 struct i2c_client *client = data->client;
11e57812 1089 int err;
1da177e4 1090
eb1c8f43
GR
1091 /* +16 degrees offset for temp2 for the LM99 */
1092 if (data->kind == lm99 && index == 3)
1093 val -= 16000;
11e57812 1094
1daaceb2 1095 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1096 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1097 else if (data->kind == max6646)
eb1c8f43 1098 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1099 else
eb1c8f43 1100 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1101
7a1d220c 1102 lm90_select_remote_channel(data, index >= 6);
eb1c8f43 1103 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
7a1d220c 1104 lm90_select_remote_channel(data, 0);
37ad04d7 1105
eb1c8f43 1106 return err;
1da177e4
LT
1107}
1108
eb1c8f43 1109static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1110{
eb1c8f43 1111 int temp;
37ad04d7 1112
eb1c8f43
GR
1113 if (data->kind == adt7461 || data->kind == tmp451)
1114 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1115 else if (data->kind == max6646)
1116 temp = temp_from_u8(data->temp8[index]);
1117 else
1118 temp = temp_from_s8(data->temp8[index]);
2d45771e 1119
eb1c8f43
GR
1120 /* +16 degrees offset for temp2 for the LM99 */
1121 if (data->kind == lm99 && index == 3)
1122 temp += 16000;
0c01b644 1123
eb1c8f43 1124 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1125}
1126
eb1c8f43 1127static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1128{
1de8b250 1129 struct i2c_client *client = data->client;
eb1c8f43 1130 int temp;
0c01b644
GR
1131 int err;
1132
eb1c8f43
GR
1133 if (data->kind == adt7461 || data->kind == tmp451)
1134 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1135 else if (data->kind == max6646)
1136 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1137 else
1138 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1139
eb1c8f43
GR
1140 data->temp_hyst = hyst_to_reg(temp - val);
1141 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1142 data->temp_hyst);
1143 return err;
0c01b644
GR
1144}
1145
eb1c8f43
GR
1146static const u8 lm90_temp_index[3] = {
1147 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1148};
1149
eb1c8f43
GR
1150static const u8 lm90_temp_min_index[3] = {
1151 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1152};
1153
eb1c8f43
GR
1154static const u8 lm90_temp_max_index[3] = {
1155 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1156};
1157
eb1c8f43
GR
1158static const u8 lm90_temp_crit_index[3] = {
1159 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1160};
1161
eb1c8f43
GR
1162static const u8 lm90_temp_emerg_index[3] = {
1163 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1164};
1165
eb1c8f43 1166static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1167static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43
GR
1168static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1169static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1170static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1171
eb1c8f43
GR
1172static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1173{
1174 struct lm90_data *data = dev_get_drvdata(dev);
1175 int err;
06e1c0a2 1176
eb1c8f43
GR
1177 mutex_lock(&data->update_lock);
1178 err = lm90_update_device(dev);
1179 mutex_unlock(&data->update_lock);
1180 if (err)
1181 return err;
06e1c0a2 1182
eb1c8f43
GR
1183 switch (attr) {
1184 case hwmon_temp_input:
1185 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1186 break;
1187 case hwmon_temp_min_alarm:
1188 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1189 break;
1190 case hwmon_temp_max_alarm:
1191 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1192 break;
1193 case hwmon_temp_crit_alarm:
1194 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1195 break;
1196 case hwmon_temp_emergency_alarm:
1197 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1198 break;
1199 case hwmon_temp_fault:
1200 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1201 break;
1202 case hwmon_temp_min:
1203 if (channel == 0)
1204 *val = lm90_get_temp8(data,
1205 lm90_temp_min_index[channel]);
1206 else
1207 *val = lm90_get_temp11(data,
1208 lm90_temp_min_index[channel]);
1209 break;
1210 case hwmon_temp_max:
1211 if (channel == 0)
1212 *val = lm90_get_temp8(data,
1213 lm90_temp_max_index[channel]);
1214 else
1215 *val = lm90_get_temp11(data,
1216 lm90_temp_max_index[channel]);
1217 break;
1218 case hwmon_temp_crit:
1219 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1220 break;
1221 case hwmon_temp_crit_hyst:
1222 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1223 break;
1224 case hwmon_temp_emergency:
1225 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1226 break;
1227 case hwmon_temp_emergency_hyst:
1228 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1229 break;
1230 case hwmon_temp_offset:
1231 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1232 break;
1233 default:
1234 return -EOPNOTSUPP;
1235 }
1236 return 0;
1237}
06e1c0a2 1238
eb1c8f43
GR
1239static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1240{
1241 struct lm90_data *data = dev_get_drvdata(dev);
1242 int err;
06e1c0a2 1243
eb1c8f43 1244 mutex_lock(&data->update_lock);
06e1c0a2 1245
eb1c8f43
GR
1246 err = lm90_update_device(dev);
1247 if (err)
1248 goto error;
1249
1250 switch (attr) {
1251 case hwmon_temp_min:
1252 if (channel == 0)
1253 err = lm90_set_temp8(data,
1254 lm90_temp_min_index[channel],
1255 val);
1256 else
1257 err = lm90_set_temp11(data,
1258 lm90_temp_min_index[channel],
1259 val);
1260 break;
1261 case hwmon_temp_max:
1262 if (channel == 0)
1263 err = lm90_set_temp8(data,
1264 lm90_temp_max_index[channel],
1265 val);
1266 else
1267 err = lm90_set_temp11(data,
1268 lm90_temp_max_index[channel],
1269 val);
1270 break;
1271 case hwmon_temp_crit:
1272 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1273 break;
1274 case hwmon_temp_crit_hyst:
1275 err = lm90_set_temphyst(data, val);
1276 break;
1277 case hwmon_temp_emergency:
1278 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1279 break;
1280 case hwmon_temp_offset:
1281 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1282 break;
1283 default:
1284 err = -EOPNOTSUPP;
1285 break;
1286 }
1287error:
1288 mutex_unlock(&data->update_lock);
1289
1290 return err;
1291}
1292
1293static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1294{
eb1c8f43
GR
1295 switch (attr) {
1296 case hwmon_temp_input:
1297 case hwmon_temp_min_alarm:
1298 case hwmon_temp_max_alarm:
1299 case hwmon_temp_crit_alarm:
1300 case hwmon_temp_emergency_alarm:
1301 case hwmon_temp_emergency_hyst:
1302 case hwmon_temp_fault:
3334851d 1303 return 0444;
eb1c8f43
GR
1304 case hwmon_temp_min:
1305 case hwmon_temp_max:
1306 case hwmon_temp_crit:
1307 case hwmon_temp_emergency:
1308 case hwmon_temp_offset:
3334851d 1309 return 0644;
eb1c8f43
GR
1310 case hwmon_temp_crit_hyst:
1311 if (channel == 0)
3334851d
GR
1312 return 0644;
1313 return 0444;
eb1c8f43
GR
1314 default:
1315 return 0;
1316 }
c3df5806
JD
1317}
1318
eb1c8f43 1319static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1320{
eb1c8f43 1321 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1322 int err;
1323
eb1c8f43
GR
1324 mutex_lock(&data->update_lock);
1325 err = lm90_update_device(dev);
1326 mutex_unlock(&data->update_lock);
1327 if (err)
11e57812 1328 return err;
c3df5806 1329
eb1c8f43
GR
1330 switch (attr) {
1331 case hwmon_chip_update_interval:
1332 *val = data->update_interval;
c3df5806 1333 break;
eb1c8f43
GR
1334 case hwmon_chip_alarms:
1335 *val = data->alarms;
c3df5806
JD
1336 break;
1337 default:
eb1c8f43 1338 return -EOPNOTSUPP;
c3df5806
JD
1339 }
1340
eb1c8f43 1341 return 0;
c3df5806
JD
1342}
1343
eb1c8f43
GR
1344static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1345{
1346 struct lm90_data *data = dev_get_drvdata(dev);
1347 struct i2c_client *client = data->client;
1348 int err;
c3df5806 1349
eb1c8f43
GR
1350 mutex_lock(&data->update_lock);
1351
1352 err = lm90_update_device(dev);
1353 if (err)
1354 goto error;
1355
1356 switch (attr) {
1357 case hwmon_chip_update_interval:
1358 err = lm90_set_convrate(client, data,
1359 clamp_val(val, 0, 100000));
1360 break;
1361 default:
1362 err = -EOPNOTSUPP;
1363 break;
1364 }
1365error:
1366 mutex_unlock(&data->update_lock);
1367
1368 return err;
1369}
1370
1371static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1372{
1373 switch (attr) {
1374 case hwmon_chip_update_interval:
3334851d 1375 return 0644;
eb1c8f43 1376 case hwmon_chip_alarms:
3334851d 1377 return 0444;
eb1c8f43
GR
1378 default:
1379 return 0;
1380 }
1381}
1382
1383static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1384 u32 attr, int channel, long *val)
1385{
1386 switch (type) {
1387 case hwmon_chip:
1388 return lm90_chip_read(dev, attr, channel, val);
1389 case hwmon_temp:
1390 return lm90_temp_read(dev, attr, channel, val);
1391 default:
1392 return -EOPNOTSUPP;
1393 }
1394}
1395
1396static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1397 u32 attr, int channel, long val)
1398{
1399 switch (type) {
1400 case hwmon_chip:
1401 return lm90_chip_write(dev, attr, channel, val);
1402 case hwmon_temp:
1403 return lm90_temp_write(dev, attr, channel, val);
1404 default:
1405 return -EOPNOTSUPP;
1406 }
1407}
1408
1409static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1410 u32 attr, int channel)
1411{
1412 switch (type) {
1413 case hwmon_chip:
1414 return lm90_chip_is_visible(data, attr, channel);
1415 case hwmon_temp:
1416 return lm90_temp_is_visible(data, attr, channel);
1417 default:
1418 return 0;
1419 }
1420}
1da177e4 1421
15b66ab6 1422/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1423static int lm90_detect(struct i2c_client *client,
15b66ab6 1424 struct i2c_board_info *info)
8256fe0f 1425{
b2589ab0
JD
1426 struct i2c_adapter *adapter = client->adapter;
1427 int address = client->addr;
15b66ab6 1428 const char *name = NULL;
b2589ab0 1429 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1430
15b66ab6
GR
1431 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1432 return -ENODEV;
1da177e4 1433
8f2fa77c 1434 /* detection and identification */
b2589ab0
JD
1435 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1436 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1437 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1438 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1439 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1440 return -ENODEV;
1441
f90be42f 1442 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
b2589ab0
JD
1443 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1444 if (config2 < 0)
9b0e8526 1445 return -ENODEV;
f90be42f 1446 } else
b2589ab0 1447 config2 = 0; /* Make compiler happy */
8f2fa77c 1448
f90be42f
JD
1449 if ((address == 0x4C || address == 0x4D)
1450 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1451 if ((config1 & 0x2A) == 0x00
1452 && (config2 & 0xF8) == 0x00
1453 && convrate <= 0x09) {
8f2fa77c
JD
1454 if (address == 0x4C
1455 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1456 name = "lm90";
32c82a93 1457 } else
8f2fa77c
JD
1458 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1459 name = "lm99";
1460 dev_info(&adapter->dev,
1461 "Assuming LM99 chip at 0x%02x\n",
1462 address);
1463 dev_info(&adapter->dev,
1464 "If it is an LM89, instantiate it "
1465 "with the new_device sysfs "
1466 "interface\n");
271dabf5 1467 } else
8f2fa77c
JD
1468 if (address == 0x4C
1469 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1470 name = "lm86";
1da177e4
LT
1471 }
1472 }
8f2fa77c
JD
1473 } else
1474 if ((address == 0x4C || address == 0x4D)
1475 && man_id == 0x41) { /* Analog Devices */
1476 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1477 && (config1 & 0x3F) == 0x00
1478 && convrate <= 0x0A) {
8f2fa77c 1479 name = "adm1032";
f36ffeab
GR
1480 /*
1481 * The ADM1032 supports PEC, but only if combined
1482 * transactions are not used.
1483 */
8f2fa77c
JD
1484 if (i2c_check_functionality(adapter,
1485 I2C_FUNC_SMBUS_BYTE))
1486 info->flags |= I2C_CLIENT_PEC;
1487 } else
1488 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1489 && (config1 & 0x1B) == 0x00
1490 && convrate <= 0x0A) {
8f2fa77c 1491 name = "adt7461";
5a4e5e6a
GR
1492 } else
1493 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1494 && (config1 & 0x1B) == 0x00
1495 && convrate <= 0x0A) {
5a4e5e6a 1496 name = "adt7461a";
8f2fa77c
JD
1497 }
1498 } else
1499 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1500 int emerg, emerg2, status2;
06e1c0a2
GR
1501
1502 /*
1503 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1504 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1505 * exists, both readings will reflect the same value. Otherwise,
1506 * the readings will be different.
1507 */
b2589ab0
JD
1508 emerg = i2c_smbus_read_byte_data(client,
1509 MAX6659_REG_R_REMOTE_EMERG);
1510 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1511 LM90_REG_R_MAN_ID);
b2589ab0 1512 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1513 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1514 status2 = i2c_smbus_read_byte_data(client,
1515 MAX6696_REG_R_STATUS2);
1516 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1517 return -ENODEV;
1518
8f2fa77c
JD
1519 /*
1520 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1521 * register. Reading from that address will return the last
1522 * read value, which in our case is those of the man_id
1523 * register. Likewise, the config1 register seems to lack a
1524 * low nibble, so the value will be those of the previous
1525 * read, so in our case those of the man_id register.
13c84951
GR
1526 * MAX6659 has a third set of upper temperature limit registers.
1527 * Those registers also return values on MAX6657 and MAX6658,
1528 * thus the only way to detect MAX6659 is by its address.
1529 * For this reason it will be mis-detected as MAX6657 if its
1530 * address is 0x4C.
8f2fa77c
JD
1531 */
1532 if (chip_id == man_id
13c84951 1533 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1534 && (config1 & 0x1F) == (man_id & 0x0F)
1535 && convrate <= 0x09) {
13c84951
GR
1536 if (address == 0x4C)
1537 name = "max6657";
1538 else
1539 name = "max6659";
8f2fa77c 1540 } else
06e1c0a2
GR
1541 /*
1542 * Even though MAX6695 and MAX6696 do not have a chip ID
1543 * register, reading it returns 0x01. Bit 4 of the config1
1544 * register is unused and should return zero when read. Bit 0 of
1545 * the status2 register is unused and should return zero when
1546 * read.
1547 *
1548 * MAX6695 and MAX6696 have an additional set of temperature
1549 * limit registers. We can detect those chips by checking if
1550 * one of those registers exists.
1551 */
1552 if (chip_id == 0x01
b2589ab0
JD
1553 && (config1 & 0x10) == 0x00
1554 && (status2 & 0x01) == 0x00
1555 && emerg == emerg2
1556 && convrate <= 0x07) {
06e1c0a2
GR
1557 name = "max6696";
1558 } else
8f2fa77c
JD
1559 /*
1560 * The chip_id register of the MAX6680 and MAX6681 holds the
1561 * revision of the chip. The lowest bit of the config1 register
1562 * is unused and should return zero when read, so should the
1563 * second to last bit of config1 (software reset).
1564 */
1565 if (chip_id == 0x01
b2589ab0
JD
1566 && (config1 & 0x03) == 0x00
1567 && convrate <= 0x07) {
8f2fa77c
JD
1568 name = "max6680";
1569 } else
1570 /*
1571 * The chip_id register of the MAX6646/6647/6649 holds the
1572 * revision of the chip. The lowest 6 bits of the config1
1573 * register are unused and should return zero when read.
1574 */
1575 if (chip_id == 0x59
b2589ab0
JD
1576 && (config1 & 0x3f) == 0x00
1577 && convrate <= 0x07) {
8f2fa77c 1578 name = "max6646";
229d495d
JL
1579 } else
1580 /*
1581 * The chip_id of the MAX6654 holds the revision of the chip.
1582 * The lowest 3 bits of the config1 register are unused and
1583 * should return zero when read.
1584 */
1585 if (chip_id == 0x08
1586 && (config1 & 0x07) == 0x00
1587 && convrate <= 0x07) {
1588 name = "max6654";
1da177e4 1589 }
6771ea1f
JD
1590 } else
1591 if (address == 0x4C
1592 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1593 if ((config1 & 0x2A) == 0x00
1594 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1595 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1596 && convrate <= 0x09) {
c4f99a2b
JD
1597 name = "w83l771";
1598 } else
1599 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1600 && convrate <= 0x08) {
c4f99a2b
JD
1601 name = "w83l771";
1602 }
6771ea1f 1603 }
2ef01793 1604 } else
6d101c58
JD
1605 if (address >= 0x48 && address <= 0x4F
1606 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1607 if (chip_id == 0x00
b2589ab0
JD
1608 && (config1 & 0x2A) == 0x00
1609 && (config2 & 0xFE) == 0x00
1610 && convrate <= 0x09) {
2ef01793
SD
1611 name = "sa56004";
1612 }
ae544f64
GR
1613 } else
1614 if ((address == 0x4C || address == 0x4D)
1615 && man_id == 0x47) { /* GMT */
1616 if (chip_id == 0x01 /* G781 */
1617 && (config1 & 0x3F) == 0x00
1618 && convrate <= 0x08)
1619 name = "g781";
1daaceb2
WN
1620 } else
1621 if (address == 0x4C
1622 && man_id == 0x55) { /* Texas Instruments */
1623 int local_ext;
1624
1625 local_ext = i2c_smbus_read_byte_data(client,
1626 TMP451_REG_R_LOCAL_TEMPL);
1627
1628 if (chip_id == 0x00 /* TMP451 */
1629 && (config1 & 0x1B) == 0x00
1630 && convrate <= 0x09
1631 && (local_ext & 0x0F) == 0x00)
1632 name = "tmp451";
1da177e4
LT
1633 }
1634
8f2fa77c
JD
1635 if (!name) { /* identification failed */
1636 dev_dbg(&adapter->dev,
1637 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1638 "chip_id=0x%02X)\n", address, man_id, chip_id);
1639 return -ENODEV;
1da177e4 1640 }
8f2fa77c 1641
9b0e8526
JD
1642 strlcpy(info->type, name, I2C_NAME_SIZE);
1643
1644 return 0;
1645}
1646
1f17a444 1647static void lm90_restore_conf(void *_data)
f7001bb0 1648{
1f17a444
GR
1649 struct lm90_data *data = _data;
1650 struct i2c_client *client = data->client;
1651
f7001bb0 1652 /* Restore initial configuration */
7a1d220c 1653 lm90_write_convrate(data, data->convrate_orig);
f7001bb0
GR
1654 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1655 data->config_orig);
1656}
1657
37ad04d7 1658static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1659{
37ad04d7 1660 int config, convrate;
15b66ab6 1661
37ad04d7
GR
1662 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1663 if (convrate < 0)
1664 return convrate;
0c01b644
GR
1665 data->convrate_orig = convrate;
1666
15b66ab6
GR
1667 /*
1668 * Start the conversions.
1669 */
37ad04d7
GR
1670 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1671 if (config < 0)
1672 return config;
15b66ab6 1673 data->config_orig = config;
b849e5d1 1674 data->config = config;
15b66ab6 1675
62456189
BY
1676 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1677
15b66ab6 1678 /* Check Temperature Range Select */
1daaceb2 1679 if (data->kind == adt7461 || data->kind == tmp451) {
15b66ab6
GR
1680 if (config & 0x04)
1681 data->flags |= LM90_FLAG_ADT7461_EXT;
1682 }
1683
1684 /*
1685 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1686 * 0.125 degree resolution) and range (0x08, extend range
1687 * to -64 degree) mode for the remote temperature sensor.
1688 */
1689 if (data->kind == max6680)
1690 config |= 0x18;
1691
229d495d
JL
1692 /*
1693 * Put MAX6654 into extended range (0x20, extend minimum range from
1694 * 0 degrees to -64 degrees). Note that extended resolution is not
1695 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
1696 * slower, which is intentionally not done by default.
1697 */
1698 if (data->kind == max6654)
1699 config |= 0x20;
1700
15b66ab6
GR
1701 /*
1702 * Select external channel 0 for max6695/96
1703 */
1704 if (data->kind == max6696)
1705 config &= ~0x08;
1706
2abdc357
DO
1707 /*
1708 * Interrupt is enabled by default on reset, but it may be disabled
1709 * by bootloader, unmask it.
1710 */
1711 if (client->irq)
1712 config &= ~0x80;
1713
15b66ab6 1714 config &= 0xBF; /* run */
7a1d220c 1715 lm90_update_confreg(data, config);
1f17a444 1716
c5fcf01b 1717 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1718}
1719
072de496
WN
1720static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1721{
1722 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1723 int st, st2 = 0;
072de496 1724
37ad04d7
GR
1725 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1726 if (st < 0)
1727 return false;
072de496 1728
37ad04d7
GR
1729 if (data->kind == max6696) {
1730 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1731 if (st2 < 0)
1732 return false;
1733 }
072de496
WN
1734
1735 *status = st | (st2 << 8);
1736
1737 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1738 return false;
1739
1740 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1741 (st2 & MAX6696_STATUS2_LOT2))
94dbd23e
DO
1742 dev_dbg(&client->dev,
1743 "temp%d out of range, please check!\n", 1);
072de496
WN
1744 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1745 (st2 & MAX6696_STATUS2_ROT2))
94dbd23e
DO
1746 dev_dbg(&client->dev,
1747 "temp%d out of range, please check!\n", 2);
072de496 1748 if (st & LM90_STATUS_ROPEN)
94dbd23e
DO
1749 dev_dbg(&client->dev,
1750 "temp%d diode open, please check!\n", 2);
072de496
WN
1751 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1752 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
94dbd23e
DO
1753 dev_dbg(&client->dev,
1754 "temp%d out of range, please check!\n", 3);
072de496 1755 if (st2 & MAX6696_STATUS2_R2OPEN)
94dbd23e
DO
1756 dev_dbg(&client->dev,
1757 "temp%d diode open, please check!\n", 3);
1758
1759 if (st & LM90_STATUS_LLOW)
1760 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1761 hwmon_temp_min, 0);
1762 if (st & LM90_STATUS_RLOW)
1763 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1764 hwmon_temp_min, 1);
1765 if (st2 & MAX6696_STATUS2_R2LOW)
1766 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1767 hwmon_temp_min, 2);
1768 if (st & LM90_STATUS_LHIGH)
1769 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1770 hwmon_temp_max, 0);
1771 if (st & LM90_STATUS_RHIGH)
1772 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1773 hwmon_temp_max, 1);
1774 if (st2 & MAX6696_STATUS2_R2HIGH)
1775 hwmon_notify_event(data->hwmon_dev, hwmon_temp,
1776 hwmon_temp_max, 2);
072de496
WN
1777
1778 return true;
1779}
1780
109b1283
WN
1781static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1782{
1783 struct i2c_client *client = dev_id;
1784 u16 status;
1785
1786 if (lm90_is_tripped(client, &status))
1787 return IRQ_HANDLED;
1788 else
1789 return IRQ_NONE;
1790}
1791
1f17a444
GR
1792static void lm90_remove_pec(void *dev)
1793{
1794 device_remove_file(dev, &dev_attr_pec);
1795}
1796
1797static void lm90_regulator_disable(void *regulator)
1798{
1799 regulator_disable(regulator);
1800}
1801
eb1c8f43
GR
1802
1803static const struct hwmon_ops lm90_ops = {
1804 .is_visible = lm90_is_visible,
1805 .read = lm90_read,
1806 .write = lm90_write,
1807};
1808
67487038 1809static int lm90_probe(struct i2c_client *client)
9b0e8526 1810{
b2589ab0 1811 struct device *dev = &client->dev;
e67776cc 1812 struct i2c_adapter *adapter = client->adapter;
eb1c8f43 1813 struct hwmon_channel_info *info;
3e0f964f 1814 struct regulator *regulator;
6e5f62b9 1815 struct device *hwmon_dev;
eb1c8f43 1816 struct lm90_data *data;
9b0e8526 1817 int err;
1da177e4 1818
3e0f964f
WN
1819 regulator = devm_regulator_get(dev, "vcc");
1820 if (IS_ERR(regulator))
1821 return PTR_ERR(regulator);
1822
1823 err = regulator_enable(regulator);
1824 if (err < 0) {
d89fa686 1825 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1826 return err;
1827 }
1828
c5fcf01b
GR
1829 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1830 if (err)
1831 return err;
1f17a444 1832
d89fa686 1833 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1834 if (!data)
1835 return -ENOMEM;
1836
1de8b250 1837 data->client = client;
b2589ab0 1838 i2c_set_clientdata(client, data);
9a61bf63 1839 mutex_init(&data->update_lock);
1da177e4 1840
9b0e8526 1841 /* Set the device type */
df8d57bf
JMC
1842 if (client->dev.of_node)
1843 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1844 else
67487038 1845 data->kind = i2c_match_id(lm90_id, client)->driver_data;
9b0e8526
JD
1846 if (data->kind == adm1032) {
1847 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1848 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1849 }
1da177e4 1850
f36ffeab
GR
1851 /*
1852 * Different devices have different alarm bits triggering the
1853 * ALERT# output
1854 */
4667bcb8 1855 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1856
88073bb1 1857 /* Set chip capabilities */
4667bcb8 1858 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1859
1860 data->chip.ops = &lm90_ops;
1861 data->chip.info = data->info;
1862
a4d41e67
GR
1863 data->info[0] = HWMON_CHANNEL_INFO(chip,
1864 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
1865 data->info[1] = &data->temp_info;
1866
1867 info = &data->temp_info;
1868 info->type = hwmon_temp;
1869 info->config = data->channel_config;
1870
1871 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1872 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1873 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1874 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1875 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1876 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1877
1878 if (data->flags & LM90_HAVE_OFFSET)
1879 data->channel_config[1] |= HWMON_T_OFFSET;
1880
1881 if (data->flags & LM90_HAVE_EMERGENCY) {
1882 data->channel_config[0] |= HWMON_T_EMERGENCY |
1883 HWMON_T_EMERGENCY_HYST;
1884 data->channel_config[1] |= HWMON_T_EMERGENCY |
1885 HWMON_T_EMERGENCY_HYST;
1886 }
1887
1888 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1889 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1890 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1891 }
1892
1893 if (data->flags & LM90_HAVE_TEMP3) {
1894 data->channel_config[2] = HWMON_T_INPUT |
1895 HWMON_T_MIN | HWMON_T_MAX |
1896 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1897 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1898 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1899 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1900 HWMON_T_FAULT;
1901 }
1902
a095f687 1903 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1904
0c01b644
GR
1905 /* Set maximum conversion rate */
1906 data->max_convrate = lm90_params[data->kind].max_convrate;
1907
1da177e4 1908 /* Initialize the LM90 chip */
37ad04d7
GR
1909 err = lm90_init_client(client, data);
1910 if (err < 0) {
1911 dev_err(dev, "Failed to initialize device\n");
1912 return err;
1913 }
1da177e4 1914
eb1c8f43
GR
1915 /*
1916 * The 'pec' attribute is attached to the i2c device and thus created
1917 * separately.
1918 */
b2589ab0
JD
1919 if (client->flags & I2C_CLIENT_PEC) {
1920 err = device_create_file(dev, &dev_attr_pec);
11e57812 1921 if (err)
1f17a444 1922 return err;
c5fcf01b
GR
1923 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1924 if (err)
1925 return err;
06e1c0a2 1926 }
0e39e01c 1927
eb1c8f43
GR
1928 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1929 data, &data->chip,
1930 NULL);
6e5f62b9
GR
1931 if (IS_ERR(hwmon_dev))
1932 return PTR_ERR(hwmon_dev);
943b0830 1933
94dbd23e
DO
1934 data->hwmon_dev = hwmon_dev;
1935
109b1283
WN
1936 if (client->irq) {
1937 dev_dbg(dev, "IRQ: %d\n", client->irq);
1938 err = devm_request_threaded_irq(dev, client->irq,
1939 NULL, lm90_irq_thread,
d97fb837 1940 IRQF_ONESHOT, "lm90", client);
109b1283
WN
1941 if (err < 0) {
1942 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1943 return err;
109b1283
WN
1944 }
1945 }
1946
1da177e4
LT
1947 return 0;
1948}
1949
b4f21054
BT
1950static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1951 unsigned int flag)
53de3342 1952{
072de496 1953 u16 alarms;
06e1c0a2 1954
b4f21054
BT
1955 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1956 return;
1957
072de496 1958 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
1959 /*
1960 * Disable ALERT# output, because these chips don't implement
1961 * SMBus alert correctly; they should only hold the alert line
1962 * low briefly.
1963 */
072de496
WN
1964 struct lm90_data *data = i2c_get_clientdata(client);
1965
37ad04d7
GR
1966 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1967 (alarms & data->alert_alarms)) {
53de3342 1968 dev_dbg(&client->dev, "Disabling ALERT#\n");
7a1d220c 1969 lm90_update_confreg(data, data->config | 0x80);
53de3342 1970 }
072de496 1971 } else {
94dbd23e 1972 dev_dbg(&client->dev, "Everything OK\n");
53de3342
JD
1973 }
1974}
1975
15b66ab6
GR
1976static struct i2c_driver lm90_driver = {
1977 .class = I2C_CLASS_HWMON,
1978 .driver = {
1979 .name = "lm90",
df8d57bf 1980 .of_match_table = of_match_ptr(lm90_of_match),
15b66ab6 1981 },
67487038 1982 .probe_new = lm90_probe,
15b66ab6
GR
1983 .alert = lm90_alert,
1984 .id_table = lm90_id,
1985 .detect = lm90_detect,
1986 .address_list = normal_i2c,
1987};
1da177e4 1988
f0967eea 1989module_i2c_driver(lm90_driver);
1da177e4 1990
7c81c60f 1991MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
1992MODULE_DESCRIPTION("LM90/ADM1032 driver");
1993MODULE_LICENSE("GPL");