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74ba9207 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4
LT
2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
7c81c60f 5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
1da177e4
LT
6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
a874a10c 10 * temperature) and a 3-4 deg accuracy.
1da177e4
LT
11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
97ae60bb 16 * degrees, which allows for higher temperatures measurement.
44bbe87e 17 * Note that there is no way to differentiate between both chips.
97ae60bb 18 * When device is auto-detected, the driver will assume an LM99.
1da177e4
LT
19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
1da177e4
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23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
a874a10c
JD
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
1da177e4
LT
28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
a874a10c 30 * chips made by Maxim. These chips are similar to the LM86.
44bbe87e 31 * Note that there is no easy way to differentiate between the three
6948708d
GR
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
1da177e4 37 *
229d495d
JL
38 * This driver also supports the MAX6654 chip made by Maxim. This chip can
39 * be at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is
40 * otherwise similar to MAX6657/MAX6658/MAX6659. Extended range is available
41 * by setting the configuration register accordingly, and is done during
42 * initialization. Extended precision is only available at conversion rates
43 * of 1 Hz and slower. Note that extended precision is not enabled by
44 * default, as this driver initializes all chips to 2 Hz by design.
45 *
1a51e068
DW
46 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
47 * MAX6692 chips made by Maxim. These are again similar to the LM86,
48 * but they use unsigned temperature values and can report temperatures
49 * from 0 to 145 degrees.
271dabf5 50 *
32c82a93
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51 * This driver also supports the MAX6680 and MAX6681, two other sensor
52 * chips made by Maxim. These are quite similar to the other Maxim
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53 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
54 * be treated identically.
32c82a93 55 *
06e1c0a2
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56 * This driver also supports the MAX6695 and MAX6696, two other sensor
57 * chips made by Maxim. These are also quite similar to other Maxim
58 * chips, but support three temperature sensors instead of two. MAX6695
59 * and MAX6696 only differ in the pinout so they can be treated identically.
60 *
5a4e5e6a
GR
61 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
62 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
63 * and extended mode. They are mostly compatible with LM90 except for a data
64 * format difference for the temperature value registers.
1da177e4 65 *
2ef01793
SD
66 * This driver also supports the SA56004 from Philips. This device is
67 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
68 *
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69 * This driver also supports the G781 from GMT. This device is compatible
70 * with the ADM1032.
71 *
1daaceb2
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72 * This driver also supports TMP451 from Texas Instruments. This device is
73 * supported in both compatibility and extended mode. It's mostly compatible
74 * with ADT7461 except for local temperature low byte register and max
75 * conversion rate.
76 *
1da177e4
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77 * Since the LM90 was the first chipset supported by this driver, most
78 * comments will refer to this chipset, but are actually general and
79 * concern all supported chipsets, unless mentioned otherwise.
1da177e4
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80 */
81
1da177e4
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82#include <linux/module.h>
83#include <linux/init.h>
84#include <linux/slab.h>
85#include <linux/jiffies.h>
86#include <linux/i2c.h>
943b0830
MH
87#include <linux/hwmon.h>
88#include <linux/err.h>
9a61bf63 89#include <linux/mutex.h>
df8d57bf 90#include <linux/of_device.h>
0e39e01c 91#include <linux/sysfs.h>
109b1283 92#include <linux/interrupt.h>
3e0f964f 93#include <linux/regulator/consumer.h>
1da177e4
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94
95/*
96 * Addresses to scan
97 * Address is fully defined internally and cannot be changed except for
32c82a93 98 * MAX6659, MAX6680 and MAX6681.
5a4e5e6a
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99 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
100 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
101 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
102 * have address 0x4d.
271dabf5 103 * MAX6647 has address 0x4e.
13c84951 104 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
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105 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
106 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
2ef01793 107 * SA56004 can have address 0x48 through 0x4F.
1da177e4
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108 */
109
25e9c86d 110static const unsigned short normal_i2c[] = {
2ef01793
SD
111 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
112 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
1da177e4 113
13c84951 114enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
229d495d 115 max6646, w83l771, max6696, sa56004, g781, tmp451, max6654 };
1da177e4
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116
117/*
118 * The LM90 registers
119 */
120
121#define LM90_REG_R_MAN_ID 0xFE
122#define LM90_REG_R_CHIP_ID 0xFF
123#define LM90_REG_R_CONFIG1 0x03
124#define LM90_REG_W_CONFIG1 0x09
125#define LM90_REG_R_CONFIG2 0xBF
126#define LM90_REG_W_CONFIG2 0xBF
127#define LM90_REG_R_CONVRATE 0x04
128#define LM90_REG_W_CONVRATE 0x0A
129#define LM90_REG_R_STATUS 0x02
130#define LM90_REG_R_LOCAL_TEMP 0x00
131#define LM90_REG_R_LOCAL_HIGH 0x05
132#define LM90_REG_W_LOCAL_HIGH 0x0B
133#define LM90_REG_R_LOCAL_LOW 0x06
134#define LM90_REG_W_LOCAL_LOW 0x0C
135#define LM90_REG_R_LOCAL_CRIT 0x20
136#define LM90_REG_W_LOCAL_CRIT 0x20
137#define LM90_REG_R_REMOTE_TEMPH 0x01
138#define LM90_REG_R_REMOTE_TEMPL 0x10
139#define LM90_REG_R_REMOTE_OFFSH 0x11
140#define LM90_REG_W_REMOTE_OFFSH 0x11
141#define LM90_REG_R_REMOTE_OFFSL 0x12
142#define LM90_REG_W_REMOTE_OFFSL 0x12
143#define LM90_REG_R_REMOTE_HIGHH 0x07
144#define LM90_REG_W_REMOTE_HIGHH 0x0D
145#define LM90_REG_R_REMOTE_HIGHL 0x13
146#define LM90_REG_W_REMOTE_HIGHL 0x13
147#define LM90_REG_R_REMOTE_LOWH 0x08
148#define LM90_REG_W_REMOTE_LOWH 0x0E
149#define LM90_REG_R_REMOTE_LOWL 0x14
150#define LM90_REG_W_REMOTE_LOWL 0x14
151#define LM90_REG_R_REMOTE_CRIT 0x19
152#define LM90_REG_W_REMOTE_CRIT 0x19
153#define LM90_REG_R_TCRIT_HYST 0x21
154#define LM90_REG_W_TCRIT_HYST 0x21
155
229d495d 156/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
f65e1708
JD
157
158#define MAX6657_REG_R_LOCAL_TEMPL 0x11
06e1c0a2 159#define MAX6696_REG_R_STATUS2 0x12
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160#define MAX6659_REG_R_REMOTE_EMERG 0x16
161#define MAX6659_REG_W_REMOTE_EMERG 0x16
162#define MAX6659_REG_R_LOCAL_EMERG 0x17
163#define MAX6659_REG_W_LOCAL_EMERG 0x17
f65e1708 164
2ef01793
SD
165/* SA56004 registers */
166
167#define SA56004_REG_R_LOCAL_TEMPL 0x22
168
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169#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
170
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171/* TMP451 registers */
172#define TMP451_REG_R_LOCAL_TEMPL 0x15
173
23b2d477
NC
174/*
175 * Device flags
176 */
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177#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
178/* Device features */
179#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
88073bb1 180#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
6948708d 181#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
06e1c0a2
GR
182#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
183#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
1179324c 184#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
62456189 185#define LM90_PAUSE_FOR_CONFIG (1 << 8) /* Pause conversion for config */
23b2d477 186
072de496
WN
187/* LM90 status */
188#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
189#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
190#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
191#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
192#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
193#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
194#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
195
196#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
197#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
198#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
199#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
200#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
201#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
202#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
203
1da177e4
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204/*
205 * Driver data (common to all clients)
206 */
207
9b0e8526
JD
208static const struct i2c_device_id lm90_id[] = {
209 { "adm1032", adm1032 },
210 { "adt7461", adt7461 },
5a4e5e6a 211 { "adt7461a", adt7461 },
ae544f64 212 { "g781", g781 },
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JD
213 { "lm90", lm90 },
214 { "lm86", lm86 },
97ae60bb
JD
215 { "lm89", lm86 },
216 { "lm99", lm99 },
271dabf5
BH
217 { "max6646", max6646 },
218 { "max6647", max6646 },
219 { "max6649", max6646 },
229d495d 220 { "max6654", max6654 },
9b0e8526
JD
221 { "max6657", max6657 },
222 { "max6658", max6657 },
13c84951 223 { "max6659", max6659 },
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224 { "max6680", max6680 },
225 { "max6681", max6680 },
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GR
226 { "max6695", max6696 },
227 { "max6696", max6696 },
5a4e5e6a 228 { "nct1008", adt7461 },
6771ea1f 229 { "w83l771", w83l771 },
2ef01793 230 { "sa56004", sa56004 },
1daaceb2 231 { "tmp451", tmp451 },
9b0e8526
JD
232 { }
233};
234MODULE_DEVICE_TABLE(i2c, lm90_id);
235
787afaa3 236static const struct of_device_id __maybe_unused lm90_of_match[] = {
df8d57bf
JMC
237 {
238 .compatible = "adi,adm1032",
239 .data = (void *)adm1032
240 },
241 {
242 .compatible = "adi,adt7461",
243 .data = (void *)adt7461
244 },
245 {
246 .compatible = "adi,adt7461a",
247 .data = (void *)adt7461
248 },
249 {
250 .compatible = "gmt,g781",
251 .data = (void *)g781
252 },
253 {
254 .compatible = "national,lm90",
255 .data = (void *)lm90
256 },
257 {
258 .compatible = "national,lm86",
259 .data = (void *)lm86
260 },
261 {
262 .compatible = "national,lm89",
263 .data = (void *)lm86
264 },
265 {
266 .compatible = "national,lm99",
267 .data = (void *)lm99
268 },
269 {
270 .compatible = "dallas,max6646",
271 .data = (void *)max6646
272 },
273 {
274 .compatible = "dallas,max6647",
275 .data = (void *)max6646
276 },
277 {
278 .compatible = "dallas,max6649",
279 .data = (void *)max6646
280 },
229d495d
JL
281 {
282 .compatible = "dallas,max6654",
283 .data = (void *)max6654
284 },
df8d57bf
JMC
285 {
286 .compatible = "dallas,max6657",
287 .data = (void *)max6657
288 },
289 {
290 .compatible = "dallas,max6658",
291 .data = (void *)max6657
292 },
293 {
294 .compatible = "dallas,max6659",
295 .data = (void *)max6659
296 },
297 {
298 .compatible = "dallas,max6680",
299 .data = (void *)max6680
300 },
301 {
302 .compatible = "dallas,max6681",
303 .data = (void *)max6680
304 },
305 {
306 .compatible = "dallas,max6695",
307 .data = (void *)max6696
308 },
309 {
310 .compatible = "dallas,max6696",
311 .data = (void *)max6696
312 },
313 {
314 .compatible = "onnn,nct1008",
315 .data = (void *)adt7461
316 },
317 {
318 .compatible = "winbond,w83l771",
319 .data = (void *)w83l771
320 },
321 {
322 .compatible = "nxp,sa56004",
323 .data = (void *)sa56004
324 },
325 {
326 .compatible = "ti,tmp451",
327 .data = (void *)tmp451
328 },
329 { },
330};
331MODULE_DEVICE_TABLE(of, lm90_of_match);
332
4667bcb8
GR
333/*
334 * chip type specific parameters
335 */
336struct lm90_params {
337 u32 flags; /* Capabilities */
338 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
339 /* Upper 8 bits for max6695/96 */
0c01b644 340 u8 max_convrate; /* Maximum conversion rate register value */
a095f687 341 u8 reg_local_ext; /* Extended local temp register (optional) */
4667bcb8
GR
342};
343
344static const struct lm90_params lm90_params[] = {
345 [adm1032] = {
1179324c
GR
346 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
347 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 348 .alert_alarms = 0x7c,
0c01b644 349 .max_convrate = 10,
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GR
350 },
351 [adt7461] = {
1179324c
GR
352 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
353 | LM90_HAVE_BROKEN_ALERT,
4667bcb8 354 .alert_alarms = 0x7c,
0c01b644 355 .max_convrate = 10,
4667bcb8 356 },
ae544f64
GR
357 [g781] = {
358 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
359 | LM90_HAVE_BROKEN_ALERT,
360 .alert_alarms = 0x7c,
361 .max_convrate = 8,
362 },
4667bcb8
GR
363 [lm86] = {
364 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
365 .alert_alarms = 0x7b,
0c01b644 366 .max_convrate = 9,
4667bcb8
GR
367 },
368 [lm90] = {
369 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
370 .alert_alarms = 0x7b,
0c01b644 371 .max_convrate = 9,
4667bcb8
GR
372 },
373 [lm99] = {
374 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
375 .alert_alarms = 0x7b,
0c01b644 376 .max_convrate = 9,
4667bcb8
GR
377 },
378 [max6646] = {
4667bcb8 379 .alert_alarms = 0x7c,
0c01b644 380 .max_convrate = 6,
2ef01793 381 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8 382 },
229d495d
JL
383 [max6654] = {
384 .alert_alarms = 0x7c,
385 .max_convrate = 7,
386 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
387 },
4667bcb8 388 [max6657] = {
62456189 389 .flags = LM90_PAUSE_FOR_CONFIG,
4667bcb8 390 .alert_alarms = 0x7c,
0c01b644 391 .max_convrate = 8,
2ef01793 392 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
393 },
394 [max6659] = {
a095f687 395 .flags = LM90_HAVE_EMERGENCY,
4667bcb8 396 .alert_alarms = 0x7c,
0c01b644 397 .max_convrate = 8,
2ef01793 398 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
399 },
400 [max6680] = {
401 .flags = LM90_HAVE_OFFSET,
402 .alert_alarms = 0x7c,
0c01b644 403 .max_convrate = 7,
4667bcb8
GR
404 },
405 [max6696] = {
a095f687 406 .flags = LM90_HAVE_EMERGENCY
4667bcb8 407 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
e41fae2b 408 .alert_alarms = 0x1c7c,
0c01b644 409 .max_convrate = 6,
2ef01793 410 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
4667bcb8
GR
411 },
412 [w83l771] = {
413 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
414 .alert_alarms = 0x7c,
0c01b644 415 .max_convrate = 8,
4667bcb8 416 },
2ef01793 417 [sa56004] = {
a095f687 418 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
2ef01793
SD
419 .alert_alarms = 0x7b,
420 .max_convrate = 9,
421 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
422 },
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WN
423 [tmp451] = {
424 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
425 | LM90_HAVE_BROKEN_ALERT,
426 .alert_alarms = 0x7c,
427 .max_convrate = 9,
428 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
eb1c8f43 429 },
4667bcb8
GR
430};
431
40465d94
WN
432/*
433 * TEMP8 register index
434 */
435enum lm90_temp8_reg_index {
436 LOCAL_LOW = 0,
437 LOCAL_HIGH,
438 LOCAL_CRIT,
439 REMOTE_CRIT,
440 LOCAL_EMERG, /* max6659 and max6695/96 */
441 REMOTE_EMERG, /* max6659 and max6695/96 */
442 REMOTE2_CRIT, /* max6695/96 only */
443 REMOTE2_EMERG, /* max6695/96 only */
444 TEMP8_REG_NUM
445};
446
447/*
448 * TEMP11 register index
449 */
450enum lm90_temp11_reg_index {
451 REMOTE_TEMP = 0,
452 REMOTE_LOW,
453 REMOTE_HIGH,
454 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
455 LOCAL_TEMP,
456 REMOTE2_TEMP, /* max6695/96 only */
457 REMOTE2_LOW, /* max6695/96 only */
458 REMOTE2_HIGH, /* max6695/96 only */
459 TEMP11_REG_NUM
460};
461
1da177e4
LT
462/*
463 * Client data (each client gets its own)
464 */
465
466struct lm90_data {
1de8b250 467 struct i2c_client *client;
eb1c8f43
GR
468 u32 channel_config[4];
469 struct hwmon_channel_info temp_info;
470 const struct hwmon_channel_info *info[3];
471 struct hwmon_chip_info chip;
9a61bf63 472 struct mutex update_lock;
2f83ab77 473 bool valid; /* true if register values are valid */
1da177e4
LT
474 unsigned long last_updated; /* in jiffies */
475 int kind;
4667bcb8 476 u32 flags;
1da177e4 477
38bab98a 478 unsigned int update_interval; /* in milliseconds */
0c01b644 479
b849e5d1 480 u8 config; /* Current configuration register value */
95238364 481 u8 config_orig; /* Original configuration register value */
0c01b644 482 u8 convrate_orig; /* Original conversion rate register value */
06e1c0a2
GR
483 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
484 /* Upper 8 bits for max6695/96 */
0c01b644 485 u8 max_convrate; /* Maximum conversion rate */
2ef01793 486 u8 reg_local_ext; /* local extension register offset */
95238364 487
1da177e4 488 /* registers values */
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WN
489 s8 temp8[TEMP8_REG_NUM];
490 s16 temp11[TEMP11_REG_NUM];
1da177e4 491 u8 temp_hyst;
06e1c0a2 492 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
1da177e4
LT
493};
494
15b66ab6
GR
495/*
496 * Support functions
497 */
498
499/*
500 * The ADM1032 supports PEC but not on write byte transactions, so we need
501 * to explicitly ask for a transaction without PEC.
502 */
503static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
504{
505 return i2c_smbus_xfer(client->adapter, client->addr,
506 client->flags & ~I2C_CLIENT_PEC,
507 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
508}
509
510/*
511 * It is assumed that client->update_lock is held (unless we are in
512 * detection or initialization steps). This matters when PEC is enabled,
513 * because we don't want the address pointer to change between the write
514 * byte and the read byte transactions.
515 */
37ad04d7 516static int lm90_read_reg(struct i2c_client *client, u8 reg)
15b66ab6
GR
517{
518 int err;
519
520 if (client->flags & I2C_CLIENT_PEC) {
521 err = adm1032_write_byte(client, reg);
522 if (err >= 0)
523 err = i2c_smbus_read_byte(client);
524 } else
525 err = i2c_smbus_read_byte_data(client, reg);
526
37ad04d7 527 return err;
15b66ab6
GR
528}
529
37ad04d7 530static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
15b66ab6 531{
37ad04d7 532 int oldh, newh, l;
15b66ab6
GR
533
534 /*
535 * There is a trick here. We have to read two registers to have the
536 * sensor temperature, but we have to beware a conversion could occur
25985edc 537 * between the readings. The datasheet says we should either use
15b66ab6
GR
538 * the one-shot conversion register, which we don't want to do
539 * (disables hardware monitoring) or monitor the busy bit, which is
540 * impossible (we can't read the values and monitor that bit at the
541 * exact same time). So the solution used here is to read the high
542 * byte once, then the low byte, then the high byte again. If the new
543 * high byte matches the old one, then we have a valid reading. Else
544 * we have to read the low byte again, and now we believe we have a
545 * correct reading.
546 */
37ad04d7
GR
547 oldh = lm90_read_reg(client, regh);
548 if (oldh < 0)
549 return oldh;
550 l = lm90_read_reg(client, regl);
551 if (l < 0)
552 return l;
553 newh = lm90_read_reg(client, regh);
554 if (newh < 0)
555 return newh;
15b66ab6 556 if (oldh != newh) {
37ad04d7
GR
557 l = lm90_read_reg(client, regl);
558 if (l < 0)
559 return l;
15b66ab6 560 }
37ad04d7 561 return (newh << 8) | l;
15b66ab6
GR
562}
563
7a1d220c
GR
564static int lm90_update_confreg(struct lm90_data *data, u8 config)
565{
566 if (data->config != config) {
567 int err;
568
569 err = i2c_smbus_write_byte_data(data->client,
570 LM90_REG_W_CONFIG1,
571 config);
572 if (err)
573 return err;
574 data->config = config;
575 }
576 return 0;
577}
578
15b66ab6
GR
579/*
580 * client->update_lock must be held when calling this function (unless we are
581 * in detection or initialization steps), and while a remote channel other
582 * than channel 0 is selected. Also, calling code must make sure to re-select
583 * external channel 0 before releasing the lock. This is necessary because
584 * various registers have different meanings as a result of selecting a
585 * non-default remote channel.
586 */
7a1d220c 587static int lm90_select_remote_channel(struct lm90_data *data, int channel)
15b66ab6 588{
7a1d220c
GR
589 int err = 0;
590
15b66ab6 591 if (data->kind == max6696) {
b849e5d1 592 u8 config = data->config & ~0x08;
b849e5d1 593
15b66ab6
GR
594 if (channel)
595 config |= 0x08;
7a1d220c 596 err = lm90_update_confreg(data, config);
15b66ab6 597 }
7a1d220c 598 return err;
15b66ab6
GR
599}
600
7a1d220c 601static int lm90_write_convrate(struct lm90_data *data, int val)
62456189 602{
b849e5d1 603 u8 config = data->config;
62456189 604 int err;
62456189
BY
605
606 /* Save config and pause conversion */
607 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
7a1d220c
GR
608 err = lm90_update_confreg(data, config | 0x40);
609 if (err < 0)
610 return err;
62456189
BY
611 }
612
613 /* Set conv rate */
7a1d220c 614 err = i2c_smbus_write_byte_data(data->client, LM90_REG_W_CONVRATE, val);
62456189
BY
615
616 /* Revert change to config */
7a1d220c 617 lm90_update_confreg(data, config);
62456189
BY
618
619 return err;
620}
621
0c01b644
GR
622/*
623 * Set conversion rate.
624 * client->update_lock must be held when calling this function (unless we are
625 * in detection or initialization steps).
626 */
eb1c8f43
GR
627static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
628 unsigned int interval)
0c01b644 629{
0c01b644 630 unsigned int update_interval;
eb1c8f43 631 int i, err;
0c01b644
GR
632
633 /* Shift calculations to avoid rounding errors */
634 interval <<= 6;
635
636 /* find the nearest update rate */
637 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
638 i < data->max_convrate; i++, update_interval >>= 1)
639 if (interval >= update_interval * 3 / 4)
640 break;
641
7a1d220c 642 err = lm90_write_convrate(data, i);
0c01b644 643 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
eb1c8f43 644 return err;
0c01b644
GR
645}
646
10bfef47
GR
647static int lm90_update_limits(struct device *dev)
648{
649 struct lm90_data *data = dev_get_drvdata(dev);
650 struct i2c_client *client = data->client;
651 int val;
652
653 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
654 if (val < 0)
655 return val;
656 data->temp8[LOCAL_CRIT] = val;
657
658 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
659 if (val < 0)
660 return val;
661 data->temp8[REMOTE_CRIT] = val;
662
663 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
664 if (val < 0)
665 return val;
666 data->temp_hyst = val;
667
be9d6374 668 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
10bfef47
GR
669 if (val < 0)
670 return val;
671 data->temp11[REMOTE_LOW] = val << 8;
672
673 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
674 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
675 if (val < 0)
676 return val;
677 data->temp11[REMOTE_LOW] |= val;
678 }
679
680 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
681 if (val < 0)
682 return val;
683 data->temp11[REMOTE_HIGH] = val << 8;
684
685 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
686 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
687 if (val < 0)
688 return val;
689 data->temp11[REMOTE_HIGH] |= val;
690 }
691
692 if (data->flags & LM90_HAVE_OFFSET) {
693 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
694 LM90_REG_R_REMOTE_OFFSL);
695 if (val < 0)
696 return val;
697 data->temp11[REMOTE_OFFSET] = val;
698 }
699
700 if (data->flags & LM90_HAVE_EMERGENCY) {
701 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
702 if (val < 0)
703 return val;
704 data->temp8[LOCAL_EMERG] = val;
705
706 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
707 if (val < 0)
708 return val;
709 data->temp8[REMOTE_EMERG] = val;
710 }
711
712 if (data->kind == max6696) {
7a1d220c 713 val = lm90_select_remote_channel(data, 1);
10bfef47
GR
714 if (val < 0)
715 return val;
716
717 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
718 if (val < 0)
719 return val;
720 data->temp8[REMOTE2_CRIT] = val;
721
722 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
723 if (val < 0)
724 return val;
725 data->temp8[REMOTE2_EMERG] = val;
726
727 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
728 if (val < 0)
729 return val;
730 data->temp11[REMOTE2_LOW] = val << 8;
731
732 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
733 if (val < 0)
734 return val;
735 data->temp11[REMOTE2_HIGH] = val << 8;
736
7a1d220c 737 lm90_select_remote_channel(data, 0);
10bfef47
GR
738 }
739
740 return 0;
741}
742
eb1c8f43 743static int lm90_update_device(struct device *dev)
15b66ab6 744{
1de8b250
GR
745 struct lm90_data *data = dev_get_drvdata(dev);
746 struct i2c_client *client = data->client;
0c01b644 747 unsigned long next_update;
eb1c8f43 748 int val;
15b66ab6 749
10bfef47
GR
750 if (!data->valid) {
751 val = lm90_update_limits(dev);
752 if (val < 0)
eb1c8f43 753 return val;
10bfef47
GR
754 }
755
78c2c2fe
JD
756 next_update = data->last_updated +
757 msecs_to_jiffies(data->update_interval);
0c01b644 758 if (time_after(jiffies, next_update) || !data->valid) {
15b66ab6 759 dev_dbg(&client->dev, "Updating lm90 data.\n");
10bfef47 760
2f83ab77 761 data->valid = false;
10bfef47 762
37ad04d7
GR
763 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
764 if (val < 0)
eb1c8f43 765 return val;
37ad04d7
GR
766 data->temp8[LOCAL_LOW] = val;
767
768 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
769 if (val < 0)
eb1c8f43 770 return val;
37ad04d7
GR
771 data->temp8[LOCAL_HIGH] = val;
772
a095f687 773 if (data->reg_local_ext) {
37ad04d7
GR
774 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
775 data->reg_local_ext);
776 if (val < 0)
eb1c8f43 777 return val;
37ad04d7 778 data->temp11[LOCAL_TEMP] = val;
15b66ab6 779 } else {
37ad04d7
GR
780 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
781 if (val < 0)
eb1c8f43 782 return val;
37ad04d7 783 data->temp11[LOCAL_TEMP] = val << 8;
15b66ab6 784 }
37ad04d7
GR
785 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
786 LM90_REG_R_REMOTE_TEMPL);
787 if (val < 0)
eb1c8f43 788 return val;
37ad04d7
GR
789 data->temp11[REMOTE_TEMP] = val;
790
37ad04d7
GR
791 val = lm90_read_reg(client, LM90_REG_R_STATUS);
792 if (val < 0)
eb1c8f43 793 return val;
37ad04d7 794 data->alarms = val; /* lower 8 bit of alarms */
15b66ab6
GR
795
796 if (data->kind == max6696) {
7a1d220c 797 val = lm90_select_remote_channel(data, 1);
37ad04d7 798 if (val < 0)
eb1c8f43 799 return val;
37ad04d7 800
37ad04d7
GR
801 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
802 LM90_REG_R_REMOTE_TEMPL);
eb1c8f43 803 if (val < 0) {
7a1d220c 804 lm90_select_remote_channel(data, 0);
eb1c8f43
GR
805 return val;
806 }
37ad04d7
GR
807 data->temp11[REMOTE2_TEMP] = val;
808
7a1d220c 809 lm90_select_remote_channel(data, 0);
15b66ab6 810
37ad04d7
GR
811 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
812 if (val < 0)
eb1c8f43 813 return val;
37ad04d7 814 data->alarms |= val << 8;
15b66ab6
GR
815 }
816
f36ffeab
GR
817 /*
818 * Re-enable ALERT# output if it was originally enabled and
819 * relevant alarms are all clear
820 */
37ad04d7
GR
821 if (!(data->config_orig & 0x80) &&
822 !(data->alarms & data->alert_alarms)) {
b849e5d1 823 if (data->config & 0x80) {
15b66ab6 824 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
7a1d220c 825 lm90_update_confreg(data, data->config & ~0x80);
15b66ab6
GR
826 }
827 }
828
829 data->last_updated = jiffies;
2f83ab77 830 data->valid = true;
15b66ab6
GR
831 }
832
eb1c8f43 833 return 0;
15b66ab6
GR
834}
835
cea50fe2
NC
836/*
837 * Conversions
838 * For local temperatures and limits, critical limits and the hysteresis
839 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
840 * For remote temperatures and limits, it uses signed 11-bit values with
271dabf5
BH
841 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
842 * Maxim chips use unsigned values.
cea50fe2
NC
843 */
844
9d4d3834 845static inline int temp_from_s8(s8 val)
cea50fe2
NC
846{
847 return val * 1000;
848}
849
271dabf5
BH
850static inline int temp_from_u8(u8 val)
851{
852 return val * 1000;
853}
854
9d4d3834 855static inline int temp_from_s16(s16 val)
cea50fe2
NC
856{
857 return val / 32 * 125;
858}
859
271dabf5
BH
860static inline int temp_from_u16(u16 val)
861{
862 return val / 32 * 125;
863}
864
9d4d3834 865static s8 temp_to_s8(long val)
cea50fe2
NC
866{
867 if (val <= -128000)
868 return -128;
869 if (val >= 127000)
870 return 127;
871 if (val < 0)
872 return (val - 500) / 1000;
873 return (val + 500) / 1000;
874}
875
271dabf5
BH
876static u8 temp_to_u8(long val)
877{
878 if (val <= 0)
879 return 0;
880 if (val >= 255000)
881 return 255;
882 return (val + 500) / 1000;
883}
884
9d4d3834 885static s16 temp_to_s16(long val)
cea50fe2
NC
886{
887 if (val <= -128000)
888 return 0x8000;
889 if (val >= 127875)
890 return 0x7FE0;
891 if (val < 0)
892 return (val - 62) / 125 * 32;
893 return (val + 62) / 125 * 32;
894}
895
896static u8 hyst_to_reg(long val)
897{
898 if (val <= 0)
899 return 0;
900 if (val >= 30500)
901 return 31;
902 return (val + 500) / 1000;
903}
904
905/*
23b2d477
NC
906 * ADT7461 in compatibility mode is almost identical to LM90 except that
907 * attempts to write values that are outside the range 0 < temp < 127 are
908 * treated as the boundary value.
909 *
910 * ADT7461 in "extended mode" operation uses unsigned integers offset by
911 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
cea50fe2 912 */
9d4d3834 913static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
cea50fe2 914{
23b2d477
NC
915 if (data->flags & LM90_FLAG_ADT7461_EXT)
916 return (val - 64) * 1000;
589f707c 917 return temp_from_s8(val);
cea50fe2
NC
918}
919
9d4d3834 920static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
cea50fe2 921{
23b2d477
NC
922 if (data->flags & LM90_FLAG_ADT7461_EXT)
923 return (val - 0x4000) / 64 * 250;
589f707c 924 return temp_from_s16(val);
23b2d477
NC
925}
926
9d4d3834 927static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
23b2d477
NC
928{
929 if (data->flags & LM90_FLAG_ADT7461_EXT) {
930 if (val <= -64000)
931 return 0;
932 if (val >= 191000)
933 return 0xFF;
934 return (val + 500 + 64000) / 1000;
23b2d477 935 }
589f707c
GR
936 if (val <= 0)
937 return 0;
938 if (val >= 127000)
939 return 127;
940 return (val + 500) / 1000;
23b2d477
NC
941}
942
9d4d3834 943static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
23b2d477
NC
944{
945 if (data->flags & LM90_FLAG_ADT7461_EXT) {
946 if (val <= -64000)
947 return 0;
948 if (val >= 191750)
949 return 0xFFC0;
950 return (val + 64000 + 125) / 250 * 64;
23b2d477 951 }
589f707c
GR
952 if (val <= 0)
953 return 0;
954 if (val >= 127750)
955 return 0x7FC0;
956 return (val + 125) / 250 * 64;
cea50fe2
NC
957}
958
eb1c8f43 959/* pec used for ADM1032 only */
e57959a6 960static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
eb1c8f43 961 char *buf)
30d7394b 962{
eb1c8f43 963 struct i2c_client *client = to_i2c_client(dev);
97ae60bb 964
eb1c8f43 965 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
30d7394b
JD
966}
967
e57959a6
JL
968static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
969 const char *buf, size_t count)
30d7394b 970{
eb1c8f43 971 struct i2c_client *client = to_i2c_client(dev);
11e57812
GR
972 long val;
973 int err;
974
179c4fdb 975 err = kstrtol(buf, 10, &val);
11e57812
GR
976 if (err < 0)
977 return err;
30d7394b 978
eb1c8f43
GR
979 switch (val) {
980 case 0:
981 client->flags &= ~I2C_CLIENT_PEC;
982 break;
983 case 1:
984 client->flags |= I2C_CLIENT_PEC;
985 break;
986 default:
987 return -EINVAL;
988 }
06e1c0a2 989
30d7394b 990 return count;
1da177e4 991}
30d7394b 992
e57959a6 993static DEVICE_ATTR_RW(pec);
eb1c8f43
GR
994
995static int lm90_get_temp11(struct lm90_data *data, int index)
30d7394b 996{
eb1c8f43 997 s16 temp11 = data->temp11[index];
23b2d477
NC
998 int temp;
999
1daaceb2 1000 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1001 temp = temp_from_u16_adt7461(data, temp11);
271dabf5 1002 else if (data->kind == max6646)
eb1c8f43 1003 temp = temp_from_u16(temp11);
23b2d477 1004 else
eb1c8f43 1005 temp = temp_from_s16(temp11);
23b2d477 1006
97ae60bb 1007 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1008 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1009 temp += 16000;
1010
eb1c8f43 1011 return temp;
1da177e4 1012}
30d7394b 1013
eb1c8f43 1014static int lm90_set_temp11(struct lm90_data *data, int index, long val)
30d7394b 1015{
eb1c8f43 1016 static struct reg {
96512861
GR
1017 u8 high;
1018 u8 low;
eb1c8f43
GR
1019 } reg[] = {
1020 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1021 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
1022 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
1023 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
1024 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
30d7394b 1025 };
1de8b250 1026 struct i2c_client *client = data->client;
eb1c8f43 1027 struct reg *regp = &reg[index];
11e57812
GR
1028 int err;
1029
97ae60bb 1030 /* +16 degrees offset for temp2 for the LM99 */
96512861 1031 if (data->kind == lm99 && index <= 2)
97ae60bb
JD
1032 val -= 16000;
1033
1daaceb2 1034 if (data->kind == adt7461 || data->kind == tmp451)
96512861 1035 data->temp11[index] = temp_to_u16_adt7461(data, val);
271dabf5 1036 else if (data->kind == max6646)
96512861 1037 data->temp11[index] = temp_to_u8(val) << 8;
88073bb1 1038 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
96512861 1039 data->temp11[index] = temp_to_s16(val);
88073bb1 1040 else
96512861 1041 data->temp11[index] = temp_to_s8(val) << 8;
5f502a83 1042
7a1d220c 1043 lm90_select_remote_channel(data, index >= 3);
eb1c8f43 1044 err = i2c_smbus_write_byte_data(client, regp->high,
96512861 1045 data->temp11[index] >> 8);
eb1c8f43
GR
1046 if (err < 0)
1047 return err;
88073bb1 1048 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
eb1c8f43
GR
1049 err = i2c_smbus_write_byte_data(client, regp->low,
1050 data->temp11[index] & 0xff);
06e1c0a2 1051
7a1d220c 1052 lm90_select_remote_channel(data, 0);
eb1c8f43 1053 return err;
1da177e4 1054}
30d7394b 1055
eb1c8f43 1056static int lm90_get_temp8(struct lm90_data *data, int index)
30d7394b 1057{
eb1c8f43 1058 s8 temp8 = data->temp8[index];
23b2d477
NC
1059 int temp;
1060
1daaceb2 1061 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1062 temp = temp_from_u8_adt7461(data, temp8);
ec38fa2b 1063 else if (data->kind == max6646)
eb1c8f43 1064 temp = temp_from_u8(temp8);
23b2d477 1065 else
eb1c8f43 1066 temp = temp_from_s8(temp8);
23b2d477 1067
97ae60bb 1068 /* +16 degrees offset for temp2 for the LM99 */
eb1c8f43 1069 if (data->kind == lm99 && index == 3)
97ae60bb
JD
1070 temp += 16000;
1071
eb1c8f43 1072 return temp;
1da177e4 1073}
1da177e4 1074
eb1c8f43 1075static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1da177e4 1076{
eb1c8f43
GR
1077 static const u8 reg[TEMP8_REG_NUM] = {
1078 LM90_REG_W_LOCAL_LOW,
1079 LM90_REG_W_LOCAL_HIGH,
1080 LM90_REG_W_LOCAL_CRIT,
1081 LM90_REG_W_REMOTE_CRIT,
1082 MAX6659_REG_W_LOCAL_EMERG,
1083 MAX6659_REG_W_REMOTE_EMERG,
1084 LM90_REG_W_REMOTE_CRIT,
1085 MAX6659_REG_W_REMOTE_EMERG,
1086 };
1de8b250 1087 struct i2c_client *client = data->client;
11e57812 1088 int err;
1da177e4 1089
eb1c8f43
GR
1090 /* +16 degrees offset for temp2 for the LM99 */
1091 if (data->kind == lm99 && index == 3)
1092 val -= 16000;
11e57812 1093
1daaceb2 1094 if (data->kind == adt7461 || data->kind == tmp451)
eb1c8f43 1095 data->temp8[index] = temp_to_u8_adt7461(data, val);
ec38fa2b 1096 else if (data->kind == max6646)
eb1c8f43 1097 data->temp8[index] = temp_to_u8(val);
ec38fa2b 1098 else
eb1c8f43 1099 data->temp8[index] = temp_to_s8(val);
ec38fa2b 1100
7a1d220c 1101 lm90_select_remote_channel(data, index >= 6);
eb1c8f43 1102 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
7a1d220c 1103 lm90_select_remote_channel(data, 0);
37ad04d7 1104
eb1c8f43 1105 return err;
1da177e4
LT
1106}
1107
eb1c8f43 1108static int lm90_get_temphyst(struct lm90_data *data, int index)
2d45771e 1109{
eb1c8f43 1110 int temp;
37ad04d7 1111
eb1c8f43
GR
1112 if (data->kind == adt7461 || data->kind == tmp451)
1113 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1114 else if (data->kind == max6646)
1115 temp = temp_from_u8(data->temp8[index]);
1116 else
1117 temp = temp_from_s8(data->temp8[index]);
2d45771e 1118
eb1c8f43
GR
1119 /* +16 degrees offset for temp2 for the LM99 */
1120 if (data->kind == lm99 && index == 3)
1121 temp += 16000;
0c01b644 1122
eb1c8f43 1123 return temp - temp_from_s8(data->temp_hyst);
0c01b644
GR
1124}
1125
eb1c8f43 1126static int lm90_set_temphyst(struct lm90_data *data, long val)
0c01b644 1127{
1de8b250 1128 struct i2c_client *client = data->client;
eb1c8f43 1129 int temp;
0c01b644
GR
1130 int err;
1131
eb1c8f43
GR
1132 if (data->kind == adt7461 || data->kind == tmp451)
1133 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1134 else if (data->kind == max6646)
1135 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1136 else
1137 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
0c01b644 1138
eb1c8f43
GR
1139 data->temp_hyst = hyst_to_reg(temp - val);
1140 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1141 data->temp_hyst);
1142 return err;
0c01b644
GR
1143}
1144
eb1c8f43
GR
1145static const u8 lm90_temp_index[3] = {
1146 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
0e39e01c
JD
1147};
1148
eb1c8f43
GR
1149static const u8 lm90_temp_min_index[3] = {
1150 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
0e39e01c
JD
1151};
1152
eb1c8f43
GR
1153static const u8 lm90_temp_max_index[3] = {
1154 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
742192f5
GR
1155};
1156
eb1c8f43
GR
1157static const u8 lm90_temp_crit_index[3] = {
1158 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
742192f5
GR
1159};
1160
eb1c8f43
GR
1161static const u8 lm90_temp_emerg_index[3] = {
1162 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
6948708d
GR
1163};
1164
eb1c8f43 1165static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
e9572fdd 1166static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
eb1c8f43
GR
1167static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1168static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1169static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
6948708d 1170
eb1c8f43
GR
1171static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1172{
1173 struct lm90_data *data = dev_get_drvdata(dev);
1174 int err;
06e1c0a2 1175
eb1c8f43
GR
1176 mutex_lock(&data->update_lock);
1177 err = lm90_update_device(dev);
1178 mutex_unlock(&data->update_lock);
1179 if (err)
1180 return err;
06e1c0a2 1181
eb1c8f43
GR
1182 switch (attr) {
1183 case hwmon_temp_input:
1184 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1185 break;
1186 case hwmon_temp_min_alarm:
1187 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1188 break;
1189 case hwmon_temp_max_alarm:
1190 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1191 break;
1192 case hwmon_temp_crit_alarm:
1193 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1194 break;
1195 case hwmon_temp_emergency_alarm:
1196 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1197 break;
1198 case hwmon_temp_fault:
1199 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1200 break;
1201 case hwmon_temp_min:
1202 if (channel == 0)
1203 *val = lm90_get_temp8(data,
1204 lm90_temp_min_index[channel]);
1205 else
1206 *val = lm90_get_temp11(data,
1207 lm90_temp_min_index[channel]);
1208 break;
1209 case hwmon_temp_max:
1210 if (channel == 0)
1211 *val = lm90_get_temp8(data,
1212 lm90_temp_max_index[channel]);
1213 else
1214 *val = lm90_get_temp11(data,
1215 lm90_temp_max_index[channel]);
1216 break;
1217 case hwmon_temp_crit:
1218 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1219 break;
1220 case hwmon_temp_crit_hyst:
1221 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1222 break;
1223 case hwmon_temp_emergency:
1224 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1225 break;
1226 case hwmon_temp_emergency_hyst:
1227 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1228 break;
1229 case hwmon_temp_offset:
1230 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1231 break;
1232 default:
1233 return -EOPNOTSUPP;
1234 }
1235 return 0;
1236}
06e1c0a2 1237
eb1c8f43
GR
1238static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1239{
1240 struct lm90_data *data = dev_get_drvdata(dev);
1241 int err;
06e1c0a2 1242
eb1c8f43 1243 mutex_lock(&data->update_lock);
06e1c0a2 1244
eb1c8f43
GR
1245 err = lm90_update_device(dev);
1246 if (err)
1247 goto error;
1248
1249 switch (attr) {
1250 case hwmon_temp_min:
1251 if (channel == 0)
1252 err = lm90_set_temp8(data,
1253 lm90_temp_min_index[channel],
1254 val);
1255 else
1256 err = lm90_set_temp11(data,
1257 lm90_temp_min_index[channel],
1258 val);
1259 break;
1260 case hwmon_temp_max:
1261 if (channel == 0)
1262 err = lm90_set_temp8(data,
1263 lm90_temp_max_index[channel],
1264 val);
1265 else
1266 err = lm90_set_temp11(data,
1267 lm90_temp_max_index[channel],
1268 val);
1269 break;
1270 case hwmon_temp_crit:
1271 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1272 break;
1273 case hwmon_temp_crit_hyst:
1274 err = lm90_set_temphyst(data, val);
1275 break;
1276 case hwmon_temp_emergency:
1277 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1278 break;
1279 case hwmon_temp_offset:
1280 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1281 break;
1282 default:
1283 err = -EOPNOTSUPP;
1284 break;
1285 }
1286error:
1287 mutex_unlock(&data->update_lock);
1288
1289 return err;
1290}
1291
1292static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
c3df5806 1293{
eb1c8f43
GR
1294 switch (attr) {
1295 case hwmon_temp_input:
1296 case hwmon_temp_min_alarm:
1297 case hwmon_temp_max_alarm:
1298 case hwmon_temp_crit_alarm:
1299 case hwmon_temp_emergency_alarm:
1300 case hwmon_temp_emergency_hyst:
1301 case hwmon_temp_fault:
3334851d 1302 return 0444;
eb1c8f43
GR
1303 case hwmon_temp_min:
1304 case hwmon_temp_max:
1305 case hwmon_temp_crit:
1306 case hwmon_temp_emergency:
1307 case hwmon_temp_offset:
3334851d 1308 return 0644;
eb1c8f43
GR
1309 case hwmon_temp_crit_hyst:
1310 if (channel == 0)
3334851d
GR
1311 return 0644;
1312 return 0444;
eb1c8f43
GR
1313 default:
1314 return 0;
1315 }
c3df5806
JD
1316}
1317
eb1c8f43 1318static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
c3df5806 1319{
eb1c8f43 1320 struct lm90_data *data = dev_get_drvdata(dev);
11e57812
GR
1321 int err;
1322
eb1c8f43
GR
1323 mutex_lock(&data->update_lock);
1324 err = lm90_update_device(dev);
1325 mutex_unlock(&data->update_lock);
1326 if (err)
11e57812 1327 return err;
c3df5806 1328
eb1c8f43
GR
1329 switch (attr) {
1330 case hwmon_chip_update_interval:
1331 *val = data->update_interval;
c3df5806 1332 break;
eb1c8f43
GR
1333 case hwmon_chip_alarms:
1334 *val = data->alarms;
c3df5806
JD
1335 break;
1336 default:
eb1c8f43 1337 return -EOPNOTSUPP;
c3df5806
JD
1338 }
1339
eb1c8f43 1340 return 0;
c3df5806
JD
1341}
1342
eb1c8f43
GR
1343static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1344{
1345 struct lm90_data *data = dev_get_drvdata(dev);
1346 struct i2c_client *client = data->client;
1347 int err;
c3df5806 1348
eb1c8f43
GR
1349 mutex_lock(&data->update_lock);
1350
1351 err = lm90_update_device(dev);
1352 if (err)
1353 goto error;
1354
1355 switch (attr) {
1356 case hwmon_chip_update_interval:
1357 err = lm90_set_convrate(client, data,
1358 clamp_val(val, 0, 100000));
1359 break;
1360 default:
1361 err = -EOPNOTSUPP;
1362 break;
1363 }
1364error:
1365 mutex_unlock(&data->update_lock);
1366
1367 return err;
1368}
1369
1370static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1371{
1372 switch (attr) {
1373 case hwmon_chip_update_interval:
3334851d 1374 return 0644;
eb1c8f43 1375 case hwmon_chip_alarms:
3334851d 1376 return 0444;
eb1c8f43
GR
1377 default:
1378 return 0;
1379 }
1380}
1381
1382static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1383 u32 attr, int channel, long *val)
1384{
1385 switch (type) {
1386 case hwmon_chip:
1387 return lm90_chip_read(dev, attr, channel, val);
1388 case hwmon_temp:
1389 return lm90_temp_read(dev, attr, channel, val);
1390 default:
1391 return -EOPNOTSUPP;
1392 }
1393}
1394
1395static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1396 u32 attr, int channel, long val)
1397{
1398 switch (type) {
1399 case hwmon_chip:
1400 return lm90_chip_write(dev, attr, channel, val);
1401 case hwmon_temp:
1402 return lm90_temp_write(dev, attr, channel, val);
1403 default:
1404 return -EOPNOTSUPP;
1405 }
1406}
1407
1408static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1409 u32 attr, int channel)
1410{
1411 switch (type) {
1412 case hwmon_chip:
1413 return lm90_chip_is_visible(data, attr, channel);
1414 case hwmon_temp:
1415 return lm90_temp_is_visible(data, attr, channel);
1416 default:
1417 return 0;
1418 }
1419}
1da177e4 1420
15b66ab6 1421/* Return 0 if detection is successful, -ENODEV otherwise */
b2589ab0 1422static int lm90_detect(struct i2c_client *client,
15b66ab6 1423 struct i2c_board_info *info)
8256fe0f 1424{
b2589ab0
JD
1425 struct i2c_adapter *adapter = client->adapter;
1426 int address = client->addr;
15b66ab6 1427 const char *name = NULL;
b2589ab0 1428 int man_id, chip_id, config1, config2, convrate;
8256fe0f 1429
15b66ab6
GR
1430 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1431 return -ENODEV;
1da177e4 1432
8f2fa77c 1433 /* detection and identification */
b2589ab0
JD
1434 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1435 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1436 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1437 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1438 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
8f2fa77c
JD
1439 return -ENODEV;
1440
f90be42f 1441 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
b2589ab0
JD
1442 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1443 if (config2 < 0)
9b0e8526 1444 return -ENODEV;
f90be42f 1445 } else
b2589ab0 1446 config2 = 0; /* Make compiler happy */
8f2fa77c 1447
f90be42f
JD
1448 if ((address == 0x4C || address == 0x4D)
1449 && man_id == 0x01) { /* National Semiconductor */
b2589ab0
JD
1450 if ((config1 & 0x2A) == 0x00
1451 && (config2 & 0xF8) == 0x00
1452 && convrate <= 0x09) {
8f2fa77c
JD
1453 if (address == 0x4C
1454 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1455 name = "lm90";
32c82a93 1456 } else
8f2fa77c
JD
1457 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1458 name = "lm99";
1459 dev_info(&adapter->dev,
1460 "Assuming LM99 chip at 0x%02x\n",
1461 address);
1462 dev_info(&adapter->dev,
1463 "If it is an LM89, instantiate it "
1464 "with the new_device sysfs "
1465 "interface\n");
271dabf5 1466 } else
8f2fa77c
JD
1467 if (address == 0x4C
1468 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1469 name = "lm86";
1da177e4
LT
1470 }
1471 }
8f2fa77c
JD
1472 } else
1473 if ((address == 0x4C || address == 0x4D)
1474 && man_id == 0x41) { /* Analog Devices */
1475 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
b2589ab0
JD
1476 && (config1 & 0x3F) == 0x00
1477 && convrate <= 0x0A) {
8f2fa77c 1478 name = "adm1032";
f36ffeab
GR
1479 /*
1480 * The ADM1032 supports PEC, but only if combined
1481 * transactions are not used.
1482 */
8f2fa77c
JD
1483 if (i2c_check_functionality(adapter,
1484 I2C_FUNC_SMBUS_BYTE))
1485 info->flags |= I2C_CLIENT_PEC;
1486 } else
1487 if (chip_id == 0x51 /* ADT7461 */
b2589ab0
JD
1488 && (config1 & 0x1B) == 0x00
1489 && convrate <= 0x0A) {
8f2fa77c 1490 name = "adt7461";
5a4e5e6a
GR
1491 } else
1492 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
b2589ab0
JD
1493 && (config1 & 0x1B) == 0x00
1494 && convrate <= 0x0A) {
5a4e5e6a 1495 name = "adt7461a";
8f2fa77c
JD
1496 }
1497 } else
1498 if (man_id == 0x4D) { /* Maxim */
b2589ab0 1499 int emerg, emerg2, status2;
06e1c0a2
GR
1500
1501 /*
1502 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1503 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1504 * exists, both readings will reflect the same value. Otherwise,
1505 * the readings will be different.
1506 */
b2589ab0
JD
1507 emerg = i2c_smbus_read_byte_data(client,
1508 MAX6659_REG_R_REMOTE_EMERG);
1509 man_id = i2c_smbus_read_byte_data(client,
8dc089d6 1510 LM90_REG_R_MAN_ID);
b2589ab0 1511 emerg2 = i2c_smbus_read_byte_data(client,
8dc089d6 1512 MAX6659_REG_R_REMOTE_EMERG);
b2589ab0
JD
1513 status2 = i2c_smbus_read_byte_data(client,
1514 MAX6696_REG_R_STATUS2);
1515 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
06e1c0a2
GR
1516 return -ENODEV;
1517
8f2fa77c
JD
1518 /*
1519 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1520 * register. Reading from that address will return the last
1521 * read value, which in our case is those of the man_id
1522 * register. Likewise, the config1 register seems to lack a
1523 * low nibble, so the value will be those of the previous
1524 * read, so in our case those of the man_id register.
13c84951
GR
1525 * MAX6659 has a third set of upper temperature limit registers.
1526 * Those registers also return values on MAX6657 and MAX6658,
1527 * thus the only way to detect MAX6659 is by its address.
1528 * For this reason it will be mis-detected as MAX6657 if its
1529 * address is 0x4C.
8f2fa77c
JD
1530 */
1531 if (chip_id == man_id
13c84951 1532 && (address == 0x4C || address == 0x4D || address == 0x4E)
b2589ab0
JD
1533 && (config1 & 0x1F) == (man_id & 0x0F)
1534 && convrate <= 0x09) {
13c84951
GR
1535 if (address == 0x4C)
1536 name = "max6657";
1537 else
1538 name = "max6659";
8f2fa77c 1539 } else
06e1c0a2
GR
1540 /*
1541 * Even though MAX6695 and MAX6696 do not have a chip ID
1542 * register, reading it returns 0x01. Bit 4 of the config1
1543 * register is unused and should return zero when read. Bit 0 of
1544 * the status2 register is unused and should return zero when
1545 * read.
1546 *
1547 * MAX6695 and MAX6696 have an additional set of temperature
1548 * limit registers. We can detect those chips by checking if
1549 * one of those registers exists.
1550 */
1551 if (chip_id == 0x01
b2589ab0
JD
1552 && (config1 & 0x10) == 0x00
1553 && (status2 & 0x01) == 0x00
1554 && emerg == emerg2
1555 && convrate <= 0x07) {
06e1c0a2
GR
1556 name = "max6696";
1557 } else
8f2fa77c
JD
1558 /*
1559 * The chip_id register of the MAX6680 and MAX6681 holds the
1560 * revision of the chip. The lowest bit of the config1 register
1561 * is unused and should return zero when read, so should the
1562 * second to last bit of config1 (software reset).
1563 */
1564 if (chip_id == 0x01
b2589ab0
JD
1565 && (config1 & 0x03) == 0x00
1566 && convrate <= 0x07) {
8f2fa77c
JD
1567 name = "max6680";
1568 } else
1569 /*
1570 * The chip_id register of the MAX6646/6647/6649 holds the
1571 * revision of the chip. The lowest 6 bits of the config1
1572 * register are unused and should return zero when read.
1573 */
1574 if (chip_id == 0x59
b2589ab0
JD
1575 && (config1 & 0x3f) == 0x00
1576 && convrate <= 0x07) {
8f2fa77c 1577 name = "max6646";
229d495d
JL
1578 } else
1579 /*
1580 * The chip_id of the MAX6654 holds the revision of the chip.
1581 * The lowest 3 bits of the config1 register are unused and
1582 * should return zero when read.
1583 */
1584 if (chip_id == 0x08
1585 && (config1 & 0x07) == 0x00
1586 && convrate <= 0x07) {
1587 name = "max6654";
1da177e4 1588 }
6771ea1f
JD
1589 } else
1590 if (address == 0x4C
1591 && man_id == 0x5C) { /* Winbond/Nuvoton */
b2589ab0
JD
1592 if ((config1 & 0x2A) == 0x00
1593 && (config2 & 0xF8) == 0x00) {
c4f99a2b 1594 if (chip_id == 0x01 /* W83L771W/G */
b2589ab0 1595 && convrate <= 0x09) {
c4f99a2b
JD
1596 name = "w83l771";
1597 } else
1598 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
b2589ab0 1599 && convrate <= 0x08) {
c4f99a2b
JD
1600 name = "w83l771";
1601 }
6771ea1f 1602 }
2ef01793 1603 } else
6d101c58
JD
1604 if (address >= 0x48 && address <= 0x4F
1605 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
6d101c58 1606 if (chip_id == 0x00
b2589ab0
JD
1607 && (config1 & 0x2A) == 0x00
1608 && (config2 & 0xFE) == 0x00
1609 && convrate <= 0x09) {
2ef01793
SD
1610 name = "sa56004";
1611 }
ae544f64
GR
1612 } else
1613 if ((address == 0x4C || address == 0x4D)
1614 && man_id == 0x47) { /* GMT */
1615 if (chip_id == 0x01 /* G781 */
1616 && (config1 & 0x3F) == 0x00
1617 && convrate <= 0x08)
1618 name = "g781";
1daaceb2
WN
1619 } else
1620 if (address == 0x4C
1621 && man_id == 0x55) { /* Texas Instruments */
1622 int local_ext;
1623
1624 local_ext = i2c_smbus_read_byte_data(client,
1625 TMP451_REG_R_LOCAL_TEMPL);
1626
1627 if (chip_id == 0x00 /* TMP451 */
1628 && (config1 & 0x1B) == 0x00
1629 && convrate <= 0x09
1630 && (local_ext & 0x0F) == 0x00)
1631 name = "tmp451";
1da177e4
LT
1632 }
1633
8f2fa77c
JD
1634 if (!name) { /* identification failed */
1635 dev_dbg(&adapter->dev,
1636 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1637 "chip_id=0x%02X)\n", address, man_id, chip_id);
1638 return -ENODEV;
1da177e4 1639 }
8f2fa77c 1640
9b0e8526
JD
1641 strlcpy(info->type, name, I2C_NAME_SIZE);
1642
1643 return 0;
1644}
1645
1f17a444 1646static void lm90_restore_conf(void *_data)
f7001bb0 1647{
1f17a444
GR
1648 struct lm90_data *data = _data;
1649 struct i2c_client *client = data->client;
1650
f7001bb0 1651 /* Restore initial configuration */
7a1d220c 1652 lm90_write_convrate(data, data->convrate_orig);
f7001bb0
GR
1653 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1654 data->config_orig);
1655}
1656
37ad04d7 1657static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
15b66ab6 1658{
37ad04d7 1659 int config, convrate;
15b66ab6 1660
37ad04d7
GR
1661 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1662 if (convrate < 0)
1663 return convrate;
0c01b644
GR
1664 data->convrate_orig = convrate;
1665
15b66ab6
GR
1666 /*
1667 * Start the conversions.
1668 */
37ad04d7
GR
1669 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1670 if (config < 0)
1671 return config;
15b66ab6 1672 data->config_orig = config;
b849e5d1 1673 data->config = config;
15b66ab6 1674
62456189
BY
1675 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1676
15b66ab6 1677 /* Check Temperature Range Select */
1daaceb2 1678 if (data->kind == adt7461 || data->kind == tmp451) {
15b66ab6
GR
1679 if (config & 0x04)
1680 data->flags |= LM90_FLAG_ADT7461_EXT;
1681 }
1682
1683 /*
1684 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1685 * 0.125 degree resolution) and range (0x08, extend range
1686 * to -64 degree) mode for the remote temperature sensor.
1687 */
1688 if (data->kind == max6680)
1689 config |= 0x18;
1690
229d495d
JL
1691 /*
1692 * Put MAX6654 into extended range (0x20, extend minimum range from
1693 * 0 degrees to -64 degrees). Note that extended resolution is not
1694 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
1695 * slower, which is intentionally not done by default.
1696 */
1697 if (data->kind == max6654)
1698 config |= 0x20;
1699
15b66ab6
GR
1700 /*
1701 * Select external channel 0 for max6695/96
1702 */
1703 if (data->kind == max6696)
1704 config &= ~0x08;
1705
1706 config &= 0xBF; /* run */
7a1d220c 1707 lm90_update_confreg(data, config);
1f17a444 1708
c5fcf01b 1709 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
15b66ab6
GR
1710}
1711
072de496
WN
1712static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1713{
1714 struct lm90_data *data = i2c_get_clientdata(client);
37ad04d7 1715 int st, st2 = 0;
072de496 1716
37ad04d7
GR
1717 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1718 if (st < 0)
1719 return false;
072de496 1720
37ad04d7
GR
1721 if (data->kind == max6696) {
1722 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1723 if (st2 < 0)
1724 return false;
1725 }
072de496
WN
1726
1727 *status = st | (st2 << 8);
1728
1729 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1730 return false;
1731
1732 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1733 (st2 & MAX6696_STATUS2_LOT2))
1734 dev_warn(&client->dev,
1735 "temp%d out of range, please check!\n", 1);
1736 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1737 (st2 & MAX6696_STATUS2_ROT2))
1738 dev_warn(&client->dev,
1739 "temp%d out of range, please check!\n", 2);
1740 if (st & LM90_STATUS_ROPEN)
1741 dev_warn(&client->dev,
1742 "temp%d diode open, please check!\n", 2);
1743 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1744 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1745 dev_warn(&client->dev,
1746 "temp%d out of range, please check!\n", 3);
1747 if (st2 & MAX6696_STATUS2_R2OPEN)
1748 dev_warn(&client->dev,
1749 "temp%d diode open, please check!\n", 3);
1750
1751 return true;
1752}
1753
109b1283
WN
1754static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1755{
1756 struct i2c_client *client = dev_id;
1757 u16 status;
1758
1759 if (lm90_is_tripped(client, &status))
1760 return IRQ_HANDLED;
1761 else
1762 return IRQ_NONE;
1763}
1764
1f17a444
GR
1765static void lm90_remove_pec(void *dev)
1766{
1767 device_remove_file(dev, &dev_attr_pec);
1768}
1769
1770static void lm90_regulator_disable(void *regulator)
1771{
1772 regulator_disable(regulator);
1773}
1774
eb1c8f43
GR
1775
1776static const struct hwmon_ops lm90_ops = {
1777 .is_visible = lm90_is_visible,
1778 .read = lm90_read,
1779 .write = lm90_write,
1780};
1781
b2589ab0 1782static int lm90_probe(struct i2c_client *client,
9b0e8526
JD
1783 const struct i2c_device_id *id)
1784{
b2589ab0 1785 struct device *dev = &client->dev;
e67776cc 1786 struct i2c_adapter *adapter = client->adapter;
eb1c8f43 1787 struct hwmon_channel_info *info;
3e0f964f 1788 struct regulator *regulator;
6e5f62b9 1789 struct device *hwmon_dev;
eb1c8f43 1790 struct lm90_data *data;
9b0e8526 1791 int err;
1da177e4 1792
3e0f964f
WN
1793 regulator = devm_regulator_get(dev, "vcc");
1794 if (IS_ERR(regulator))
1795 return PTR_ERR(regulator);
1796
1797 err = regulator_enable(regulator);
1798 if (err < 0) {
d89fa686 1799 dev_err(dev, "Failed to enable regulator: %d\n", err);
3e0f964f
WN
1800 return err;
1801 }
1802
c5fcf01b
GR
1803 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1804 if (err)
1805 return err;
1f17a444 1806
d89fa686 1807 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
20f426ff
GR
1808 if (!data)
1809 return -ENOMEM;
1810
1de8b250 1811 data->client = client;
b2589ab0 1812 i2c_set_clientdata(client, data);
9a61bf63 1813 mutex_init(&data->update_lock);
1da177e4 1814
9b0e8526 1815 /* Set the device type */
df8d57bf
JMC
1816 if (client->dev.of_node)
1817 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1818 else
1819 data->kind = id->driver_data;
9b0e8526
JD
1820 if (data->kind == adm1032) {
1821 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
b2589ab0 1822 client->flags &= ~I2C_CLIENT_PEC;
9b0e8526 1823 }
1da177e4 1824
f36ffeab
GR
1825 /*
1826 * Different devices have different alarm bits triggering the
1827 * ALERT# output
1828 */
4667bcb8 1829 data->alert_alarms = lm90_params[data->kind].alert_alarms;
53de3342 1830
88073bb1 1831 /* Set chip capabilities */
4667bcb8 1832 data->flags = lm90_params[data->kind].flags;
eb1c8f43
GR
1833
1834 data->chip.ops = &lm90_ops;
1835 data->chip.info = data->info;
1836
a4d41e67
GR
1837 data->info[0] = HWMON_CHANNEL_INFO(chip,
1838 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS);
eb1c8f43
GR
1839 data->info[1] = &data->temp_info;
1840
1841 info = &data->temp_info;
1842 info->type = hwmon_temp;
1843 info->config = data->channel_config;
1844
1845 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1846 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1847 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1848 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1849 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1850 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1851
1852 if (data->flags & LM90_HAVE_OFFSET)
1853 data->channel_config[1] |= HWMON_T_OFFSET;
1854
1855 if (data->flags & LM90_HAVE_EMERGENCY) {
1856 data->channel_config[0] |= HWMON_T_EMERGENCY |
1857 HWMON_T_EMERGENCY_HYST;
1858 data->channel_config[1] |= HWMON_T_EMERGENCY |
1859 HWMON_T_EMERGENCY_HYST;
1860 }
1861
1862 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1863 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1864 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1865 }
1866
1867 if (data->flags & LM90_HAVE_TEMP3) {
1868 data->channel_config[2] = HWMON_T_INPUT |
1869 HWMON_T_MIN | HWMON_T_MAX |
1870 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1871 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1872 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1873 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1874 HWMON_T_FAULT;
1875 }
1876
a095f687 1877 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
06e1c0a2 1878
0c01b644
GR
1879 /* Set maximum conversion rate */
1880 data->max_convrate = lm90_params[data->kind].max_convrate;
1881
1da177e4 1882 /* Initialize the LM90 chip */
37ad04d7
GR
1883 err = lm90_init_client(client, data);
1884 if (err < 0) {
1885 dev_err(dev, "Failed to initialize device\n");
1886 return err;
1887 }
1da177e4 1888
eb1c8f43
GR
1889 /*
1890 * The 'pec' attribute is attached to the i2c device and thus created
1891 * separately.
1892 */
b2589ab0
JD
1893 if (client->flags & I2C_CLIENT_PEC) {
1894 err = device_create_file(dev, &dev_attr_pec);
11e57812 1895 if (err)
1f17a444 1896 return err;
c5fcf01b
GR
1897 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1898 if (err)
1899 return err;
06e1c0a2 1900 }
0e39e01c 1901
eb1c8f43
GR
1902 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1903 data, &data->chip,
1904 NULL);
6e5f62b9
GR
1905 if (IS_ERR(hwmon_dev))
1906 return PTR_ERR(hwmon_dev);
943b0830 1907
109b1283
WN
1908 if (client->irq) {
1909 dev_dbg(dev, "IRQ: %d\n", client->irq);
1910 err = devm_request_threaded_irq(dev, client->irq,
1911 NULL, lm90_irq_thread,
1912 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1913 "lm90", client);
1914 if (err < 0) {
1915 dev_err(dev, "cannot request IRQ %d\n", client->irq);
6e5f62b9 1916 return err;
109b1283
WN
1917 }
1918 }
1919
1da177e4
LT
1920 return 0;
1921}
1922
b4f21054
BT
1923static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1924 unsigned int flag)
53de3342 1925{
072de496 1926 u16 alarms;
06e1c0a2 1927
b4f21054
BT
1928 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1929 return;
1930
072de496 1931 if (lm90_is_tripped(client, &alarms)) {
f36ffeab
GR
1932 /*
1933 * Disable ALERT# output, because these chips don't implement
1934 * SMBus alert correctly; they should only hold the alert line
1935 * low briefly.
1936 */
072de496
WN
1937 struct lm90_data *data = i2c_get_clientdata(client);
1938
37ad04d7
GR
1939 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1940 (alarms & data->alert_alarms)) {
53de3342 1941 dev_dbg(&client->dev, "Disabling ALERT#\n");
7a1d220c 1942 lm90_update_confreg(data, data->config | 0x80);
53de3342 1943 }
072de496
WN
1944 } else {
1945 dev_info(&client->dev, "Everything OK\n");
53de3342
JD
1946 }
1947}
1948
15b66ab6
GR
1949static struct i2c_driver lm90_driver = {
1950 .class = I2C_CLASS_HWMON,
1951 .driver = {
1952 .name = "lm90",
df8d57bf 1953 .of_match_table = of_match_ptr(lm90_of_match),
15b66ab6
GR
1954 },
1955 .probe = lm90_probe,
15b66ab6
GR
1956 .alert = lm90_alert,
1957 .id_table = lm90_id,
1958 .detect = lm90_detect,
1959 .address_list = normal_i2c,
1960};
1da177e4 1961
f0967eea 1962module_i2c_driver(lm90_driver);
1da177e4 1963
7c81c60f 1964MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1da177e4
LT
1965MODULE_DESCRIPTION("LM90/ADM1032 driver");
1966MODULE_LICENSE("GPL");