[thirdparty/kernel/stable.git] / drivers / i2c / busses / i2c-ali15x3.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
    Copyright (c) 1999  Frodo Looijaard <frodol@dds.nl> and
    Philip Edelbrock <phil@netroedge.com> and
    Mark D. Studebaker <mdsxyz123@yahoo.com>

*/

/*
    This is the driver for the SMB Host controller on
    Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.

    The M1543C is a South bridge for desktop systems.
    The M1533 is a South bridge for portable systems.
    They are part of the following ALI chipsets:
       "Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
       with AGP and 100MHz CPU Front Side bus
       "Aladdin V": Includes the M1541 Socket 7 North bridge
       with AGP and 100MHz CPU Front Side bus
       "Aladdin IV": Includes the M1541 Socket 7 North bridge
       with host bus up to 83.3 MHz.
    For an overview of these chips see http://www.acerlabs.com

    The M1533/M1543C devices appear as FOUR separate devices
    on the PCI bus. An output of lspci will show something similar
    to the following:

	00:02.0 USB Controller: Acer Laboratories Inc. M5237
	00:03.0 Bridge: Acer Laboratories Inc. M7101
	00:07.0 ISA bridge: Acer Laboratories Inc. M1533
	00:0f.0 IDE interface: Acer Laboratories Inc. M5229

    The SMB controller is part of the 7101 device, which is an
    ACPI-compliant Power Management Unit (PMU).

    The whole 7101 device has to be enabled for the SMB to work.
    You can't just enable the SMB alone.
    The SMB and the ACPI have separate I/O spaces.
    We make sure that the SMB is enabled. We leave the ACPI alone.

    This driver controls the SMB Host only.
    The SMB Slave controller on the M15X3 is not enabled.

    This driver does not use interrupts.
*/

/* Note: we assume there can only be one ALI15X3, with one SMBus interface */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/stddef.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/acpi.h>
#include <linux/io.h>

/* ALI15X3 SMBus address offsets */
#define SMBHSTSTS	(0 + ali15x3_smba)
#define SMBHSTCNT	(1 + ali15x3_smba)
#define SMBHSTSTART	(2 + ali15x3_smba)
#define SMBHSTCMD	(7 + ali15x3_smba)
#define SMBHSTADD	(3 + ali15x3_smba)
#define SMBHSTDAT0	(4 + ali15x3_smba)
#define SMBHSTDAT1	(5 + ali15x3_smba)
#define SMBBLKDAT	(6 + ali15x3_smba)

/* PCI Address Constants */
#define SMBCOM		0x004
#define SMBBA		0x014
#define SMBATPC		0x05B	/* used to unlock xxxBA registers */
#define SMBHSTCFG	0x0E0
#define SMBSLVC		0x0E1
#define SMBCLK		0x0E2
#define SMBREV		0x008

/* Other settings */
#define MAX_TIMEOUT		200	/* times 1/100 sec */
#define ALI15X3_SMB_IOSIZE	32

/* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
   We don't use these here. If the bases aren't set to some value we
   tell user to upgrade BIOS and we fail.
*/
#define ALI15X3_SMB_DEFAULTBASE	0xE800

/* ALI15X3 address lock bits */
#define ALI15X3_LOCK		0x06

/* ALI15X3 command constants */
#define ALI15X3_ABORT		0x02
#define ALI15X3_T_OUT		0x04
#define ALI15X3_QUICK		0x00
#define ALI15X3_BYTE		0x10
#define ALI15X3_BYTE_DATA	0x20
#define ALI15X3_WORD_DATA	0x30
#define ALI15X3_BLOCK_DATA	0x40
#define ALI15X3_BLOCK_CLR	0x80

/* ALI15X3 status register bits */
#define ALI15X3_STS_IDLE	0x04
#define ALI15X3_STS_BUSY	0x08
#define ALI15X3_STS_DONE	0x10
#define ALI15X3_STS_DEV		0x20	/* device error */
#define ALI15X3_STS_COLL	0x40	/* collision or no response */
#define ALI15X3_STS_TERM	0x80	/* terminated by abort */
#define ALI15X3_STS_ERR		0xE0	/* all the bad error bits */


/* If force_addr is set to anything different from 0, we forcibly enable
   the device at the given address. */
static u16 force_addr;
module_param_hw(force_addr, ushort, ioport, 0);
MODULE_PARM_DESC(force_addr,
		 "Initialize the base address of the i2c controller");

static struct pci_driver ali15x3_driver;
static unsigned short ali15x3_smba;

static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
{
	u16 a;
	unsigned char temp;

	/* Check the following things:
		- SMB I/O address is initialized
		- Device is enabled
		- We can use the addresses
	*/

	/* Unlock the register.
	   The data sheet says that the address registers are read-only
	   if the lock bits are 1, but in fact the address registers
	   are zero unless you clear the lock bits.
	*/
	pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
	if (temp & ALI15X3_LOCK) {
		temp &= ~ALI15X3_LOCK;
		pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
	}

	/* Determine the address of the SMBus area */
	pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
	ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
	if (ali15x3_smba == 0 && force_addr == 0) {
		dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
			"- upgrade BIOS or use force_addr=0xaddr\n");
		return -ENODEV;
	}

	if(force_addr)
		ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);

	if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
			      ali15x3_driver.name))
		return -EBUSY;

	if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
			    ali15x3_driver.name)) {
		dev_err(&ALI15X3_dev->dev,
			"ALI15X3_smb region 0x%x already in use!\n",
			ali15x3_smba);
		return -ENODEV;
	}

	if(force_addr) {
		dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
			ali15x3_smba);
		if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
								SMBBA,
								ali15x3_smba))
			goto error;
		if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
								SMBBA, &a))
			goto error;
		if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
			/* make sure it works */
			dev_err(&ALI15X3_dev->dev,
				"force address failed - not supported?\n");
			goto error;
		}
	}
	/* check if whole device is enabled */
	pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
	if ((temp & 1) == 0) {
		dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
		pci_write_config_byte(ALI15X3_dev, SMBCOM, temp | 0x01);
	}

	/* Is SMB Host controller enabled? */
	pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
	if ((temp & 1) == 0) {
		dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
		pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp | 0x01);
	}

	/* set SMB clock to 74KHz as recommended in data sheet */
	pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);

	/*
	  The interrupt routing for SMB is set up in register 0x77 in the
	  1533 ISA Bridge device, NOT in the 7101 device.
	  Don't bother with finding the 1533 device and reading the register.
	if ((....... & 0x0F) == 1)
		dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
	*/
	pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
	dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
	dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);

	return 0;
error:
	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
	return -ENODEV;
}

/* Another internally used function */
static int ali15x3_transaction(struct i2c_adapter *adap)
{
	int temp;
	int result = 0;
	int timeout = 0;

	dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));

	/* get status */
	temp = inb_p(SMBHSTSTS);

	/* Make sure the SMBus host is ready to start transmitting */
	/* Check the busy bit first */
	if (temp & ALI15X3_STS_BUSY) {
	/*
	   If the host controller is still busy, it may have timed out in the
	   previous transaction, resulting in a "SMBus Timeout" Dev.
	   I've tried the following to reset a stuck busy bit.
		1. Reset the controller with an ABORT command.
		   (this doesn't seem to clear the controller if an external
		   device is hung)
		2. Reset the controller and the other SMBus devices with a
		   T_OUT command.  (this clears the host busy bit if an
		   external device is hung, but it comes back upon a new access
		   to a device)
		3. Disable and reenable the controller in SMBHSTCFG
	   Worst case, nothing seems to work except power reset.
	*/
	/* Abort - reset the host controller */
	/*
	   Try resetting entire SMB bus, including other devices -
	   This may not work either - it clears the BUSY bit but
	   then the BUSY bit may come back on when you try and use the chip again.
	   If that's the case you are stuck.
	*/
		dev_info(&adap->dev, "Resetting entire SMB Bus to "
			"clear busy condition (%02x)\n", temp);
		outb_p(ALI15X3_T_OUT, SMBHSTCNT);
		temp = inb_p(SMBHSTSTS);
	}

	/* now check the error bits and the busy bit */
	if (temp & (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
		/* do a clear-on-write */
		outb_p(0xFF, SMBHSTSTS);
		if ((temp = inb_p(SMBHSTSTS)) &
		    (ALI15X3_STS_ERR | ALI15X3_STS_BUSY)) {
			/* this is probably going to be correctable only by a power reset
			   as one of the bits now appears to be stuck */
			/* This may be a bus or device with electrical problems. */
			dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
				"controller or device on bus is probably hung\n",
				temp);
			return -EBUSY;
		}
	} else {
		/* check and clear done bit */
		if (temp & ALI15X3_STS_DONE) {
			outb_p(temp, SMBHSTSTS);
		}
	}

	/* start the transaction by writing anything to the start register */
	outb_p(0xFF, SMBHSTSTART);

	/* We will always wait for a fraction of a second! */
	timeout = 0;
	do {
		msleep(1);
		temp = inb_p(SMBHSTSTS);
	} while ((!(temp & (ALI15X3_STS_ERR | ALI15X3_STS_DONE)))
		 && (timeout++ < MAX_TIMEOUT));

	/* If the SMBus is still busy, we give up */
	if (timeout > MAX_TIMEOUT) {
		result = -ETIMEDOUT;
		dev_err(&adap->dev, "SMBus Timeout!\n");
	}

	if (temp & ALI15X3_STS_TERM) {
		result = -EIO;
		dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
	}

	/*
	  Unfortunately the ALI SMB controller maps "no response" and "bus
	  collision" into a single bit. No response is the usual case so don't
	  do a printk.
	  This means that bus collisions go unreported.
	*/
	if (temp & ALI15X3_STS_COLL) {
		result = -ENXIO;
		dev_dbg(&adap->dev,
			"Error: no response or bus collision ADD=%02x\n",
			inb_p(SMBHSTADD));
	}

	/* haven't ever seen this */
	if (temp & ALI15X3_STS_DEV) {
		result = -EIO;
		dev_err(&adap->dev, "Error: device error\n");
	}
	dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
		"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
		inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
		inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
	return result;
}

/* Return negative errno on error. */
static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
		   unsigned short flags, char read_write, u8 command,
		   int size, union i2c_smbus_data * data)
{
	int i, len;
	int temp;
	int timeout;

	/* clear all the bits (clear-on-write) */
	outb_p(0xFF, SMBHSTSTS);
	/* make sure SMBus is idle */
	temp = inb_p(SMBHSTSTS);
	for (timeout = 0;
	     (timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
	     timeout++) {
		msleep(1);
		temp = inb_p(SMBHSTSTS);
	}
	if (timeout >= MAX_TIMEOUT) {
		dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
	}

	switch (size) {
	case I2C_SMBUS_QUICK:
		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMBHSTADD);
		size = ALI15X3_QUICK;
		break;
	case I2C_SMBUS_BYTE:
		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMBHSTADD);
		if (read_write == I2C_SMBUS_WRITE)
			outb_p(command, SMBHSTCMD);
		size = ALI15X3_BYTE;
		break;
	case I2C_SMBUS_BYTE_DATA:
		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMBHSTADD);
		outb_p(command, SMBHSTCMD);
		if (read_write == I2C_SMBUS_WRITE)
			outb_p(data->byte, SMBHSTDAT0);
		size = ALI15X3_BYTE_DATA;
		break;
	case I2C_SMBUS_WORD_DATA:
		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMBHSTADD);
		outb_p(command, SMBHSTCMD);
		if (read_write == I2C_SMBUS_WRITE) {
			outb_p(data->word & 0xff, SMBHSTDAT0);
			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
		}
		size = ALI15X3_WORD_DATA;
		break;
	case I2C_SMBUS_BLOCK_DATA:
		outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
		       SMBHSTADD);
		outb_p(command, SMBHSTCMD);
		if (read_write == I2C_SMBUS_WRITE) {
			len = data->block[0];
			if (len < 0) {
				len = 0;
				data->block[0] = len;
			}
			if (len > 32) {
				len = 32;
				data->block[0] = len;
			}
			outb_p(len, SMBHSTDAT0);
			/* Reset SMBBLKDAT */
			outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
			for (i = 1; i <= len; i++)
				outb_p(data->block[i], SMBBLKDAT);
		}
		size = ALI15X3_BLOCK_DATA;
		break;
	default:
		dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
		return -EOPNOTSUPP;
	}

	outb_p(size, SMBHSTCNT);	/* output command */

	temp = ali15x3_transaction(adap);
	if (temp)
		return temp;

	if ((read_write == I2C_SMBUS_WRITE) || (size == ALI15X3_QUICK))
		return 0;


	switch (size) {
	case ALI15X3_BYTE:	/* Result put in SMBHSTDAT0 */
		data->byte = inb_p(SMBHSTDAT0);
		break;
	case ALI15X3_BYTE_DATA:
		data->byte = inb_p(SMBHSTDAT0);
		break;
	case ALI15X3_WORD_DATA:
		data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
		break;
	case ALI15X3_BLOCK_DATA:
		len = inb_p(SMBHSTDAT0);
		if (len > 32)
			len = 32;
		data->block[0] = len;
		/* Reset SMBBLKDAT */
		outb_p(inb_p(SMBHSTCNT) | ALI15X3_BLOCK_CLR, SMBHSTCNT);
		for (i = 1; i <= data->block[0]; i++) {
			data->block[i] = inb_p(SMBBLKDAT);
			dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
				len, i, data->block[i]);
		}
		break;
	}
	return 0;
}

static u32 ali15x3_func(struct i2c_adapter *adapter)
{
	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
	    I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
	    I2C_FUNC_SMBUS_BLOCK_DATA;
}

static const struct i2c_algorithm smbus_algorithm = {
	.smbus_xfer	= ali15x3_access,
	.functionality	= ali15x3_func,
};

static struct i2c_adapter ali15x3_adapter = {
	.owner		= THIS_MODULE,
	.class          = I2C_CLASS_HWMON | I2C_CLASS_SPD,
	.algo		= &smbus_algorithm,
};

static const struct pci_device_id ali15x3_ids[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
	{ 0, }
};

MODULE_DEVICE_TABLE (pci, ali15x3_ids);

static int ali15x3_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	if (ali15x3_setup(dev)) {
		dev_err(&dev->dev,
			"ALI15X3 not detected, module not inserted.\n");
		return -ENODEV;
	}

	/* set up the sysfs linkage to our parent device */
	ali15x3_adapter.dev.parent = &dev->dev;

	snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
		"SMBus ALI15X3 adapter at %04x", ali15x3_smba);
	return i2c_add_adapter(&ali15x3_adapter);
}

static void ali15x3_remove(struct pci_dev *dev)
{
	i2c_del_adapter(&ali15x3_adapter);
	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
}

static struct pci_driver ali15x3_driver = {
	.name		= "ali15x3_smbus",
	.id_table	= ali15x3_ids,
	.probe		= ali15x3_probe,
	.remove		= ali15x3_remove,
};

module_pci_driver(ali15x3_driver);

MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
		"Philip Edelbrock <phil@netroedge.com>, "
		"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
MODULE_DESCRIPTION("ALI15X3 SMBus driver");
MODULE_LICENSE("GPL");
Commit	Line	Data
c942fddf	1	// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4	2	/*
1da177e4 LT	3	Copyright (c) 1999 Frodo Looijaard <frodol@dds.nl> and
	4	Philip Edelbrock <phil@netroedge.com> and
	5	Mark D. Studebaker <mdsxyz123@yahoo.com>
	6
1da177e4 LT	7	*/
	8
	9	/*
	10	This is the driver for the SMB Host controller on
	11	Acer Labs Inc. (ALI) M1541 and M1543C South Bridges.
	12
	13	The M1543C is a South bridge for desktop systems.
	14	The M1533 is a South bridge for portable systems.
	15	They are part of the following ALI chipsets:
	16	"Aladdin Pro 2": Includes the M1621 Slot 1 North bridge
	17	with AGP and 100MHz CPU Front Side bus
	18	"Aladdin V": Includes the M1541 Socket 7 North bridge
	19	with AGP and 100MHz CPU Front Side bus
	20	"Aladdin IV": Includes the M1541 Socket 7 North bridge
	21	with host bus up to 83.3 MHz.
	22	For an overview of these chips see http://www.acerlabs.com
	23
	24	The M1533/M1543C devices appear as FOUR separate devices
	25	on the PCI bus. An output of lspci will show something similar
	26	to the following:
	27
	28	00:02.0 USB Controller: Acer Laboratories Inc. M5237
	29	00:03.0 Bridge: Acer Laboratories Inc. M7101
	30	00:07.0 ISA bridge: Acer Laboratories Inc. M1533
	31	00:0f.0 IDE interface: Acer Laboratories Inc. M5229
	32
	33	The SMB controller is part of the 7101 device, which is an
	34	ACPI-compliant Power Management Unit (PMU).
	35
	36	The whole 7101 device has to be enabled for the SMB to work.
	37	You can't just enable the SMB alone.
	38	The SMB and the ACPI have separate I/O spaces.
	39	We make sure that the SMB is enabled. We leave the ACPI alone.
	40
	41	This driver controls the SMB Host only.
	42	The SMB Slave controller on the M15X3 is not enabled.
	43
	44	This driver does not use interrupts.
	45	*/
	46
	47	/* Note: we assume there can only be one ALI15X3, with one SMBus interface */
	48
1da177e4 LT	49	#include <linux/module.h>
	50	#include <linux/pci.h>
	51	#include <linux/kernel.h>
	52	#include <linux/stddef.h>
1da177e4 LT	53	#include <linux/ioport.h>
	54	#include <linux/delay.h>
	55	#include <linux/i2c.h>
54fb4a05	56	#include <linux/acpi.h>
21782180	57	#include <linux/io.h>
1da177e4 LT	58
	59	/* ALI15X3 SMBus address offsets */
	60	#define SMBHSTSTS (0 + ali15x3_smba)
	61	#define SMBHSTCNT (1 + ali15x3_smba)
	62	#define SMBHSTSTART (2 + ali15x3_smba)
	63	#define SMBHSTCMD (7 + ali15x3_smba)
	64	#define SMBHSTADD (3 + ali15x3_smba)
	65	#define SMBHSTDAT0 (4 + ali15x3_smba)
	66	#define SMBHSTDAT1 (5 + ali15x3_smba)
	67	#define SMBBLKDAT (6 + ali15x3_smba)
	68
	69	/* PCI Address Constants */
	70	#define SMBCOM 0x004
	71	#define SMBBA 0x014
	72	#define SMBATPC 0x05B /* used to unlock xxxBA registers */
	73	#define SMBHSTCFG 0x0E0
	74	#define SMBSLVC 0x0E1
	75	#define SMBCLK 0x0E2
	76	#define SMBREV 0x008
	77
	78	/* Other settings */
	79	#define MAX_TIMEOUT 200 /* times 1/100 sec */
	80	#define ALI15X3_SMB_IOSIZE 32
	81
	82	/* this is what the Award 1004 BIOS sets them to on a ASUS P5A MB.
	83	We don't use these here. If the bases aren't set to some value we
	84	tell user to upgrade BIOS and we fail.
	85	*/
	86	#define ALI15X3_SMB_DEFAULTBASE 0xE800
	87
	88	/* ALI15X3 address lock bits */
	89	#define ALI15X3_LOCK 0x06
	90
	91	/* ALI15X3 command constants */
	92	#define ALI15X3_ABORT 0x02
	93	#define ALI15X3_T_OUT 0x04
	94	#define ALI15X3_QUICK 0x00
	95	#define ALI15X3_BYTE 0x10
	96	#define ALI15X3_BYTE_DATA 0x20
	97	#define ALI15X3_WORD_DATA 0x30
	98	#define ALI15X3_BLOCK_DATA 0x40
	99	#define ALI15X3_BLOCK_CLR 0x80
	100
	101	/* ALI15X3 status register bits */
	102	#define ALI15X3_STS_IDLE 0x04
	103	#define ALI15X3_STS_BUSY 0x08
	104	#define ALI15X3_STS_DONE 0x10
	105	#define ALI15X3_STS_DEV 0x20 /* device error */
	106	#define ALI15X3_STS_COLL 0x40 /* collision or no response */
	107	#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
	108	#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
	109
	110
	111	/* If force_addr is set to anything different from 0, we forcibly enable
	112	the device at the given address. */
60507095	113	static u16 force_addr;
c78babcc	114	module_param_hw(force_addr, ushort, ioport, 0);
1da177e4 LT	115	MODULE_PARM_DESC(force_addr,
	116	"Initialize the base address of the i2c controller");
	117
d6072f84	118	static struct pci_driver ali15x3_driver;
60507095	119	static unsigned short ali15x3_smba;
1da177e4	120
0b255e92	121	static int ali15x3_setup(struct pci_dev *ALI15X3_dev)
1da177e4 LT	122	{
	123	u16 a;
	124	unsigned char temp;
	125
	126	/* Check the following things:
	127	- SMB I/O address is initialized
	128	- Device is enabled
	129	- We can use the addresses
	130	*/
	131
	132	/* Unlock the register.
	133	The data sheet says that the address registers are read-only
	134	if the lock bits are 1, but in fact the address registers
	135	are zero unless you clear the lock bits.
	136	*/
	137	pci_read_config_byte(ALI15X3_dev, SMBATPC, &temp);
	138	if (temp & ALI15X3_LOCK) {
	139	temp &= ~ALI15X3_LOCK;
	140	pci_write_config_byte(ALI15X3_dev, SMBATPC, temp);
	141	}
	142
	143	/* Determine the address of the SMBus area */
	144	pci_read_config_word(ALI15X3_dev, SMBBA, &ali15x3_smba);
	145	ali15x3_smba &= (0xffff & ~(ALI15X3_SMB_IOSIZE - 1));
	146	if (ali15x3_smba == 0 && force_addr == 0) {
	147	dev_err(&ALI15X3_dev->dev, "ALI15X3_smb region uninitialized "
	148	"- upgrade BIOS or use force_addr=0xaddr\n");
	149	return -ENODEV;
	150	}
	151
	152	if(force_addr)
	153	ali15x3_smba = force_addr & ~(ALI15X3_SMB_IOSIZE - 1);
	154
54fb4a05 JD	155	if (acpi_check_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
	156	ali15x3_driver.name))
	157	return -EBUSY;
	158
d6072f84 JD	159	if (!request_region(ali15x3_smba, ALI15X3_SMB_IOSIZE,
d6072f84 JD	160	ali15x3_driver.name)) {
1da177e4 LT	161	dev_err(&ALI15X3_dev->dev,
	162	"ALI15X3_smb region 0x%x already in use!\n",
	163	ali15x3_smba);
	164	return -ENODEV;
	165	}
	166
	167	if(force_addr) {
	168	dev_info(&ALI15X3_dev->dev, "forcing ISA address 0x%04X\n",
	169	ali15x3_smba);
	170	if (PCIBIOS_SUCCESSFUL != pci_write_config_word(ALI15X3_dev,
	171	SMBBA,
	172	ali15x3_smba))
	173	goto error;
	174	if (PCIBIOS_SUCCESSFUL != pci_read_config_word(ALI15X3_dev,
	175	SMBBA, &a))
	176	goto error;
	177	if ((a & ~(ALI15X3_SMB_IOSIZE - 1)) != ali15x3_smba) {
	178	/* make sure it works */
	179	dev_err(&ALI15X3_dev->dev,
	180	"force address failed - not supported?\n");
	181	goto error;
	182	}
	183	}
	184	/* check if whole device is enabled */
	185	pci_read_config_byte(ALI15X3_dev, SMBCOM, &temp);
	186	if ((temp & 1) == 0) {
	187	dev_info(&ALI15X3_dev->dev, "enabling SMBus device\n");
	188	pci_write_config_byte(ALI15X3_dev, SMBCOM, temp \| 0x01);
	189	}
	190
	191	/* Is SMB Host controller enabled? */
	192	pci_read_config_byte(ALI15X3_dev, SMBHSTCFG, &temp);
	193	if ((temp & 1) == 0) {
	194	dev_info(&ALI15X3_dev->dev, "enabling SMBus controller\n");
	195	pci_write_config_byte(ALI15X3_dev, SMBHSTCFG, temp \| 0x01);
	196	}
	197
	198	/* set SMB clock to 74KHz as recommended in data sheet */
	199	pci_write_config_byte(ALI15X3_dev, SMBCLK, 0x20);
	200
	201	/*
	202	The interrupt routing for SMB is set up in register 0x77 in the
	203	1533 ISA Bridge device, NOT in the 7101 device.
	204	Don't bother with finding the 1533 device and reading the register.
	205	if ((....... & 0x0F) == 1)
	206	dev_dbg(&ALI15X3_dev->dev, "ALI15X3 using Interrupt 9 for SMBus.\n");
	207	*/
	208	pci_read_config_byte(ALI15X3_dev, SMBREV, &temp);
	209	dev_dbg(&ALI15X3_dev->dev, "SMBREV = 0x%X\n", temp);
	210	dev_dbg(&ALI15X3_dev->dev, "iALI15X3_smba = 0x%X\n", ali15x3_smba);
	211
	212	return 0;
	213	error:
	214	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
	215	return -ENODEV;
	216	}
	217
	218	/* Another internally used function */
	219	static int ali15x3_transaction(struct i2c_adapter *adap)
	220	{
	221	int temp;
	222	int result = 0;
	223	int timeout = 0;
	224
225	dev_dbg(&adap->dev, "Transaction (pre): STS=%02x, CNT=%02x, CMD=%02x, "
226	"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
227	inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
228	inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
229
230	/* get status */
231	temp = inb_p(SMBHSTSTS);
232
233	/* Make sure the SMBus host is ready to start transmitting */
234	/* Check the busy bit first */
235	if (temp & ALI15X3_STS_BUSY) {
236	/*
237	If the host controller is still busy, it may have timed out in the
238	previous transaction, resulting in a "SMBus Timeout" Dev.
239	I've tried the following to reset a stuck busy bit.
240	1. Reset the controller with an ABORT command.
241	(this doesn't seem to clear the controller if an external
242	device is hung)
243	2. Reset the controller and the other SMBus devices with a
244	T_OUT command. (this clears the host busy bit if an
245	external device is hung, but it comes back upon a new access
246	to a device)
247	3. Disable and reenable the controller in SMBHSTCFG
248	Worst case, nothing seems to work except power reset.
249	*/
250	/* Abort - reset the host controller */
251	/*
252	Try resetting entire SMB bus, including other devices -
253	This may not work either - it clears the BUSY bit but
254	then the BUSY bit may come back on when you try and use the chip again.
255	If that's the case you are stuck.
256	*/
257	dev_info(&adap->dev, "Resetting entire SMB Bus to "
258	"clear busy condition (%02x)\n", temp);
259	outb_p(ALI15X3_T_OUT, SMBHSTCNT);
260	temp = inb_p(SMBHSTSTS);
261	}
262
263	/* now check the error bits and the busy bit */
264	if (temp & (ALI15X3_STS_ERR \| ALI15X3_STS_BUSY)) {
265	/* do a clear-on-write */
266	outb_p(0xFF, SMBHSTSTS);
267	if ((temp = inb_p(SMBHSTSTS)) &
268	(ALI15X3_STS_ERR \| ALI15X3_STS_BUSY)) {
269	/* this is probably going to be correctable only by a power reset
270	as one of the bits now appears to be stuck */
271	/* This may be a bus or device with electrical problems. */
272	dev_err(&adap->dev, "SMBus reset failed! (0x%02x) - "
273	"controller or device on bus is probably hung\n",
274	temp);
97140342	275	return -EBUSY;
1da177e4 LT	276	}
	277	} else {
	278	/* check and clear done bit */
	279	if (temp & ALI15X3_STS_DONE) {
	280	outb_p(temp, SMBHSTSTS);
	281	}
	282	}
	283
	284	/* start the transaction by writing anything to the start register */
	285	outb_p(0xFF, SMBHSTSTART);
	286
	287	/* We will always wait for a fraction of a second! */
	288	timeout = 0;
	289	do {
	290	msleep(1);
	291	temp = inb_p(SMBHSTSTS);
	292	} while ((!(temp & (ALI15X3_STS_ERR \| ALI15X3_STS_DONE)))
	293	&& (timeout++ < MAX_TIMEOUT));
	294
	295	/* If the SMBus is still busy, we give up */
4ccc28f7	296	if (timeout > MAX_TIMEOUT) {
97140342	297	result = -ETIMEDOUT;
1da177e4 LT	298	dev_err(&adap->dev, "SMBus Timeout!\n");
	299	}
	300
	301	if (temp & ALI15X3_STS_TERM) {
97140342	302	result = -EIO;
1da177e4 LT	303	dev_dbg(&adap->dev, "Error: Failed bus transaction\n");
	304	}
	305
	306	/*
	307	Unfortunately the ALI SMB controller maps "no response" and "bus
25985edc	308	collision" into a single bit. No response is the usual case so don't
1da177e4 LT	309	do a printk.
	310	This means that bus collisions go unreported.
	311	*/
	312	if (temp & ALI15X3_STS_COLL) {
97140342	313	result = -ENXIO;
1da177e4 LT	314	dev_dbg(&adap->dev,
	315	"Error: no response or bus collision ADD=%02x\n",
	316	inb_p(SMBHSTADD));
	317	}
	318
	319	/* haven't ever seen this */
	320	if (temp & ALI15X3_STS_DEV) {
97140342	321	result = -EIO;
1da177e4 LT	322	dev_err(&adap->dev, "Error: device error\n");
	323	}
	324	dev_dbg(&adap->dev, "Transaction (post): STS=%02x, CNT=%02x, CMD=%02x, "
	325	"ADD=%02x, DAT0=%02x, DAT1=%02x\n", inb_p(SMBHSTSTS),
	326	inb_p(SMBHSTCNT), inb_p(SMBHSTCMD), inb_p(SMBHSTADD),
	327	inb_p(SMBHSTDAT0), inb_p(SMBHSTDAT1));
	328	return result;
	329	}
	330
97140342	331	/* Return negative errno on error. */
1da177e4 LT	332	static s32 ali15x3_access(struct i2c_adapter * adap, u16 addr,
	333	unsigned short flags, char read_write, u8 command,
	334	int size, union i2c_smbus_data * data)
	335	{
	336	int i, len;
	337	int temp;
	338	int timeout;
	339
	340	/* clear all the bits (clear-on-write) */
	341	outb_p(0xFF, SMBHSTSTS);
	342	/* make sure SMBus is idle */
	343	temp = inb_p(SMBHSTSTS);
	344	for (timeout = 0;
	345	(timeout < MAX_TIMEOUT) && !(temp & ALI15X3_STS_IDLE);
	346	timeout++) {
	347	msleep(1);
	348	temp = inb_p(SMBHSTSTS);
	349	}
	350	if (timeout >= MAX_TIMEOUT) {
	351	dev_err(&adap->dev, "Idle wait Timeout! STS=0x%02x\n", temp);
	352	}
	353
	354	switch (size) {
1da177e4 LT	355	case I2C_SMBUS_QUICK:
	356	outb_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
	357	SMBHSTADD);
	358	size = ALI15X3_QUICK;
	359	break;
	360	case I2C_SMBUS_BYTE:
	361	outb_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
	362	SMBHSTADD);
	363	if (read_write == I2C_SMBUS_WRITE)
	364	outb_p(command, SMBHSTCMD);
	365	size = ALI15X3_BYTE;
	366	break;
	367	case I2C_SMBUS_BYTE_DATA:
	368	outb_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
	369	SMBHSTADD);
	370	outb_p(command, SMBHSTCMD);
	371	if (read_write == I2C_SMBUS_WRITE)
	372	outb_p(data->byte, SMBHSTDAT0);
	373	size = ALI15X3_BYTE_DATA;
	374	break;
	375	case I2C_SMBUS_WORD_DATA:
	376	outb_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
	377	SMBHSTADD);
	378	outb_p(command, SMBHSTCMD);
	379	if (read_write == I2C_SMBUS_WRITE) {
	380	outb_p(data->word & 0xff, SMBHSTDAT0);
	381	outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1);
	382	}
	383	size = ALI15X3_WORD_DATA;
	384	break;
	385	case I2C_SMBUS_BLOCK_DATA:
	386	outb_p(((addr & 0x7f) << 1) \| (read_write & 0x01),
	387	SMBHSTADD);
	388	outb_p(command, SMBHSTCMD);
	389	if (read_write == I2C_SMBUS_WRITE) {
	390	len = data->block[0];
	391	if (len < 0) {
	392	len = 0;
	393	data->block[0] = len;
	394	}
	395	if (len > 32) {
	396	len = 32;
	397	data->block[0] = len;
	398	}
	399	outb_p(len, SMBHSTDAT0);
	400	/* Reset SMBBLKDAT */
	401	outb_p(inb_p(SMBHSTCNT) \| ALI15X3_BLOCK_CLR, SMBHSTCNT);
	402	for (i = 1; i <= len; i++)
	403	outb_p(data->block[i], SMBBLKDAT);
	404	}
	405	size = ALI15X3_BLOCK_DATA;
	406	break;
ac7fc4fb JD	407	default:
	408	dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
	409	return -EOPNOTSUPP;
1da177e4 LT	410	}
	411
	412	outb_p(size, SMBHSTCNT); /* output command */
	413
97140342 DB	414	temp = ali15x3_transaction(adap);
	415	if (temp)
	416	return temp;
1da177e4 LT	417
	418	if ((read_write == I2C_SMBUS_WRITE) \|\| (size == ALI15X3_QUICK))
	419	return 0;
	420
	421
	422	switch (size) {
	423	case ALI15X3_BYTE: /* Result put in SMBHSTDAT0 */
	424	data->byte = inb_p(SMBHSTDAT0);
	425	break;
	426	case ALI15X3_BYTE_DATA:
	427	data->byte = inb_p(SMBHSTDAT0);
	428	break;
	429	case ALI15X3_WORD_DATA:
	430	data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8);
	431	break;
	432	case ALI15X3_BLOCK_DATA:
	433	len = inb_p(SMBHSTDAT0);
	434	if (len > 32)
	435	len = 32;
	436	data->block[0] = len;
	437	/* Reset SMBBLKDAT */
	438	outb_p(inb_p(SMBHSTCNT) \| ALI15X3_BLOCK_CLR, SMBHSTCNT);
	439	for (i = 1; i <= data->block[0]; i++) {
	440	data->block[i] = inb_p(SMBBLKDAT);
	441	dev_dbg(&adap->dev, "Blk: len=%d, i=%d, data=%02x\n",
	442	len, i, data->block[i]);
	443	}
	444	break;
	445	}
	446	return 0;
	447	}
	448
	449	static u32 ali15x3_func(struct i2c_adapter *adapter)
	450	{
	451	return I2C_FUNC_SMBUS_QUICK \| I2C_FUNC_SMBUS_BYTE \|
	452	I2C_FUNC_SMBUS_BYTE_DATA \| I2C_FUNC_SMBUS_WORD_DATA \|
	453	I2C_FUNC_SMBUS_BLOCK_DATA;
	454	}
	455
8f9082c5	456	static const struct i2c_algorithm smbus_algorithm = {
1da177e4 LT	457	.smbus_xfer = ali15x3_access,
	458	.functionality = ali15x3_func,
	459	};
	460
	461	static struct i2c_adapter ali15x3_adapter = {
	462	.owner = THIS_MODULE,
3401b2ff	463	.class = I2C_CLASS_HWMON \| I2C_CLASS_SPD,
1da177e4	464	.algo = &smbus_algorithm,
1da177e4 LT	465	};
1da177e4 LT	466
392debf1	467	static const struct pci_device_id ali15x3_ids[] = {
1da177e4 LT	468	{ PCI_DEVICE(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M7101) },
	469	{ 0, }
	470	};
	471
	472	MODULE_DEVICE_TABLE (pci, ali15x3_ids);
	473
0b255e92	474	static int ali15x3_probe(struct pci_dev dev, const struct pci_device_id id)
1da177e4 LT	475	{
	476	if (ali15x3_setup(dev)) {
	477	dev_err(&dev->dev,
	478	"ALI15X3 not detected, module not inserted.\n");
	479	return -ENODEV;
	480	}
	481
405ae7d3	482	/* set up the sysfs linkage to our parent device */
1da177e4 LT	483	ali15x3_adapter.dev.parent = &dev->dev;
1da177e4 LT	484
2096b956	485	snprintf(ali15x3_adapter.name, sizeof(ali15x3_adapter.name),
1da177e4 LT	486	"SMBus ALI15X3 adapter at %04x", ali15x3_smba);
	487	return i2c_add_adapter(&ali15x3_adapter);
	488	}
	489
0b255e92	490	static void ali15x3_remove(struct pci_dev *dev)
1da177e4 LT	491	{
	492	i2c_del_adapter(&ali15x3_adapter);
	493	release_region(ali15x3_smba, ALI15X3_SMB_IOSIZE);
	494	}
	495
	496	static struct pci_driver ali15x3_driver = {
	497	.name = "ali15x3_smbus",
	498	.id_table = ali15x3_ids,
	499	.probe = ali15x3_probe,
0b255e92	500	.remove = ali15x3_remove,
1da177e4 LT	501	};
1da177e4 LT	502
56f21788	503	module_pci_driver(ali15x3_driver);
1da177e4 LT	504
	505	MODULE_AUTHOR ("Frodo Looijaard <frodol@dds.nl>, "
	506	"Philip Edelbrock <phil@netroedge.com>, "
	507	"and Mark D. Studebaker <mdsxyz123@yahoo.com>");
	508	MODULE_DESCRIPTION("ALI15X3 SMBus driver");
	509	MODULE_LICENSE("GPL");