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529766e0 EM |
1 | // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause |
2 | /* | |
3 | * AMD MP2 PCIe communication driver | |
4 | * | |
5 | * Authors: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> | |
6 | * Elie Morisse <syniurge@gmail.com> | |
7 | */ | |
8 | ||
9 | #include <linux/dma-mapping.h> | |
10 | #include <linux/interrupt.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/pci.h> | |
13 | #include <linux/slab.h> | |
14 | ||
15 | #include "i2c-amd-mp2.h" | |
16 | ||
17 | #include <linux/io-64-nonatomic-lo-hi.h> | |
18 | ||
19 | static void amd_mp2_c2p_mutex_lock(struct amd_i2c_common *i2c_common) | |
20 | { | |
21 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
22 | ||
23 | /* there is only one data mailbox for two i2c adapters */ | |
24 | mutex_lock(&privdata->c2p_lock); | |
25 | privdata->c2p_lock_busid = i2c_common->bus_id; | |
26 | } | |
27 | ||
28 | static void amd_mp2_c2p_mutex_unlock(struct amd_i2c_common *i2c_common) | |
29 | { | |
30 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
31 | ||
32 | if (unlikely(privdata->c2p_lock_busid != i2c_common->bus_id)) { | |
33 | dev_warn(ndev_dev(privdata), | |
34 | "bus %d attempting to unlock C2P locked by bus %d\n", | |
35 | i2c_common->bus_id, privdata->c2p_lock_busid); | |
36 | return; | |
37 | } | |
38 | ||
39 | mutex_unlock(&privdata->c2p_lock); | |
40 | } | |
41 | ||
42 | static int amd_mp2_cmd(struct amd_i2c_common *i2c_common, | |
43 | union i2c_cmd_base i2c_cmd_base) | |
44 | { | |
45 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
46 | void __iomem *reg; | |
47 | ||
48 | i2c_common->reqcmd = i2c_cmd_base.s.i2c_cmd; | |
49 | ||
50 | reg = privdata->mmio + ((i2c_cmd_base.s.bus_id == 1) ? | |
51 | AMD_C2P_MSG1 : AMD_C2P_MSG0); | |
52 | writel(i2c_cmd_base.ul, reg); | |
53 | ||
54 | return 0; | |
55 | } | |
56 | ||
57 | int amd_mp2_bus_enable_set(struct amd_i2c_common *i2c_common, bool enable) | |
58 | { | |
59 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
60 | union i2c_cmd_base i2c_cmd_base; | |
61 | ||
62 | dev_dbg(ndev_dev(privdata), "%s id: %d\n", __func__, | |
63 | i2c_common->bus_id); | |
64 | ||
65 | i2c_cmd_base.ul = 0; | |
66 | i2c_cmd_base.s.i2c_cmd = enable ? i2c_enable : i2c_disable; | |
67 | i2c_cmd_base.s.bus_id = i2c_common->bus_id; | |
68 | i2c_cmd_base.s.i2c_speed = i2c_common->i2c_speed; | |
69 | ||
70 | amd_mp2_c2p_mutex_lock(i2c_common); | |
71 | ||
72 | return amd_mp2_cmd(i2c_common, i2c_cmd_base); | |
73 | } | |
74 | EXPORT_SYMBOL_GPL(amd_mp2_bus_enable_set); | |
75 | ||
76 | static void amd_mp2_cmd_rw_fill(struct amd_i2c_common *i2c_common, | |
77 | union i2c_cmd_base *i2c_cmd_base, | |
78 | enum i2c_cmd reqcmd) | |
79 | { | |
80 | i2c_cmd_base->s.i2c_cmd = reqcmd; | |
81 | i2c_cmd_base->s.bus_id = i2c_common->bus_id; | |
82 | i2c_cmd_base->s.i2c_speed = i2c_common->i2c_speed; | |
83 | i2c_cmd_base->s.slave_addr = i2c_common->msg->addr; | |
84 | i2c_cmd_base->s.length = i2c_common->msg->len; | |
85 | } | |
86 | ||
87 | int amd_mp2_rw(struct amd_i2c_common *i2c_common, enum i2c_cmd reqcmd) | |
88 | { | |
89 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
90 | union i2c_cmd_base i2c_cmd_base; | |
91 | ||
92 | amd_mp2_cmd_rw_fill(i2c_common, &i2c_cmd_base, reqcmd); | |
93 | amd_mp2_c2p_mutex_lock(i2c_common); | |
94 | ||
95 | if (i2c_common->msg->len <= 32) { | |
96 | i2c_cmd_base.s.mem_type = use_c2pmsg; | |
97 | if (reqcmd == i2c_write) | |
98 | memcpy_toio(privdata->mmio + AMD_C2P_MSG2, | |
99 | i2c_common->msg->buf, | |
100 | i2c_common->msg->len); | |
101 | } else { | |
102 | i2c_cmd_base.s.mem_type = use_dram; | |
103 | writeq((u64)i2c_common->dma_addr, | |
104 | privdata->mmio + AMD_C2P_MSG2); | |
105 | } | |
106 | ||
107 | return amd_mp2_cmd(i2c_common, i2c_cmd_base); | |
108 | } | |
109 | EXPORT_SYMBOL_GPL(amd_mp2_rw); | |
110 | ||
111 | static void amd_mp2_pci_check_rw_event(struct amd_i2c_common *i2c_common) | |
112 | { | |
113 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
114 | int len = i2c_common->eventval.r.length; | |
115 | u32 slave_addr = i2c_common->eventval.r.slave_addr; | |
116 | bool err = false; | |
117 | ||
118 | if (unlikely(len != i2c_common->msg->len)) { | |
119 | dev_err(ndev_dev(privdata), | |
120 | "length %d in event doesn't match buffer length %d!\n", | |
121 | len, i2c_common->msg->len); | |
122 | err = true; | |
123 | } | |
124 | ||
125 | if (unlikely(slave_addr != i2c_common->msg->addr)) { | |
126 | dev_err(ndev_dev(privdata), | |
127 | "unexpected slave address %x (expected: %x)!\n", | |
128 | slave_addr, i2c_common->msg->addr); | |
129 | err = true; | |
130 | } | |
131 | ||
132 | if (!err) | |
133 | i2c_common->cmd_success = true; | |
134 | } | |
135 | ||
136 | static void __amd_mp2_process_event(struct amd_i2c_common *i2c_common) | |
137 | { | |
138 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
139 | enum status_type sts = i2c_common->eventval.r.status; | |
140 | enum response_type res = i2c_common->eventval.r.response; | |
141 | int len = i2c_common->eventval.r.length; | |
142 | ||
143 | if (res != command_success) { | |
144 | if (res != command_failed) | |
145 | dev_err(ndev_dev(privdata), "invalid response to i2c command!\n"); | |
146 | return; | |
147 | } | |
148 | ||
149 | switch (i2c_common->reqcmd) { | |
150 | case i2c_read: | |
151 | if (sts == i2c_readcomplete_event) { | |
152 | amd_mp2_pci_check_rw_event(i2c_common); | |
153 | if (len <= 32) | |
154 | memcpy_fromio(i2c_common->msg->buf, | |
155 | privdata->mmio + AMD_C2P_MSG2, | |
156 | len); | |
157 | } else if (sts != i2c_readfail_event) { | |
158 | dev_err(ndev_dev(privdata), | |
159 | "invalid i2c status after read (%d)!\n", sts); | |
160 | } | |
161 | break; | |
162 | case i2c_write: | |
163 | if (sts == i2c_writecomplete_event) | |
164 | amd_mp2_pci_check_rw_event(i2c_common); | |
165 | else if (sts != i2c_writefail_event) | |
166 | dev_err(ndev_dev(privdata), | |
167 | "invalid i2c status after write (%d)!\n", sts); | |
168 | break; | |
169 | case i2c_enable: | |
170 | if (sts == i2c_busenable_complete) | |
171 | i2c_common->cmd_success = true; | |
172 | else if (sts != i2c_busenable_failed) | |
173 | dev_err(ndev_dev(privdata), | |
174 | "invalid i2c status after bus enable (%d)!\n", | |
175 | sts); | |
176 | break; | |
177 | case i2c_disable: | |
178 | if (sts == i2c_busdisable_complete) | |
179 | i2c_common->cmd_success = true; | |
180 | else if (sts != i2c_busdisable_failed) | |
181 | dev_err(ndev_dev(privdata), | |
182 | "invalid i2c status after bus disable (%d)!\n", | |
183 | sts); | |
184 | break; | |
185 | default: | |
186 | break; | |
187 | } | |
188 | } | |
189 | ||
190 | void amd_mp2_process_event(struct amd_i2c_common *i2c_common) | |
191 | { | |
192 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
193 | ||
194 | if (unlikely(i2c_common->reqcmd == i2c_none)) { | |
195 | dev_warn(ndev_dev(privdata), | |
196 | "received msg but no cmd was sent (bus = %d)!\n", | |
197 | i2c_common->bus_id); | |
198 | return; | |
199 | } | |
200 | ||
201 | __amd_mp2_process_event(i2c_common); | |
202 | ||
203 | i2c_common->reqcmd = i2c_none; | |
204 | amd_mp2_c2p_mutex_unlock(i2c_common); | |
205 | } | |
206 | EXPORT_SYMBOL_GPL(amd_mp2_process_event); | |
207 | ||
208 | static irqreturn_t amd_mp2_irq_isr(int irq, void *dev) | |
209 | { | |
210 | struct amd_mp2_dev *privdata = dev; | |
211 | struct amd_i2c_common *i2c_common; | |
212 | u32 val; | |
213 | unsigned int bus_id; | |
214 | void __iomem *reg; | |
215 | enum irqreturn ret = IRQ_NONE; | |
216 | ||
217 | for (bus_id = 0; bus_id < 2; bus_id++) { | |
218 | i2c_common = privdata->busses[bus_id]; | |
219 | if (!i2c_common) | |
220 | continue; | |
221 | ||
222 | reg = privdata->mmio + ((bus_id == 0) ? | |
223 | AMD_P2C_MSG1 : AMD_P2C_MSG2); | |
224 | val = readl(reg); | |
225 | if (val != 0) { | |
226 | writel(0, reg); | |
227 | writel(0, privdata->mmio + AMD_P2C_MSG_INTEN); | |
228 | i2c_common->eventval.ul = val; | |
229 | i2c_common->cmd_completion(i2c_common); | |
230 | ||
231 | ret = IRQ_HANDLED; | |
232 | } | |
233 | } | |
234 | ||
235 | if (ret != IRQ_HANDLED) { | |
236 | val = readl(privdata->mmio + AMD_P2C_MSG_INTEN); | |
237 | if (val != 0) { | |
238 | writel(0, privdata->mmio + AMD_P2C_MSG_INTEN); | |
239 | dev_warn(ndev_dev(privdata), | |
240 | "received irq without message\n"); | |
241 | ret = IRQ_HANDLED; | |
242 | } | |
243 | } | |
244 | ||
245 | return ret; | |
246 | } | |
247 | ||
248 | void amd_mp2_rw_timeout(struct amd_i2c_common *i2c_common) | |
249 | { | |
250 | i2c_common->reqcmd = i2c_none; | |
251 | amd_mp2_c2p_mutex_unlock(i2c_common); | |
252 | } | |
253 | EXPORT_SYMBOL_GPL(amd_mp2_rw_timeout); | |
254 | ||
255 | int amd_mp2_register_cb(struct amd_i2c_common *i2c_common) | |
256 | { | |
257 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
258 | ||
259 | if (i2c_common->bus_id > 1) | |
260 | return -EINVAL; | |
261 | ||
262 | if (privdata->busses[i2c_common->bus_id]) { | |
263 | dev_err(ndev_dev(privdata), | |
264 | "Bus %d already taken!\n", i2c_common->bus_id); | |
265 | return -EINVAL; | |
266 | } | |
267 | ||
268 | privdata->busses[i2c_common->bus_id] = i2c_common; | |
269 | ||
270 | return 0; | |
271 | } | |
272 | EXPORT_SYMBOL_GPL(amd_mp2_register_cb); | |
273 | ||
274 | int amd_mp2_unregister_cb(struct amd_i2c_common *i2c_common) | |
275 | { | |
276 | struct amd_mp2_dev *privdata = i2c_common->mp2_dev; | |
277 | ||
278 | privdata->busses[i2c_common->bus_id] = NULL; | |
279 | ||
280 | return 0; | |
281 | } | |
282 | EXPORT_SYMBOL_GPL(amd_mp2_unregister_cb); | |
283 | ||
284 | static void amd_mp2_clear_reg(struct amd_mp2_dev *privdata) | |
285 | { | |
286 | int reg; | |
287 | ||
288 | for (reg = AMD_C2P_MSG0; reg <= AMD_C2P_MSG9; reg += 4) | |
289 | writel(0, privdata->mmio + reg); | |
290 | ||
291 | for (reg = AMD_P2C_MSG1; reg <= AMD_P2C_MSG2; reg += 4) | |
292 | writel(0, privdata->mmio + reg); | |
293 | } | |
294 | ||
295 | static int amd_mp2_pci_init(struct amd_mp2_dev *privdata, | |
296 | struct pci_dev *pci_dev) | |
297 | { | |
298 | int rc; | |
299 | ||
300 | pci_set_drvdata(pci_dev, privdata); | |
301 | ||
302 | rc = pcim_enable_device(pci_dev); | |
303 | if (rc) { | |
304 | dev_err(ndev_dev(privdata), "Failed to enable MP2 PCI device\n"); | |
305 | goto err_pci_enable; | |
306 | } | |
307 | ||
308 | rc = pcim_iomap_regions(pci_dev, 1 << 2, pci_name(pci_dev)); | |
309 | if (rc) { | |
310 | dev_err(ndev_dev(privdata), "I/O memory remapping failed\n"); | |
311 | goto err_pci_enable; | |
312 | } | |
313 | privdata->mmio = pcim_iomap_table(pci_dev)[2]; | |
314 | ||
315 | pci_set_master(pci_dev); | |
316 | ||
317 | rc = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64)); | |
318 | if (rc) { | |
319 | rc = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32)); | |
320 | if (rc) | |
321 | goto err_dma_mask; | |
322 | } | |
323 | ||
324 | /* Set up intx irq */ | |
325 | writel(0, privdata->mmio + AMD_P2C_MSG_INTEN); | |
326 | pci_intx(pci_dev, 1); | |
327 | rc = devm_request_irq(&pci_dev->dev, pci_dev->irq, amd_mp2_irq_isr, | |
328 | IRQF_SHARED, dev_name(&pci_dev->dev), privdata); | |
329 | if (rc) | |
330 | dev_err(&pci_dev->dev, "Failure requesting irq %i: %d\n", | |
331 | pci_dev->irq, rc); | |
332 | ||
333 | return rc; | |
334 | ||
335 | err_dma_mask: | |
336 | pci_clear_master(pci_dev); | |
337 | err_pci_enable: | |
338 | pci_set_drvdata(pci_dev, NULL); | |
339 | return rc; | |
340 | } | |
341 | ||
342 | static int amd_mp2_pci_probe(struct pci_dev *pci_dev, | |
343 | const struct pci_device_id *id) | |
344 | { | |
345 | struct amd_mp2_dev *privdata; | |
346 | int rc; | |
347 | ||
348 | privdata = devm_kzalloc(&pci_dev->dev, sizeof(*privdata), GFP_KERNEL); | |
349 | if (!privdata) | |
350 | return -ENOMEM; | |
351 | ||
ac2b0813 | 352 | privdata->pci_dev = pci_dev; |
529766e0 EM |
353 | rc = amd_mp2_pci_init(privdata, pci_dev); |
354 | if (rc) | |
355 | return rc; | |
356 | ||
357 | mutex_init(&privdata->c2p_lock); | |
529766e0 EM |
358 | |
359 | pm_runtime_set_autosuspend_delay(&pci_dev->dev, 1000); | |
360 | pm_runtime_use_autosuspend(&pci_dev->dev); | |
361 | pm_runtime_put_autosuspend(&pci_dev->dev); | |
362 | pm_runtime_allow(&pci_dev->dev); | |
363 | ||
364 | privdata->probed = true; | |
365 | ||
366 | dev_info(&pci_dev->dev, "MP2 device registered.\n"); | |
367 | return 0; | |
368 | } | |
369 | ||
370 | static void amd_mp2_pci_remove(struct pci_dev *pci_dev) | |
371 | { | |
372 | struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev); | |
373 | ||
374 | pm_runtime_forbid(&pci_dev->dev); | |
375 | pm_runtime_get_noresume(&pci_dev->dev); | |
376 | ||
377 | pci_intx(pci_dev, 0); | |
378 | pci_clear_master(pci_dev); | |
379 | ||
380 | amd_mp2_clear_reg(privdata); | |
381 | } | |
382 | ||
383 | #ifdef CONFIG_PM | |
384 | static int amd_mp2_pci_suspend(struct device *dev) | |
385 | { | |
386 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
387 | struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev); | |
388 | struct amd_i2c_common *i2c_common; | |
389 | unsigned int bus_id; | |
390 | int ret = 0; | |
391 | ||
392 | for (bus_id = 0; bus_id < 2; bus_id++) { | |
393 | i2c_common = privdata->busses[bus_id]; | |
394 | if (i2c_common) | |
395 | i2c_common->suspend(i2c_common); | |
396 | } | |
397 | ||
398 | ret = pci_save_state(pci_dev); | |
399 | if (ret) { | |
400 | dev_err(ndev_dev(privdata), | |
401 | "pci_save_state failed = %d\n", ret); | |
402 | return ret; | |
403 | } | |
404 | ||
405 | pci_disable_device(pci_dev); | |
406 | return ret; | |
407 | } | |
408 | ||
409 | static int amd_mp2_pci_resume(struct device *dev) | |
410 | { | |
411 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
412 | struct amd_mp2_dev *privdata = pci_get_drvdata(pci_dev); | |
413 | struct amd_i2c_common *i2c_common; | |
414 | unsigned int bus_id; | |
415 | int ret = 0; | |
416 | ||
417 | pci_restore_state(pci_dev); | |
418 | ret = pci_enable_device(pci_dev); | |
419 | if (ret < 0) { | |
420 | dev_err(ndev_dev(privdata), | |
421 | "pci_enable_device failed = %d\n", ret); | |
422 | return ret; | |
423 | } | |
424 | ||
425 | for (bus_id = 0; bus_id < 2; bus_id++) { | |
426 | i2c_common = privdata->busses[bus_id]; | |
427 | if (i2c_common) { | |
428 | ret = i2c_common->resume(i2c_common); | |
429 | if (ret < 0) | |
430 | return ret; | |
431 | } | |
432 | } | |
433 | ||
434 | return ret; | |
435 | } | |
436 | ||
437 | static UNIVERSAL_DEV_PM_OPS(amd_mp2_pci_pm_ops, amd_mp2_pci_suspend, | |
438 | amd_mp2_pci_resume, NULL); | |
439 | #endif /* CONFIG_PM */ | |
440 | ||
441 | static const struct pci_device_id amd_mp2_pci_tbl[] = { | |
442 | {PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_MP2)}, | |
443 | {0} | |
444 | }; | |
445 | MODULE_DEVICE_TABLE(pci, amd_mp2_pci_tbl); | |
446 | ||
447 | static struct pci_driver amd_mp2_pci_driver = { | |
448 | .name = "i2c_amd_mp2", | |
449 | .id_table = amd_mp2_pci_tbl, | |
450 | .probe = amd_mp2_pci_probe, | |
451 | .remove = amd_mp2_pci_remove, | |
452 | #ifdef CONFIG_PM | |
453 | .driver = { | |
454 | .pm = &amd_mp2_pci_pm_ops, | |
455 | }, | |
456 | #endif | |
457 | }; | |
458 | module_pci_driver(amd_mp2_pci_driver); | |
459 | ||
529766e0 EM |
460 | struct amd_mp2_dev *amd_mp2_find_device(void) |
461 | { | |
462 | struct device *dev; | |
463 | struct pci_dev *pci_dev; | |
464 | ||
6bf85ba9 | 465 | dev = driver_find_next_device(&amd_mp2_pci_driver.driver, NULL); |
529766e0 EM |
466 | if (!dev) |
467 | return NULL; | |
468 | ||
469 | pci_dev = to_pci_dev(dev); | |
470 | return (struct amd_mp2_dev *)pci_get_drvdata(pci_dev); | |
471 | } | |
472 | EXPORT_SYMBOL_GPL(amd_mp2_find_device); | |
473 | ||
474 | MODULE_DESCRIPTION("AMD(R) PCI-E MP2 I2C Controller Driver"); | |
475 | MODULE_AUTHOR("Shyam Sundar S K <Shyam-sundar.S-k@amd.com>"); | |
476 | MODULE_AUTHOR("Elie Morisse <syniurge@gmail.com>"); | |
477 | MODULE_LICENSE("Dual BSD/GPL"); |