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Commit | Line | Data |
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c6202d85 SG |
1 | /* |
2 | * Copyright (c) 2014 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
9 | #include <errno.h> | |
c6202d85 SG |
10 | #include <i2c.h> |
11 | #include <malloc.h> | |
12 | #include <dm/device-internal.h> | |
13 | #include <dm/lists.h> | |
c6202d85 SG |
14 | |
15 | DECLARE_GLOBAL_DATA_PTR; | |
16 | ||
17 | #define I2C_MAX_OFFSET_LEN 4 | |
18 | ||
7d7db222 SG |
19 | /* Useful debugging function */ |
20 | void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs) | |
21 | { | |
22 | int i; | |
23 | ||
24 | for (i = 0; i < nmsgs; i++) { | |
25 | struct i2c_msg *m = &msg[i]; | |
26 | ||
27 | printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W", | |
28 | msg->addr, msg->len); | |
29 | if (!(m->flags & I2C_M_RD)) | |
30 | printf(": %x", m->buf[0]); | |
31 | printf("\n"); | |
32 | } | |
33 | } | |
34 | ||
c6202d85 SG |
35 | /** |
36 | * i2c_setup_offset() - Set up a new message with a chip offset | |
37 | * | |
38 | * @chip: Chip to use | |
39 | * @offset: Byte offset within chip | |
40 | * @offset_buf: Place to put byte offset | |
41 | * @msg: Message buffer | |
42 | * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the | |
43 | * message is still set up but will not contain an offset. | |
44 | */ | |
45 | static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, | |
46 | uint8_t offset_buf[], struct i2c_msg *msg) | |
47 | { | |
48 | int offset_len; | |
49 | ||
50 | msg->addr = chip->chip_addr; | |
51 | msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
52 | msg->len = chip->offset_len; | |
53 | msg->buf = offset_buf; | |
54 | if (!chip->offset_len) | |
55 | return -EADDRNOTAVAIL; | |
56 | assert(chip->offset_len <= I2C_MAX_OFFSET_LEN); | |
57 | offset_len = chip->offset_len; | |
58 | while (offset_len--) | |
59 | *offset_buf++ = offset >> (8 * offset_len); | |
60 | ||
61 | return 0; | |
62 | } | |
63 | ||
64 | static int i2c_read_bytewise(struct udevice *dev, uint offset, | |
65 | uint8_t *buffer, int len) | |
66 | { | |
e6f66ec0 | 67 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
68 | struct udevice *bus = dev_get_parent(dev); |
69 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
70 | struct i2c_msg msg[2], *ptr; | |
71 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
72 | int ret; | |
73 | int i; | |
74 | ||
75 | for (i = 0; i < len; i++) { | |
76 | if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) | |
77 | return -EINVAL; | |
78 | ptr = msg + 1; | |
79 | ptr->addr = chip->chip_addr; | |
80 | ptr->flags = msg->flags | I2C_M_RD; | |
81 | ptr->len = 1; | |
82 | ptr->buf = &buffer[i]; | |
83 | ptr++; | |
84 | ||
85 | ret = ops->xfer(bus, msg, ptr - msg); | |
86 | if (ret) | |
87 | return ret; | |
88 | } | |
89 | ||
90 | return 0; | |
91 | } | |
92 | ||
93 | static int i2c_write_bytewise(struct udevice *dev, uint offset, | |
94 | const uint8_t *buffer, int len) | |
95 | { | |
e6f66ec0 | 96 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
97 | struct udevice *bus = dev_get_parent(dev); |
98 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
99 | struct i2c_msg msg[1]; | |
100 | uint8_t buf[I2C_MAX_OFFSET_LEN + 1]; | |
101 | int ret; | |
102 | int i; | |
103 | ||
104 | for (i = 0; i < len; i++) { | |
105 | if (i2c_setup_offset(chip, offset + i, buf, msg)) | |
106 | return -EINVAL; | |
107 | buf[msg->len++] = buffer[i]; | |
108 | ||
109 | ret = ops->xfer(bus, msg, 1); | |
110 | if (ret) | |
111 | return ret; | |
112 | } | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
f9a4c2da | 117 | int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len) |
c6202d85 | 118 | { |
e6f66ec0 | 119 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
120 | struct udevice *bus = dev_get_parent(dev); |
121 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
122 | struct i2c_msg msg[2], *ptr; | |
123 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
124 | int msg_count; | |
125 | ||
126 | if (!ops->xfer) | |
127 | return -ENOSYS; | |
128 | if (chip->flags & DM_I2C_CHIP_RD_ADDRESS) | |
129 | return i2c_read_bytewise(dev, offset, buffer, len); | |
130 | ptr = msg; | |
131 | if (!i2c_setup_offset(chip, offset, offset_buf, ptr)) | |
132 | ptr++; | |
133 | ||
134 | if (len) { | |
135 | ptr->addr = chip->chip_addr; | |
136 | ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
137 | ptr->flags |= I2C_M_RD; | |
138 | ptr->len = len; | |
139 | ptr->buf = buffer; | |
140 | ptr++; | |
141 | } | |
142 | msg_count = ptr - msg; | |
143 | ||
144 | return ops->xfer(bus, msg, msg_count); | |
145 | } | |
146 | ||
f9a4c2da SG |
147 | int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, |
148 | int len) | |
c6202d85 | 149 | { |
e6f66ec0 | 150 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
151 | struct udevice *bus = dev_get_parent(dev); |
152 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
153 | struct i2c_msg msg[1]; | |
154 | ||
155 | if (!ops->xfer) | |
156 | return -ENOSYS; | |
157 | ||
158 | if (chip->flags & DM_I2C_CHIP_WR_ADDRESS) | |
159 | return i2c_write_bytewise(dev, offset, buffer, len); | |
160 | /* | |
161 | * The simple approach would be to send two messages here: one to | |
162 | * set the offset and one to write the bytes. However some drivers | |
163 | * will not be expecting this, and some chips won't like how the | |
164 | * driver presents this on the I2C bus. | |
165 | * | |
166 | * The API does not support separate offset and data. We could extend | |
167 | * it with a flag indicating that there is data in the next message | |
168 | * that needs to be processed in the same transaction. We could | |
169 | * instead add an additional buffer to each message. For now, handle | |
170 | * this in the uclass since it isn't clear what the impact on drivers | |
171 | * would be with this extra complication. Unfortunately this means | |
172 | * copying the message. | |
173 | * | |
174 | * Use the stack for small messages, malloc() for larger ones. We | |
175 | * need to allow space for the offset (up to 4 bytes) and the message | |
176 | * itself. | |
177 | */ | |
178 | if (len < 64) { | |
179 | uint8_t buf[I2C_MAX_OFFSET_LEN + len]; | |
180 | ||
181 | i2c_setup_offset(chip, offset, buf, msg); | |
182 | msg->len += len; | |
183 | memcpy(buf + chip->offset_len, buffer, len); | |
184 | ||
185 | return ops->xfer(bus, msg, 1); | |
186 | } else { | |
187 | uint8_t *buf; | |
188 | int ret; | |
189 | ||
190 | buf = malloc(I2C_MAX_OFFSET_LEN + len); | |
191 | if (!buf) | |
192 | return -ENOMEM; | |
193 | i2c_setup_offset(chip, offset, buf, msg); | |
194 | msg->len += len; | |
195 | memcpy(buf + chip->offset_len, buffer, len); | |
196 | ||
197 | ret = ops->xfer(bus, msg, 1); | |
198 | free(buf); | |
199 | return ret; | |
200 | } | |
201 | } | |
202 | ||
df358c6b SG |
203 | int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) |
204 | { | |
205 | struct udevice *bus = dev_get_parent(dev); | |
206 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
207 | ||
208 | if (!ops->xfer) | |
209 | return -ENOSYS; | |
210 | ||
211 | return ops->xfer(bus, msg, nmsgs); | |
212 | } | |
213 | ||
ba3864f8 SG |
214 | int dm_i2c_reg_read(struct udevice *dev, uint offset) |
215 | { | |
216 | uint8_t val; | |
217 | int ret; | |
218 | ||
219 | ret = dm_i2c_read(dev, offset, &val, 1); | |
220 | if (ret < 0) | |
221 | return ret; | |
222 | ||
223 | return val; | |
224 | } | |
225 | ||
226 | int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value) | |
227 | { | |
228 | uint8_t val = value; | |
229 | ||
230 | return dm_i2c_write(dev, offset, &val, 1); | |
231 | } | |
232 | ||
c6202d85 SG |
233 | /** |
234 | * i2c_probe_chip() - probe for a chip on a bus | |
235 | * | |
236 | * @bus: Bus to probe | |
237 | * @chip_addr: Chip address to probe | |
238 | * @flags: Flags for the chip | |
239 | * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip | |
240 | * does not respond to probe | |
241 | */ | |
242 | static int i2c_probe_chip(struct udevice *bus, uint chip_addr, | |
243 | enum dm_i2c_chip_flags chip_flags) | |
244 | { | |
245 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
246 | struct i2c_msg msg[1]; | |
247 | int ret; | |
248 | ||
249 | if (ops->probe_chip) { | |
250 | ret = ops->probe_chip(bus, chip_addr, chip_flags); | |
251 | if (!ret || ret != -ENOSYS) | |
252 | return ret; | |
253 | } | |
254 | ||
255 | if (!ops->xfer) | |
256 | return -ENOSYS; | |
257 | ||
258 | /* Probe with a zero-length message */ | |
259 | msg->addr = chip_addr; | |
260 | msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
261 | msg->len = 0; | |
262 | msg->buf = NULL; | |
263 | ||
264 | return ops->xfer(bus, msg, 1); | |
265 | } | |
266 | ||
25ab4b03 | 267 | static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len, |
c6202d85 SG |
268 | struct udevice **devp) |
269 | { | |
e6f66ec0 | 270 | struct dm_i2c_chip *chip; |
c6202d85 SG |
271 | char name[30], *str; |
272 | struct udevice *dev; | |
273 | int ret; | |
274 | ||
275 | snprintf(name, sizeof(name), "generic_%x", chip_addr); | |
276 | str = strdup(name); | |
5c2d23bf SG |
277 | if (!str) |
278 | return -ENOMEM; | |
c6202d85 SG |
279 | ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); |
280 | debug("%s: device_bind_driver: ret=%d\n", __func__, ret); | |
281 | if (ret) | |
282 | goto err_bind; | |
283 | ||
284 | /* Tell the device what we know about it */ | |
e6f66ec0 SG |
285 | chip = dev_get_parent_platdata(dev); |
286 | chip->chip_addr = chip_addr; | |
287 | chip->offset_len = offset_len; | |
288 | ret = device_probe(dev); | |
289 | debug("%s: device_probe: ret=%d\n", __func__, ret); | |
c6202d85 SG |
290 | if (ret) |
291 | goto err_probe; | |
292 | ||
293 | *devp = dev; | |
294 | return 0; | |
295 | ||
296 | err_probe: | |
e6f66ec0 SG |
297 | /* |
298 | * If the device failed to probe, unbind it. There is nothing there | |
299 | * on the bus so we don't want to leave it lying around | |
300 | */ | |
c6202d85 SG |
301 | device_unbind(dev); |
302 | err_bind: | |
303 | free(str); | |
304 | return ret; | |
305 | } | |
306 | ||
25ab4b03 SG |
307 | int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, |
308 | struct udevice **devp) | |
c6202d85 SG |
309 | { |
310 | struct udevice *dev; | |
311 | ||
312 | debug("%s: Searching bus '%s' for address %02x: ", __func__, | |
313 | bus->name, chip_addr); | |
314 | for (device_find_first_child(bus, &dev); dev; | |
315 | device_find_next_child(&dev)) { | |
e6f66ec0 | 316 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
317 | int ret; |
318 | ||
c6202d85 SG |
319 | if (chip->chip_addr == chip_addr) { |
320 | ret = device_probe(dev); | |
321 | debug("found, ret=%d\n", ret); | |
322 | if (ret) | |
323 | return ret; | |
324 | *devp = dev; | |
325 | return 0; | |
326 | } | |
327 | } | |
328 | debug("not found\n"); | |
25ab4b03 | 329 | return i2c_bind_driver(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
330 | } |
331 | ||
25ab4b03 SG |
332 | int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, |
333 | struct udevice **devp) | |
c6202d85 SG |
334 | { |
335 | struct udevice *bus; | |
336 | int ret; | |
337 | ||
338 | ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); | |
339 | if (ret) { | |
340 | debug("Cannot find I2C bus %d\n", busnum); | |
341 | return ret; | |
342 | } | |
25ab4b03 | 343 | ret = i2c_get_chip(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
344 | if (ret) { |
345 | debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, | |
346 | busnum); | |
347 | return ret; | |
348 | } | |
349 | ||
350 | return 0; | |
351 | } | |
352 | ||
f9a4c2da SG |
353 | int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, |
354 | struct udevice **devp) | |
c6202d85 SG |
355 | { |
356 | int ret; | |
357 | ||
358 | *devp = NULL; | |
359 | ||
360 | /* First probe that chip */ | |
361 | ret = i2c_probe_chip(bus, chip_addr, chip_flags); | |
362 | debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, | |
363 | chip_addr, ret); | |
364 | if (ret) | |
365 | return ret; | |
366 | ||
367 | /* The chip was found, see if we have a driver, and probe it */ | |
25ab4b03 | 368 | ret = i2c_get_chip(bus, chip_addr, 1, devp); |
c6202d85 SG |
369 | debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); |
370 | ||
371 | return ret; | |
372 | } | |
373 | ||
ca88b9b9 | 374 | int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
c6202d85 SG |
375 | { |
376 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
e564f054 | 377 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
c6202d85 SG |
378 | int ret; |
379 | ||
380 | /* | |
381 | * If we have a method, call it. If not then the driver probably wants | |
382 | * to deal with speed changes on the next transfer. It can easily read | |
383 | * the current speed from this uclass | |
384 | */ | |
385 | if (ops->set_bus_speed) { | |
386 | ret = ops->set_bus_speed(bus, speed); | |
387 | if (ret) | |
388 | return ret; | |
389 | } | |
390 | i2c->speed_hz = speed; | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
ca88b9b9 | 395 | int dm_i2c_get_bus_speed(struct udevice *bus) |
c6202d85 SG |
396 | { |
397 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
e564f054 | 398 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
c6202d85 SG |
399 | |
400 | if (!ops->get_bus_speed) | |
401 | return i2c->speed_hz; | |
402 | ||
403 | return ops->get_bus_speed(bus); | |
404 | } | |
405 | ||
406 | int i2c_set_chip_flags(struct udevice *dev, uint flags) | |
407 | { | |
408 | struct udevice *bus = dev->parent; | |
e6f66ec0 | 409 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
410 | struct dm_i2c_ops *ops = i2c_get_ops(bus); |
411 | int ret; | |
412 | ||
413 | if (ops->set_flags) { | |
414 | ret = ops->set_flags(dev, flags); | |
415 | if (ret) | |
416 | return ret; | |
417 | } | |
418 | chip->flags = flags; | |
419 | ||
420 | return 0; | |
421 | } | |
422 | ||
423 | int i2c_get_chip_flags(struct udevice *dev, uint *flagsp) | |
424 | { | |
e6f66ec0 | 425 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
426 | |
427 | *flagsp = chip->flags; | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
432 | int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len) | |
433 | { | |
e6f66ec0 | 434 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
435 | |
436 | if (offset_len > I2C_MAX_OFFSET_LEN) | |
437 | return -EINVAL; | |
438 | chip->offset_len = offset_len; | |
439 | ||
440 | return 0; | |
441 | } | |
442 | ||
01501804 SG |
443 | int i2c_get_chip_offset_len(struct udevice *dev) |
444 | { | |
445 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); | |
446 | ||
447 | return chip->offset_len; | |
448 | } | |
449 | ||
c6202d85 SG |
450 | int i2c_deblock(struct udevice *bus) |
451 | { | |
452 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
453 | ||
454 | /* | |
455 | * We could implement a software deblocking here if we could get | |
456 | * access to the GPIOs used by I2C, and switch them to GPIO mode | |
457 | * and then back to I2C. This is somewhat beyond our powers in | |
458 | * driver model at present, so for now just fail. | |
459 | * | |
460 | * See https://patchwork.ozlabs.org/patch/399040/ | |
461 | */ | |
462 | if (!ops->deblock) | |
463 | return -ENOSYS; | |
464 | ||
465 | return ops->deblock(bus); | |
466 | } | |
467 | ||
5142ac79 | 468 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
1704308e | 469 | int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip) |
c6202d85 | 470 | { |
1704308e SG |
471 | int addr; |
472 | ||
473 | chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len", | |
474 | 1); | |
c6202d85 | 475 | chip->flags = 0; |
1704308e SG |
476 | addr = dev_read_u32_default(dev, "reg", -1); |
477 | if (addr == -1) { | |
478 | debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__, | |
479 | dev_read_name(dev), dev->name); | |
c6202d85 SG |
480 | return -EINVAL; |
481 | } | |
1704308e | 482 | chip->chip_addr = addr; |
c6202d85 SG |
483 | |
484 | return 0; | |
485 | } | |
5142ac79 | 486 | #endif |
c6202d85 SG |
487 | |
488 | static int i2c_post_probe(struct udevice *dev) | |
489 | { | |
5142ac79 | 490 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
e564f054 | 491 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev); |
c6202d85 | 492 | |
1704308e | 493 | i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000); |
c6202d85 | 494 | |
ca88b9b9 | 495 | return dm_i2c_set_bus_speed(dev, i2c->speed_hz); |
5142ac79 M |
496 | #else |
497 | return 0; | |
498 | #endif | |
c6202d85 SG |
499 | } |
500 | ||
e6f66ec0 SG |
501 | static int i2c_child_post_bind(struct udevice *dev) |
502 | { | |
5142ac79 | 503 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
e6f66ec0 SG |
504 | struct dm_i2c_chip *plat = dev_get_parent_platdata(dev); |
505 | ||
1704308e | 506 | if (!dev_of_valid(dev)) |
e6f66ec0 | 507 | return 0; |
1704308e | 508 | return i2c_chip_ofdata_to_platdata(dev, plat); |
5142ac79 M |
509 | #else |
510 | return 0; | |
511 | #endif | |
e6f66ec0 SG |
512 | } |
513 | ||
c6202d85 SG |
514 | UCLASS_DRIVER(i2c) = { |
515 | .id = UCLASS_I2C, | |
516 | .name = "i2c", | |
9cc36a2b | 517 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
91195485 SG |
518 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
519 | .post_bind = dm_scan_fdt_dev, | |
520 | #endif | |
c6202d85 | 521 | .post_probe = i2c_post_probe, |
e6f66ec0 SG |
522 | .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus), |
523 | .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip), | |
524 | .child_post_bind = i2c_child_post_bind, | |
c6202d85 SG |
525 | }; |
526 | ||
527 | UCLASS_DRIVER(i2c_generic) = { | |
528 | .id = UCLASS_I2C_GENERIC, | |
529 | .name = "i2c_generic", | |
530 | }; | |
531 | ||
532 | U_BOOT_DRIVER(i2c_generic_chip_drv) = { | |
533 | .name = "i2c_generic_chip_drv", | |
534 | .id = UCLASS_I2C_GENERIC, | |
535 | }; |