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Commit | Line | Data |
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c6202d85 SG |
1 | /* |
2 | * Copyright (c) 2014 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
9 | #include <errno.h> | |
c6202d85 SG |
10 | #include <i2c.h> |
11 | #include <malloc.h> | |
12 | #include <dm/device-internal.h> | |
13 | #include <dm/lists.h> | |
c6202d85 | 14 | |
c6202d85 SG |
15 | #define I2C_MAX_OFFSET_LEN 4 |
16 | ||
7d7db222 SG |
17 | /* Useful debugging function */ |
18 | void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs) | |
19 | { | |
20 | int i; | |
21 | ||
22 | for (i = 0; i < nmsgs; i++) { | |
23 | struct i2c_msg *m = &msg[i]; | |
24 | ||
25 | printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W", | |
26 | msg->addr, msg->len); | |
27 | if (!(m->flags & I2C_M_RD)) | |
28 | printf(": %x", m->buf[0]); | |
29 | printf("\n"); | |
30 | } | |
31 | } | |
32 | ||
c6202d85 SG |
33 | /** |
34 | * i2c_setup_offset() - Set up a new message with a chip offset | |
35 | * | |
36 | * @chip: Chip to use | |
37 | * @offset: Byte offset within chip | |
38 | * @offset_buf: Place to put byte offset | |
39 | * @msg: Message buffer | |
40 | * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the | |
41 | * message is still set up but will not contain an offset. | |
42 | */ | |
43 | static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, | |
44 | uint8_t offset_buf[], struct i2c_msg *msg) | |
45 | { | |
46 | int offset_len; | |
47 | ||
48 | msg->addr = chip->chip_addr; | |
49 | msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
50 | msg->len = chip->offset_len; | |
51 | msg->buf = offset_buf; | |
52 | if (!chip->offset_len) | |
53 | return -EADDRNOTAVAIL; | |
54 | assert(chip->offset_len <= I2C_MAX_OFFSET_LEN); | |
55 | offset_len = chip->offset_len; | |
56 | while (offset_len--) | |
57 | *offset_buf++ = offset >> (8 * offset_len); | |
58 | ||
59 | return 0; | |
60 | } | |
61 | ||
62 | static int i2c_read_bytewise(struct udevice *dev, uint offset, | |
63 | uint8_t *buffer, int len) | |
64 | { | |
e6f66ec0 | 65 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
66 | struct udevice *bus = dev_get_parent(dev); |
67 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
68 | struct i2c_msg msg[2], *ptr; | |
69 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
70 | int ret; | |
71 | int i; | |
72 | ||
73 | for (i = 0; i < len; i++) { | |
74 | if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) | |
75 | return -EINVAL; | |
76 | ptr = msg + 1; | |
77 | ptr->addr = chip->chip_addr; | |
78 | ptr->flags = msg->flags | I2C_M_RD; | |
79 | ptr->len = 1; | |
80 | ptr->buf = &buffer[i]; | |
81 | ptr++; | |
82 | ||
83 | ret = ops->xfer(bus, msg, ptr - msg); | |
84 | if (ret) | |
85 | return ret; | |
86 | } | |
87 | ||
88 | return 0; | |
89 | } | |
90 | ||
91 | static int i2c_write_bytewise(struct udevice *dev, uint offset, | |
92 | const uint8_t *buffer, int len) | |
93 | { | |
e6f66ec0 | 94 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
95 | struct udevice *bus = dev_get_parent(dev); |
96 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
97 | struct i2c_msg msg[1]; | |
98 | uint8_t buf[I2C_MAX_OFFSET_LEN + 1]; | |
99 | int ret; | |
100 | int i; | |
101 | ||
102 | for (i = 0; i < len; i++) { | |
103 | if (i2c_setup_offset(chip, offset + i, buf, msg)) | |
104 | return -EINVAL; | |
105 | buf[msg->len++] = buffer[i]; | |
106 | ||
107 | ret = ops->xfer(bus, msg, 1); | |
108 | if (ret) | |
109 | return ret; | |
110 | } | |
111 | ||
112 | return 0; | |
113 | } | |
114 | ||
f9a4c2da | 115 | int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len) |
c6202d85 | 116 | { |
e6f66ec0 | 117 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
118 | struct udevice *bus = dev_get_parent(dev); |
119 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
120 | struct i2c_msg msg[2], *ptr; | |
121 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
122 | int msg_count; | |
123 | ||
124 | if (!ops->xfer) | |
125 | return -ENOSYS; | |
126 | if (chip->flags & DM_I2C_CHIP_RD_ADDRESS) | |
127 | return i2c_read_bytewise(dev, offset, buffer, len); | |
128 | ptr = msg; | |
129 | if (!i2c_setup_offset(chip, offset, offset_buf, ptr)) | |
130 | ptr++; | |
131 | ||
132 | if (len) { | |
133 | ptr->addr = chip->chip_addr; | |
134 | ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
135 | ptr->flags |= I2C_M_RD; | |
136 | ptr->len = len; | |
137 | ptr->buf = buffer; | |
138 | ptr++; | |
139 | } | |
140 | msg_count = ptr - msg; | |
141 | ||
142 | return ops->xfer(bus, msg, msg_count); | |
143 | } | |
144 | ||
f9a4c2da SG |
145 | int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, |
146 | int len) | |
c6202d85 | 147 | { |
e6f66ec0 | 148 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
149 | struct udevice *bus = dev_get_parent(dev); |
150 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
151 | struct i2c_msg msg[1]; | |
152 | ||
153 | if (!ops->xfer) | |
154 | return -ENOSYS; | |
155 | ||
156 | if (chip->flags & DM_I2C_CHIP_WR_ADDRESS) | |
157 | return i2c_write_bytewise(dev, offset, buffer, len); | |
158 | /* | |
159 | * The simple approach would be to send two messages here: one to | |
160 | * set the offset and one to write the bytes. However some drivers | |
161 | * will not be expecting this, and some chips won't like how the | |
162 | * driver presents this on the I2C bus. | |
163 | * | |
164 | * The API does not support separate offset and data. We could extend | |
165 | * it with a flag indicating that there is data in the next message | |
166 | * that needs to be processed in the same transaction. We could | |
167 | * instead add an additional buffer to each message. For now, handle | |
168 | * this in the uclass since it isn't clear what the impact on drivers | |
169 | * would be with this extra complication. Unfortunately this means | |
170 | * copying the message. | |
171 | * | |
172 | * Use the stack for small messages, malloc() for larger ones. We | |
173 | * need to allow space for the offset (up to 4 bytes) and the message | |
174 | * itself. | |
175 | */ | |
176 | if (len < 64) { | |
177 | uint8_t buf[I2C_MAX_OFFSET_LEN + len]; | |
178 | ||
179 | i2c_setup_offset(chip, offset, buf, msg); | |
180 | msg->len += len; | |
181 | memcpy(buf + chip->offset_len, buffer, len); | |
182 | ||
183 | return ops->xfer(bus, msg, 1); | |
184 | } else { | |
185 | uint8_t *buf; | |
186 | int ret; | |
187 | ||
188 | buf = malloc(I2C_MAX_OFFSET_LEN + len); | |
189 | if (!buf) | |
190 | return -ENOMEM; | |
191 | i2c_setup_offset(chip, offset, buf, msg); | |
192 | msg->len += len; | |
193 | memcpy(buf + chip->offset_len, buffer, len); | |
194 | ||
195 | ret = ops->xfer(bus, msg, 1); | |
196 | free(buf); | |
197 | return ret; | |
198 | } | |
199 | } | |
200 | ||
df358c6b SG |
201 | int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) |
202 | { | |
203 | struct udevice *bus = dev_get_parent(dev); | |
204 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
205 | ||
206 | if (!ops->xfer) | |
207 | return -ENOSYS; | |
208 | ||
209 | return ops->xfer(bus, msg, nmsgs); | |
210 | } | |
211 | ||
ba3864f8 SG |
212 | int dm_i2c_reg_read(struct udevice *dev, uint offset) |
213 | { | |
214 | uint8_t val; | |
215 | int ret; | |
216 | ||
217 | ret = dm_i2c_read(dev, offset, &val, 1); | |
218 | if (ret < 0) | |
219 | return ret; | |
220 | ||
221 | return val; | |
222 | } | |
223 | ||
224 | int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value) | |
225 | { | |
226 | uint8_t val = value; | |
227 | ||
228 | return dm_i2c_write(dev, offset, &val, 1); | |
229 | } | |
230 | ||
c6202d85 SG |
231 | /** |
232 | * i2c_probe_chip() - probe for a chip on a bus | |
233 | * | |
234 | * @bus: Bus to probe | |
235 | * @chip_addr: Chip address to probe | |
236 | * @flags: Flags for the chip | |
237 | * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip | |
238 | * does not respond to probe | |
239 | */ | |
240 | static int i2c_probe_chip(struct udevice *bus, uint chip_addr, | |
241 | enum dm_i2c_chip_flags chip_flags) | |
242 | { | |
243 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
244 | struct i2c_msg msg[1]; | |
245 | int ret; | |
246 | ||
247 | if (ops->probe_chip) { | |
248 | ret = ops->probe_chip(bus, chip_addr, chip_flags); | |
249 | if (!ret || ret != -ENOSYS) | |
250 | return ret; | |
251 | } | |
252 | ||
253 | if (!ops->xfer) | |
254 | return -ENOSYS; | |
255 | ||
256 | /* Probe with a zero-length message */ | |
257 | msg->addr = chip_addr; | |
258 | msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
259 | msg->len = 0; | |
260 | msg->buf = NULL; | |
261 | ||
262 | return ops->xfer(bus, msg, 1); | |
263 | } | |
264 | ||
25ab4b03 | 265 | static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len, |
c6202d85 SG |
266 | struct udevice **devp) |
267 | { | |
e6f66ec0 | 268 | struct dm_i2c_chip *chip; |
c6202d85 SG |
269 | char name[30], *str; |
270 | struct udevice *dev; | |
271 | int ret; | |
272 | ||
273 | snprintf(name, sizeof(name), "generic_%x", chip_addr); | |
274 | str = strdup(name); | |
5c2d23bf SG |
275 | if (!str) |
276 | return -ENOMEM; | |
c6202d85 SG |
277 | ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); |
278 | debug("%s: device_bind_driver: ret=%d\n", __func__, ret); | |
279 | if (ret) | |
280 | goto err_bind; | |
281 | ||
282 | /* Tell the device what we know about it */ | |
e6f66ec0 SG |
283 | chip = dev_get_parent_platdata(dev); |
284 | chip->chip_addr = chip_addr; | |
285 | chip->offset_len = offset_len; | |
286 | ret = device_probe(dev); | |
287 | debug("%s: device_probe: ret=%d\n", __func__, ret); | |
c6202d85 SG |
288 | if (ret) |
289 | goto err_probe; | |
290 | ||
291 | *devp = dev; | |
292 | return 0; | |
293 | ||
294 | err_probe: | |
e6f66ec0 SG |
295 | /* |
296 | * If the device failed to probe, unbind it. There is nothing there | |
297 | * on the bus so we don't want to leave it lying around | |
298 | */ | |
c6202d85 SG |
299 | device_unbind(dev); |
300 | err_bind: | |
301 | free(str); | |
302 | return ret; | |
303 | } | |
304 | ||
25ab4b03 SG |
305 | int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, |
306 | struct udevice **devp) | |
c6202d85 SG |
307 | { |
308 | struct udevice *dev; | |
309 | ||
310 | debug("%s: Searching bus '%s' for address %02x: ", __func__, | |
311 | bus->name, chip_addr); | |
312 | for (device_find_first_child(bus, &dev); dev; | |
313 | device_find_next_child(&dev)) { | |
e6f66ec0 | 314 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
315 | int ret; |
316 | ||
c6202d85 SG |
317 | if (chip->chip_addr == chip_addr) { |
318 | ret = device_probe(dev); | |
319 | debug("found, ret=%d\n", ret); | |
320 | if (ret) | |
321 | return ret; | |
322 | *devp = dev; | |
323 | return 0; | |
324 | } | |
325 | } | |
326 | debug("not found\n"); | |
25ab4b03 | 327 | return i2c_bind_driver(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
328 | } |
329 | ||
25ab4b03 SG |
330 | int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, |
331 | struct udevice **devp) | |
c6202d85 SG |
332 | { |
333 | struct udevice *bus; | |
334 | int ret; | |
335 | ||
336 | ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); | |
337 | if (ret) { | |
338 | debug("Cannot find I2C bus %d\n", busnum); | |
339 | return ret; | |
340 | } | |
25ab4b03 | 341 | ret = i2c_get_chip(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
342 | if (ret) { |
343 | debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, | |
344 | busnum); | |
345 | return ret; | |
346 | } | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
f9a4c2da SG |
351 | int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, |
352 | struct udevice **devp) | |
c6202d85 SG |
353 | { |
354 | int ret; | |
355 | ||
356 | *devp = NULL; | |
357 | ||
358 | /* First probe that chip */ | |
359 | ret = i2c_probe_chip(bus, chip_addr, chip_flags); | |
360 | debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, | |
361 | chip_addr, ret); | |
362 | if (ret) | |
363 | return ret; | |
364 | ||
365 | /* The chip was found, see if we have a driver, and probe it */ | |
25ab4b03 | 366 | ret = i2c_get_chip(bus, chip_addr, 1, devp); |
c6202d85 SG |
367 | debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); |
368 | ||
369 | return ret; | |
370 | } | |
371 | ||
ca88b9b9 | 372 | int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
c6202d85 SG |
373 | { |
374 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
e564f054 | 375 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
c6202d85 SG |
376 | int ret; |
377 | ||
378 | /* | |
379 | * If we have a method, call it. If not then the driver probably wants | |
380 | * to deal with speed changes on the next transfer. It can easily read | |
381 | * the current speed from this uclass | |
382 | */ | |
383 | if (ops->set_bus_speed) { | |
384 | ret = ops->set_bus_speed(bus, speed); | |
385 | if (ret) | |
386 | return ret; | |
387 | } | |
388 | i2c->speed_hz = speed; | |
389 | ||
390 | return 0; | |
391 | } | |
392 | ||
ca88b9b9 | 393 | int dm_i2c_get_bus_speed(struct udevice *bus) |
c6202d85 SG |
394 | { |
395 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
e564f054 | 396 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
c6202d85 SG |
397 | |
398 | if (!ops->get_bus_speed) | |
399 | return i2c->speed_hz; | |
400 | ||
401 | return ops->get_bus_speed(bus); | |
402 | } | |
403 | ||
404 | int i2c_set_chip_flags(struct udevice *dev, uint flags) | |
405 | { | |
406 | struct udevice *bus = dev->parent; | |
e6f66ec0 | 407 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
408 | struct dm_i2c_ops *ops = i2c_get_ops(bus); |
409 | int ret; | |
410 | ||
411 | if (ops->set_flags) { | |
412 | ret = ops->set_flags(dev, flags); | |
413 | if (ret) | |
414 | return ret; | |
415 | } | |
416 | chip->flags = flags; | |
417 | ||
418 | return 0; | |
419 | } | |
420 | ||
421 | int i2c_get_chip_flags(struct udevice *dev, uint *flagsp) | |
422 | { | |
e6f66ec0 | 423 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
424 | |
425 | *flagsp = chip->flags; | |
426 | ||
427 | return 0; | |
428 | } | |
429 | ||
430 | int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len) | |
431 | { | |
e6f66ec0 | 432 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
433 | |
434 | if (offset_len > I2C_MAX_OFFSET_LEN) | |
435 | return -EINVAL; | |
436 | chip->offset_len = offset_len; | |
437 | ||
438 | return 0; | |
439 | } | |
440 | ||
01501804 SG |
441 | int i2c_get_chip_offset_len(struct udevice *dev) |
442 | { | |
443 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); | |
444 | ||
445 | return chip->offset_len; | |
446 | } | |
447 | ||
c6202d85 SG |
448 | int i2c_deblock(struct udevice *bus) |
449 | { | |
450 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
451 | ||
452 | /* | |
453 | * We could implement a software deblocking here if we could get | |
454 | * access to the GPIOs used by I2C, and switch them to GPIO mode | |
455 | * and then back to I2C. This is somewhat beyond our powers in | |
456 | * driver model at present, so for now just fail. | |
457 | * | |
458 | * See https://patchwork.ozlabs.org/patch/399040/ | |
459 | */ | |
460 | if (!ops->deblock) | |
461 | return -ENOSYS; | |
462 | ||
463 | return ops->deblock(bus); | |
464 | } | |
465 | ||
5142ac79 | 466 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
1704308e | 467 | int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip) |
c6202d85 | 468 | { |
1704308e SG |
469 | int addr; |
470 | ||
471 | chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len", | |
472 | 1); | |
c6202d85 | 473 | chip->flags = 0; |
1704308e SG |
474 | addr = dev_read_u32_default(dev, "reg", -1); |
475 | if (addr == -1) { | |
476 | debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__, | |
477 | dev_read_name(dev), dev->name); | |
c6202d85 SG |
478 | return -EINVAL; |
479 | } | |
1704308e | 480 | chip->chip_addr = addr; |
c6202d85 SG |
481 | |
482 | return 0; | |
483 | } | |
5142ac79 | 484 | #endif |
c6202d85 SG |
485 | |
486 | static int i2c_post_probe(struct udevice *dev) | |
487 | { | |
5142ac79 | 488 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
e564f054 | 489 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev); |
c6202d85 | 490 | |
1704308e | 491 | i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000); |
c6202d85 | 492 | |
ca88b9b9 | 493 | return dm_i2c_set_bus_speed(dev, i2c->speed_hz); |
5142ac79 M |
494 | #else |
495 | return 0; | |
496 | #endif | |
c6202d85 SG |
497 | } |
498 | ||
e6f66ec0 SG |
499 | static int i2c_child_post_bind(struct udevice *dev) |
500 | { | |
5142ac79 | 501 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
e6f66ec0 SG |
502 | struct dm_i2c_chip *plat = dev_get_parent_platdata(dev); |
503 | ||
1704308e | 504 | if (!dev_of_valid(dev)) |
e6f66ec0 | 505 | return 0; |
1704308e | 506 | return i2c_chip_ofdata_to_platdata(dev, plat); |
5142ac79 M |
507 | #else |
508 | return 0; | |
509 | #endif | |
e6f66ec0 SG |
510 | } |
511 | ||
c6202d85 SG |
512 | UCLASS_DRIVER(i2c) = { |
513 | .id = UCLASS_I2C, | |
514 | .name = "i2c", | |
9cc36a2b | 515 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
91195485 SG |
516 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
517 | .post_bind = dm_scan_fdt_dev, | |
518 | #endif | |
c6202d85 | 519 | .post_probe = i2c_post_probe, |
e6f66ec0 SG |
520 | .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus), |
521 | .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip), | |
522 | .child_post_bind = i2c_child_post_bind, | |
c6202d85 SG |
523 | }; |
524 | ||
525 | UCLASS_DRIVER(i2c_generic) = { | |
526 | .id = UCLASS_I2C_GENERIC, | |
527 | .name = "i2c_generic", | |
528 | }; | |
529 | ||
530 | U_BOOT_DRIVER(i2c_generic_chip_drv) = { | |
531 | .name = "i2c_generic_chip_drv", | |
532 | .id = UCLASS_I2C_GENERIC, | |
533 | }; |