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c6202d85 SG |
1 | /* |
2 | * Copyright (c) 2014 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
9 | #include <errno.h> | |
10 | #include <fdtdec.h> | |
11 | #include <i2c.h> | |
12 | #include <malloc.h> | |
13 | #include <dm/device-internal.h> | |
14 | #include <dm/lists.h> | |
15 | #include <dm/root.h> | |
16 | ||
17 | DECLARE_GLOBAL_DATA_PTR; | |
18 | ||
19 | #define I2C_MAX_OFFSET_LEN 4 | |
20 | ||
21 | /** | |
22 | * i2c_setup_offset() - Set up a new message with a chip offset | |
23 | * | |
24 | * @chip: Chip to use | |
25 | * @offset: Byte offset within chip | |
26 | * @offset_buf: Place to put byte offset | |
27 | * @msg: Message buffer | |
28 | * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the | |
29 | * message is still set up but will not contain an offset. | |
30 | */ | |
31 | static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, | |
32 | uint8_t offset_buf[], struct i2c_msg *msg) | |
33 | { | |
34 | int offset_len; | |
35 | ||
36 | msg->addr = chip->chip_addr; | |
37 | msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
38 | msg->len = chip->offset_len; | |
39 | msg->buf = offset_buf; | |
40 | if (!chip->offset_len) | |
41 | return -EADDRNOTAVAIL; | |
42 | assert(chip->offset_len <= I2C_MAX_OFFSET_LEN); | |
43 | offset_len = chip->offset_len; | |
44 | while (offset_len--) | |
45 | *offset_buf++ = offset >> (8 * offset_len); | |
46 | ||
47 | return 0; | |
48 | } | |
49 | ||
50 | static int i2c_read_bytewise(struct udevice *dev, uint offset, | |
51 | uint8_t *buffer, int len) | |
52 | { | |
e6f66ec0 | 53 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
54 | struct udevice *bus = dev_get_parent(dev); |
55 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
56 | struct i2c_msg msg[2], *ptr; | |
57 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
58 | int ret; | |
59 | int i; | |
60 | ||
61 | for (i = 0; i < len; i++) { | |
62 | if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) | |
63 | return -EINVAL; | |
64 | ptr = msg + 1; | |
65 | ptr->addr = chip->chip_addr; | |
66 | ptr->flags = msg->flags | I2C_M_RD; | |
67 | ptr->len = 1; | |
68 | ptr->buf = &buffer[i]; | |
69 | ptr++; | |
70 | ||
71 | ret = ops->xfer(bus, msg, ptr - msg); | |
72 | if (ret) | |
73 | return ret; | |
74 | } | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
79 | static int i2c_write_bytewise(struct udevice *dev, uint offset, | |
80 | const uint8_t *buffer, int len) | |
81 | { | |
e6f66ec0 | 82 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
83 | struct udevice *bus = dev_get_parent(dev); |
84 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
85 | struct i2c_msg msg[1]; | |
86 | uint8_t buf[I2C_MAX_OFFSET_LEN + 1]; | |
87 | int ret; | |
88 | int i; | |
89 | ||
90 | for (i = 0; i < len; i++) { | |
91 | if (i2c_setup_offset(chip, offset + i, buf, msg)) | |
92 | return -EINVAL; | |
93 | buf[msg->len++] = buffer[i]; | |
94 | ||
95 | ret = ops->xfer(bus, msg, 1); | |
96 | if (ret) | |
97 | return ret; | |
98 | } | |
99 | ||
100 | return 0; | |
101 | } | |
102 | ||
f9a4c2da | 103 | int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len) |
c6202d85 | 104 | { |
e6f66ec0 | 105 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
106 | struct udevice *bus = dev_get_parent(dev); |
107 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
108 | struct i2c_msg msg[2], *ptr; | |
109 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
110 | int msg_count; | |
111 | ||
112 | if (!ops->xfer) | |
113 | return -ENOSYS; | |
114 | if (chip->flags & DM_I2C_CHIP_RD_ADDRESS) | |
115 | return i2c_read_bytewise(dev, offset, buffer, len); | |
116 | ptr = msg; | |
117 | if (!i2c_setup_offset(chip, offset, offset_buf, ptr)) | |
118 | ptr++; | |
119 | ||
120 | if (len) { | |
121 | ptr->addr = chip->chip_addr; | |
122 | ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
123 | ptr->flags |= I2C_M_RD; | |
124 | ptr->len = len; | |
125 | ptr->buf = buffer; | |
126 | ptr++; | |
127 | } | |
128 | msg_count = ptr - msg; | |
129 | ||
130 | return ops->xfer(bus, msg, msg_count); | |
131 | } | |
132 | ||
f9a4c2da SG |
133 | int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, |
134 | int len) | |
c6202d85 | 135 | { |
e6f66ec0 | 136 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
137 | struct udevice *bus = dev_get_parent(dev); |
138 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
139 | struct i2c_msg msg[1]; | |
140 | ||
141 | if (!ops->xfer) | |
142 | return -ENOSYS; | |
143 | ||
144 | if (chip->flags & DM_I2C_CHIP_WR_ADDRESS) | |
145 | return i2c_write_bytewise(dev, offset, buffer, len); | |
146 | /* | |
147 | * The simple approach would be to send two messages here: one to | |
148 | * set the offset and one to write the bytes. However some drivers | |
149 | * will not be expecting this, and some chips won't like how the | |
150 | * driver presents this on the I2C bus. | |
151 | * | |
152 | * The API does not support separate offset and data. We could extend | |
153 | * it with a flag indicating that there is data in the next message | |
154 | * that needs to be processed in the same transaction. We could | |
155 | * instead add an additional buffer to each message. For now, handle | |
156 | * this in the uclass since it isn't clear what the impact on drivers | |
157 | * would be with this extra complication. Unfortunately this means | |
158 | * copying the message. | |
159 | * | |
160 | * Use the stack for small messages, malloc() for larger ones. We | |
161 | * need to allow space for the offset (up to 4 bytes) and the message | |
162 | * itself. | |
163 | */ | |
164 | if (len < 64) { | |
165 | uint8_t buf[I2C_MAX_OFFSET_LEN + len]; | |
166 | ||
167 | i2c_setup_offset(chip, offset, buf, msg); | |
168 | msg->len += len; | |
169 | memcpy(buf + chip->offset_len, buffer, len); | |
170 | ||
171 | return ops->xfer(bus, msg, 1); | |
172 | } else { | |
173 | uint8_t *buf; | |
174 | int ret; | |
175 | ||
176 | buf = malloc(I2C_MAX_OFFSET_LEN + len); | |
177 | if (!buf) | |
178 | return -ENOMEM; | |
179 | i2c_setup_offset(chip, offset, buf, msg); | |
180 | msg->len += len; | |
181 | memcpy(buf + chip->offset_len, buffer, len); | |
182 | ||
183 | ret = ops->xfer(bus, msg, 1); | |
184 | free(buf); | |
185 | return ret; | |
186 | } | |
187 | } | |
188 | ||
189 | /** | |
190 | * i2c_probe_chip() - probe for a chip on a bus | |
191 | * | |
192 | * @bus: Bus to probe | |
193 | * @chip_addr: Chip address to probe | |
194 | * @flags: Flags for the chip | |
195 | * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip | |
196 | * does not respond to probe | |
197 | */ | |
198 | static int i2c_probe_chip(struct udevice *bus, uint chip_addr, | |
199 | enum dm_i2c_chip_flags chip_flags) | |
200 | { | |
201 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
202 | struct i2c_msg msg[1]; | |
203 | int ret; | |
204 | ||
205 | if (ops->probe_chip) { | |
206 | ret = ops->probe_chip(bus, chip_addr, chip_flags); | |
207 | if (!ret || ret != -ENOSYS) | |
208 | return ret; | |
209 | } | |
210 | ||
211 | if (!ops->xfer) | |
212 | return -ENOSYS; | |
213 | ||
214 | /* Probe with a zero-length message */ | |
215 | msg->addr = chip_addr; | |
216 | msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
217 | msg->len = 0; | |
218 | msg->buf = NULL; | |
219 | ||
220 | return ops->xfer(bus, msg, 1); | |
221 | } | |
222 | ||
25ab4b03 | 223 | static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len, |
c6202d85 SG |
224 | struct udevice **devp) |
225 | { | |
e6f66ec0 | 226 | struct dm_i2c_chip *chip; |
c6202d85 SG |
227 | char name[30], *str; |
228 | struct udevice *dev; | |
229 | int ret; | |
230 | ||
231 | snprintf(name, sizeof(name), "generic_%x", chip_addr); | |
232 | str = strdup(name); | |
233 | ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); | |
234 | debug("%s: device_bind_driver: ret=%d\n", __func__, ret); | |
235 | if (ret) | |
236 | goto err_bind; | |
237 | ||
238 | /* Tell the device what we know about it */ | |
e6f66ec0 SG |
239 | chip = dev_get_parent_platdata(dev); |
240 | chip->chip_addr = chip_addr; | |
241 | chip->offset_len = offset_len; | |
242 | ret = device_probe(dev); | |
243 | debug("%s: device_probe: ret=%d\n", __func__, ret); | |
c6202d85 SG |
244 | if (ret) |
245 | goto err_probe; | |
246 | ||
247 | *devp = dev; | |
248 | return 0; | |
249 | ||
250 | err_probe: | |
e6f66ec0 SG |
251 | /* |
252 | * If the device failed to probe, unbind it. There is nothing there | |
253 | * on the bus so we don't want to leave it lying around | |
254 | */ | |
c6202d85 SG |
255 | device_unbind(dev); |
256 | err_bind: | |
257 | free(str); | |
258 | return ret; | |
259 | } | |
260 | ||
25ab4b03 SG |
261 | int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, |
262 | struct udevice **devp) | |
c6202d85 SG |
263 | { |
264 | struct udevice *dev; | |
265 | ||
266 | debug("%s: Searching bus '%s' for address %02x: ", __func__, | |
267 | bus->name, chip_addr); | |
268 | for (device_find_first_child(bus, &dev); dev; | |
269 | device_find_next_child(&dev)) { | |
e6f66ec0 | 270 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
271 | int ret; |
272 | ||
c6202d85 SG |
273 | if (chip->chip_addr == chip_addr) { |
274 | ret = device_probe(dev); | |
275 | debug("found, ret=%d\n", ret); | |
276 | if (ret) | |
277 | return ret; | |
278 | *devp = dev; | |
279 | return 0; | |
280 | } | |
281 | } | |
282 | debug("not found\n"); | |
25ab4b03 | 283 | return i2c_bind_driver(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
284 | } |
285 | ||
25ab4b03 SG |
286 | int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, |
287 | struct udevice **devp) | |
c6202d85 SG |
288 | { |
289 | struct udevice *bus; | |
290 | int ret; | |
291 | ||
292 | ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); | |
293 | if (ret) { | |
294 | debug("Cannot find I2C bus %d\n", busnum); | |
295 | return ret; | |
296 | } | |
25ab4b03 | 297 | ret = i2c_get_chip(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
298 | if (ret) { |
299 | debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, | |
300 | busnum); | |
301 | return ret; | |
302 | } | |
303 | ||
304 | return 0; | |
305 | } | |
306 | ||
f9a4c2da SG |
307 | int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, |
308 | struct udevice **devp) | |
c6202d85 SG |
309 | { |
310 | int ret; | |
311 | ||
312 | *devp = NULL; | |
313 | ||
314 | /* First probe that chip */ | |
315 | ret = i2c_probe_chip(bus, chip_addr, chip_flags); | |
316 | debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, | |
317 | chip_addr, ret); | |
318 | if (ret) | |
319 | return ret; | |
320 | ||
321 | /* The chip was found, see if we have a driver, and probe it */ | |
25ab4b03 | 322 | ret = i2c_get_chip(bus, chip_addr, 1, devp); |
c6202d85 SG |
323 | debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); |
324 | ||
325 | return ret; | |
326 | } | |
327 | ||
ca88b9b9 | 328 | int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
c6202d85 SG |
329 | { |
330 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
331 | struct dm_i2c_bus *i2c = bus->uclass_priv; | |
332 | int ret; | |
333 | ||
334 | /* | |
335 | * If we have a method, call it. If not then the driver probably wants | |
336 | * to deal with speed changes on the next transfer. It can easily read | |
337 | * the current speed from this uclass | |
338 | */ | |
339 | if (ops->set_bus_speed) { | |
340 | ret = ops->set_bus_speed(bus, speed); | |
341 | if (ret) | |
342 | return ret; | |
343 | } | |
344 | i2c->speed_hz = speed; | |
345 | ||
346 | return 0; | |
347 | } | |
348 | ||
ca88b9b9 | 349 | int dm_i2c_get_bus_speed(struct udevice *bus) |
c6202d85 SG |
350 | { |
351 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
352 | struct dm_i2c_bus *i2c = bus->uclass_priv; | |
353 | ||
354 | if (!ops->get_bus_speed) | |
355 | return i2c->speed_hz; | |
356 | ||
357 | return ops->get_bus_speed(bus); | |
358 | } | |
359 | ||
360 | int i2c_set_chip_flags(struct udevice *dev, uint flags) | |
361 | { | |
362 | struct udevice *bus = dev->parent; | |
e6f66ec0 | 363 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
364 | struct dm_i2c_ops *ops = i2c_get_ops(bus); |
365 | int ret; | |
366 | ||
367 | if (ops->set_flags) { | |
368 | ret = ops->set_flags(dev, flags); | |
369 | if (ret) | |
370 | return ret; | |
371 | } | |
372 | chip->flags = flags; | |
373 | ||
374 | return 0; | |
375 | } | |
376 | ||
377 | int i2c_get_chip_flags(struct udevice *dev, uint *flagsp) | |
378 | { | |
e6f66ec0 | 379 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
380 | |
381 | *flagsp = chip->flags; | |
382 | ||
383 | return 0; | |
384 | } | |
385 | ||
386 | int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len) | |
387 | { | |
e6f66ec0 | 388 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
389 | |
390 | if (offset_len > I2C_MAX_OFFSET_LEN) | |
391 | return -EINVAL; | |
392 | chip->offset_len = offset_len; | |
393 | ||
394 | return 0; | |
395 | } | |
396 | ||
397 | int i2c_deblock(struct udevice *bus) | |
398 | { | |
399 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
400 | ||
401 | /* | |
402 | * We could implement a software deblocking here if we could get | |
403 | * access to the GPIOs used by I2C, and switch them to GPIO mode | |
404 | * and then back to I2C. This is somewhat beyond our powers in | |
405 | * driver model at present, so for now just fail. | |
406 | * | |
407 | * See https://patchwork.ozlabs.org/patch/399040/ | |
408 | */ | |
409 | if (!ops->deblock) | |
410 | return -ENOSYS; | |
411 | ||
412 | return ops->deblock(bus); | |
413 | } | |
414 | ||
415 | int i2c_chip_ofdata_to_platdata(const void *blob, int node, | |
416 | struct dm_i2c_chip *chip) | |
417 | { | |
7132b9fd SG |
418 | chip->offset_len = fdtdec_get_int(gd->fdt_blob, node, |
419 | "u-boot,i2c-offset-len", 1); | |
c6202d85 SG |
420 | chip->flags = 0; |
421 | chip->chip_addr = fdtdec_get_int(gd->fdt_blob, node, "reg", -1); | |
422 | if (chip->chip_addr == -1) { | |
423 | debug("%s: I2C Node '%s' has no 'reg' property\n", __func__, | |
424 | fdt_get_name(blob, node, NULL)); | |
425 | return -EINVAL; | |
426 | } | |
427 | ||
428 | return 0; | |
429 | } | |
430 | ||
431 | static int i2c_post_probe(struct udevice *dev) | |
432 | { | |
433 | struct dm_i2c_bus *i2c = dev->uclass_priv; | |
434 | ||
435 | i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, | |
436 | "clock-frequency", 100000); | |
437 | ||
ca88b9b9 | 438 | return dm_i2c_set_bus_speed(dev, i2c->speed_hz); |
c6202d85 SG |
439 | } |
440 | ||
e6f66ec0 | 441 | static int i2c_post_bind(struct udevice *dev) |
c6202d85 SG |
442 | { |
443 | /* Scan the bus for devices */ | |
444 | return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); | |
445 | } | |
446 | ||
e6f66ec0 SG |
447 | static int i2c_child_post_bind(struct udevice *dev) |
448 | { | |
449 | struct dm_i2c_chip *plat = dev_get_parent_platdata(dev); | |
450 | ||
451 | if (dev->of_offset == -1) | |
452 | return 0; | |
453 | ||
454 | return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, plat); | |
455 | } | |
456 | ||
c6202d85 SG |
457 | UCLASS_DRIVER(i2c) = { |
458 | .id = UCLASS_I2C, | |
459 | .name = "i2c", | |
9cc36a2b | 460 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
c6202d85 SG |
461 | .post_bind = i2c_post_bind, |
462 | .post_probe = i2c_post_probe, | |
e6f66ec0 SG |
463 | .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus), |
464 | .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip), | |
465 | .child_post_bind = i2c_child_post_bind, | |
c6202d85 SG |
466 | }; |
467 | ||
468 | UCLASS_DRIVER(i2c_generic) = { | |
469 | .id = UCLASS_I2C_GENERIC, | |
470 | .name = "i2c_generic", | |
471 | }; | |
472 | ||
473 | U_BOOT_DRIVER(i2c_generic_chip_drv) = { | |
474 | .name = "i2c_generic_chip_drv", | |
475 | .id = UCLASS_I2C_GENERIC, | |
476 | }; |