]>
Commit | Line | Data |
---|---|---|
c6202d85 SG |
1 | /* |
2 | * Copyright (c) 2014 Google, Inc | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <dm.h> | |
9 | #include <errno.h> | |
10 | #include <fdtdec.h> | |
11 | #include <i2c.h> | |
12 | #include <malloc.h> | |
13 | #include <dm/device-internal.h> | |
14 | #include <dm/lists.h> | |
c6202d85 SG |
15 | |
16 | DECLARE_GLOBAL_DATA_PTR; | |
17 | ||
18 | #define I2C_MAX_OFFSET_LEN 4 | |
19 | ||
7d7db222 SG |
20 | /* Useful debugging function */ |
21 | void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs) | |
22 | { | |
23 | int i; | |
24 | ||
25 | for (i = 0; i < nmsgs; i++) { | |
26 | struct i2c_msg *m = &msg[i]; | |
27 | ||
28 | printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W", | |
29 | msg->addr, msg->len); | |
30 | if (!(m->flags & I2C_M_RD)) | |
31 | printf(": %x", m->buf[0]); | |
32 | printf("\n"); | |
33 | } | |
34 | } | |
35 | ||
c6202d85 SG |
36 | /** |
37 | * i2c_setup_offset() - Set up a new message with a chip offset | |
38 | * | |
39 | * @chip: Chip to use | |
40 | * @offset: Byte offset within chip | |
41 | * @offset_buf: Place to put byte offset | |
42 | * @msg: Message buffer | |
43 | * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the | |
44 | * message is still set up but will not contain an offset. | |
45 | */ | |
46 | static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, | |
47 | uint8_t offset_buf[], struct i2c_msg *msg) | |
48 | { | |
49 | int offset_len; | |
50 | ||
51 | msg->addr = chip->chip_addr; | |
52 | msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
53 | msg->len = chip->offset_len; | |
54 | msg->buf = offset_buf; | |
55 | if (!chip->offset_len) | |
56 | return -EADDRNOTAVAIL; | |
57 | assert(chip->offset_len <= I2C_MAX_OFFSET_LEN); | |
58 | offset_len = chip->offset_len; | |
59 | while (offset_len--) | |
60 | *offset_buf++ = offset >> (8 * offset_len); | |
61 | ||
62 | return 0; | |
63 | } | |
64 | ||
65 | static int i2c_read_bytewise(struct udevice *dev, uint offset, | |
66 | uint8_t *buffer, int len) | |
67 | { | |
e6f66ec0 | 68 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
69 | struct udevice *bus = dev_get_parent(dev); |
70 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
71 | struct i2c_msg msg[2], *ptr; | |
72 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
73 | int ret; | |
74 | int i; | |
75 | ||
76 | for (i = 0; i < len; i++) { | |
77 | if (i2c_setup_offset(chip, offset + i, offset_buf, msg)) | |
78 | return -EINVAL; | |
79 | ptr = msg + 1; | |
80 | ptr->addr = chip->chip_addr; | |
81 | ptr->flags = msg->flags | I2C_M_RD; | |
82 | ptr->len = 1; | |
83 | ptr->buf = &buffer[i]; | |
84 | ptr++; | |
85 | ||
86 | ret = ops->xfer(bus, msg, ptr - msg); | |
87 | if (ret) | |
88 | return ret; | |
89 | } | |
90 | ||
91 | return 0; | |
92 | } | |
93 | ||
94 | static int i2c_write_bytewise(struct udevice *dev, uint offset, | |
95 | const uint8_t *buffer, int len) | |
96 | { | |
e6f66ec0 | 97 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
98 | struct udevice *bus = dev_get_parent(dev); |
99 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
100 | struct i2c_msg msg[1]; | |
101 | uint8_t buf[I2C_MAX_OFFSET_LEN + 1]; | |
102 | int ret; | |
103 | int i; | |
104 | ||
105 | for (i = 0; i < len; i++) { | |
106 | if (i2c_setup_offset(chip, offset + i, buf, msg)) | |
107 | return -EINVAL; | |
108 | buf[msg->len++] = buffer[i]; | |
109 | ||
110 | ret = ops->xfer(bus, msg, 1); | |
111 | if (ret) | |
112 | return ret; | |
113 | } | |
114 | ||
115 | return 0; | |
116 | } | |
117 | ||
f9a4c2da | 118 | int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len) |
c6202d85 | 119 | { |
e6f66ec0 | 120 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
121 | struct udevice *bus = dev_get_parent(dev); |
122 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
123 | struct i2c_msg msg[2], *ptr; | |
124 | uint8_t offset_buf[I2C_MAX_OFFSET_LEN]; | |
125 | int msg_count; | |
126 | ||
127 | if (!ops->xfer) | |
128 | return -ENOSYS; | |
129 | if (chip->flags & DM_I2C_CHIP_RD_ADDRESS) | |
130 | return i2c_read_bytewise(dev, offset, buffer, len); | |
131 | ptr = msg; | |
132 | if (!i2c_setup_offset(chip, offset, offset_buf, ptr)) | |
133 | ptr++; | |
134 | ||
135 | if (len) { | |
136 | ptr->addr = chip->chip_addr; | |
137 | ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
138 | ptr->flags |= I2C_M_RD; | |
139 | ptr->len = len; | |
140 | ptr->buf = buffer; | |
141 | ptr++; | |
142 | } | |
143 | msg_count = ptr - msg; | |
144 | ||
145 | return ops->xfer(bus, msg, msg_count); | |
146 | } | |
147 | ||
f9a4c2da SG |
148 | int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer, |
149 | int len) | |
c6202d85 | 150 | { |
e6f66ec0 | 151 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
152 | struct udevice *bus = dev_get_parent(dev); |
153 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
154 | struct i2c_msg msg[1]; | |
155 | ||
156 | if (!ops->xfer) | |
157 | return -ENOSYS; | |
158 | ||
159 | if (chip->flags & DM_I2C_CHIP_WR_ADDRESS) | |
160 | return i2c_write_bytewise(dev, offset, buffer, len); | |
161 | /* | |
162 | * The simple approach would be to send two messages here: one to | |
163 | * set the offset and one to write the bytes. However some drivers | |
164 | * will not be expecting this, and some chips won't like how the | |
165 | * driver presents this on the I2C bus. | |
166 | * | |
167 | * The API does not support separate offset and data. We could extend | |
168 | * it with a flag indicating that there is data in the next message | |
169 | * that needs to be processed in the same transaction. We could | |
170 | * instead add an additional buffer to each message. For now, handle | |
171 | * this in the uclass since it isn't clear what the impact on drivers | |
172 | * would be with this extra complication. Unfortunately this means | |
173 | * copying the message. | |
174 | * | |
175 | * Use the stack for small messages, malloc() for larger ones. We | |
176 | * need to allow space for the offset (up to 4 bytes) and the message | |
177 | * itself. | |
178 | */ | |
179 | if (len < 64) { | |
180 | uint8_t buf[I2C_MAX_OFFSET_LEN + len]; | |
181 | ||
182 | i2c_setup_offset(chip, offset, buf, msg); | |
183 | msg->len += len; | |
184 | memcpy(buf + chip->offset_len, buffer, len); | |
185 | ||
186 | return ops->xfer(bus, msg, 1); | |
187 | } else { | |
188 | uint8_t *buf; | |
189 | int ret; | |
190 | ||
191 | buf = malloc(I2C_MAX_OFFSET_LEN + len); | |
192 | if (!buf) | |
193 | return -ENOMEM; | |
194 | i2c_setup_offset(chip, offset, buf, msg); | |
195 | msg->len += len; | |
196 | memcpy(buf + chip->offset_len, buffer, len); | |
197 | ||
198 | ret = ops->xfer(bus, msg, 1); | |
199 | free(buf); | |
200 | return ret; | |
201 | } | |
202 | } | |
203 | ||
df358c6b SG |
204 | int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs) |
205 | { | |
206 | struct udevice *bus = dev_get_parent(dev); | |
207 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
208 | ||
209 | if (!ops->xfer) | |
210 | return -ENOSYS; | |
211 | ||
212 | return ops->xfer(bus, msg, nmsgs); | |
213 | } | |
214 | ||
ba3864f8 SG |
215 | int dm_i2c_reg_read(struct udevice *dev, uint offset) |
216 | { | |
217 | uint8_t val; | |
218 | int ret; | |
219 | ||
220 | ret = dm_i2c_read(dev, offset, &val, 1); | |
221 | if (ret < 0) | |
222 | return ret; | |
223 | ||
224 | return val; | |
225 | } | |
226 | ||
227 | int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value) | |
228 | { | |
229 | uint8_t val = value; | |
230 | ||
231 | return dm_i2c_write(dev, offset, &val, 1); | |
232 | } | |
233 | ||
c6202d85 SG |
234 | /** |
235 | * i2c_probe_chip() - probe for a chip on a bus | |
236 | * | |
237 | * @bus: Bus to probe | |
238 | * @chip_addr: Chip address to probe | |
239 | * @flags: Flags for the chip | |
240 | * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip | |
241 | * does not respond to probe | |
242 | */ | |
243 | static int i2c_probe_chip(struct udevice *bus, uint chip_addr, | |
244 | enum dm_i2c_chip_flags chip_flags) | |
245 | { | |
246 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
247 | struct i2c_msg msg[1]; | |
248 | int ret; | |
249 | ||
250 | if (ops->probe_chip) { | |
251 | ret = ops->probe_chip(bus, chip_addr, chip_flags); | |
252 | if (!ret || ret != -ENOSYS) | |
253 | return ret; | |
254 | } | |
255 | ||
256 | if (!ops->xfer) | |
257 | return -ENOSYS; | |
258 | ||
259 | /* Probe with a zero-length message */ | |
260 | msg->addr = chip_addr; | |
261 | msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; | |
262 | msg->len = 0; | |
263 | msg->buf = NULL; | |
264 | ||
265 | return ops->xfer(bus, msg, 1); | |
266 | } | |
267 | ||
25ab4b03 | 268 | static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len, |
c6202d85 SG |
269 | struct udevice **devp) |
270 | { | |
e6f66ec0 | 271 | struct dm_i2c_chip *chip; |
c6202d85 SG |
272 | char name[30], *str; |
273 | struct udevice *dev; | |
274 | int ret; | |
275 | ||
276 | snprintf(name, sizeof(name), "generic_%x", chip_addr); | |
277 | str = strdup(name); | |
5c2d23bf SG |
278 | if (!str) |
279 | return -ENOMEM; | |
c6202d85 SG |
280 | ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev); |
281 | debug("%s: device_bind_driver: ret=%d\n", __func__, ret); | |
282 | if (ret) | |
283 | goto err_bind; | |
284 | ||
285 | /* Tell the device what we know about it */ | |
e6f66ec0 SG |
286 | chip = dev_get_parent_platdata(dev); |
287 | chip->chip_addr = chip_addr; | |
288 | chip->offset_len = offset_len; | |
289 | ret = device_probe(dev); | |
290 | debug("%s: device_probe: ret=%d\n", __func__, ret); | |
c6202d85 SG |
291 | if (ret) |
292 | goto err_probe; | |
293 | ||
294 | *devp = dev; | |
295 | return 0; | |
296 | ||
297 | err_probe: | |
e6f66ec0 SG |
298 | /* |
299 | * If the device failed to probe, unbind it. There is nothing there | |
300 | * on the bus so we don't want to leave it lying around | |
301 | */ | |
c6202d85 SG |
302 | device_unbind(dev); |
303 | err_bind: | |
304 | free(str); | |
305 | return ret; | |
306 | } | |
307 | ||
25ab4b03 SG |
308 | int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len, |
309 | struct udevice **devp) | |
c6202d85 SG |
310 | { |
311 | struct udevice *dev; | |
312 | ||
313 | debug("%s: Searching bus '%s' for address %02x: ", __func__, | |
314 | bus->name, chip_addr); | |
315 | for (device_find_first_child(bus, &dev); dev; | |
316 | device_find_next_child(&dev)) { | |
e6f66ec0 | 317 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
318 | int ret; |
319 | ||
c6202d85 SG |
320 | if (chip->chip_addr == chip_addr) { |
321 | ret = device_probe(dev); | |
322 | debug("found, ret=%d\n", ret); | |
323 | if (ret) | |
324 | return ret; | |
325 | *devp = dev; | |
326 | return 0; | |
327 | } | |
328 | } | |
329 | debug("not found\n"); | |
25ab4b03 | 330 | return i2c_bind_driver(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
331 | } |
332 | ||
25ab4b03 SG |
333 | int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len, |
334 | struct udevice **devp) | |
c6202d85 SG |
335 | { |
336 | struct udevice *bus; | |
337 | int ret; | |
338 | ||
339 | ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus); | |
340 | if (ret) { | |
341 | debug("Cannot find I2C bus %d\n", busnum); | |
342 | return ret; | |
343 | } | |
25ab4b03 | 344 | ret = i2c_get_chip(bus, chip_addr, offset_len, devp); |
c6202d85 SG |
345 | if (ret) { |
346 | debug("Cannot find I2C chip %02x on bus %d\n", chip_addr, | |
347 | busnum); | |
348 | return ret; | |
349 | } | |
350 | ||
351 | return 0; | |
352 | } | |
353 | ||
f9a4c2da SG |
354 | int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags, |
355 | struct udevice **devp) | |
c6202d85 SG |
356 | { |
357 | int ret; | |
358 | ||
359 | *devp = NULL; | |
360 | ||
361 | /* First probe that chip */ | |
362 | ret = i2c_probe_chip(bus, chip_addr, chip_flags); | |
363 | debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name, | |
364 | chip_addr, ret); | |
365 | if (ret) | |
366 | return ret; | |
367 | ||
368 | /* The chip was found, see if we have a driver, and probe it */ | |
25ab4b03 | 369 | ret = i2c_get_chip(bus, chip_addr, 1, devp); |
c6202d85 SG |
370 | debug("%s: i2c_get_chip: ret=%d\n", __func__, ret); |
371 | ||
372 | return ret; | |
373 | } | |
374 | ||
ca88b9b9 | 375 | int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) |
c6202d85 SG |
376 | { |
377 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
e564f054 | 378 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
c6202d85 SG |
379 | int ret; |
380 | ||
381 | /* | |
382 | * If we have a method, call it. If not then the driver probably wants | |
383 | * to deal with speed changes on the next transfer. It can easily read | |
384 | * the current speed from this uclass | |
385 | */ | |
386 | if (ops->set_bus_speed) { | |
387 | ret = ops->set_bus_speed(bus, speed); | |
388 | if (ret) | |
389 | return ret; | |
390 | } | |
391 | i2c->speed_hz = speed; | |
392 | ||
393 | return 0; | |
394 | } | |
395 | ||
ca88b9b9 | 396 | int dm_i2c_get_bus_speed(struct udevice *bus) |
c6202d85 SG |
397 | { |
398 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
e564f054 | 399 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus); |
c6202d85 SG |
400 | |
401 | if (!ops->get_bus_speed) | |
402 | return i2c->speed_hz; | |
403 | ||
404 | return ops->get_bus_speed(bus); | |
405 | } | |
406 | ||
407 | int i2c_set_chip_flags(struct udevice *dev, uint flags) | |
408 | { | |
409 | struct udevice *bus = dev->parent; | |
e6f66ec0 | 410 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
411 | struct dm_i2c_ops *ops = i2c_get_ops(bus); |
412 | int ret; | |
413 | ||
414 | if (ops->set_flags) { | |
415 | ret = ops->set_flags(dev, flags); | |
416 | if (ret) | |
417 | return ret; | |
418 | } | |
419 | chip->flags = flags; | |
420 | ||
421 | return 0; | |
422 | } | |
423 | ||
424 | int i2c_get_chip_flags(struct udevice *dev, uint *flagsp) | |
425 | { | |
e6f66ec0 | 426 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
427 | |
428 | *flagsp = chip->flags; | |
429 | ||
430 | return 0; | |
431 | } | |
432 | ||
433 | int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len) | |
434 | { | |
e6f66ec0 | 435 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); |
c6202d85 SG |
436 | |
437 | if (offset_len > I2C_MAX_OFFSET_LEN) | |
438 | return -EINVAL; | |
439 | chip->offset_len = offset_len; | |
440 | ||
441 | return 0; | |
442 | } | |
443 | ||
01501804 SG |
444 | int i2c_get_chip_offset_len(struct udevice *dev) |
445 | { | |
446 | struct dm_i2c_chip *chip = dev_get_parent_platdata(dev); | |
447 | ||
448 | return chip->offset_len; | |
449 | } | |
450 | ||
c6202d85 SG |
451 | int i2c_deblock(struct udevice *bus) |
452 | { | |
453 | struct dm_i2c_ops *ops = i2c_get_ops(bus); | |
454 | ||
455 | /* | |
456 | * We could implement a software deblocking here if we could get | |
457 | * access to the GPIOs used by I2C, and switch them to GPIO mode | |
458 | * and then back to I2C. This is somewhat beyond our powers in | |
459 | * driver model at present, so for now just fail. | |
460 | * | |
461 | * See https://patchwork.ozlabs.org/patch/399040/ | |
462 | */ | |
463 | if (!ops->deblock) | |
464 | return -ENOSYS; | |
465 | ||
466 | return ops->deblock(bus); | |
467 | } | |
468 | ||
5142ac79 | 469 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
c6202d85 SG |
470 | int i2c_chip_ofdata_to_platdata(const void *blob, int node, |
471 | struct dm_i2c_chip *chip) | |
472 | { | |
7132b9fd SG |
473 | chip->offset_len = fdtdec_get_int(gd->fdt_blob, node, |
474 | "u-boot,i2c-offset-len", 1); | |
c6202d85 SG |
475 | chip->flags = 0; |
476 | chip->chip_addr = fdtdec_get_int(gd->fdt_blob, node, "reg", -1); | |
477 | if (chip->chip_addr == -1) { | |
478 | debug("%s: I2C Node '%s' has no 'reg' property\n", __func__, | |
479 | fdt_get_name(blob, node, NULL)); | |
480 | return -EINVAL; | |
481 | } | |
482 | ||
483 | return 0; | |
484 | } | |
5142ac79 | 485 | #endif |
c6202d85 SG |
486 | |
487 | static int i2c_post_probe(struct udevice *dev) | |
488 | { | |
5142ac79 | 489 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
e564f054 | 490 | struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev); |
c6202d85 SG |
491 | |
492 | i2c->speed_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, | |
493 | "clock-frequency", 100000); | |
494 | ||
ca88b9b9 | 495 | return dm_i2c_set_bus_speed(dev, i2c->speed_hz); |
5142ac79 M |
496 | #else |
497 | return 0; | |
498 | #endif | |
c6202d85 SG |
499 | } |
500 | ||
e6f66ec0 SG |
501 | static int i2c_child_post_bind(struct udevice *dev) |
502 | { | |
5142ac79 | 503 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
e6f66ec0 SG |
504 | struct dm_i2c_chip *plat = dev_get_parent_platdata(dev); |
505 | ||
506 | if (dev->of_offset == -1) | |
507 | return 0; | |
508 | ||
509 | return i2c_chip_ofdata_to_platdata(gd->fdt_blob, dev->of_offset, plat); | |
5142ac79 M |
510 | #else |
511 | return 0; | |
512 | #endif | |
e6f66ec0 SG |
513 | } |
514 | ||
c6202d85 SG |
515 | UCLASS_DRIVER(i2c) = { |
516 | .id = UCLASS_I2C, | |
517 | .name = "i2c", | |
9cc36a2b | 518 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
91195485 SG |
519 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
520 | .post_bind = dm_scan_fdt_dev, | |
521 | #endif | |
c6202d85 | 522 | .post_probe = i2c_post_probe, |
e6f66ec0 SG |
523 | .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus), |
524 | .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip), | |
525 | .child_post_bind = i2c_child_post_bind, | |
c6202d85 SG |
526 | }; |
527 | ||
528 | UCLASS_DRIVER(i2c_generic) = { | |
529 | .id = UCLASS_I2C_GENERIC, | |
530 | .name = "i2c_generic", | |
531 | }; | |
532 | ||
533 | U_BOOT_DRIVER(i2c_generic_chip_drv) = { | |
534 | .name = "i2c_generic_chip_drv", | |
535 | .id = UCLASS_I2C_GENERIC, | |
536 | }; |