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385c9ef5 HS |
1 | /* |
2 | * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net> | |
3 | * | |
4 | * (C) Copyright 2012 | |
5 | * Heiko Schocher, DENX Software Engineering, hs@denx.de. | |
6 | * | |
7 | * Multibus/multiadapter I2C core functions (wrappers) | |
8 | * | |
8dde4ca9 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
385c9ef5 HS |
10 | */ |
11 | #include <common.h> | |
12 | #include <i2c.h> | |
13 | ||
14 | struct i2c_adapter *i2c_get_adapter(int index) | |
15 | { | |
16 | struct i2c_adapter *i2c_adap_p = ll_entry_start(struct i2c_adapter, | |
17 | i2c); | |
18 | int max = ll_entry_count(struct i2c_adapter, i2c); | |
19 | int i; | |
20 | ||
21 | if (index >= max) { | |
22 | printf("Error, wrong i2c adapter %d max %d possible\n", | |
23 | index, max); | |
24 | return i2c_adap_p; | |
25 | } | |
26 | if (index == 0) | |
27 | return i2c_adap_p; | |
28 | ||
29 | for (i = 0; i < index; i++) | |
30 | i2c_adap_p++; | |
31 | ||
32 | return i2c_adap_p; | |
33 | } | |
34 | ||
35 | #if !defined(CONFIG_SYS_I2C_DIRECT_BUS) | |
36 | struct i2c_bus_hose i2c_bus[CONFIG_SYS_NUM_I2C_BUSES] = | |
37 | CONFIG_SYS_I2C_BUSES; | |
38 | #endif | |
39 | ||
40 | DECLARE_GLOBAL_DATA_PTR; | |
41 | ||
385c9ef5 HS |
42 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS |
43 | /* | |
44 | * i2c_mux_set() | |
45 | * ------------- | |
46 | * | |
47 | * This turns on the given channel on I2C multiplexer chip connected to | |
48 | * a given I2C adapter directly or via other multiplexers. In the latter | |
49 | * case the entire multiplexer chain must be initialized first starting | |
50 | * with the one connected directly to the adapter. When disabling a chain | |
51 | * muxes must be programmed in reverse order, starting with the one | |
52 | * farthest from the adapter. | |
53 | * | |
54 | * mux_id is the multiplexer chip type from defined in i2c.h. So far only | |
55 | * NXP (Philips) PCA954x multiplexers are supported. Switches are NOT | |
56 | * supported (anybody uses them?) | |
57 | */ | |
58 | ||
59 | static int i2c_mux_set(struct i2c_adapter *adap, int mux_id, int chip, | |
60 | int channel) | |
61 | { | |
62 | uint8_t buf; | |
63 | int ret; | |
64 | ||
65 | /* channel < 0 - turn off the mux */ | |
66 | if (channel < 0) { | |
67 | buf = 0; | |
68 | ret = adap->write(adap, chip, 0, 0, &buf, 1); | |
69 | if (ret) | |
70 | printf("%s: Could not turn off the mux.\n", __func__); | |
71 | return ret; | |
72 | } | |
73 | ||
74 | switch (mux_id) { | |
75 | case I2C_MUX_PCA9540_ID: | |
76 | case I2C_MUX_PCA9542_ID: | |
77 | if (channel > 1) | |
78 | return -1; | |
79 | buf = (uint8_t)((channel & 0x01) | (1 << 2)); | |
80 | break; | |
81 | case I2C_MUX_PCA9544_ID: | |
82 | if (channel > 3) | |
83 | return -1; | |
84 | buf = (uint8_t)((channel & 0x03) | (1 << 2)); | |
85 | break; | |
86 | case I2C_MUX_PCA9547_ID: | |
87 | if (channel > 7) | |
88 | return -1; | |
89 | buf = (uint8_t)((channel & 0x07) | (1 << 3)); | |
90 | break; | |
e6658749 MB |
91 | case I2C_MUX_PCA9548_ID: |
92 | if (channel > 7) | |
93 | return -1; | |
94 | buf = (uint8_t)(0x01 << channel); | |
95 | break; | |
385c9ef5 HS |
96 | default: |
97 | printf("%s: wrong mux id: %d\n", __func__, mux_id); | |
98 | return -1; | |
99 | } | |
100 | ||
101 | ret = adap->write(adap, chip, 0, 0, &buf, 1); | |
102 | if (ret) | |
103 | printf("%s: could not set mux: id: %d chip: %x channel: %d\n", | |
104 | __func__, mux_id, chip, channel); | |
105 | return ret; | |
106 | } | |
107 | ||
108 | static int i2c_mux_set_all(void) | |
109 | { | |
110 | struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS]; | |
111 | int i; | |
112 | ||
113 | /* Connect requested bus if behind muxes */ | |
114 | if (i2c_bus_tmp->next_hop[0].chip != 0) { | |
115 | /* Set all muxes along the path to that bus */ | |
116 | for (i = 0; i < CONFIG_SYS_I2C_MAX_HOPS; i++) { | |
117 | int ret; | |
118 | ||
119 | if (i2c_bus_tmp->next_hop[i].chip == 0) | |
120 | break; | |
121 | ||
122 | ret = i2c_mux_set(I2C_ADAP, | |
123 | i2c_bus_tmp->next_hop[i].mux.id, | |
124 | i2c_bus_tmp->next_hop[i].chip, | |
125 | i2c_bus_tmp->next_hop[i].channel); | |
126 | if (ret != 0) | |
127 | return ret; | |
128 | } | |
129 | } | |
130 | return 0; | |
131 | } | |
132 | ||
f4ed3696 | 133 | static int i2c_mux_disconnect_all(void) |
385c9ef5 HS |
134 | { |
135 | struct i2c_bus_hose *i2c_bus_tmp = &i2c_bus[I2C_BUS]; | |
136 | int i; | |
2fe50ef4 | 137 | uint8_t buf = 0; |
385c9ef5 HS |
138 | |
139 | if (I2C_ADAP->init_done == 0) | |
140 | return 0; | |
141 | ||
142 | /* Disconnect current bus (turn off muxes if any) */ | |
143 | if ((i2c_bus_tmp->next_hop[0].chip != 0) && | |
144 | (I2C_ADAP->init_done != 0)) { | |
145 | i = CONFIG_SYS_I2C_MAX_HOPS; | |
146 | do { | |
147 | uint8_t chip; | |
148 | int ret; | |
149 | ||
150 | chip = i2c_bus_tmp->next_hop[--i].chip; | |
151 | if (chip == 0) | |
152 | continue; | |
153 | ||
154 | ret = I2C_ADAP->write(I2C_ADAP, chip, 0, 0, &buf, 1); | |
155 | if (ret != 0) { | |
f4ed3696 | 156 | printf("i2c: mux disconnect error\n"); |
385c9ef5 HS |
157 | return ret; |
158 | } | |
159 | } while (i > 0); | |
160 | } | |
161 | ||
162 | return 0; | |
163 | } | |
164 | #endif | |
165 | ||
166 | /* | |
167 | * i2c_init_bus(): | |
168 | * --------------- | |
169 | * | |
170 | * Initializes one bus. Will initialize the parent adapter. No current bus | |
171 | * changes, no mux (if any) setup. | |
172 | */ | |
173 | static void i2c_init_bus(unsigned int bus_no, int speed, int slaveaddr) | |
174 | { | |
175 | if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) | |
176 | return; | |
177 | ||
178 | I2C_ADAP->init(I2C_ADAP, speed, slaveaddr); | |
179 | ||
180 | if (gd->flags & GD_FLG_RELOC) { | |
181 | I2C_ADAP->init_done = 1; | |
182 | I2C_ADAP->speed = speed; | |
183 | I2C_ADAP->slaveaddr = slaveaddr; | |
184 | } | |
185 | } | |
186 | ||
187 | /* implement possible board specific board init */ | |
13a8b7ae | 188 | __weak void i2c_init_board(void) |
385c9ef5 HS |
189 | { |
190 | } | |
385c9ef5 | 191 | |
9d10c2d3 YY |
192 | /* implement possible for i2c specific early i2c init */ |
193 | __weak void i2c_early_init_f(void) | |
194 | { | |
195 | } | |
196 | ||
385c9ef5 HS |
197 | /* |
198 | * i2c_init_all(): | |
199 | * | |
200 | * not longer needed, will deleted. Actual init the SPD_BUS | |
201 | * for compatibility. | |
202 | * i2c_adap[] must be initialized beforehead with function pointers and | |
203 | * data, including speed and slaveaddr. | |
204 | */ | |
205 | void i2c_init_all(void) | |
206 | { | |
207 | i2c_init_board(); | |
208 | i2c_set_bus_num(CONFIG_SYS_SPD_BUS_NUM); | |
209 | return; | |
210 | } | |
211 | ||
212 | /* | |
213 | * i2c_get_bus_num(): | |
214 | * ------------------ | |
215 | * | |
216 | * Returns index of currently active I2C bus. Zero-based. | |
217 | */ | |
218 | unsigned int i2c_get_bus_num(void) | |
219 | { | |
220 | return gd->cur_i2c_bus; | |
221 | } | |
222 | ||
223 | /* | |
224 | * i2c_set_bus_num(): | |
225 | * ------------------ | |
226 | * | |
227 | * Change the active I2C bus. Subsequent read/write calls will | |
228 | * go to this one. Sets all of the muxes in a proper condition | |
229 | * if that bus is behind muxes. | |
230 | * If previously selected bus is behind the muxes turns off all the | |
231 | * muxes along the path to that bus. | |
232 | * | |
233 | * bus - bus index, zero based | |
234 | * | |
235 | * Returns: 0 on success, not 0 on failure | |
236 | */ | |
237 | int i2c_set_bus_num(unsigned int bus) | |
238 | { | |
13c2433c HS |
239 | int max; |
240 | ||
241 | if ((bus == I2C_BUS) && (I2C_ADAP->init_done > 0)) | |
242 | return 0; | |
385c9ef5 | 243 | |
385c9ef5 HS |
244 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS |
245 | if (bus >= CONFIG_SYS_NUM_I2C_BUSES) | |
246 | return -1; | |
247 | #endif | |
248 | ||
13c2433c HS |
249 | max = ll_entry_count(struct i2c_adapter, i2c); |
250 | if (I2C_ADAPTER(bus) >= max) { | |
251 | printf("Error, wrong i2c adapter %d max %d possible\n", | |
252 | I2C_ADAPTER(bus), max); | |
253 | return -2; | |
254 | } | |
385c9ef5 HS |
255 | |
256 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
f4ed3696 | 257 | i2c_mux_disconnect_all(); |
385c9ef5 HS |
258 | #endif |
259 | ||
260 | gd->cur_i2c_bus = bus; | |
261 | if (I2C_ADAP->init_done == 0) | |
262 | i2c_init_bus(bus, I2C_ADAP->speed, I2C_ADAP->slaveaddr); | |
263 | ||
264 | #ifndef CONFIG_SYS_I2C_DIRECT_BUS | |
265 | i2c_mux_set_all(); | |
266 | #endif | |
267 | return 0; | |
268 | } | |
269 | ||
270 | /* | |
271 | * Probe the given I2C chip address. Returns 0 if a chip responded, | |
272 | * not 0 on failure. | |
273 | */ | |
274 | int i2c_probe(uint8_t chip) | |
275 | { | |
276 | return I2C_ADAP->probe(I2C_ADAP, chip); | |
277 | } | |
278 | ||
279 | /* | |
280 | * Read/Write interface: | |
281 | * chip: I2C chip address, range 0..127 | |
282 | * addr: Memory (register) address within the chip | |
283 | * alen: Number of bytes to use for addr (typically 1, 2 for larger | |
284 | * memories, 0 for register type devices with only one | |
285 | * register) | |
286 | * buffer: Where to read/write the data | |
287 | * len: How many bytes to read/write | |
288 | * | |
289 | * Returns: 0 on success, not 0 on failure | |
290 | */ | |
291 | int i2c_read(uint8_t chip, unsigned int addr, int alen, | |
292 | uint8_t *buffer, int len) | |
293 | { | |
294 | return I2C_ADAP->read(I2C_ADAP, chip, addr, alen, buffer, len); | |
295 | } | |
296 | ||
297 | int i2c_write(uint8_t chip, unsigned int addr, int alen, | |
298 | uint8_t *buffer, int len) | |
299 | { | |
300 | return I2C_ADAP->write(I2C_ADAP, chip, addr, alen, buffer, len); | |
301 | } | |
302 | ||
303 | unsigned int i2c_set_bus_speed(unsigned int speed) | |
304 | { | |
305 | unsigned int ret; | |
306 | ||
307 | if (I2C_ADAP->set_bus_speed == NULL) | |
308 | return 0; | |
309 | ret = I2C_ADAP->set_bus_speed(I2C_ADAP, speed); | |
310 | if (gd->flags & GD_FLG_RELOC) | |
7cc1b02f | 311 | I2C_ADAP->speed = (ret == 0) ? speed : 0; |
385c9ef5 HS |
312 | |
313 | return ret; | |
314 | } | |
315 | ||
316 | unsigned int i2c_get_bus_speed(void) | |
317 | { | |
318 | struct i2c_adapter *cur = I2C_ADAP; | |
319 | return cur->speed; | |
320 | } | |
321 | ||
322 | uint8_t i2c_reg_read(uint8_t addr, uint8_t reg) | |
323 | { | |
324 | uint8_t buf; | |
325 | ||
385c9ef5 HS |
326 | i2c_read(addr, reg, 1, &buf, 1); |
327 | ||
328 | #ifdef DEBUG | |
329 | printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x\n", | |
330 | __func__, i2c_get_bus_num(), addr, reg, buf); | |
331 | #endif | |
332 | ||
333 | return buf; | |
334 | } | |
335 | ||
336 | void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val) | |
337 | { | |
385c9ef5 HS |
338 | #ifdef DEBUG |
339 | printf("%s: bus=%d addr=0x%02x, reg=0x%02x, val=0x%02x\n", | |
340 | __func__, i2c_get_bus_num(), addr, reg, val); | |
341 | #endif | |
342 | ||
343 | i2c_write(addr, reg, 1, &val, 1); | |
344 | } | |
345 | ||
13a8b7ae | 346 | __weak void i2c_init(int speed, int slaveaddr) |
385c9ef5 HS |
347 | { |
348 | i2c_init_bus(i2c_get_bus_num(), speed, slaveaddr); | |
349 | } |