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1 | /* |
2 | * (C) Copyright 2017 - Beniamino Galvani <b.galvani@gmail.com> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | #include <common.h> | |
7 | #include <asm/arch/i2c.h> | |
8 | #include <asm/io.h> | |
9 | #include <dm.h> | |
10 | #include <i2c.h> | |
11 | ||
12 | #define I2C_TIMEOUT_MS 500 | |
13 | ||
14 | /* Control register fields */ | |
15 | #define REG_CTRL_START BIT(0) | |
16 | #define REG_CTRL_ACK_IGNORE BIT(1) | |
17 | #define REG_CTRL_STATUS BIT(2) | |
18 | #define REG_CTRL_ERROR BIT(3) | |
19 | #define REG_CTRL_CLKDIV_SHIFT 12 | |
20 | #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12) | |
21 | #define REG_CTRL_CLKDIVEXT_SHIFT 28 | |
22 | #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28) | |
23 | ||
24 | enum { | |
25 | TOKEN_END = 0, | |
26 | TOKEN_START, | |
27 | TOKEN_SLAVE_ADDR_WRITE, | |
28 | TOKEN_SLAVE_ADDR_READ, | |
29 | TOKEN_DATA, | |
30 | TOKEN_DATA_LAST, | |
31 | TOKEN_STOP, | |
32 | }; | |
33 | ||
34 | struct i2c_regs { | |
35 | u32 ctrl; | |
36 | u32 slave_addr; | |
37 | u32 tok_list0; | |
38 | u32 tok_list1; | |
39 | u32 tok_wdata0; | |
40 | u32 tok_wdata1; | |
41 | u32 tok_rdata0; | |
42 | u32 tok_rdata1; | |
43 | }; | |
44 | ||
45 | struct meson_i2c { | |
46 | struct i2c_regs *regs; | |
47 | struct i2c_msg *msg; | |
48 | bool last; | |
49 | uint count; | |
50 | uint pos; | |
51 | u32 tokens[2]; | |
52 | uint num_tokens; | |
53 | }; | |
54 | ||
55 | static void meson_i2c_reset_tokens(struct meson_i2c *i2c) | |
56 | { | |
57 | i2c->tokens[0] = 0; | |
58 | i2c->tokens[1] = 0; | |
59 | i2c->num_tokens = 0; | |
60 | } | |
61 | ||
62 | static void meson_i2c_add_token(struct meson_i2c *i2c, int token) | |
63 | { | |
64 | if (i2c->num_tokens < 8) | |
65 | i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4); | |
66 | else | |
67 | i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4); | |
68 | ||
69 | i2c->num_tokens++; | |
70 | } | |
71 | ||
72 | static void meson_i2c_get_data(struct meson_i2c *i2c, u8 *buf, int len) | |
73 | { | |
74 | u32 rdata0, rdata1; | |
75 | int i; | |
76 | ||
77 | rdata0 = readl(&i2c->regs->tok_rdata0); | |
78 | rdata1 = readl(&i2c->regs->tok_rdata1); | |
79 | ||
80 | debug("meson i2c: read data %08x %08x len %d\n", rdata0, rdata1, len); | |
81 | ||
82 | for (i = 0; i < min(4, len); i++) | |
83 | *buf++ = (rdata0 >> i * 8) & 0xff; | |
84 | ||
85 | for (i = 4; i < min(8, len); i++) | |
86 | *buf++ = (rdata1 >> (i - 4) * 8) & 0xff; | |
87 | } | |
88 | ||
89 | static void meson_i2c_put_data(struct meson_i2c *i2c, u8 *buf, int len) | |
90 | { | |
91 | u32 wdata0 = 0, wdata1 = 0; | |
92 | int i; | |
93 | ||
94 | for (i = 0; i < min(4, len); i++) | |
95 | wdata0 |= *buf++ << (i * 8); | |
96 | ||
97 | for (i = 4; i < min(8, len); i++) | |
98 | wdata1 |= *buf++ << ((i - 4) * 8); | |
99 | ||
100 | writel(wdata0, &i2c->regs->tok_wdata0); | |
101 | writel(wdata1, &i2c->regs->tok_wdata1); | |
102 | ||
103 | debug("meson i2c: write data %08x %08x len %d\n", wdata0, wdata1, len); | |
104 | } | |
105 | ||
106 | static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) | |
107 | { | |
108 | bool write = !(i2c->msg->flags & I2C_M_RD); | |
109 | int i; | |
110 | ||
111 | i2c->count = min(i2c->msg->len - i2c->pos, 8u); | |
112 | ||
113 | for (i = 0; i + 1 < i2c->count; i++) | |
114 | meson_i2c_add_token(i2c, TOKEN_DATA); | |
115 | ||
116 | if (i2c->count) { | |
117 | if (write || i2c->pos + i2c->count < i2c->msg->len) | |
118 | meson_i2c_add_token(i2c, TOKEN_DATA); | |
119 | else | |
120 | meson_i2c_add_token(i2c, TOKEN_DATA_LAST); | |
121 | } | |
122 | ||
123 | if (write) | |
124 | meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); | |
125 | ||
126 | if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len) | |
127 | meson_i2c_add_token(i2c, TOKEN_STOP); | |
128 | ||
129 | writel(i2c->tokens[0], &i2c->regs->tok_list0); | |
130 | writel(i2c->tokens[1], &i2c->regs->tok_list1); | |
131 | } | |
132 | ||
133 | static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg) | |
134 | { | |
135 | int token; | |
136 | ||
137 | token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ : | |
138 | TOKEN_SLAVE_ADDR_WRITE; | |
139 | ||
140 | writel(msg->addr << 1, &i2c->regs->slave_addr); | |
141 | meson_i2c_add_token(i2c, TOKEN_START); | |
142 | meson_i2c_add_token(i2c, token); | |
143 | } | |
144 | ||
145 | static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, | |
146 | int last) | |
147 | { | |
148 | ulong start; | |
149 | ||
150 | debug("meson i2c: %s addr %u len %u\n", | |
151 | (msg->flags & I2C_M_RD) ? "read" : "write", | |
152 | msg->addr, msg->len); | |
153 | ||
154 | i2c->msg = msg; | |
155 | i2c->last = last; | |
156 | i2c->pos = 0; | |
157 | i2c->count = 0; | |
158 | ||
159 | meson_i2c_reset_tokens(i2c); | |
160 | meson_i2c_do_start(i2c, msg); | |
161 | ||
162 | do { | |
163 | meson_i2c_prepare_xfer(i2c); | |
164 | ||
165 | /* start the transfer */ | |
166 | setbits_le32(&i2c->regs->ctrl, REG_CTRL_START); | |
167 | start = get_timer(0); | |
168 | while (readl(&i2c->regs->ctrl) & REG_CTRL_STATUS) { | |
169 | if (get_timer(start) > I2C_TIMEOUT_MS) { | |
170 | clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); | |
171 | debug("meson i2c: timeout\n"); | |
172 | return -ETIMEDOUT; | |
173 | } | |
174 | udelay(1); | |
175 | } | |
176 | meson_i2c_reset_tokens(i2c); | |
177 | clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); | |
178 | ||
179 | if (readl(&i2c->regs->ctrl) & REG_CTRL_ERROR) { | |
180 | debug("meson i2c: error\n"); | |
181 | return -ENXIO; | |
182 | } | |
183 | ||
184 | if ((msg->flags & I2C_M_RD) && i2c->count) { | |
185 | meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, | |
186 | i2c->count); | |
187 | } | |
188 | i2c->pos += i2c->count; | |
189 | } while (i2c->pos < msg->len); | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | static int meson_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, | |
195 | int nmsgs) | |
196 | { | |
197 | struct meson_i2c *i2c = dev_get_priv(bus); | |
198 | int i, ret = 0; | |
199 | ||
200 | for (i = 0; i < nmsgs; i++) { | |
201 | ret = meson_i2c_xfer_msg(i2c, msg + i, i == nmsgs - 1); | |
202 | if (ret) | |
203 | return -EREMOTEIO; | |
204 | } | |
205 | ||
206 | return 0; | |
207 | } | |
208 | ||
209 | static int meson_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) | |
210 | { | |
211 | struct meson_i2c *i2c = dev_get_priv(bus); | |
212 | unsigned int clk_rate = MESON_I2C_CLK_RATE; | |
213 | unsigned int div; | |
214 | ||
215 | div = DIV_ROUND_UP(clk_rate, speed * 4); | |
216 | ||
217 | /* clock divider has 12 bits */ | |
218 | if (div >= (1 << 12)) { | |
219 | debug("meson i2c: requested bus frequency too low\n"); | |
220 | div = (1 << 12) - 1; | |
221 | } | |
222 | ||
223 | clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIV_MASK, | |
224 | (div & GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT); | |
225 | ||
226 | clrsetbits_le32(&i2c->regs->ctrl, REG_CTRL_CLKDIVEXT_MASK, | |
227 | (div >> 10) << REG_CTRL_CLKDIVEXT_SHIFT); | |
228 | ||
229 | debug("meson i2c: set clk %u, src %u, div %u\n", speed, clk_rate, div); | |
230 | ||
231 | return 0; | |
232 | } | |
233 | ||
234 | static int meson_i2c_probe(struct udevice *bus) | |
235 | { | |
236 | struct meson_i2c *i2c = dev_get_priv(bus); | |
237 | ||
238 | i2c->regs = dev_read_addr_ptr(bus); | |
239 | clrbits_le32(&i2c->regs->ctrl, REG_CTRL_START); | |
240 | ||
241 | return 0; | |
242 | } | |
243 | ||
244 | static const struct dm_i2c_ops meson_i2c_ops = { | |
245 | .xfer = meson_i2c_xfer, | |
246 | .set_bus_speed = meson_i2c_set_bus_speed, | |
247 | }; | |
248 | ||
249 | static const struct udevice_id meson_i2c_ids[] = { | |
250 | { .compatible = "amlogic,meson6-i2c" }, | |
251 | { .compatible = "amlogic,meson-gx-i2c" }, | |
252 | { .compatible = "amlogic,meson-gxbb-i2c" }, | |
253 | { } | |
254 | }; | |
255 | ||
256 | U_BOOT_DRIVER(i2c_meson) = { | |
257 | .name = "i2c_meson", | |
258 | .id = UCLASS_I2C, | |
259 | .of_match = meson_i2c_ids, | |
260 | .probe = meson_i2c_probe, | |
261 | .priv_auto_alloc_size = sizeof(struct meson_i2c), | |
262 | .ops = &meson_i2c_ops, | |
263 | }; |