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34374699 SG |
1 | /* |
2 | * (C) Copyright 2015 Google, Inc | |
3 | * | |
4 | * (C) Copyright 2008-2014 Rockchip Electronics | |
5 | * Peter, Software Engineering, <superpeter.cai@gmail.com>. | |
6 | * | |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #include <common.h> | |
11 | #include <clk.h> | |
12 | #include <dm.h> | |
13 | #include <errno.h> | |
14 | #include <i2c.h> | |
15 | #include <asm/io.h> | |
16 | #include <asm/arch/clock.h> | |
17 | #include <asm/arch/i2c.h> | |
18 | #include <asm/arch/periph.h> | |
19 | #include <dm/pinctrl.h> | |
20 | #include <linux/sizes.h> | |
21 | ||
22 | DECLARE_GLOBAL_DATA_PTR; | |
23 | ||
24 | /* i2c timerout */ | |
25 | #define I2C_TIMEOUT_MS 100 | |
26 | #define I2C_RETRY_COUNT 3 | |
27 | ||
28 | /* rk i2c fifo max transfer bytes */ | |
29 | #define RK_I2C_FIFO_SIZE 32 | |
30 | ||
31 | struct rk_i2c { | |
135aa950 | 32 | struct clk clk; |
34374699 SG |
33 | struct i2c_regs *regs; |
34 | unsigned int speed; | |
34374699 SG |
35 | }; |
36 | ||
37 | static inline void rk_i2c_get_div(int div, int *divh, int *divl) | |
38 | { | |
39 | *divl = div / 2; | |
40 | if (div % 2 == 0) | |
41 | *divh = div / 2; | |
42 | else | |
43 | *divh = DIV_ROUND_UP(div, 2); | |
44 | } | |
45 | ||
46 | /* | |
47 | * SCL Divisor = 8 * (CLKDIVL+1 + CLKDIVH+1) | |
48 | * SCL = PCLK / SCLK Divisor | |
49 | * i2c_rate = PCLK | |
50 | */ | |
51 | static void rk_i2c_set_clk(struct rk_i2c *i2c, uint32_t scl_rate) | |
52 | { | |
53 | uint32_t i2c_rate; | |
54 | int div, divl, divh; | |
55 | ||
56 | /* First get i2c rate from pclk */ | |
135aa950 | 57 | i2c_rate = clk_get_rate(&i2c->clk); |
34374699 SG |
58 | |
59 | div = DIV_ROUND_UP(i2c_rate, scl_rate * 8) - 2; | |
60 | divh = 0; | |
61 | divl = 0; | |
62 | if (div >= 0) | |
63 | rk_i2c_get_div(div, &divh, &divl); | |
64 | writel(I2C_CLKDIV_VAL(divl, divh), &i2c->regs->clkdiv); | |
65 | ||
66 | debug("rk_i2c_set_clk: i2c rate = %d, scl rate = %d\n", i2c_rate, | |
67 | scl_rate); | |
68 | debug("set i2c clk div = %d, divh = %d, divl = %d\n", div, divh, divl); | |
69 | debug("set clk(I2C_CLKDIV: 0x%08x)\n", readl(&i2c->regs->clkdiv)); | |
70 | } | |
71 | ||
72 | static void rk_i2c_show_regs(struct i2c_regs *regs) | |
73 | { | |
74 | #ifdef DEBUG | |
75 | uint i; | |
76 | ||
77 | debug("i2c_con: 0x%08x\n", readl(®s->con)); | |
78 | debug("i2c_clkdiv: 0x%08x\n", readl(®s->clkdiv)); | |
79 | debug("i2c_mrxaddr: 0x%08x\n", readl(®s->mrxaddr)); | |
80 | debug("i2c_mrxraddR: 0x%08x\n", readl(®s->mrxraddr)); | |
81 | debug("i2c_mtxcnt: 0x%08x\n", readl(®s->mtxcnt)); | |
82 | debug("i2c_mrxcnt: 0x%08x\n", readl(®s->mrxcnt)); | |
83 | debug("i2c_ien: 0x%08x\n", readl(®s->ien)); | |
84 | debug("i2c_ipd: 0x%08x\n", readl(®s->ipd)); | |
85 | debug("i2c_fcnt: 0x%08x\n", readl(®s->fcnt)); | |
86 | for (i = 0; i < 8; i++) | |
87 | debug("i2c_txdata%d: 0x%08x\n", i, readl(®s->txdata[i])); | |
88 | for (i = 0; i < 8; i++) | |
89 | debug("i2c_rxdata%d: 0x%08x\n", i, readl(®s->rxdata[i])); | |
90 | #endif | |
91 | } | |
92 | ||
93 | static int rk_i2c_send_start_bit(struct rk_i2c *i2c) | |
94 | { | |
95 | struct i2c_regs *regs = i2c->regs; | |
96 | ulong start; | |
97 | ||
98 | debug("I2c Send Start bit.\n"); | |
99 | writel(I2C_IPD_ALL_CLEAN, ®s->ipd); | |
100 | ||
101 | writel(I2C_CON_EN | I2C_CON_START, ®s->con); | |
102 | writel(I2C_STARTIEN, ®s->ien); | |
103 | ||
104 | start = get_timer(0); | |
105 | while (1) { | |
106 | if (readl(®s->ipd) & I2C_STARTIPD) { | |
107 | writel(I2C_STARTIPD, ®s->ipd); | |
108 | break; | |
109 | } | |
110 | if (get_timer(start) > I2C_TIMEOUT_MS) { | |
111 | debug("I2C Send Start Bit Timeout\n"); | |
112 | rk_i2c_show_regs(regs); | |
113 | return -ETIMEDOUT; | |
114 | } | |
115 | udelay(1); | |
116 | } | |
117 | ||
118 | return 0; | |
119 | } | |
120 | ||
121 | static int rk_i2c_send_stop_bit(struct rk_i2c *i2c) | |
122 | { | |
123 | struct i2c_regs *regs = i2c->regs; | |
124 | ulong start; | |
125 | ||
126 | debug("I2c Send Stop bit.\n"); | |
127 | writel(I2C_IPD_ALL_CLEAN, ®s->ipd); | |
128 | ||
129 | writel(I2C_CON_EN | I2C_CON_STOP, ®s->con); | |
130 | writel(I2C_CON_STOP, ®s->ien); | |
131 | ||
132 | start = get_timer(0); | |
133 | while (1) { | |
134 | if (readl(®s->ipd) & I2C_STOPIPD) { | |
135 | writel(I2C_STOPIPD, ®s->ipd); | |
136 | break; | |
137 | } | |
138 | if (get_timer(start) > I2C_TIMEOUT_MS) { | |
139 | debug("I2C Send Start Bit Timeout\n"); | |
140 | rk_i2c_show_regs(regs); | |
141 | return -ETIMEDOUT; | |
142 | } | |
143 | udelay(1); | |
144 | } | |
145 | ||
146 | return 0; | |
147 | } | |
148 | ||
149 | static inline void rk_i2c_disable(struct rk_i2c *i2c) | |
150 | { | |
151 | writel(0, &i2c->regs->con); | |
152 | } | |
153 | ||
154 | static int rk_i2c_read(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, | |
155 | uchar *buf, uint b_len) | |
156 | { | |
157 | struct i2c_regs *regs = i2c->regs; | |
158 | uchar *pbuf = buf; | |
159 | uint bytes_remain_len = b_len; | |
160 | uint bytes_xferred = 0; | |
161 | uint words_xferred = 0; | |
162 | ulong start; | |
163 | uint con = 0; | |
164 | uint rxdata; | |
165 | uint i, j; | |
166 | int err; | |
5deaa530 | 167 | bool snd_chunk = false; |
34374699 SG |
168 | |
169 | debug("rk_i2c_read: chip = %d, reg = %d, r_len = %d, b_len = %d\n", | |
170 | chip, reg, r_len, b_len); | |
171 | ||
172 | err = rk_i2c_send_start_bit(i2c); | |
173 | if (err) | |
174 | return err; | |
175 | ||
176 | writel(I2C_MRXADDR_SET(1, chip << 1 | 1), ®s->mrxaddr); | |
177 | if (r_len == 0) { | |
178 | writel(0, ®s->mrxraddr); | |
179 | } else if (r_len < 4) { | |
180 | writel(I2C_MRXRADDR_SET(r_len, reg), ®s->mrxraddr); | |
181 | } else { | |
182 | debug("I2C Read: addr len %d not supported\n", r_len); | |
183 | return -EIO; | |
184 | } | |
185 | ||
186 | while (bytes_remain_len) { | |
187 | if (bytes_remain_len > RK_I2C_FIFO_SIZE) { | |
5deaa530 | 188 | con = I2C_CON_EN; |
34374699 SG |
189 | bytes_xferred = 32; |
190 | } else { | |
5deaa530 WE |
191 | /* |
192 | * The hw can read up to 32 bytes at a time. If we need | |
193 | * more than one chunk, send an ACK after the last byte. | |
194 | */ | |
195 | con = I2C_CON_EN | I2C_CON_LASTACK; | |
34374699 SG |
196 | bytes_xferred = bytes_remain_len; |
197 | } | |
198 | words_xferred = DIV_ROUND_UP(bytes_xferred, 4); | |
199 | ||
5deaa530 WE |
200 | /* |
201 | * make sure we are in plain RX mode if we read a second chunk | |
202 | */ | |
203 | if (snd_chunk) | |
204 | con |= I2C_CON_MOD(I2C_MODE_RX); | |
205 | else | |
206 | con |= I2C_CON_MOD(I2C_MODE_TRX); | |
207 | ||
34374699 SG |
208 | writel(con, ®s->con); |
209 | writel(bytes_xferred, ®s->mrxcnt); | |
210 | writel(I2C_MBRFIEN | I2C_NAKRCVIEN, ®s->ien); | |
211 | ||
212 | start = get_timer(0); | |
213 | while (1) { | |
214 | if (readl(®s->ipd) & I2C_NAKRCVIPD) { | |
215 | writel(I2C_NAKRCVIPD, ®s->ipd); | |
216 | err = -EREMOTEIO; | |
217 | } | |
218 | if (readl(®s->ipd) & I2C_MBRFIPD) { | |
219 | writel(I2C_MBRFIPD, ®s->ipd); | |
220 | break; | |
221 | } | |
222 | if (get_timer(start) > I2C_TIMEOUT_MS) { | |
223 | debug("I2C Read Data Timeout\n"); | |
224 | err = -ETIMEDOUT; | |
225 | rk_i2c_show_regs(regs); | |
226 | goto i2c_exit; | |
227 | } | |
228 | udelay(1); | |
229 | } | |
230 | ||
231 | for (i = 0; i < words_xferred; i++) { | |
232 | rxdata = readl(®s->rxdata[i]); | |
233 | debug("I2c Read RXDATA[%d] = 0x%x\n", i, rxdata); | |
234 | for (j = 0; j < 4; j++) { | |
235 | if ((i * 4 + j) == bytes_xferred) | |
236 | break; | |
237 | *pbuf++ = (rxdata >> (j * 8)) & 0xff; | |
238 | } | |
239 | } | |
240 | ||
241 | bytes_remain_len -= bytes_xferred; | |
5deaa530 | 242 | snd_chunk = true; |
34374699 SG |
243 | debug("I2C Read bytes_remain_len %d\n", bytes_remain_len); |
244 | } | |
245 | ||
246 | i2c_exit: | |
247 | rk_i2c_send_stop_bit(i2c); | |
248 | rk_i2c_disable(i2c); | |
249 | ||
250 | return err; | |
251 | } | |
252 | ||
253 | static int rk_i2c_write(struct rk_i2c *i2c, uchar chip, uint reg, uint r_len, | |
254 | uchar *buf, uint b_len) | |
255 | { | |
256 | struct i2c_regs *regs = i2c->regs; | |
257 | int err; | |
258 | uchar *pbuf = buf; | |
259 | uint bytes_remain_len = b_len + r_len + 1; | |
260 | uint bytes_xferred = 0; | |
261 | uint words_xferred = 0; | |
262 | ulong start; | |
263 | uint txdata; | |
264 | uint i, j; | |
265 | ||
266 | debug("rk_i2c_write: chip = %d, reg = %d, r_len = %d, b_len = %d\n", | |
267 | chip, reg, r_len, b_len); | |
268 | err = rk_i2c_send_start_bit(i2c); | |
269 | if (err) | |
270 | return err; | |
271 | ||
272 | while (bytes_remain_len) { | |
273 | if (bytes_remain_len > RK_I2C_FIFO_SIZE) | |
80333fd8 | 274 | bytes_xferred = RK_I2C_FIFO_SIZE; |
34374699 SG |
275 | else |
276 | bytes_xferred = bytes_remain_len; | |
277 | words_xferred = DIV_ROUND_UP(bytes_xferred, 4); | |
278 | ||
279 | for (i = 0; i < words_xferred; i++) { | |
280 | txdata = 0; | |
281 | for (j = 0; j < 4; j++) { | |
282 | if ((i * 4 + j) == bytes_xferred) | |
283 | break; | |
284 | ||
21d4b7d4 | 285 | if (i == 0 && j == 0 && pbuf == buf) { |
34374699 | 286 | txdata |= (chip << 1); |
21d4b7d4 | 287 | } else if (i == 0 && j <= r_len && pbuf == buf) { |
34374699 SG |
288 | txdata |= (reg & |
289 | (0xff << ((j - 1) * 8))) << 8; | |
290 | } else { | |
291 | txdata |= (*pbuf++)<<(j * 8); | |
292 | } | |
34374699 | 293 | } |
551288bd JK |
294 | writel(txdata, ®s->txdata[i]); |
295 | debug("I2c Write TXDATA[%d] = 0x%08x\n", i, txdata); | |
34374699 SG |
296 | } |
297 | ||
298 | writel(I2C_CON_EN | I2C_CON_MOD(I2C_MODE_TX), ®s->con); | |
299 | writel(bytes_xferred, ®s->mtxcnt); | |
300 | writel(I2C_MBTFIEN | I2C_NAKRCVIEN, ®s->ien); | |
301 | ||
302 | start = get_timer(0); | |
303 | while (1) { | |
304 | if (readl(®s->ipd) & I2C_NAKRCVIPD) { | |
305 | writel(I2C_NAKRCVIPD, ®s->ipd); | |
306 | err = -EREMOTEIO; | |
307 | } | |
308 | if (readl(®s->ipd) & I2C_MBTFIPD) { | |
309 | writel(I2C_MBTFIPD, ®s->ipd); | |
310 | break; | |
311 | } | |
312 | if (get_timer(start) > I2C_TIMEOUT_MS) { | |
313 | debug("I2C Write Data Timeout\n"); | |
314 | err = -ETIMEDOUT; | |
315 | rk_i2c_show_regs(regs); | |
316 | goto i2c_exit; | |
317 | } | |
318 | udelay(1); | |
319 | } | |
320 | ||
321 | bytes_remain_len -= bytes_xferred; | |
322 | debug("I2C Write bytes_remain_len %d\n", bytes_remain_len); | |
323 | } | |
324 | ||
325 | i2c_exit: | |
326 | rk_i2c_send_stop_bit(i2c); | |
327 | rk_i2c_disable(i2c); | |
328 | ||
329 | return err; | |
330 | } | |
331 | ||
332 | static int rockchip_i2c_xfer(struct udevice *bus, struct i2c_msg *msg, | |
333 | int nmsgs) | |
334 | { | |
335 | struct rk_i2c *i2c = dev_get_priv(bus); | |
336 | int ret; | |
337 | ||
338 | debug("i2c_xfer: %d messages\n", nmsgs); | |
339 | for (; nmsgs > 0; nmsgs--, msg++) { | |
340 | debug("i2c_xfer: chip=0x%x, len=0x%x\n", msg->addr, msg->len); | |
341 | if (msg->flags & I2C_M_RD) { | |
342 | ret = rk_i2c_read(i2c, msg->addr, 0, 0, msg->buf, | |
343 | msg->len); | |
344 | } else { | |
345 | ret = rk_i2c_write(i2c, msg->addr, 0, 0, msg->buf, | |
346 | msg->len); | |
347 | } | |
348 | if (ret) { | |
349 | debug("i2c_write: error sending\n"); | |
350 | return -EREMOTEIO; | |
351 | } | |
352 | } | |
353 | ||
354 | return 0; | |
355 | } | |
356 | ||
357 | int rockchip_i2c_set_bus_speed(struct udevice *bus, unsigned int speed) | |
358 | { | |
359 | struct rk_i2c *i2c = dev_get_priv(bus); | |
360 | ||
361 | rk_i2c_set_clk(i2c, speed); | |
362 | ||
363 | return 0; | |
364 | } | |
365 | ||
930bc374 | 366 | static int rockchip_i2c_ofdata_to_platdata(struct udevice *bus) |
34374699 | 367 | { |
930bc374 | 368 | struct rk_i2c *priv = dev_get_priv(bus); |
34374699 SG |
369 | int ret; |
370 | ||
930bc374 SG |
371 | ret = clk_get_by_index(bus, 0, &priv->clk); |
372 | if (ret < 0) { | |
373 | debug("%s: Could not get clock for %s: %d\n", __func__, | |
374 | bus->name, ret); | |
34374699 | 375 | return ret; |
930bc374 | 376 | } |
930bc374 SG |
377 | |
378 | return 0; | |
379 | } | |
380 | ||
381 | static int rockchip_i2c_probe(struct udevice *bus) | |
382 | { | |
383 | struct rk_i2c *priv = dev_get_priv(bus); | |
384 | ||
cc91bdf8 | 385 | priv->regs = dev_read_addr_ptr(bus); |
930bc374 SG |
386 | |
387 | return 0; | |
34374699 SG |
388 | } |
389 | ||
390 | static const struct dm_i2c_ops rockchip_i2c_ops = { | |
391 | .xfer = rockchip_i2c_xfer, | |
392 | .set_bus_speed = rockchip_i2c_set_bus_speed, | |
393 | }; | |
394 | ||
395 | static const struct udevice_id rockchip_i2c_ids[] = { | |
02a7d833 HS |
396 | { .compatible = "rockchip,rk3066-i2c" }, |
397 | { .compatible = "rockchip,rk3188-i2c" }, | |
34374699 | 398 | { .compatible = "rockchip,rk3288-i2c" }, |
be93fc24 | 399 | { .compatible = "rockchip,rk3328-i2c" }, |
b644354a | 400 | { .compatible = "rockchip,rk3399-i2c" }, |
34374699 SG |
401 | { } |
402 | }; | |
403 | ||
404 | U_BOOT_DRIVER(i2c_rockchip) = { | |
405 | .name = "i2c_rockchip", | |
406 | .id = UCLASS_I2C, | |
407 | .of_match = rockchip_i2c_ids, | |
930bc374 | 408 | .ofdata_to_platdata = rockchip_i2c_ofdata_to_platdata, |
34374699 SG |
409 | .probe = rockchip_i2c_probe, |
410 | .priv_auto_alloc_size = sizeof(struct rk_i2c), | |
411 | .ops = &rockchip_i2c_ops, | |
412 | }; |