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iio: gyro: bmg160: Don't let interrupt mode to be open drain
[thirdparty/linux.git] / drivers / iio / gyro / bmg160.c
CommitLineData
22b46c45
SP		 1/*
2 * BMG160 Gyro Sensor driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/acpi.h>
21#include <linux/gpio/consumer.h>
22#include <linux/pm.h>
23#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/trigger.h>
28#include <linux/iio/events.h>
29#include <linux/iio/trigger_consumer.h>
30#include <linux/iio/triggered_buffer.h>
31
32#define BMG160_DRV_NAME "bmg160"
33#define BMG160_IRQ_NAME "bmg160_event"
34#define BMG160_GPIO_NAME "gpio_int"
35
36#define BMG160_REG_CHIP_ID 0x00
37#define BMG160_CHIP_ID_VAL 0x0F
38
39#define BMG160_REG_PMU_LPW 0x11
40#define BMG160_MODE_NORMAL 0x00
41#define BMG160_MODE_DEEP_SUSPEND 0x20
42#define BMG160_MODE_SUSPEND 0x80
43
44#define BMG160_REG_RANGE 0x0F
45
46#define BMG160_RANGE_2000DPS 0
47#define BMG160_RANGE_1000DPS 1
48#define BMG160_RANGE_500DPS 2
49#define BMG160_RANGE_250DPS 3
50#define BMG160_RANGE_125DPS 4
51
52#define BMG160_REG_PMU_BW 0x10
53#define BMG160_NO_FILTER 0
54#define BMG160_DEF_BW 100
55
56#define BMG160_REG_INT_MAP_0 0x17
57#define BMG160_INT_MAP_0_BIT_ANY BIT(1)
58
59#define BMG160_REG_INT_MAP_1 0x18
60#define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
61
62#define BMG160_REG_INT_RST_LATCH 0x21
63#define BMG160_INT_MODE_LATCH_RESET 0x80
64#define BMG160_INT_MODE_LATCH_INT 0x0F
65#define BMG160_INT_MODE_NON_LATCH_INT 0x00
66
67#define BMG160_REG_INT_EN_0 0x15
68#define BMG160_DATA_ENABLE_INT BIT(7)
69
5af6b307
SP		 70#define BMG160_REG_INT_EN_1 0x16
71#define BMG160_INT1_BIT_OD BIT(1)
72
22b46c45
SP		 73#define BMG160_REG_XOUT_L 0x02
74#define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
75
76#define BMG160_REG_SLOPE_THRES 0x1B
77#define BMG160_SLOPE_THRES_MASK 0x0F
78
79#define BMG160_REG_MOTION_INTR 0x1C
80#define BMG160_INT_MOTION_X BIT(0)
81#define BMG160_INT_MOTION_Y BIT(1)
82#define BMG160_INT_MOTION_Z BIT(2)
83#define BMG160_ANY_DUR_MASK 0x30
84#define BMG160_ANY_DUR_SHIFT 4
85
86#define BMG160_REG_INT_STATUS_2 0x0B
87#define BMG160_ANY_MOTION_MASK 0x07
88
89#define BMG160_REG_TEMP 0x08
90#define BMG160_TEMP_CENTER_VAL 23
91
92#define BMG160_MAX_STARTUP_TIME_MS 80
93
94#define BMG160_AUTO_SUSPEND_DELAY_MS 2000
95
96struct bmg160_data {
97 struct i2c_client *client;
98 struct iio_trigger *dready_trig;
99 struct iio_trigger *motion_trig;
100 struct mutex mutex;
101 s16 buffer[8];
102 u8 bw_bits;
103 u32 dps_range;
104 int ev_enable_state;
105 int slope_thres;
106 bool dready_trigger_on;
107 bool motion_trigger_on;
108 int64_t timestamp;
109};
110
111enum bmg160_axis {
112 AXIS_X,
113 AXIS_Y,
114 AXIS_Z,
115};
116
117static const struct {
118 int val;
119 int bw_bits;
120} bmg160_samp_freq_table[] = { {100, 0x07},
121 {200, 0x06},
122 {400, 0x03},
123 {1000, 0x02},
124 {2000, 0x01} };
125
126static const struct {
127 int scale;
128 int dps_range;
129} bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
130 { 532, BMG160_RANGE_1000DPS},
131 { 266, BMG160_RANGE_500DPS},
132 { 133, BMG160_RANGE_250DPS},
133 { 66, BMG160_RANGE_125DPS} };
134
135static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
136{
137 int ret;
138
139 ret = i2c_smbus_write_byte_data(data->client,
140 BMG160_REG_PMU_LPW, mode);
141 if (ret < 0) {
142 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
143 return ret;
144 }
145
146 return 0;
147}
148
149static int bmg160_convert_freq_to_bit(int val)
150{
151 int i;
152
153 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
154 if (bmg160_samp_freq_table[i].val == val)
155 return bmg160_samp_freq_table[i].bw_bits;
156 }
157
158 return -EINVAL;
159}
160
161static int bmg160_set_bw(struct bmg160_data *data, int val)
162{
163 int ret;
164 int bw_bits;
165
166 bw_bits = bmg160_convert_freq_to_bit(val);
167 if (bw_bits < 0)
168 return bw_bits;
169
170 ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
171 bw_bits);
172 if (ret < 0) {
173 dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
174 return ret;
175 }
176
177 data->bw_bits = bw_bits;
178
179 return 0;
180}
181
182static int bmg160_chip_init(struct bmg160_data *data)
183{
184 int ret;
185
186 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
187 if (ret < 0) {
188 dev_err(&data->client->dev, "Error reading reg_chip_id\n");
189 return ret;
190 }
191
192 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
193 if (ret != BMG160_CHIP_ID_VAL) {
194 dev_err(&data->client->dev, "invalid chip %x\n", ret);
195 return -ENODEV;
196 }
197
198 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
199 if (ret < 0)
200 return ret;
201
202 /* Wait upto 500 ms to be ready after changing mode */
203 usleep_range(500, 1000);
204
205 /* Set Bandwidth */
206 ret = bmg160_set_bw(data, BMG160_DEF_BW);
207 if (ret < 0)
208 return ret;
209
210 /* Set Default Range */
211 ret = i2c_smbus_write_byte_data(data->client,
212 BMG160_REG_RANGE,
213 BMG160_RANGE_500DPS);
214 if (ret < 0) {
215 dev_err(&data->client->dev, "Error writing reg_range\n");
216 return ret;
217 }
218 data->dps_range = BMG160_RANGE_500DPS;
219
220 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
221 if (ret < 0) {
222 dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
223 return ret;
224 }
225 data->slope_thres = ret;
226
227 /* Set default interrupt mode */
5af6b307
SP		 228 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_EN_1);
229 if (ret < 0) {
230 dev_err(&data->client->dev, "Error reading reg_int_en_1\n");
231 return ret;
232 }
233 ret &= ~BMG160_INT1_BIT_OD;
234 ret = i2c_smbus_write_byte_data(data->client,
235 BMG160_REG_INT_EN_1, ret);
236 if (ret < 0) {
237 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
238 return ret;
239 }
240
22b46c45
SP		 241 ret = i2c_smbus_write_byte_data(data->client,
242 BMG160_REG_INT_RST_LATCH,
243 BMG160_INT_MODE_LATCH_INT |
244 BMG160_INT_MODE_LATCH_RESET);
245 if (ret < 0) {
246 dev_err(&data->client->dev,
247 "Error writing reg_motion_intr\n");
248 return ret;
249 }
250
251 return 0;
252}
253
254static int bmg160_set_power_state(struct bmg160_data *data, bool on)
255{
ef1c6b23 256#ifdef CONFIG_PM_RUNTIME
22b46c45
SP		 257 int ret;
258
259 if (on)
260 ret = pm_runtime_get_sync(&data->client->dev);
261 else {
262 pm_runtime_mark_last_busy(&data->client->dev);
263 ret = pm_runtime_put_autosuspend(&data->client->dev);
264 }
265
266 if (ret < 0) {
267 dev_err(&data->client->dev,
268 "Failed: bmg160_set_power_state for %d\n", on);
10bef289
SP		 269 if (on)
270 pm_runtime_put_noidle(&data->client->dev);
271
22b46c45
SP		 272 return ret;
273 }
ef1c6b23 274#endif
22b46c45
SP		 275
276 return 0;
277}
278
279static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
280 bool status)
281{
282 int ret;
283
284 /* Enable/Disable INT_MAP0 mapping */
285 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
286 if (ret < 0) {
287 dev_err(&data->client->dev, "Error reading reg_int_map0\n");
288 return ret;
289 }
290 if (status)
291 ret |= BMG160_INT_MAP_0_BIT_ANY;
292 else
293 ret &= ~BMG160_INT_MAP_0_BIT_ANY;
294
295 ret = i2c_smbus_write_byte_data(data->client,
296 BMG160_REG_INT_MAP_0,
297 ret);
298 if (ret < 0) {
299 dev_err(&data->client->dev, "Error writing reg_int_map0\n");
300 return ret;
301 }
302
303 /* Enable/Disable slope interrupts */
304 if (status) {
305 /* Update slope thres */
306 ret = i2c_smbus_write_byte_data(data->client,
307 BMG160_REG_SLOPE_THRES,
308 data->slope_thres);
309 if (ret < 0) {
310 dev_err(&data->client->dev,
311 "Error writing reg_slope_thres\n");
312 return ret;
313 }
314
315 ret = i2c_smbus_write_byte_data(data->client,
316 BMG160_REG_MOTION_INTR,
317 BMG160_INT_MOTION_X |
318 BMG160_INT_MOTION_Y |
319 BMG160_INT_MOTION_Z);
320 if (ret < 0) {
321 dev_err(&data->client->dev,
322 "Error writing reg_motion_intr\n");
323 return ret;
324 }
325
326 /*
327 * New data interrupt is always non-latched,
328 * which will have higher priority, so no need
329 * to set latched mode, we will be flooded anyway with INTR
330 */
331 if (!data->dready_trigger_on) {
332 ret = i2c_smbus_write_byte_data(data->client,
333 BMG160_REG_INT_RST_LATCH,
334 BMG160_INT_MODE_LATCH_INT |
335 BMG160_INT_MODE_LATCH_RESET);
336 if (ret < 0) {
337 dev_err(&data->client->dev,
338 "Error writing reg_rst_latch\n");
339 return ret;
340 }
341 }
342
343 ret = i2c_smbus_write_byte_data(data->client,
344 BMG160_REG_INT_EN_0,
345 BMG160_DATA_ENABLE_INT);
346
347 } else
348 ret = i2c_smbus_write_byte_data(data->client,
349 BMG160_REG_INT_EN_0,
350 0);
351
352 if (ret < 0) {
353 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
354 return ret;
355 }
356
357 return 0;
358}
359
360static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
361 bool status)
362{
363 int ret;
364
365 /* Enable/Disable INT_MAP1 mapping */
366 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
367 if (ret < 0) {
368 dev_err(&data->client->dev, "Error reading reg_int_map1\n");
369 return ret;
370 }
371
372 if (status)
373 ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
374 else
375 ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
376
377 ret = i2c_smbus_write_byte_data(data->client,
378 BMG160_REG_INT_MAP_1,
379 ret);
380 if (ret < 0) {
381 dev_err(&data->client->dev, "Error writing reg_int_map1\n");
382 return ret;
383 }
384
385 if (status) {
386 ret = i2c_smbus_write_byte_data(data->client,
387 BMG160_REG_INT_RST_LATCH,
388 BMG160_INT_MODE_NON_LATCH_INT |
389 BMG160_INT_MODE_LATCH_RESET);
390 if (ret < 0) {
391 dev_err(&data->client->dev,
392 "Error writing reg_rst_latch\n");
393 return ret;
394 }
395
396 ret = i2c_smbus_write_byte_data(data->client,
397 BMG160_REG_INT_EN_0,
398 BMG160_DATA_ENABLE_INT);
399
400 } else {
401 /* Restore interrupt mode */
402 ret = i2c_smbus_write_byte_data(data->client,
403 BMG160_REG_INT_RST_LATCH,
404 BMG160_INT_MODE_LATCH_INT |
405 BMG160_INT_MODE_LATCH_RESET);
406 if (ret < 0) {
407 dev_err(&data->client->dev,
408 "Error writing reg_rst_latch\n");
409 return ret;
410 }
411
412 ret = i2c_smbus_write_byte_data(data->client,
413 BMG160_REG_INT_EN_0,
414 0);
415 }
416
417 if (ret < 0) {
418 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
419 return ret;
420 }
421
422 return 0;
423}
424
425static int bmg160_get_bw(struct bmg160_data *data, int *val)
426{
427 int i;
428
429 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
430 if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
431 *val = bmg160_samp_freq_table[i].val;
432 return IIO_VAL_INT;
433 }
434 }
435
436 return -EINVAL;
437}
438
439static int bmg160_set_scale(struct bmg160_data *data, int val)
440{
441 int ret, i;
442
443 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
444 if (bmg160_scale_table[i].scale == val) {
445 ret = i2c_smbus_write_byte_data(
446 data->client,
447 BMG160_REG_RANGE,
448 bmg160_scale_table[i].dps_range);
449 if (ret < 0) {
450 dev_err(&data->client->dev,
451 "Error writing reg_range\n");
452 return ret;
453 }
454 data->dps_range = bmg160_scale_table[i].dps_range;
455 return 0;
456 }
457 }
458
459 return -EINVAL;
460}
461
462static int bmg160_get_temp(struct bmg160_data *data, int *val)
463{
464 int ret;
465
466 mutex_lock(&data->mutex);
467 ret = bmg160_set_power_state(data, true);
468 if (ret < 0) {
469 mutex_unlock(&data->mutex);
470 return ret;
471 }
472
473 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
474 if (ret < 0) {
475 dev_err(&data->client->dev, "Error reading reg_temp\n");
476 bmg160_set_power_state(data, false);
477 mutex_unlock(&data->mutex);
478 return ret;
479 }
480
481 *val = sign_extend32(ret, 7);
482 ret = bmg160_set_power_state(data, false);
483 mutex_unlock(&data->mutex);
484 if (ret < 0)
485 return ret;
486
487 return IIO_VAL_INT;
488}
489
490static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
491{
492 int ret;
493
494 mutex_lock(&data->mutex);
495 ret = bmg160_set_power_state(data, true);
496 if (ret < 0) {
497 mutex_unlock(&data->mutex);
498 return ret;
499 }
500
501 ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
502 if (ret < 0) {
503 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
504 bmg160_set_power_state(data, false);
505 mutex_unlock(&data->mutex);
506 return ret;
507 }
508
509 *val = sign_extend32(ret, 15);
510 ret = bmg160_set_power_state(data, false);
511 mutex_unlock(&data->mutex);
512 if (ret < 0)
513 return ret;
514
515 return IIO_VAL_INT;
516}
517
518static int bmg160_read_raw(struct iio_dev *indio_dev,
519 struct iio_chan_spec const *chan,
520 int *val, int *val2, long mask)
521{
522 struct bmg160_data *data = iio_priv(indio_dev);
523 int ret;
524
525 switch (mask) {
526 case IIO_CHAN_INFO_RAW:
527 switch (chan->type) {
528 case IIO_TEMP:
529 return bmg160_get_temp(data, val);
530 case IIO_ANGL_VEL:
531 if (iio_buffer_enabled(indio_dev))
532 return -EBUSY;
533 else
534 return bmg160_get_axis(data, chan->scan_index,
535 val);
536 default:
537 return -EINVAL;
538 }
539 case IIO_CHAN_INFO_OFFSET:
540 if (chan->type == IIO_TEMP) {
541 *val = BMG160_TEMP_CENTER_VAL;
542 return IIO_VAL_INT;
543 } else
544 return -EINVAL;
545 case IIO_CHAN_INFO_SCALE:
546 *val = 0;
547 switch (chan->type) {
548 case IIO_TEMP:
549 *val2 = 500000;
550 return IIO_VAL_INT_PLUS_MICRO;
551 case IIO_ANGL_VEL:
552 {
553 int i;
554
555 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
556 if (bmg160_scale_table[i].dps_range ==
557 data->dps_range) {
558 *val2 = bmg160_scale_table[i].scale;
559 return IIO_VAL_INT_PLUS_MICRO;
560 }
561 }
562 return -EINVAL;
563 }
564 default:
565 return -EINVAL;
566 }
567 case IIO_CHAN_INFO_SAMP_FREQ:
568 *val2 = 0;
569 mutex_lock(&data->mutex);
570 ret = bmg160_get_bw(data, val);
571 mutex_unlock(&data->mutex);
572 return ret;
573 default:
574 return -EINVAL;
575 }
576}
577
578static int bmg160_write_raw(struct iio_dev *indio_dev,
579 struct iio_chan_spec const *chan,
580 int val, int val2, long mask)
581{
582 struct bmg160_data *data = iio_priv(indio_dev);
583 int ret;
584
585 switch (mask) {
586 case IIO_CHAN_INFO_SAMP_FREQ:
587 mutex_lock(&data->mutex);
588 /*
589 * Section 4.2 of spec
590 * In suspend mode, the only supported operations are reading
591 * registers as well as writing to the (0x14) softreset
592 * register. Since we will be in suspend mode by default, change
593 * mode to power on for other writes.
594 */
595 ret = bmg160_set_power_state(data, true);
596 if (ret < 0) {
597 mutex_unlock(&data->mutex);
598 return ret;
599 }
600 ret = bmg160_set_bw(data, val);
601 if (ret < 0) {
602 bmg160_set_power_state(data, false);
603 mutex_unlock(&data->mutex);
604 return ret;
605 }
606 ret = bmg160_set_power_state(data, false);
607 mutex_unlock(&data->mutex);
608 return ret;
609 case IIO_CHAN_INFO_SCALE:
610 if (val)
611 return -EINVAL;
612
613 mutex_lock(&data->mutex);
614 /* Refer to comments above for the suspend mode ops */
615 ret = bmg160_set_power_state(data, true);
616 if (ret < 0) {
617 mutex_unlock(&data->mutex);
618 return ret;
619 }
620 ret = bmg160_set_scale(data, val2);
621 if (ret < 0) {
622 bmg160_set_power_state(data, false);
623 mutex_unlock(&data->mutex);
624 return ret;
625 }
626 ret = bmg160_set_power_state(data, false);
627 mutex_unlock(&data->mutex);
628 return ret;
629 default:
630 return -EINVAL;
631 }
632
633 return -EINVAL;
634}
635
636static int bmg160_read_event(struct iio_dev *indio_dev,
637 const struct iio_chan_spec *chan,
638 enum iio_event_type type,
639 enum iio_event_direction dir,
640 enum iio_event_info info,
641 int *val, int *val2)
642{
643 struct bmg160_data *data = iio_priv(indio_dev);
644
645 *val2 = 0;
646 switch (info) {
647 case IIO_EV_INFO_VALUE:
648 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
649 break;
650 default:
651 return -EINVAL;
652 }
653
654 return IIO_VAL_INT;
655}
656
657static int bmg160_write_event(struct iio_dev *indio_dev,
658 const struct iio_chan_spec *chan,
659 enum iio_event_type type,
660 enum iio_event_direction dir,
661 enum iio_event_info info,
662 int val, int val2)
663{
664 struct bmg160_data *data = iio_priv(indio_dev);
665
666 switch (info) {
667 case IIO_EV_INFO_VALUE:
668 if (data->ev_enable_state)
669 return -EBUSY;
670 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
671 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
672 break;
673 default:
674 return -EINVAL;
675 }
676
677 return 0;
678}
679
680static int bmg160_read_event_config(struct iio_dev *indio_dev,
681 const struct iio_chan_spec *chan,
682 enum iio_event_type type,
683 enum iio_event_direction dir)
684{
685
686 struct bmg160_data *data = iio_priv(indio_dev);
687
688 return data->ev_enable_state;
689}
690
691static int bmg160_write_event_config(struct iio_dev *indio_dev,
692 const struct iio_chan_spec *chan,
693 enum iio_event_type type,
694 enum iio_event_direction dir,
695 int state)
696{
697 struct bmg160_data *data = iio_priv(indio_dev);
698 int ret;
699
700 if (state && data->ev_enable_state)
701 return 0;
702
703 mutex_lock(&data->mutex);
704
705 if (!state && data->motion_trigger_on) {
706 data->ev_enable_state = 0;
707 mutex_unlock(&data->mutex);
708 return 0;
709 }
710 /*
711 * We will expect the enable and disable to do operation in
712 * in reverse order. This will happen here anyway as our
713 * resume operation uses sync mode runtime pm calls, the
714 * suspend operation will be delayed by autosuspend delay
715 * So the disable operation will still happen in reverse of
716 * enable operation. When runtime pm is disabled the mode
717 * is always on so sequence doesn't matter
718 */
719 ret = bmg160_set_power_state(data, state);
720 if (ret < 0) {
721 mutex_unlock(&data->mutex);
722 return ret;
723 }
724
725 ret = bmg160_setup_any_motion_interrupt(data, state);
726 if (ret < 0) {
10bef289 727 bmg160_set_power_state(data, false);
22b46c45
SP		 728 mutex_unlock(&data->mutex);
729 return ret;
730 }
731
732 data->ev_enable_state = state;
733 mutex_unlock(&data->mutex);
734
735 return 0;
736}
737
738static int bmg160_validate_trigger(struct iio_dev *indio_dev,
739 struct iio_trigger *trig)
740{
741 struct bmg160_data *data = iio_priv(indio_dev);
742
743 if (data->dready_trig != trig && data->motion_trig != trig)
744 return -EINVAL;
745
746 return 0;
747}
748
749static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
750
751static IIO_CONST_ATTR(in_anglvel_scale_available,
752 "0.001065 0.000532 0.000266 0.000133 0.000066");
753
754static struct attribute *bmg160_attributes[] = {
755 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
756 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
757 NULL,
758};
759
760static const struct attribute_group bmg160_attrs_group = {
761 .attrs = bmg160_attributes,
762};
763
764static const struct iio_event_spec bmg160_event = {
765 .type = IIO_EV_TYPE_ROC,
766 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
767 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
768 BIT(IIO_EV_INFO_ENABLE)
769};
770
771#define BMG160_CHANNEL(_axis) { \
772 .type = IIO_ANGL_VEL, \
773 .modified = 1, \
774 .channel2 = IIO_MOD_##_axis, \
775 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
776 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
777 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
778 .scan_index = AXIS_##_axis, \
779 .scan_type = { \
780 .sign = 's', \
781 .realbits = 16, \
782 .storagebits = 16, \
783 }, \
784 .event_spec = &bmg160_event, \
785 .num_event_specs = 1 \
786}
787
788static const struct iio_chan_spec bmg160_channels[] = {
789 {
790 .type = IIO_TEMP,
791 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
792 BIT(IIO_CHAN_INFO_SCALE) |
793 BIT(IIO_CHAN_INFO_OFFSET),
794 .scan_index = -1,
795 },
796 BMG160_CHANNEL(X),
797 BMG160_CHANNEL(Y),
798 BMG160_CHANNEL(Z),
799 IIO_CHAN_SOFT_TIMESTAMP(3),
800};
801
802static const struct iio_info bmg160_info = {
803 .attrs = &bmg160_attrs_group,
804 .read_raw = bmg160_read_raw,
805 .write_raw = bmg160_write_raw,
806 .read_event_value = bmg160_read_event,
807 .write_event_value = bmg160_write_event,
808 .write_event_config = bmg160_write_event_config,
809 .read_event_config = bmg160_read_event_config,
810 .validate_trigger = bmg160_validate_trigger,
811 .driver_module = THIS_MODULE,
812};
813
814static irqreturn_t bmg160_trigger_handler(int irq, void *p)
815{
816 struct iio_poll_func *pf = p;
817 struct iio_dev *indio_dev = pf->indio_dev;
818 struct bmg160_data *data = iio_priv(indio_dev);
819 int bit, ret, i = 0;
820
821 mutex_lock(&data->mutex);
822 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
823 indio_dev->masklength) {
824 ret = i2c_smbus_read_word_data(data->client,
825 BMG160_AXIS_TO_REG(bit));
826 if (ret < 0) {
827 mutex_unlock(&data->mutex);
828 goto err;
829 }
830 data->buffer[i++] = ret;
831 }
832 mutex_unlock(&data->mutex);
833
834 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
835 data->timestamp);
836err:
837 iio_trigger_notify_done(indio_dev->trig);
838
839 return IRQ_HANDLED;
840}
841
842static int bmg160_trig_try_reen(struct iio_trigger *trig)
843{
844 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
845 struct bmg160_data *data = iio_priv(indio_dev);
846 int ret;
847
848 /* new data interrupts don't need ack */
849 if (data->dready_trigger_on)
850 return 0;
851
852 /* Set latched mode interrupt and clear any latched interrupt */
853 ret = i2c_smbus_write_byte_data(data->client,
854 BMG160_REG_INT_RST_LATCH,
855 BMG160_INT_MODE_LATCH_INT |
856 BMG160_INT_MODE_LATCH_RESET);
857 if (ret < 0) {
858 dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
859 return ret;
860 }
861
862 return 0;
863}
864
865static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
866 bool state)
867{
868 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
869 struct bmg160_data *data = iio_priv(indio_dev);
870 int ret;
871
872 mutex_lock(&data->mutex);
873
874 if (!state && data->ev_enable_state && data->motion_trigger_on) {
875 data->motion_trigger_on = false;
876 mutex_unlock(&data->mutex);
877 return 0;
878 }
879
880 /*
881 * Refer to comment in bmg160_write_event_config for
882 * enable/disable operation order
883 */
884 ret = bmg160_set_power_state(data, state);
885 if (ret < 0) {
886 mutex_unlock(&data->mutex);
887 return ret;
888 }
889 if (data->motion_trig == trig)
890 ret = bmg160_setup_any_motion_interrupt(data, state);
891 else
892 ret = bmg160_setup_new_data_interrupt(data, state);
893 if (ret < 0) {
10bef289 894 bmg160_set_power_state(data, false);
22b46c45
SP		 895 mutex_unlock(&data->mutex);
896 return ret;
897 }
898 if (data->motion_trig == trig)
899 data->motion_trigger_on = state;
900 else
901 data->dready_trigger_on = state;
902
903 mutex_unlock(&data->mutex);
904
905 return 0;
906}
907
908static const struct iio_trigger_ops bmg160_trigger_ops = {
909 .set_trigger_state = bmg160_data_rdy_trigger_set_state,
910 .try_reenable = bmg160_trig_try_reen,
911 .owner = THIS_MODULE,
912};
913
914static irqreturn_t bmg160_event_handler(int irq, void *private)
915{
916 struct iio_dev *indio_dev = private;
917 struct bmg160_data *data = iio_priv(indio_dev);
918 int ret;
919 int dir;
920
921 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
922 if (ret < 0) {
923 dev_err(&data->client->dev, "Error reading reg_int_status2\n");
924 goto ack_intr_status;
925 }
926
927 if (ret & 0x08)
928 dir = IIO_EV_DIR_RISING;
929 else
930 dir = IIO_EV_DIR_FALLING;
931
932 if (ret & BMG160_ANY_MOTION_MASK)
933 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
934 0,
935 IIO_MOD_X_OR_Y_OR_Z,
936 IIO_EV_TYPE_ROC,
937 dir),
938 data->timestamp);
939
940ack_intr_status:
941 if (!data->dready_trigger_on) {
942 ret = i2c_smbus_write_byte_data(data->client,
943 BMG160_REG_INT_RST_LATCH,
944 BMG160_INT_MODE_LATCH_INT |
945 BMG160_INT_MODE_LATCH_RESET);
946 if (ret < 0)
947 dev_err(&data->client->dev,
948 "Error writing reg_rst_latch\n");
949 }
950
951 return IRQ_HANDLED;
952}
953
954static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
955{
956 struct iio_dev *indio_dev = private;
957 struct bmg160_data *data = iio_priv(indio_dev);
958
959 data->timestamp = iio_get_time_ns();
960
961 if (data->dready_trigger_on)
962 iio_trigger_poll(data->dready_trig);
963 else if (data->motion_trigger_on)
964 iio_trigger_poll(data->motion_trig);
965
966 if (data->ev_enable_state)
967 return IRQ_WAKE_THREAD;
968 else
969 return IRQ_HANDLED;
970
971}
972
3a0888ed
IT		 973static int bmg160_gpio_probe(struct i2c_client *client,
974 struct bmg160_data *data)
975
22b46c45 976{
22b46c45
SP		 977 struct device *dev;
978 struct gpio_desc *gpio;
979 int ret;
980
981 if (!client)
982 return -EINVAL;
983
984 dev = &client->dev;
22b46c45
SP		 985
986 /* data ready gpio interrupt pin */
987 gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0);
988 if (IS_ERR(gpio)) {
989 dev_err(dev, "acpi gpio get index failed\n");
990 return PTR_ERR(gpio);
991 }
992
993 ret = gpiod_direction_input(gpio);
994 if (ret)
995 return ret;
996
997 ret = gpiod_to_irq(gpio);
998
999 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1000
1001 return ret;
1002}
1003
3a0888ed
IT		 1004static const char *bmg160_match_acpi_device(struct device *dev)
1005{
1006 const struct acpi_device_id *id;
1007
1008 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1009 if (!id)
1010 return NULL;
1011
1012 return dev_name(dev);
1013}
1014
22b46c45
SP		 1015static int bmg160_probe(struct i2c_client *client,
1016 const struct i2c_device_id *id)
1017{
1018 struct bmg160_data *data;
1019 struct iio_dev *indio_dev;
1020 int ret;
3a0888ed 1021 const char *name = NULL;
22b46c45
SP		 1022
1023 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1024 if (!indio_dev)
1025 return -ENOMEM;
1026
1027 data = iio_priv(indio_dev);
1028 i2c_set_clientdata(client, indio_dev);
1029 data->client = client;
1030
1031 ret = bmg160_chip_init(data);
1032 if (ret < 0)
1033 return ret;
1034
1035 mutex_init(&data->mutex);
1036
3a0888ed
IT		 1037 if (id)
1038 name = id->name;
1039
1040 if (ACPI_HANDLE(&client->dev))
1041 name = bmg160_match_acpi_device(&client->dev);
1042
22b46c45
SP		 1043 indio_dev->dev.parent = &client->dev;
1044 indio_dev->channels = bmg160_channels;
1045 indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
3a0888ed 1046 indio_dev->name = name;
22b46c45
SP		 1047 indio_dev->modes = INDIO_DIRECT_MODE;
1048 indio_dev->info = &bmg160_info;
1049
1050 if (client->irq <= 0)
3a0888ed 1051 client->irq = bmg160_gpio_probe(client, data);
22b46c45
SP		 1052
1053 if (client->irq > 0) {
1054 ret = devm_request_threaded_irq(&client->dev,
1055 client->irq,
1056 bmg160_data_rdy_trig_poll,
1057 bmg160_event_handler,
1058 IRQF_TRIGGER_RISING,
1059 BMG160_IRQ_NAME,
1060 indio_dev);
1061 if (ret)
1062 return ret;
1063
1064 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1065 "%s-dev%d",
1066 indio_dev->name,
1067 indio_dev->id);
1068 if (!data->dready_trig)
1069 return -ENOMEM;
1070
1071 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1072 "%s-any-motion-dev%d",
1073 indio_dev->name,
1074 indio_dev->id);
1075 if (!data->motion_trig)
1076 return -ENOMEM;
1077
1078 data->dready_trig->dev.parent = &client->dev;
1079 data->dready_trig->ops = &bmg160_trigger_ops;
1080 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1081 ret = iio_trigger_register(data->dready_trig);
1082 if (ret)
1083 return ret;
1084
1085 data->motion_trig->dev.parent = &client->dev;
1086 data->motion_trig->ops = &bmg160_trigger_ops;
1087 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1088 ret = iio_trigger_register(data->motion_trig);
1089 if (ret) {
1090 data->motion_trig = NULL;
1091 goto err_trigger_unregister;
1092 }
1093
1094 ret = iio_triggered_buffer_setup(indio_dev,
1095 NULL,
1096 bmg160_trigger_handler,
1097 NULL);
1098 if (ret < 0) {
1099 dev_err(&client->dev,
1100 "iio triggered buffer setup failed\n");
1101 goto err_trigger_unregister;
1102 }
1103 }
1104
1105 ret = iio_device_register(indio_dev);
1106 if (ret < 0) {
1107 dev_err(&client->dev, "unable to register iio device\n");
1108 goto err_buffer_cleanup;
1109 }
1110
1111 ret = pm_runtime_set_active(&client->dev);
1112 if (ret)
1113 goto err_iio_unregister;
1114
1115 pm_runtime_enable(&client->dev);
1116 pm_runtime_set_autosuspend_delay(&client->dev,
1117 BMG160_AUTO_SUSPEND_DELAY_MS);
1118 pm_runtime_use_autosuspend(&client->dev);
1119
1120 return 0;
1121
1122err_iio_unregister:
1123 iio_device_unregister(indio_dev);
1124err_buffer_cleanup:
1125 if (data->dready_trig)
1126 iio_triggered_buffer_cleanup(indio_dev);
1127err_trigger_unregister:
1128 if (data->dready_trig)
1129 iio_trigger_unregister(data->dready_trig);
1130 if (data->motion_trig)
1131 iio_trigger_unregister(data->motion_trig);
1132
1133 return ret;
1134}
1135
1136static int bmg160_remove(struct i2c_client *client)
1137{
1138 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1139 struct bmg160_data *data = iio_priv(indio_dev);
1140
1141 pm_runtime_disable(&client->dev);
1142 pm_runtime_set_suspended(&client->dev);
1143 pm_runtime_put_noidle(&client->dev);
1144
1145 iio_device_unregister(indio_dev);
1146
1147 if (data->dready_trig) {
1148 iio_triggered_buffer_cleanup(indio_dev);
1149 iio_trigger_unregister(data->dready_trig);
1150 iio_trigger_unregister(data->motion_trig);
1151 }
1152
1153 mutex_lock(&data->mutex);
1154 bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1155 mutex_unlock(&data->mutex);
1156
1157 return 0;
1158}
1159
1160#ifdef CONFIG_PM_SLEEP
1161static int bmg160_suspend(struct device *dev)
1162{
1163 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1164 struct bmg160_data *data = iio_priv(indio_dev);
1165
1166 mutex_lock(&data->mutex);
1167 bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1168 mutex_unlock(&data->mutex);
1169
1170 return 0;
1171}
1172
1173static int bmg160_resume(struct device *dev)
1174{
1175 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1176 struct bmg160_data *data = iio_priv(indio_dev);
1177
1178 mutex_lock(&data->mutex);
1179 if (data->dready_trigger_on || data->motion_trigger_on ||
1180 data->ev_enable_state)
1181 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1182 mutex_unlock(&data->mutex);
1183
1184 return 0;
1185}
1186#endif
1187
1188#ifdef CONFIG_PM_RUNTIME
1189static int bmg160_runtime_suspend(struct device *dev)
1190{
1191 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1192 struct bmg160_data *data = iio_priv(indio_dev);
10bef289 1193 int ret;
22b46c45 1194
10bef289
SP		 1195 ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1196 if (ret < 0) {
1197 dev_err(&data->client->dev, "set mode failed\n");
1198 return -EAGAIN;
1199 }
1200
1201 return 0;
22b46c45
SP		 1202}
1203
1204static int bmg160_runtime_resume(struct device *dev)
1205{
1206 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1207 struct bmg160_data *data = iio_priv(indio_dev);
1208 int ret;
1209
1210 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1211 if (ret < 0)
1212 return ret;
1213
1214 msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1215
1216 return 0;
1217}
1218#endif
1219
1220static const struct dev_pm_ops bmg160_pm_ops = {
1221 SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1222 SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1223 bmg160_runtime_resume, NULL)
1224};
1225
1226static const struct acpi_device_id bmg160_acpi_match[] = {
1227 {"BMG0160", 0},
3a0888ed
IT		 1228 {"BMI055B", 0},
1229 {},
22b46c45 1230};
3a0888ed 1231
22b46c45
SP		 1232MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
1233
1234static const struct i2c_device_id bmg160_id[] = {
1235 {"bmg160", 0},
3a0888ed 1236 {"bmi055_gyro", 0},
22b46c45
SP		 1237 {}
1238};
1239
1240MODULE_DEVICE_TABLE(i2c, bmg160_id);
1241
1242static struct i2c_driver bmg160_driver = {
1243 .driver = {
1244 .name = BMG160_DRV_NAME,
1245 .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
1246 .pm = &bmg160_pm_ops,
1247 },
1248 .probe = bmg160_probe,
1249 .remove = bmg160_remove,
1250 .id_table = bmg160_id,
1251};
1252module_i2c_driver(bmg160_driver);
1253
1254MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1255MODULE_LICENSE("GPL v2");
1256MODULE_DESCRIPTION("BMG160 Gyro driver");
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