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iio: Move generic buffer implementations to sub-directory
[thirdparty/linux.git] / drivers / iio / gyro / bmg160.c
CommitLineData
22b46c45
SP		 1/*
2 * BMG160 Gyro Sensor driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/acpi.h>
21#include <linux/gpio/consumer.h>
22#include <linux/pm.h>
23#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/trigger.h>
28#include <linux/iio/events.h>
29#include <linux/iio/trigger_consumer.h>
30#include <linux/iio/triggered_buffer.h>
31
32#define BMG160_DRV_NAME "bmg160"
33#define BMG160_IRQ_NAME "bmg160_event"
34#define BMG160_GPIO_NAME "gpio_int"
35
36#define BMG160_REG_CHIP_ID 0x00
37#define BMG160_CHIP_ID_VAL 0x0F
38
39#define BMG160_REG_PMU_LPW 0x11
40#define BMG160_MODE_NORMAL 0x00
41#define BMG160_MODE_DEEP_SUSPEND 0x20
42#define BMG160_MODE_SUSPEND 0x80
43
44#define BMG160_REG_RANGE 0x0F
45
46#define BMG160_RANGE_2000DPS 0
47#define BMG160_RANGE_1000DPS 1
48#define BMG160_RANGE_500DPS 2
49#define BMG160_RANGE_250DPS 3
50#define BMG160_RANGE_125DPS 4
51
52#define BMG160_REG_PMU_BW 0x10
53#define BMG160_NO_FILTER 0
54#define BMG160_DEF_BW 100
55
56#define BMG160_REG_INT_MAP_0 0x17
57#define BMG160_INT_MAP_0_BIT_ANY BIT(1)
58
59#define BMG160_REG_INT_MAP_1 0x18
60#define BMG160_INT_MAP_1_BIT_NEW_DATA BIT(0)
61
62#define BMG160_REG_INT_RST_LATCH 0x21
63#define BMG160_INT_MODE_LATCH_RESET 0x80
64#define BMG160_INT_MODE_LATCH_INT 0x0F
65#define BMG160_INT_MODE_NON_LATCH_INT 0x00
66
67#define BMG160_REG_INT_EN_0 0x15
68#define BMG160_DATA_ENABLE_INT BIT(7)
69
5af6b307
SP		 70#define BMG160_REG_INT_EN_1 0x16
71#define BMG160_INT1_BIT_OD BIT(1)
72
22b46c45
SP		 73#define BMG160_REG_XOUT_L 0x02
74#define BMG160_AXIS_TO_REG(axis) (BMG160_REG_XOUT_L + (axis * 2))
75
76#define BMG160_REG_SLOPE_THRES 0x1B
77#define BMG160_SLOPE_THRES_MASK 0x0F
78
79#define BMG160_REG_MOTION_INTR 0x1C
80#define BMG160_INT_MOTION_X BIT(0)
81#define BMG160_INT_MOTION_Y BIT(1)
82#define BMG160_INT_MOTION_Z BIT(2)
83#define BMG160_ANY_DUR_MASK 0x30
84#define BMG160_ANY_DUR_SHIFT 4
85
86#define BMG160_REG_INT_STATUS_2 0x0B
87#define BMG160_ANY_MOTION_MASK 0x07
cb80f6a3
SP		 88#define BMG160_ANY_MOTION_BIT_X BIT(0)
89#define BMG160_ANY_MOTION_BIT_Y BIT(1)
90#define BMG160_ANY_MOTION_BIT_Z BIT(2)
22b46c45
SP		 91
92#define BMG160_REG_TEMP 0x08
93#define BMG160_TEMP_CENTER_VAL 23
94
95#define BMG160_MAX_STARTUP_TIME_MS 80
96
97#define BMG160_AUTO_SUSPEND_DELAY_MS 2000
98
99struct bmg160_data {
100 struct i2c_client *client;
101 struct iio_trigger *dready_trig;
102 struct iio_trigger *motion_trig;
103 struct mutex mutex;
104 s16 buffer[8];
105 u8 bw_bits;
106 u32 dps_range;
107 int ev_enable_state;
108 int slope_thres;
109 bool dready_trigger_on;
110 bool motion_trigger_on;
22b46c45
SP		 111};
112
113enum bmg160_axis {
114 AXIS_X,
115 AXIS_Y,
116 AXIS_Z,
117};
118
119static const struct {
120 int val;
121 int bw_bits;
122} bmg160_samp_freq_table[] = { {100, 0x07},
123 {200, 0x06},
124 {400, 0x03},
125 {1000, 0x02},
126 {2000, 0x01} };
127
128static const struct {
129 int scale;
130 int dps_range;
131} bmg160_scale_table[] = { { 1065, BMG160_RANGE_2000DPS},
132 { 532, BMG160_RANGE_1000DPS},
133 { 266, BMG160_RANGE_500DPS},
134 { 133, BMG160_RANGE_250DPS},
135 { 66, BMG160_RANGE_125DPS} };
136
137static int bmg160_set_mode(struct bmg160_data *data, u8 mode)
138{
139 int ret;
140
141 ret = i2c_smbus_write_byte_data(data->client,
142 BMG160_REG_PMU_LPW, mode);
143 if (ret < 0) {
144 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
145 return ret;
146 }
147
148 return 0;
149}
150
151static int bmg160_convert_freq_to_bit(int val)
152{
153 int i;
154
155 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
156 if (bmg160_samp_freq_table[i].val == val)
157 return bmg160_samp_freq_table[i].bw_bits;
158 }
159
160 return -EINVAL;
161}
162
163static int bmg160_set_bw(struct bmg160_data *data, int val)
164{
165 int ret;
166 int bw_bits;
167
168 bw_bits = bmg160_convert_freq_to_bit(val);
169 if (bw_bits < 0)
170 return bw_bits;
171
172 ret = i2c_smbus_write_byte_data(data->client, BMG160_REG_PMU_BW,
173 bw_bits);
174 if (ret < 0) {
175 dev_err(&data->client->dev, "Error writing reg_pmu_bw\n");
176 return ret;
177 }
178
179 data->bw_bits = bw_bits;
180
181 return 0;
182}
183
184static int bmg160_chip_init(struct bmg160_data *data)
185{
186 int ret;
187
188 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_CHIP_ID);
189 if (ret < 0) {
190 dev_err(&data->client->dev, "Error reading reg_chip_id\n");
191 return ret;
192 }
193
194 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
195 if (ret != BMG160_CHIP_ID_VAL) {
196 dev_err(&data->client->dev, "invalid chip %x\n", ret);
197 return -ENODEV;
198 }
199
200 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
201 if (ret < 0)
202 return ret;
203
204 /* Wait upto 500 ms to be ready after changing mode */
205 usleep_range(500, 1000);
206
207 /* Set Bandwidth */
208 ret = bmg160_set_bw(data, BMG160_DEF_BW);
209 if (ret < 0)
210 return ret;
211
212 /* Set Default Range */
213 ret = i2c_smbus_write_byte_data(data->client,
214 BMG160_REG_RANGE,
215 BMG160_RANGE_500DPS);
216 if (ret < 0) {
217 dev_err(&data->client->dev, "Error writing reg_range\n");
218 return ret;
219 }
220 data->dps_range = BMG160_RANGE_500DPS;
221
222 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_SLOPE_THRES);
223 if (ret < 0) {
224 dev_err(&data->client->dev, "Error reading reg_slope_thres\n");
225 return ret;
226 }
227 data->slope_thres = ret;
228
229 /* Set default interrupt mode */
5af6b307
SP		 230 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_EN_1);
231 if (ret < 0) {
232 dev_err(&data->client->dev, "Error reading reg_int_en_1\n");
233 return ret;
234 }
235 ret &= ~BMG160_INT1_BIT_OD;
236 ret = i2c_smbus_write_byte_data(data->client,
237 BMG160_REG_INT_EN_1, ret);
238 if (ret < 0) {
239 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
240 return ret;
241 }
242
22b46c45
SP		 243 ret = i2c_smbus_write_byte_data(data->client,
244 BMG160_REG_INT_RST_LATCH,
245 BMG160_INT_MODE_LATCH_INT |
246 BMG160_INT_MODE_LATCH_RESET);
247 if (ret < 0) {
248 dev_err(&data->client->dev,
249 "Error writing reg_motion_intr\n");
250 return ret;
251 }
252
253 return 0;
254}
255
256static int bmg160_set_power_state(struct bmg160_data *data, bool on)
257{
6f0a13f2 258#ifdef CONFIG_PM
22b46c45
SP		 259 int ret;
260
261 if (on)
262 ret = pm_runtime_get_sync(&data->client->dev);
263 else {
264 pm_runtime_mark_last_busy(&data->client->dev);
265 ret = pm_runtime_put_autosuspend(&data->client->dev);
266 }
267
268 if (ret < 0) {
269 dev_err(&data->client->dev,
270 "Failed: bmg160_set_power_state for %d\n", on);
10bef289
SP		 271 if (on)
272 pm_runtime_put_noidle(&data->client->dev);
273
22b46c45
SP		 274 return ret;
275 }
ef1c6b23 276#endif
22b46c45
SP		 277
278 return 0;
279}
280
281static int bmg160_setup_any_motion_interrupt(struct bmg160_data *data,
282 bool status)
283{
284 int ret;
285
286 /* Enable/Disable INT_MAP0 mapping */
287 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_0);
288 if (ret < 0) {
289 dev_err(&data->client->dev, "Error reading reg_int_map0\n");
290 return ret;
291 }
292 if (status)
293 ret |= BMG160_INT_MAP_0_BIT_ANY;
294 else
295 ret &= ~BMG160_INT_MAP_0_BIT_ANY;
296
297 ret = i2c_smbus_write_byte_data(data->client,
298 BMG160_REG_INT_MAP_0,
299 ret);
300 if (ret < 0) {
301 dev_err(&data->client->dev, "Error writing reg_int_map0\n");
302 return ret;
303 }
304
305 /* Enable/Disable slope interrupts */
306 if (status) {
307 /* Update slope thres */
308 ret = i2c_smbus_write_byte_data(data->client,
309 BMG160_REG_SLOPE_THRES,
310 data->slope_thres);
311 if (ret < 0) {
312 dev_err(&data->client->dev,
313 "Error writing reg_slope_thres\n");
314 return ret;
315 }
316
317 ret = i2c_smbus_write_byte_data(data->client,
318 BMG160_REG_MOTION_INTR,
319 BMG160_INT_MOTION_X |
320 BMG160_INT_MOTION_Y |
321 BMG160_INT_MOTION_Z);
322 if (ret < 0) {
323 dev_err(&data->client->dev,
324 "Error writing reg_motion_intr\n");
325 return ret;
326 }
327
328 /*
329 * New data interrupt is always non-latched,
330 * which will have higher priority, so no need
331 * to set latched mode, we will be flooded anyway with INTR
332 */
333 if (!data->dready_trigger_on) {
334 ret = i2c_smbus_write_byte_data(data->client,
335 BMG160_REG_INT_RST_LATCH,
336 BMG160_INT_MODE_LATCH_INT |
337 BMG160_INT_MODE_LATCH_RESET);
338 if (ret < 0) {
339 dev_err(&data->client->dev,
340 "Error writing reg_rst_latch\n");
341 return ret;
342 }
343 }
344
345 ret = i2c_smbus_write_byte_data(data->client,
346 BMG160_REG_INT_EN_0,
347 BMG160_DATA_ENABLE_INT);
348
349 } else
350 ret = i2c_smbus_write_byte_data(data->client,
351 BMG160_REG_INT_EN_0,
352 0);
353
354 if (ret < 0) {
355 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
356 return ret;
357 }
358
359 return 0;
360}
361
362static int bmg160_setup_new_data_interrupt(struct bmg160_data *data,
363 bool status)
364{
365 int ret;
366
367 /* Enable/Disable INT_MAP1 mapping */
368 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_MAP_1);
369 if (ret < 0) {
370 dev_err(&data->client->dev, "Error reading reg_int_map1\n");
371 return ret;
372 }
373
374 if (status)
375 ret |= BMG160_INT_MAP_1_BIT_NEW_DATA;
376 else
377 ret &= ~BMG160_INT_MAP_1_BIT_NEW_DATA;
378
379 ret = i2c_smbus_write_byte_data(data->client,
380 BMG160_REG_INT_MAP_1,
381 ret);
382 if (ret < 0) {
383 dev_err(&data->client->dev, "Error writing reg_int_map1\n");
384 return ret;
385 }
386
387 if (status) {
388 ret = i2c_smbus_write_byte_data(data->client,
389 BMG160_REG_INT_RST_LATCH,
390 BMG160_INT_MODE_NON_LATCH_INT |
391 BMG160_INT_MODE_LATCH_RESET);
392 if (ret < 0) {
393 dev_err(&data->client->dev,
394 "Error writing reg_rst_latch\n");
395 return ret;
396 }
397
398 ret = i2c_smbus_write_byte_data(data->client,
399 BMG160_REG_INT_EN_0,
400 BMG160_DATA_ENABLE_INT);
401
402 } else {
403 /* Restore interrupt mode */
404 ret = i2c_smbus_write_byte_data(data->client,
405 BMG160_REG_INT_RST_LATCH,
406 BMG160_INT_MODE_LATCH_INT |
407 BMG160_INT_MODE_LATCH_RESET);
408 if (ret < 0) {
409 dev_err(&data->client->dev,
410 "Error writing reg_rst_latch\n");
411 return ret;
412 }
413
414 ret = i2c_smbus_write_byte_data(data->client,
415 BMG160_REG_INT_EN_0,
416 0);
417 }
418
419 if (ret < 0) {
420 dev_err(&data->client->dev, "Error writing reg_int_en0\n");
421 return ret;
422 }
423
424 return 0;
425}
426
427static int bmg160_get_bw(struct bmg160_data *data, int *val)
428{
429 int i;
430
431 for (i = 0; i < ARRAY_SIZE(bmg160_samp_freq_table); ++i) {
432 if (bmg160_samp_freq_table[i].bw_bits == data->bw_bits) {
433 *val = bmg160_samp_freq_table[i].val;
434 return IIO_VAL_INT;
435 }
436 }
437
438 return -EINVAL;
439}
440
441static int bmg160_set_scale(struct bmg160_data *data, int val)
442{
443 int ret, i;
444
445 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
446 if (bmg160_scale_table[i].scale == val) {
447 ret = i2c_smbus_write_byte_data(
448 data->client,
449 BMG160_REG_RANGE,
450 bmg160_scale_table[i].dps_range);
451 if (ret < 0) {
452 dev_err(&data->client->dev,
453 "Error writing reg_range\n");
454 return ret;
455 }
456 data->dps_range = bmg160_scale_table[i].dps_range;
457 return 0;
458 }
459 }
460
461 return -EINVAL;
462}
463
464static int bmg160_get_temp(struct bmg160_data *data, int *val)
465{
466 int ret;
467
468 mutex_lock(&data->mutex);
469 ret = bmg160_set_power_state(data, true);
470 if (ret < 0) {
471 mutex_unlock(&data->mutex);
472 return ret;
473 }
474
475 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_TEMP);
476 if (ret < 0) {
477 dev_err(&data->client->dev, "Error reading reg_temp\n");
478 bmg160_set_power_state(data, false);
479 mutex_unlock(&data->mutex);
480 return ret;
481 }
482
483 *val = sign_extend32(ret, 7);
484 ret = bmg160_set_power_state(data, false);
485 mutex_unlock(&data->mutex);
486 if (ret < 0)
487 return ret;
488
489 return IIO_VAL_INT;
490}
491
492static int bmg160_get_axis(struct bmg160_data *data, int axis, int *val)
493{
494 int ret;
495
496 mutex_lock(&data->mutex);
497 ret = bmg160_set_power_state(data, true);
498 if (ret < 0) {
499 mutex_unlock(&data->mutex);
500 return ret;
501 }
502
503 ret = i2c_smbus_read_word_data(data->client, BMG160_AXIS_TO_REG(axis));
504 if (ret < 0) {
505 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
506 bmg160_set_power_state(data, false);
507 mutex_unlock(&data->mutex);
508 return ret;
509 }
510
511 *val = sign_extend32(ret, 15);
512 ret = bmg160_set_power_state(data, false);
513 mutex_unlock(&data->mutex);
514 if (ret < 0)
515 return ret;
516
517 return IIO_VAL_INT;
518}
519
520static int bmg160_read_raw(struct iio_dev *indio_dev,
521 struct iio_chan_spec const *chan,
522 int *val, int *val2, long mask)
523{
524 struct bmg160_data *data = iio_priv(indio_dev);
525 int ret;
526
527 switch (mask) {
528 case IIO_CHAN_INFO_RAW:
529 switch (chan->type) {
530 case IIO_TEMP:
531 return bmg160_get_temp(data, val);
532 case IIO_ANGL_VEL:
533 if (iio_buffer_enabled(indio_dev))
534 return -EBUSY;
535 else
536 return bmg160_get_axis(data, chan->scan_index,
537 val);
538 default:
539 return -EINVAL;
540 }
541 case IIO_CHAN_INFO_OFFSET:
542 if (chan->type == IIO_TEMP) {
543 *val = BMG160_TEMP_CENTER_VAL;
544 return IIO_VAL_INT;
545 } else
546 return -EINVAL;
547 case IIO_CHAN_INFO_SCALE:
548 *val = 0;
549 switch (chan->type) {
550 case IIO_TEMP:
551 *val2 = 500000;
552 return IIO_VAL_INT_PLUS_MICRO;
553 case IIO_ANGL_VEL:
554 {
555 int i;
556
557 for (i = 0; i < ARRAY_SIZE(bmg160_scale_table); ++i) {
558 if (bmg160_scale_table[i].dps_range ==
559 data->dps_range) {
560 *val2 = bmg160_scale_table[i].scale;
561 return IIO_VAL_INT_PLUS_MICRO;
562 }
563 }
564 return -EINVAL;
565 }
566 default:
567 return -EINVAL;
568 }
569 case IIO_CHAN_INFO_SAMP_FREQ:
570 *val2 = 0;
571 mutex_lock(&data->mutex);
572 ret = bmg160_get_bw(data, val);
573 mutex_unlock(&data->mutex);
574 return ret;
575 default:
576 return -EINVAL;
577 }
578}
579
580static int bmg160_write_raw(struct iio_dev *indio_dev,
581 struct iio_chan_spec const *chan,
582 int val, int val2, long mask)
583{
584 struct bmg160_data *data = iio_priv(indio_dev);
585 int ret;
586
587 switch (mask) {
588 case IIO_CHAN_INFO_SAMP_FREQ:
589 mutex_lock(&data->mutex);
590 /*
591 * Section 4.2 of spec
592 * In suspend mode, the only supported operations are reading
593 * registers as well as writing to the (0x14) softreset
594 * register. Since we will be in suspend mode by default, change
595 * mode to power on for other writes.
596 */
597 ret = bmg160_set_power_state(data, true);
598 if (ret < 0) {
599 mutex_unlock(&data->mutex);
600 return ret;
601 }
602 ret = bmg160_set_bw(data, val);
603 if (ret < 0) {
604 bmg160_set_power_state(data, false);
605 mutex_unlock(&data->mutex);
606 return ret;
607 }
608 ret = bmg160_set_power_state(data, false);
609 mutex_unlock(&data->mutex);
610 return ret;
611 case IIO_CHAN_INFO_SCALE:
612 if (val)
613 return -EINVAL;
614
615 mutex_lock(&data->mutex);
616 /* Refer to comments above for the suspend mode ops */
617 ret = bmg160_set_power_state(data, true);
618 if (ret < 0) {
619 mutex_unlock(&data->mutex);
620 return ret;
621 }
622 ret = bmg160_set_scale(data, val2);
623 if (ret < 0) {
624 bmg160_set_power_state(data, false);
625 mutex_unlock(&data->mutex);
626 return ret;
627 }
628 ret = bmg160_set_power_state(data, false);
629 mutex_unlock(&data->mutex);
630 return ret;
631 default:
632 return -EINVAL;
633 }
634
635 return -EINVAL;
636}
637
638static int bmg160_read_event(struct iio_dev *indio_dev,
639 const struct iio_chan_spec *chan,
640 enum iio_event_type type,
641 enum iio_event_direction dir,
642 enum iio_event_info info,
643 int *val, int *val2)
644{
645 struct bmg160_data *data = iio_priv(indio_dev);
646
647 *val2 = 0;
648 switch (info) {
649 case IIO_EV_INFO_VALUE:
650 *val = data->slope_thres & BMG160_SLOPE_THRES_MASK;
651 break;
652 default:
653 return -EINVAL;
654 }
655
656 return IIO_VAL_INT;
657}
658
659static int bmg160_write_event(struct iio_dev *indio_dev,
660 const struct iio_chan_spec *chan,
661 enum iio_event_type type,
662 enum iio_event_direction dir,
663 enum iio_event_info info,
664 int val, int val2)
665{
666 struct bmg160_data *data = iio_priv(indio_dev);
667
668 switch (info) {
669 case IIO_EV_INFO_VALUE:
670 if (data->ev_enable_state)
671 return -EBUSY;
672 data->slope_thres &= ~BMG160_SLOPE_THRES_MASK;
673 data->slope_thres |= (val & BMG160_SLOPE_THRES_MASK);
674 break;
675 default:
676 return -EINVAL;
677 }
678
679 return 0;
680}
681
682static int bmg160_read_event_config(struct iio_dev *indio_dev,
683 const struct iio_chan_spec *chan,
684 enum iio_event_type type,
685 enum iio_event_direction dir)
686{
687
688 struct bmg160_data *data = iio_priv(indio_dev);
689
690 return data->ev_enable_state;
691}
692
693static int bmg160_write_event_config(struct iio_dev *indio_dev,
694 const struct iio_chan_spec *chan,
695 enum iio_event_type type,
696 enum iio_event_direction dir,
697 int state)
698{
699 struct bmg160_data *data = iio_priv(indio_dev);
700 int ret;
701
702 if (state && data->ev_enable_state)
703 return 0;
704
705 mutex_lock(&data->mutex);
706
707 if (!state && data->motion_trigger_on) {
708 data->ev_enable_state = 0;
709 mutex_unlock(&data->mutex);
710 return 0;
711 }
712 /*
713 * We will expect the enable and disable to do operation in
714 * in reverse order. This will happen here anyway as our
715 * resume operation uses sync mode runtime pm calls, the
716 * suspend operation will be delayed by autosuspend delay
717 * So the disable operation will still happen in reverse of
718 * enable operation. When runtime pm is disabled the mode
719 * is always on so sequence doesn't matter
720 */
721 ret = bmg160_set_power_state(data, state);
722 if (ret < 0) {
723 mutex_unlock(&data->mutex);
724 return ret;
725 }
726
727 ret = bmg160_setup_any_motion_interrupt(data, state);
728 if (ret < 0) {
10bef289 729 bmg160_set_power_state(data, false);
22b46c45
SP		 730 mutex_unlock(&data->mutex);
731 return ret;
732 }
733
734 data->ev_enable_state = state;
735 mutex_unlock(&data->mutex);
736
737 return 0;
738}
739
22b46c45
SP		 740static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("100 200 400 1000 2000");
741
742static IIO_CONST_ATTR(in_anglvel_scale_available,
743 "0.001065 0.000532 0.000266 0.000133 0.000066");
744
745static struct attribute *bmg160_attributes[] = {
746 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
747 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr,
748 NULL,
749};
750
751static const struct attribute_group bmg160_attrs_group = {
752 .attrs = bmg160_attributes,
753};
754
755static const struct iio_event_spec bmg160_event = {
756 .type = IIO_EV_TYPE_ROC,
6896ab3a 757 .dir = IIO_EV_DIR_EITHER,
22b46c45
SP		 758 .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE) |
759 BIT(IIO_EV_INFO_ENABLE)
760};
761
762#define BMG160_CHANNEL(_axis) { \
763 .type = IIO_ANGL_VEL, \
764 .modified = 1, \
765 .channel2 = IIO_MOD_##_axis, \
766 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
767 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
768 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
769 .scan_index = AXIS_##_axis, \
770 .scan_type = { \
771 .sign = 's', \
772 .realbits = 16, \
773 .storagebits = 16, \
774 }, \
775 .event_spec = &bmg160_event, \
776 .num_event_specs = 1 \
777}
778
779static const struct iio_chan_spec bmg160_channels[] = {
780 {
781 .type = IIO_TEMP,
782 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
783 BIT(IIO_CHAN_INFO_SCALE) |
784 BIT(IIO_CHAN_INFO_OFFSET),
785 .scan_index = -1,
786 },
787 BMG160_CHANNEL(X),
788 BMG160_CHANNEL(Y),
789 BMG160_CHANNEL(Z),
790 IIO_CHAN_SOFT_TIMESTAMP(3),
791};
792
793static const struct iio_info bmg160_info = {
794 .attrs = &bmg160_attrs_group,
795 .read_raw = bmg160_read_raw,
796 .write_raw = bmg160_write_raw,
797 .read_event_value = bmg160_read_event,
798 .write_event_value = bmg160_write_event,
799 .write_event_config = bmg160_write_event_config,
800 .read_event_config = bmg160_read_event_config,
22b46c45
SP		 801 .driver_module = THIS_MODULE,
802};
803
804static irqreturn_t bmg160_trigger_handler(int irq, void *p)
805{
806 struct iio_poll_func *pf = p;
807 struct iio_dev *indio_dev = pf->indio_dev;
808 struct bmg160_data *data = iio_priv(indio_dev);
809 int bit, ret, i = 0;
810
811 mutex_lock(&data->mutex);
70dddeee 812 for_each_set_bit(bit, indio_dev->active_scan_mask,
22b46c45
SP		 813 indio_dev->masklength) {
814 ret = i2c_smbus_read_word_data(data->client,
815 BMG160_AXIS_TO_REG(bit));
816 if (ret < 0) {
817 mutex_unlock(&data->mutex);
818 goto err;
819 }
820 data->buffer[i++] = ret;
821 }
822 mutex_unlock(&data->mutex);
823
824 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
eb219101 825 pf->timestamp);
22b46c45
SP		 826err:
827 iio_trigger_notify_done(indio_dev->trig);
828
829 return IRQ_HANDLED;
830}
831
832static int bmg160_trig_try_reen(struct iio_trigger *trig)
833{
834 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
835 struct bmg160_data *data = iio_priv(indio_dev);
836 int ret;
837
838 /* new data interrupts don't need ack */
839 if (data->dready_trigger_on)
840 return 0;
841
842 /* Set latched mode interrupt and clear any latched interrupt */
843 ret = i2c_smbus_write_byte_data(data->client,
844 BMG160_REG_INT_RST_LATCH,
845 BMG160_INT_MODE_LATCH_INT |
846 BMG160_INT_MODE_LATCH_RESET);
847 if (ret < 0) {
848 dev_err(&data->client->dev, "Error writing reg_rst_latch\n");
849 return ret;
850 }
851
852 return 0;
853}
854
855static int bmg160_data_rdy_trigger_set_state(struct iio_trigger *trig,
856 bool state)
857{
858 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
859 struct bmg160_data *data = iio_priv(indio_dev);
860 int ret;
861
862 mutex_lock(&data->mutex);
863
864 if (!state && data->ev_enable_state && data->motion_trigger_on) {
865 data->motion_trigger_on = false;
866 mutex_unlock(&data->mutex);
867 return 0;
868 }
869
870 /*
871 * Refer to comment in bmg160_write_event_config for
872 * enable/disable operation order
873 */
874 ret = bmg160_set_power_state(data, state);
875 if (ret < 0) {
876 mutex_unlock(&data->mutex);
877 return ret;
878 }
879 if (data->motion_trig == trig)
880 ret = bmg160_setup_any_motion_interrupt(data, state);
881 else
882 ret = bmg160_setup_new_data_interrupt(data, state);
883 if (ret < 0) {
10bef289 884 bmg160_set_power_state(data, false);
22b46c45
SP		 885 mutex_unlock(&data->mutex);
886 return ret;
887 }
888 if (data->motion_trig == trig)
889 data->motion_trigger_on = state;
890 else
891 data->dready_trigger_on = state;
892
893 mutex_unlock(&data->mutex);
894
895 return 0;
896}
897
898static const struct iio_trigger_ops bmg160_trigger_ops = {
899 .set_trigger_state = bmg160_data_rdy_trigger_set_state,
900 .try_reenable = bmg160_trig_try_reen,
901 .owner = THIS_MODULE,
902};
903
904static irqreturn_t bmg160_event_handler(int irq, void *private)
905{
906 struct iio_dev *indio_dev = private;
907 struct bmg160_data *data = iio_priv(indio_dev);
908 int ret;
909 int dir;
910
911 ret = i2c_smbus_read_byte_data(data->client, BMG160_REG_INT_STATUS_2);
912 if (ret < 0) {
913 dev_err(&data->client->dev, "Error reading reg_int_status2\n");
914 goto ack_intr_status;
915 }
916
917 if (ret & 0x08)
918 dir = IIO_EV_DIR_RISING;
919 else
920 dir = IIO_EV_DIR_FALLING;
921
cb80f6a3 922 if (ret & BMG160_ANY_MOTION_BIT_X)
22b46c45
SP		 923 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
924 0,
cb80f6a3
SP		 925 IIO_MOD_X,
926 IIO_EV_TYPE_ROC,
927 dir),
eb219101 928 iio_get_time_ns());
cb80f6a3
SP		 929 if (ret & BMG160_ANY_MOTION_BIT_Y)
930 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
931 0,
932 IIO_MOD_Y,
933 IIO_EV_TYPE_ROC,
934 dir),
eb219101 935 iio_get_time_ns());
cb80f6a3
SP		 936 if (ret & BMG160_ANY_MOTION_BIT_Z)
937 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ANGL_VEL,
938 0,
939 IIO_MOD_Z,
22b46c45
SP		 940 IIO_EV_TYPE_ROC,
941 dir),
eb219101 942 iio_get_time_ns());
22b46c45
SP		 943
944ack_intr_status:
945 if (!data->dready_trigger_on) {
946 ret = i2c_smbus_write_byte_data(data->client,
947 BMG160_REG_INT_RST_LATCH,
948 BMG160_INT_MODE_LATCH_INT |
949 BMG160_INT_MODE_LATCH_RESET);
950 if (ret < 0)
951 dev_err(&data->client->dev,
952 "Error writing reg_rst_latch\n");
953 }
954
955 return IRQ_HANDLED;
956}
957
958static irqreturn_t bmg160_data_rdy_trig_poll(int irq, void *private)
959{
960 struct iio_dev *indio_dev = private;
961 struct bmg160_data *data = iio_priv(indio_dev);
962
22b46c45
SP		 963 if (data->dready_trigger_on)
964 iio_trigger_poll(data->dready_trig);
965 else if (data->motion_trigger_on)
966 iio_trigger_poll(data->motion_trig);
967
968 if (data->ev_enable_state)
969 return IRQ_WAKE_THREAD;
970 else
971 return IRQ_HANDLED;
972
973}
974
00e0c8e8
VD		 975static int bmg160_buffer_preenable(struct iio_dev *indio_dev)
976{
977 struct bmg160_data *data = iio_priv(indio_dev);
978
979 return bmg160_set_power_state(data, true);
980}
981
982static int bmg160_buffer_postdisable(struct iio_dev *indio_dev)
983{
984 struct bmg160_data *data = iio_priv(indio_dev);
985
986 return bmg160_set_power_state(data, false);
987}
988
989static const struct iio_buffer_setup_ops bmg160_buffer_setup_ops = {
990 .preenable = bmg160_buffer_preenable,
991 .postenable = iio_triggered_buffer_postenable,
992 .predisable = iio_triggered_buffer_predisable,
993 .postdisable = bmg160_buffer_postdisable,
994};
995
3a0888ed
IT		 996static int bmg160_gpio_probe(struct i2c_client *client,
997 struct bmg160_data *data)
998
22b46c45 999{
22b46c45
SP		 1000 struct device *dev;
1001 struct gpio_desc *gpio;
1002 int ret;
1003
1004 if (!client)
1005 return -EINVAL;
1006
1007 dev = &client->dev;
22b46c45
SP		 1008
1009 /* data ready gpio interrupt pin */
b457f53a 1010 gpio = devm_gpiod_get_index(dev, BMG160_GPIO_NAME, 0, GPIOD_IN);
22b46c45
SP		 1011 if (IS_ERR(gpio)) {
1012 dev_err(dev, "acpi gpio get index failed\n");
1013 return PTR_ERR(gpio);
1014 }
1015
22b46c45
SP		 1016 ret = gpiod_to_irq(gpio);
1017
1018 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1019
1020 return ret;
1021}
1022
3a0888ed
IT		 1023static const char *bmg160_match_acpi_device(struct device *dev)
1024{
1025 const struct acpi_device_id *id;
1026
1027 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1028 if (!id)
1029 return NULL;
1030
1031 return dev_name(dev);
1032}
1033
22b46c45
SP		 1034static int bmg160_probe(struct i2c_client *client,
1035 const struct i2c_device_id *id)
1036{
1037 struct bmg160_data *data;
1038 struct iio_dev *indio_dev;
1039 int ret;
3a0888ed 1040 const char *name = NULL;
22b46c45
SP		 1041
1042 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1043 if (!indio_dev)
1044 return -ENOMEM;
1045
1046 data = iio_priv(indio_dev);
1047 i2c_set_clientdata(client, indio_dev);
1048 data->client = client;
1049
1050 ret = bmg160_chip_init(data);
1051 if (ret < 0)
1052 return ret;
1053
1054 mutex_init(&data->mutex);
1055
3a0888ed
IT		 1056 if (id)
1057 name = id->name;
1058
1059 if (ACPI_HANDLE(&client->dev))
1060 name = bmg160_match_acpi_device(&client->dev);
1061
22b46c45
SP		 1062 indio_dev->dev.parent = &client->dev;
1063 indio_dev->channels = bmg160_channels;
1064 indio_dev->num_channels = ARRAY_SIZE(bmg160_channels);
3a0888ed 1065 indio_dev->name = name;
22b46c45
SP		 1066 indio_dev->modes = INDIO_DIRECT_MODE;
1067 indio_dev->info = &bmg160_info;
1068
1069 if (client->irq <= 0)
3a0888ed 1070 client->irq = bmg160_gpio_probe(client, data);
22b46c45
SP		 1071
1072 if (client->irq > 0) {
1073 ret = devm_request_threaded_irq(&client->dev,
1074 client->irq,
1075 bmg160_data_rdy_trig_poll,
1076 bmg160_event_handler,
1077 IRQF_TRIGGER_RISING,
1078 BMG160_IRQ_NAME,
1079 indio_dev);
1080 if (ret)
1081 return ret;
1082
1083 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1084 "%s-dev%d",
1085 indio_dev->name,
1086 indio_dev->id);
1087 if (!data->dready_trig)
1088 return -ENOMEM;
1089
1090 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1091 "%s-any-motion-dev%d",
1092 indio_dev->name,
1093 indio_dev->id);
1094 if (!data->motion_trig)
1095 return -ENOMEM;
1096
1097 data->dready_trig->dev.parent = &client->dev;
1098 data->dready_trig->ops = &bmg160_trigger_ops;
1099 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1100 ret = iio_trigger_register(data->dready_trig);
1101 if (ret)
1102 return ret;
1103
1104 data->motion_trig->dev.parent = &client->dev;
1105 data->motion_trig->ops = &bmg160_trigger_ops;
1106 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1107 ret = iio_trigger_register(data->motion_trig);
1108 if (ret) {
1109 data->motion_trig = NULL;
1110 goto err_trigger_unregister;
1111 }
00e0c8e8 1112 }
22b46c45 1113
00e0c8e8
VD		 1114 ret = iio_triggered_buffer_setup(indio_dev,
1115 iio_pollfunc_store_time,
1116 bmg160_trigger_handler,
1117 &bmg160_buffer_setup_ops);
1118 if (ret < 0) {
1119 dev_err(&client->dev,
1120 "iio triggered buffer setup failed\n");
1121 goto err_trigger_unregister;
22b46c45
SP		 1122 }
1123
1124 ret = iio_device_register(indio_dev);
1125 if (ret < 0) {
1126 dev_err(&client->dev, "unable to register iio device\n");
1127 goto err_buffer_cleanup;
1128 }
1129
1130 ret = pm_runtime_set_active(&client->dev);
1131 if (ret)
1132 goto err_iio_unregister;
1133
1134 pm_runtime_enable(&client->dev);
1135 pm_runtime_set_autosuspend_delay(&client->dev,
1136 BMG160_AUTO_SUSPEND_DELAY_MS);
1137 pm_runtime_use_autosuspend(&client->dev);
1138
1139 return 0;
1140
1141err_iio_unregister:
1142 iio_device_unregister(indio_dev);
1143err_buffer_cleanup:
00e0c8e8 1144 iio_triggered_buffer_cleanup(indio_dev);
22b46c45
SP		 1145err_trigger_unregister:
1146 if (data->dready_trig)
1147 iio_trigger_unregister(data->dready_trig);
1148 if (data->motion_trig)
1149 iio_trigger_unregister(data->motion_trig);
1150
1151 return ret;
1152}
1153
1154static int bmg160_remove(struct i2c_client *client)
1155{
1156 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1157 struct bmg160_data *data = iio_priv(indio_dev);
1158
1159 pm_runtime_disable(&client->dev);
1160 pm_runtime_set_suspended(&client->dev);
1161 pm_runtime_put_noidle(&client->dev);
1162
1163 iio_device_unregister(indio_dev);
00e0c8e8 1164 iio_triggered_buffer_cleanup(indio_dev);
22b46c45
SP		 1165
1166 if (data->dready_trig) {
22b46c45
SP		 1167 iio_trigger_unregister(data->dready_trig);
1168 iio_trigger_unregister(data->motion_trig);
1169 }
1170
1171 mutex_lock(&data->mutex);
1172 bmg160_set_mode(data, BMG160_MODE_DEEP_SUSPEND);
1173 mutex_unlock(&data->mutex);
1174
1175 return 0;
1176}
1177
1178#ifdef CONFIG_PM_SLEEP
1179static int bmg160_suspend(struct device *dev)
1180{
1181 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1182 struct bmg160_data *data = iio_priv(indio_dev);
1183
1184 mutex_lock(&data->mutex);
1185 bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1186 mutex_unlock(&data->mutex);
1187
1188 return 0;
1189}
1190
1191static int bmg160_resume(struct device *dev)
1192{
1193 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1194 struct bmg160_data *data = iio_priv(indio_dev);
1195
1196 mutex_lock(&data->mutex);
1197 if (data->dready_trigger_on || data->motion_trigger_on ||
1198 data->ev_enable_state)
1199 bmg160_set_mode(data, BMG160_MODE_NORMAL);
1200 mutex_unlock(&data->mutex);
1201
1202 return 0;
1203}
1204#endif
1205
6f0a13f2 1206#ifdef CONFIG_PM
22b46c45
SP		 1207static int bmg160_runtime_suspend(struct device *dev)
1208{
1209 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1210 struct bmg160_data *data = iio_priv(indio_dev);
10bef289 1211 int ret;
22b46c45 1212
10bef289
SP		 1213 ret = bmg160_set_mode(data, BMG160_MODE_SUSPEND);
1214 if (ret < 0) {
1215 dev_err(&data->client->dev, "set mode failed\n");
1216 return -EAGAIN;
1217 }
1218
1219 return 0;
22b46c45
SP		 1220}
1221
1222static int bmg160_runtime_resume(struct device *dev)
1223{
1224 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1225 struct bmg160_data *data = iio_priv(indio_dev);
1226 int ret;
1227
1228 ret = bmg160_set_mode(data, BMG160_MODE_NORMAL);
1229 if (ret < 0)
1230 return ret;
1231
1232 msleep_interruptible(BMG160_MAX_STARTUP_TIME_MS);
1233
1234 return 0;
1235}
1236#endif
1237
1238static const struct dev_pm_ops bmg160_pm_ops = {
1239 SET_SYSTEM_SLEEP_PM_OPS(bmg160_suspend, bmg160_resume)
1240 SET_RUNTIME_PM_OPS(bmg160_runtime_suspend,
1241 bmg160_runtime_resume, NULL)
1242};
1243
1244static const struct acpi_device_id bmg160_acpi_match[] = {
1245 {"BMG0160", 0},
3a0888ed
IT		 1246 {"BMI055B", 0},
1247 {},
22b46c45 1248};
3a0888ed 1249
22b46c45
SP		 1250MODULE_DEVICE_TABLE(acpi, bmg160_acpi_match);
1251
1252static const struct i2c_device_id bmg160_id[] = {
1253 {"bmg160", 0},
3a0888ed 1254 {"bmi055_gyro", 0},
22b46c45
SP		 1255 {}
1256};
1257
1258MODULE_DEVICE_TABLE(i2c, bmg160_id);
1259
1260static struct i2c_driver bmg160_driver = {
1261 .driver = {
1262 .name = BMG160_DRV_NAME,
1263 .acpi_match_table = ACPI_PTR(bmg160_acpi_match),
1264 .pm = &bmg160_pm_ops,
1265 },
1266 .probe = bmg160_probe,
1267 .remove = bmg160_remove,
1268 .id_table = bmg160_id,
1269};
1270module_i2c_driver(bmg160_driver);
1271
1272MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1273MODULE_LICENSE("GPL v2");
1274MODULE_DESCRIPTION("BMG160 Gyro driver");
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