]> git.ipfire.org Git - people/ms/linux.git/blame - drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
projects / people / ms / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
iio: imu: inv_mpu6050: ACPI enumeration
[people/ms/linux.git] / drivers / iio / imu / inv_mpu6050 / inv_mpu_core.c
CommitLineData
09a642b7
GG		 1/*
2* Copyright (C) 2012 Invensense, Inc.
3*
4* This software is licensed under the terms of the GNU General Public
5* License version 2, as published by the Free Software Foundation, and
6* may be copied, distributed, and modified under those terms.
7*
8* This program is distributed in the hope that it will be useful,
9* but WITHOUT ANY WARRANTY; without even the implied warranty of
10* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11* GNU General Public License for more details.
12*/
13
14#include <linux/module.h>
09a642b7
GG		 15#include <linux/slab.h>
16#include <linux/i2c.h>
17#include <linux/err.h>
18#include <linux/delay.h>
19#include <linux/sysfs.h>
20#include <linux/jiffies.h>
21#include <linux/irq.h>
22#include <linux/interrupt.h>
23#include <linux/kfifo.h>
24#include <linux/spinlock.h>
452204ae 25#include <linux/iio/iio.h>
3a2ecc3d 26#include <linux/i2c-mux.h>
6ed5ac50 27#include <linux/acpi.h>
09a642b7
GG		 28#include "inv_mpu_iio.h"
29
30/*
31 * this is the gyro scale translated from dynamic range plus/minus
32 * {250, 500, 1000, 2000} to rad/s
33 */
34static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
35
36/*
37 * this is the accel scale translated from dynamic range plus/minus
38 * {2, 4, 8, 16} to m/s^2
39 */
40static const int accel_scale[] = {598, 1196, 2392, 4785};
41
42static const struct inv_mpu6050_reg_map reg_set_6050 = {
43 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
44 .lpf = INV_MPU6050_REG_CONFIG,
45 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
46 .fifo_en = INV_MPU6050_REG_FIFO_EN,
47 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
48 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
49 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
50 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
51 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
52 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
53 .temperature = INV_MPU6050_REG_TEMPERATURE,
54 .int_enable = INV_MPU6050_REG_INT_ENABLE,
55 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
56 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
3a2ecc3d 57 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
09a642b7
GG		 58};
59
60static const struct inv_mpu6050_chip_config chip_config_6050 = {
61 .fsr = INV_MPU6050_FSR_2000DPS,
62 .lpf = INV_MPU6050_FILTER_20HZ,
63 .fifo_rate = INV_MPU6050_INIT_FIFO_RATE,
64 .gyro_fifo_enable = false,
65 .accl_fifo_enable = false,
66 .accl_fs = INV_MPU6050_FS_02G,
67};
68
69static const struct inv_mpu6050_hw hw_info[INV_NUM_PARTS] = {
70 {
71 .num_reg = 117,
72 .name = "MPU6050",
73 .reg = &reg_set_6050,
74 .config = &chip_config_6050,
75 },
76};
77
78int inv_mpu6050_write_reg(struct inv_mpu6050_state *st, int reg, u8 d)
79{
80 return i2c_smbus_write_i2c_block_data(st->client, reg, 1, &d);
81}
82
3a2ecc3d
SP		 83/*
84 * The i2c read/write needs to happen in unlocked mode. As the parent
85 * adapter is common. If we use locked versions, it will fail as
86 * the mux adapter will lock the parent i2c adapter, while calling
87 * select/deselect functions.
88 */
89static int inv_mpu6050_write_reg_unlocked(struct inv_mpu6050_state *st,
90 u8 reg, u8 d)
91{
92 int ret;
93 u8 buf[2];
94 struct i2c_msg msg[1] = {
95 {
96 .addr = st->client->addr,
97 .flags = 0,
98 .len = sizeof(buf),
99 .buf = buf,
100 }
101 };
102
103 buf[0] = reg;
104 buf[1] = d;
105 ret = __i2c_transfer(st->client->adapter, msg, 1);
106 if (ret != 1)
107 return ret;
108
109 return 0;
110}
111
112static int inv_mpu6050_select_bypass(struct i2c_adapter *adap, void *mux_priv,
113 u32 chan_id)
114{
115 struct iio_dev *indio_dev = mux_priv;
116 struct inv_mpu6050_state *st = iio_priv(indio_dev);
117 int ret = 0;
118
119 /* Use the same mutex which was used everywhere to protect power-op */
120 mutex_lock(&indio_dev->mlock);
121 if (!st->powerup_count) {
122 ret = inv_mpu6050_write_reg_unlocked(st, st->reg->pwr_mgmt_1,
123 0);
124 if (ret)
125 goto write_error;
126
127 msleep(INV_MPU6050_REG_UP_TIME);
128 }
129 if (!ret) {
130 st->powerup_count++;
131 ret = inv_mpu6050_write_reg_unlocked(st, st->reg->int_pin_cfg,
132 st->client->irq |
133 INV_MPU6050_BIT_BYPASS_EN);
134 }
135write_error:
136 mutex_unlock(&indio_dev->mlock);
137
138 return ret;
139}
140
141static int inv_mpu6050_deselect_bypass(struct i2c_adapter *adap,
142 void *mux_priv, u32 chan_id)
143{
144 struct iio_dev *indio_dev = mux_priv;
145 struct inv_mpu6050_state *st = iio_priv(indio_dev);
146
147 mutex_lock(&indio_dev->mlock);
148 /* It doesn't really mattter, if any of the calls fails */
149 inv_mpu6050_write_reg_unlocked(st, st->reg->int_pin_cfg,
150 st->client->irq);
151 st->powerup_count--;
152 if (!st->powerup_count)
153 inv_mpu6050_write_reg_unlocked(st, st->reg->pwr_mgmt_1,
154 INV_MPU6050_BIT_SLEEP);
155 mutex_unlock(&indio_dev->mlock);
156
157 return 0;
158}
159
09a642b7
GG		 160int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
161{
162 u8 d, mgmt_1;
163 int result;
164
165 /* switch clock needs to be careful. Only when gyro is on, can
166 clock source be switched to gyro. Otherwise, it must be set to
167 internal clock */
168 if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
169 result = i2c_smbus_read_i2c_block_data(st->client,
170 st->reg->pwr_mgmt_1, 1, &mgmt_1);
171 if (result != 1)
172 return result;
173
174 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
175 }
176
177 if ((INV_MPU6050_BIT_PWR_GYRO_STBY == mask) && (!en)) {
178 /* turning off gyro requires switch to internal clock first.
179 Then turn off gyro engine */
180 mgmt_1 |= INV_CLK_INTERNAL;
181 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1, mgmt_1);
182 if (result)
183 return result;
184 }
185
186 result = i2c_smbus_read_i2c_block_data(st->client,
187 st->reg->pwr_mgmt_2, 1, &d);
188 if (result != 1)
189 return result;
190 if (en)
191 d &= ~mask;
192 else
193 d |= mask;
194 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_2, d);
195 if (result)
196 return result;
197
198 if (en) {
7da773e6 199 /* Wait for output stabilize */
09a642b7
GG		 200 msleep(INV_MPU6050_TEMP_UP_TIME);
201 if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
202 /* switch internal clock to PLL */
203 mgmt_1 |= INV_CLK_PLL;
204 result = inv_mpu6050_write_reg(st,
205 st->reg->pwr_mgmt_1, mgmt_1);
206 if (result)
207 return result;
208 }
209 }
210
211 return 0;
212}
213
214int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
215{
3a2ecc3d
SP		 216 int result = 0;
217
218 if (power_on) {
219 /* Already under indio-dev->mlock mutex */
220 if (!st->powerup_count)
221 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1,
222 0);
223 if (!result)
224 st->powerup_count++;
225 } else {
226 st->powerup_count--;
227 if (!st->powerup_count)
228 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1,
229 INV_MPU6050_BIT_SLEEP);
230 }
09a642b7 231
09a642b7
GG		 232 if (result)
233 return result;
234
235 if (power_on)
236 msleep(INV_MPU6050_REG_UP_TIME);
237
238 return 0;
239}
240
241/**
242 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
243 *
244 * Initial configuration:
245 * FSR: ± 2000DPS
246 * DLPF: 20Hz
247 * FIFO rate: 50Hz
248 * Clock source: Gyro PLL
249 */
250static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
251{
252 int result;
253 u8 d;
254 struct inv_mpu6050_state *st = iio_priv(indio_dev);
255
256 result = inv_mpu6050_set_power_itg(st, true);
257 if (result)
258 return result;
259 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
260 result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d);
261 if (result)
262 return result;
263
264 d = INV_MPU6050_FILTER_20HZ;
265 result = inv_mpu6050_write_reg(st, st->reg->lpf, d);
266 if (result)
267 return result;
268
269 d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1;
270 result = inv_mpu6050_write_reg(st, st->reg->sample_rate_div, d);
271 if (result)
272 return result;
273
274 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
275 result = inv_mpu6050_write_reg(st, st->reg->accl_config, d);
276 if (result)
277 return result;
278
279 memcpy(&st->chip_config, hw_info[st->chip_type].config,
280 sizeof(struct inv_mpu6050_chip_config));
281 result = inv_mpu6050_set_power_itg(st, false);
282
283 return result;
284}
285
286static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
287 int axis, int *val)
288{
289 int ind, result;
290 __be16 d;
291
292 ind = (axis - IIO_MOD_X) * 2;
293 result = i2c_smbus_read_i2c_block_data(st->client, reg + ind, 2,
294 (u8 *)&d);
295 if (result != 2)
296 return -EINVAL;
297 *val = (short)be16_to_cpup(&d);
298
299 return IIO_VAL_INT;
300}
301
302static int inv_mpu6050_read_raw(struct iio_dev *indio_dev,
303 struct iio_chan_spec const *chan,
304 int *val,
305 int *val2,
306 long mask) {
307 struct inv_mpu6050_state *st = iio_priv(indio_dev);
308
309 switch (mask) {
310 case IIO_CHAN_INFO_RAW:
311 {
312 int ret, result;
313
314 ret = IIO_VAL_INT;
315 result = 0;
316 mutex_lock(&indio_dev->mlock);
317 if (!st->chip_config.enable) {
318 result = inv_mpu6050_set_power_itg(st, true);
319 if (result)
320 goto error_read_raw;
321 }
322 /* when enable is on, power is already on */
323 switch (chan->type) {
324 case IIO_ANGL_VEL:
325 if (!st->chip_config.gyro_fifo_enable ||
326 !st->chip_config.enable) {
327 result = inv_mpu6050_switch_engine(st, true,
328 INV_MPU6050_BIT_PWR_GYRO_STBY);
329 if (result)
330 goto error_read_raw;
331 }
332 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
333 chan->channel2, val);
334 if (!st->chip_config.gyro_fifo_enable ||
335 !st->chip_config.enable) {
336 result = inv_mpu6050_switch_engine(st, false,
337 INV_MPU6050_BIT_PWR_GYRO_STBY);
338 if (result)
339 goto error_read_raw;
340 }
341 break;
342 case IIO_ACCEL:
343 if (!st->chip_config.accl_fifo_enable ||
344 !st->chip_config.enable) {
345 result = inv_mpu6050_switch_engine(st, true,
346 INV_MPU6050_BIT_PWR_ACCL_STBY);
347 if (result)
348 goto error_read_raw;
349 }
350 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
351 chan->channel2, val);
352 if (!st->chip_config.accl_fifo_enable ||
353 !st->chip_config.enable) {
354 result = inv_mpu6050_switch_engine(st, false,
355 INV_MPU6050_BIT_PWR_ACCL_STBY);
356 if (result)
357 goto error_read_raw;
358 }
359 break;
360 case IIO_TEMP:
361 /* wait for stablization */
362 msleep(INV_MPU6050_SENSOR_UP_TIME);
363 inv_mpu6050_sensor_show(st, st->reg->temperature,
364 IIO_MOD_X, val);
365 break;
366 default:
367 ret = -EINVAL;
368 break;
369 }
370error_read_raw:
371 if (!st->chip_config.enable)
372 result |= inv_mpu6050_set_power_itg(st, false);
373 mutex_unlock(&indio_dev->mlock);
374 if (result)
375 return result;
376
377 return ret;
378 }
379 case IIO_CHAN_INFO_SCALE:
380 switch (chan->type) {
381 case IIO_ANGL_VEL:
382 *val = 0;
383 *val2 = gyro_scale_6050[st->chip_config.fsr];
384
385 return IIO_VAL_INT_PLUS_NANO;
386 case IIO_ACCEL:
387 *val = 0;
388 *val2 = accel_scale[st->chip_config.accl_fs];
389
390 return IIO_VAL_INT_PLUS_MICRO;
391 case IIO_TEMP:
392 *val = 0;
393 *val2 = INV_MPU6050_TEMP_SCALE;
394
395 return IIO_VAL_INT_PLUS_MICRO;
396 default:
397 return -EINVAL;
398 }
399 case IIO_CHAN_INFO_OFFSET:
400 switch (chan->type) {
401 case IIO_TEMP:
402 *val = INV_MPU6050_TEMP_OFFSET;
403
404 return IIO_VAL_INT;
405 default:
406 return -EINVAL;
407 }
408 default:
409 return -EINVAL;
410 }
411}
412
413static int inv_mpu6050_write_fsr(struct inv_mpu6050_state *st, int fsr)
414{
415 int result;
416 u8 d;
417
418 if (fsr < 0 || fsr > INV_MPU6050_MAX_GYRO_FS_PARAM)
419 return -EINVAL;
420 if (fsr == st->chip_config.fsr)
421 return 0;
422
423 d = (fsr << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
424 result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d);
425 if (result)
426 return result;
427 st->chip_config.fsr = fsr;
428
429 return 0;
430}
431
432static int inv_mpu6050_write_accel_fs(struct inv_mpu6050_state *st, int fs)
433{
434 int result;
435 u8 d;
436
437 if (fs < 0 || fs > INV_MPU6050_MAX_ACCL_FS_PARAM)
438 return -EINVAL;
439 if (fs == st->chip_config.accl_fs)
440 return 0;
441
442 d = (fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
443 result = inv_mpu6050_write_reg(st, st->reg->accl_config, d);
444 if (result)
445 return result;
446 st->chip_config.accl_fs = fs;
447
448 return 0;
449}
450
451static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
452 struct iio_chan_spec const *chan,
453 int val,
454 int val2,
455 long mask) {
456 struct inv_mpu6050_state *st = iio_priv(indio_dev);
457 int result;
458
459 mutex_lock(&indio_dev->mlock);
460 /* we should only update scale when the chip is disabled, i.e.,
461 not running */
462 if (st->chip_config.enable) {
463 result = -EBUSY;
464 goto error_write_raw;
465 }
466 result = inv_mpu6050_set_power_itg(st, true);
467 if (result)
468 goto error_write_raw;
469
470 switch (mask) {
471 case IIO_CHAN_INFO_SCALE:
472 switch (chan->type) {
473 case IIO_ANGL_VEL:
474 result = inv_mpu6050_write_fsr(st, val);
475 break;
476 case IIO_ACCEL:
477 result = inv_mpu6050_write_accel_fs(st, val);
478 break;
479 default:
480 result = -EINVAL;
481 break;
482 }
483 break;
484 default:
485 result = -EINVAL;
486 break;
487 }
488
489error_write_raw:
490 result |= inv_mpu6050_set_power_itg(st, false);
491 mutex_unlock(&indio_dev->mlock);
492
493 return result;
494}
495
496/**
497 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate.
498 *
499 * Based on the Nyquist principle, the sampling rate must
500 * exceed twice of the bandwidth of the signal, or there
501 * would be alising. This function basically search for the
502 * correct low pass parameters based on the fifo rate, e.g,
503 * sampling frequency.
504 */
505static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
506{
507 const int hz[] = {188, 98, 42, 20, 10, 5};
508 const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
509 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
510 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ};
511 int i, h, result;
512 u8 data;
513
514 h = (rate >> 1);
515 i = 0;
516 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
517 i++;
518 data = d[i];
519 result = inv_mpu6050_write_reg(st, st->reg->lpf, data);
520 if (result)
521 return result;
522 st->chip_config.lpf = data;
523
524 return 0;
525}
526
527/**
528 * inv_mpu6050_fifo_rate_store() - Set fifo rate.
529 */
530static ssize_t inv_mpu6050_fifo_rate_store(struct device *dev,
531 struct device_attribute *attr, const char *buf, size_t count)
532{
533 s32 fifo_rate;
534 u8 d;
535 int result;
536 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
537 struct inv_mpu6050_state *st = iio_priv(indio_dev);
538
539 if (kstrtoint(buf, 10, &fifo_rate))
540 return -EINVAL;
541 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
542 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
543 return -EINVAL;
544 if (fifo_rate == st->chip_config.fifo_rate)
545 return count;
546
547 mutex_lock(&indio_dev->mlock);
548 if (st->chip_config.enable) {
549 result = -EBUSY;
550 goto fifo_rate_fail;
551 }
552 result = inv_mpu6050_set_power_itg(st, true);
553 if (result)
554 goto fifo_rate_fail;
555
556 d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1;
557 result = inv_mpu6050_write_reg(st, st->reg->sample_rate_div, d);
558 if (result)
559 goto fifo_rate_fail;
560 st->chip_config.fifo_rate = fifo_rate;
561
562 result = inv_mpu6050_set_lpf(st, fifo_rate);
563 if (result)
564 goto fifo_rate_fail;
565
566fifo_rate_fail:
567 result |= inv_mpu6050_set_power_itg(st, false);
568 mutex_unlock(&indio_dev->mlock);
569 if (result)
570 return result;
571
572 return count;
573}
574
575/**
576 * inv_fifo_rate_show() - Get the current sampling rate.
577 */
578static ssize_t inv_fifo_rate_show(struct device *dev,
579 struct device_attribute *attr, char *buf)
580{
581 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
582
583 return sprintf(buf, "%d\n", st->chip_config.fifo_rate);
584}
585
586/**
587 * inv_attr_show() - calling this function will show current
588 * parameters.
589 */
590static ssize_t inv_attr_show(struct device *dev,
591 struct device_attribute *attr, char *buf)
592{
593 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
594 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
595 s8 *m;
596
597 switch (this_attr->address) {
598 /* In MPU6050, the two matrix are the same because gyro and accel
599 are integrated in one chip */
600 case ATTR_GYRO_MATRIX:
601 case ATTR_ACCL_MATRIX:
602 m = st->plat_data.orientation;
603
604 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
605 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
606 default:
607 return -EINVAL;
608 }
609}
610
611/**
612 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense
613 * MPU6050 device.
614 * @indio_dev: The IIO device
615 * @trig: The new trigger
616 *
617 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050
618 * device, -EINVAL otherwise.
619 */
620static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
621 struct iio_trigger *trig)
622{
623 struct inv_mpu6050_state *st = iio_priv(indio_dev);
624
625 if (st->trig != trig)
626 return -EINVAL;
627
628 return 0;
629}
630
631#define INV_MPU6050_CHAN(_type, _channel2, _index) \
632 { \
633 .type = _type, \
634 .modified = 1, \
635 .channel2 = _channel2, \
0b1f8da3
JC		 636 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
637 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
09a642b7
GG		 638 .scan_index = _index, \
639 .scan_type = { \
640 .sign = 's', \
641 .realbits = 16, \
642 .storagebits = 16, \
643 .shift = 0 , \
644 .endianness = IIO_BE, \
645 }, \
646 }
647
648static const struct iio_chan_spec inv_mpu_channels[] = {
649 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
650 /*
651 * Note that temperature should only be via polled reading only,
652 * not the final scan elements output.
653 */
654 {
655 .type = IIO_TEMP,
0b1f8da3
JC		 656 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
657 | BIT(IIO_CHAN_INFO_OFFSET)
658 | BIT(IIO_CHAN_INFO_SCALE),
09a642b7
GG		 659 .scan_index = -1,
660 },
661 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
662 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
663 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
664
665 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
666 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
667 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
668};
669
670/* constant IIO attribute */
671static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
672static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
673 inv_mpu6050_fifo_rate_store);
674static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
675 ATTR_GYRO_MATRIX);
676static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
677 ATTR_ACCL_MATRIX);
678
679static struct attribute *inv_attributes[] = {
680 &iio_dev_attr_in_gyro_matrix.dev_attr.attr,
681 &iio_dev_attr_in_accel_matrix.dev_attr.attr,
682 &iio_dev_attr_sampling_frequency.dev_attr.attr,
683 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
684 NULL,
685};
686
687static const struct attribute_group inv_attribute_group = {
688 .attrs = inv_attributes
689};
690
691static const struct iio_info mpu_info = {
692 .driver_module = THIS_MODULE,
693 .read_raw = &inv_mpu6050_read_raw,
694 .write_raw = &inv_mpu6050_write_raw,
695 .attrs = &inv_attribute_group,
696 .validate_trigger = inv_mpu6050_validate_trigger,
697};
698
699/**
700 * inv_check_and_setup_chip() - check and setup chip.
701 */
702static int inv_check_and_setup_chip(struct inv_mpu6050_state *st,
703 const struct i2c_device_id *id)
704{
705 int result;
706
707 st->chip_type = INV_MPU6050;
708 st->hw = &hw_info[st->chip_type];
709 st->reg = hw_info[st->chip_type].reg;
710
711 /* reset to make sure previous state are not there */
712 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1,
713 INV_MPU6050_BIT_H_RESET);
714 if (result)
715 return result;
716 msleep(INV_MPU6050_POWER_UP_TIME);
717 /* toggle power state. After reset, the sleep bit could be on
718 or off depending on the OTP settings. Toggling power would
719 make it in a definite state as well as making the hardware
720 state align with the software state */
721 result = inv_mpu6050_set_power_itg(st, false);
722 if (result)
723 return result;
724 result = inv_mpu6050_set_power_itg(st, true);
725 if (result)
726 return result;
727
728 result = inv_mpu6050_switch_engine(st, false,
729 INV_MPU6050_BIT_PWR_ACCL_STBY);
730 if (result)
731 return result;
732 result = inv_mpu6050_switch_engine(st, false,
733 INV_MPU6050_BIT_PWR_GYRO_STBY);
734 if (result)
735 return result;
736
737 return 0;
738}
739
740/**
741 * inv_mpu_probe() - probe function.
742 * @client: i2c client.
743 * @id: i2c device id.
744 *
745 * Returns 0 on success, a negative error code otherwise.
746 */
747static int inv_mpu_probe(struct i2c_client *client,
748 const struct i2c_device_id *id)
749{
750 struct inv_mpu6050_state *st;
751 struct iio_dev *indio_dev;
b9b3a418 752 struct inv_mpu6050_platform_data *pdata;
09a642b7
GG		 753 int result;
754
755 if (!i2c_check_functionality(client->adapter,
452204ae
SK		 756 I2C_FUNC_SMBUS_I2C_BLOCK))
757 return -ENOSYS;
758
759 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
760 if (!indio_dev)
761 return -ENOMEM;
2ffdcd3d 762
09a642b7
GG		 763 st = iio_priv(indio_dev);
764 st->client = client;
3a2ecc3d 765 st->powerup_count = 0;
63d1157d 766 pdata = dev_get_platdata(&client->dev);
b9b3a418
AF		 767 if (pdata)
768 st->plat_data = *pdata;
09a642b7
GG		 769 /* power is turned on inside check chip type*/
770 result = inv_check_and_setup_chip(st, id);
771 if (result)
452204ae 772 return result;
09a642b7
GG		 773
774 result = inv_mpu6050_init_config(indio_dev);
775 if (result) {
776 dev_err(&client->dev,
777 "Could not initialize device.\n");
452204ae 778 return result;
09a642b7
GG		 779 }
780
781 i2c_set_clientdata(client, indio_dev);
782 indio_dev->dev.parent = &client->dev;
783 indio_dev->name = id->name;
784 indio_dev->channels = inv_mpu_channels;
785 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
786
787 indio_dev->info = &mpu_info;
788 indio_dev->modes = INDIO_BUFFER_TRIGGERED;
789
790 result = iio_triggered_buffer_setup(indio_dev,
791 inv_mpu6050_irq_handler,
792 inv_mpu6050_read_fifo,
793 NULL);
794 if (result) {
795 dev_err(&st->client->dev, "configure buffer fail %d\n",
796 result);
452204ae 797 return result;
09a642b7
GG		 798 }
799 result = inv_mpu6050_probe_trigger(indio_dev);
800 if (result) {
801 dev_err(&st->client->dev, "trigger probe fail %d\n", result);
802 goto out_unreg_ring;
803 }
804
805 INIT_KFIFO(st->timestamps);
806 spin_lock_init(&st->time_stamp_lock);
807 result = iio_device_register(indio_dev);
808 if (result) {
809 dev_err(&st->client->dev, "IIO register fail %d\n", result);
810 goto out_remove_trigger;
811 }
812
3a2ecc3d
SP		 813 st->mux_adapter = i2c_add_mux_adapter(client->adapter,
814 &client->dev,
815 indio_dev,
816 0, 0, 0,
817 inv_mpu6050_select_bypass,
818 inv_mpu6050_deselect_bypass);
819 if (!st->mux_adapter) {
820 result = -ENODEV;
821 goto out_unreg_device;
822 }
823
09a642b7
GG		 824 return 0;
825
3a2ecc3d
SP		 826out_unreg_device:
827 iio_device_unregister(indio_dev);
09a642b7
GG		 828out_remove_trigger:
829 inv_mpu6050_remove_trigger(st);
830out_unreg_ring:
831 iio_triggered_buffer_cleanup(indio_dev);
09a642b7
GG		 832 return result;
833}
834
835static int inv_mpu_remove(struct i2c_client *client)
836{
837 struct iio_dev *indio_dev = i2c_get_clientdata(client);
838 struct inv_mpu6050_state *st = iio_priv(indio_dev);
839
3a2ecc3d 840 i2c_del_mux_adapter(st->mux_adapter);
09a642b7
GG		 841 iio_device_unregister(indio_dev);
842 inv_mpu6050_remove_trigger(st);
843 iio_triggered_buffer_cleanup(indio_dev);
09a642b7
GG		 844
845 return 0;
846}
847#ifdef CONFIG_PM_SLEEP
848
849static int inv_mpu_resume(struct device *dev)
850{
851 return inv_mpu6050_set_power_itg(
852 iio_priv(i2c_get_clientdata(to_i2c_client(dev))), true);
853}
854
855static int inv_mpu_suspend(struct device *dev)
856{
857 return inv_mpu6050_set_power_itg(
858 iio_priv(i2c_get_clientdata(to_i2c_client(dev))), false);
859}
860static SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
861
862#define INV_MPU6050_PMOPS (&inv_mpu_pmops)
863#else
864#define INV_MPU6050_PMOPS NULL
865#endif /* CONFIG_PM_SLEEP */
866
867/*
868 * device id table is used to identify what device can be
869 * supported by this driver
870 */
871static const struct i2c_device_id inv_mpu_id[] = {
872 {"mpu6050", INV_MPU6050},
6f174fd3 873 {"mpu6500", INV_MPU6500},
09a642b7
GG		 874 {}
875};
876
877MODULE_DEVICE_TABLE(i2c, inv_mpu_id);
878
6ed5ac50
SP		 879static const struct acpi_device_id inv_acpi_match[] = {
880 {"INVN6500", 0},
881 { },
882};
883
884MODULE_DEVICE_TABLE(acpi, inv_acpi_match);
885
09a642b7
GG		 886static struct i2c_driver inv_mpu_driver = {
887 .probe = inv_mpu_probe,
888 .remove = inv_mpu_remove,
889 .id_table = inv_mpu_id,
890 .driver = {
891 .owner = THIS_MODULE,
892 .name = "inv-mpu6050",
893 .pm = INV_MPU6050_PMOPS,
6ed5ac50 894 .acpi_match_table = ACPI_PTR(inv_acpi_match),
09a642b7
GG		 895 },
896};
897
898module_i2c_driver(inv_mpu_driver);
899
900MODULE_AUTHOR("Invensense Corporation");
901MODULE_DESCRIPTION("Invensense device MPU6050 driver");
902MODULE_LICENSE("GPL");
Michael's Linux tree.