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irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
[thirdparty/kernel/stable.git] / drivers / irqchip / irq-crossbar.c
CommitLineData
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1/*
2 * drivers/irqchip/irq-crossbar.c
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
5 * Author: Sricharan R <r.sricharan@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 */
12#include <linux/err.h>
13#include <linux/io.h>
14#include <linux/of_address.h>
15#include <linux/of_irq.h>
16#include <linux/slab.h>
17#include <linux/irqchip/arm-gic.h>
4dbf45e3 18#include <linux/irqchip/irq-crossbar.h>
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19
20#define IRQ_FREE -1
1d50d2ce 21#define IRQ_RESERVED -2
64e0f8ba 22#define IRQ_SKIP -3
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23#define GIC_IRQ_START 32
24
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25/**
26 * struct crossbar_device - crossbar device description
96ca848e 27 * @int_max: maximum number of supported interrupts
a35057d1 28 * @safe_map: safe default value to initialize the crossbar
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29 * @irq_map: array of interrupts to crossbar number mapping
30 * @crossbar_base: crossbar base address
31 * @register_offsets: offsets for each irq number
e30ef8ab 32 * @write: register write function pointer
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33 */
34struct crossbar_device {
35 uint int_max;
a35057d1 36 uint safe_map;
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37 uint *irq_map;
38 void __iomem *crossbar_base;
39 int *register_offsets;
a35057d1 40 void (*write)(int, int);
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41};
42
43static struct crossbar_device *cb;
44
45static inline void crossbar_writel(int irq_no, int cb_no)
46{
47 writel(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
48}
49
50static inline void crossbar_writew(int irq_no, int cb_no)
51{
52 writew(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
53}
54
55static inline void crossbar_writeb(int irq_no, int cb_no)
56{
57 writeb(cb_no, cb->crossbar_base + cb->register_offsets[irq_no]);
58}
59
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60static inline int get_prev_map_irq(int cb_no)
61{
62 int i;
63
ddee0fb4 64 for (i = cb->int_max - 1; i >= 0; i--)
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65 if (cb->irq_map[i] == cb_no)
66 return i;
67
68 return -ENODEV;
69}
70
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71static inline int allocate_free_irq(int cb_no)
72{
73 int i;
74
ddee0fb4 75 for (i = cb->int_max - 1; i >= 0; i--) {
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76 if (cb->irq_map[i] == IRQ_FREE) {
77 cb->irq_map[i] = cb_no;
78 return i;
79 }
80 }
81
82 return -ENODEV;
83}
84
85static int crossbar_domain_map(struct irq_domain *d, unsigned int irq,
86 irq_hw_number_t hw)
87{
88 cb->write(hw - GIC_IRQ_START, cb->irq_map[hw - GIC_IRQ_START]);
89 return 0;
90}
91
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92/**
93 * crossbar_domain_unmap - unmap a crossbar<->irq connection
94 * @d: domain of irq to unmap
95 * @irq: virq number
96 *
97 * We do not maintain a use count of total number of map/unmap
98 * calls for a particular irq to find out if a irq can be really
99 * unmapped. This is because unmap is called during irq_dispose_mapping(irq),
100 * after which irq is anyways unusable. So an explicit map has to be called
101 * after that.
102 */
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103static void crossbar_domain_unmap(struct irq_domain *d, unsigned int irq)
104{
105 irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
106
a35057d1 107 if (hw > GIC_IRQ_START) {
96ca848e 108 cb->irq_map[hw - GIC_IRQ_START] = IRQ_FREE;
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109 cb->write(hw - GIC_IRQ_START, cb->safe_map);
110 }
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111}
112
113static int crossbar_domain_xlate(struct irq_domain *d,
114 struct device_node *controller,
115 const u32 *intspec, unsigned int intsize,
116 unsigned long *out_hwirq,
117 unsigned int *out_type)
118{
d4922a95 119 int ret;
96ca848e 120
6f16fc87 121 ret = get_prev_map_irq(intspec[1]);
d4922a95 122 if (ret >= 0)
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123 goto found;
124
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125 ret = allocate_free_irq(intspec[1]);
126
d4922a95 127 if (ret < 0)
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128 return ret;
129
6f16fc87 130found:
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131 *out_hwirq = ret + GIC_IRQ_START;
132 return 0;
133}
134
4dbf45e3 135static const struct irq_domain_ops routable_irq_domain_ops = {
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136 .map = crossbar_domain_map,
137 .unmap = crossbar_domain_unmap,
138 .xlate = crossbar_domain_xlate
139};
140
141static int __init crossbar_of_init(struct device_node *node)
142{
edb442de 143 int i, size, max = 0, reserved = 0, entry;
96ca848e 144 const __be32 *irqsr;
edb442de 145 int ret = -ENOMEM;
96ca848e 146
3894e9e8 147 cb = kzalloc(sizeof(*cb), GFP_KERNEL);
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148
149 if (!cb)
edb442de 150 return ret;
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151
152 cb->crossbar_base = of_iomap(node, 0);
153 if (!cb->crossbar_base)
3c44d515 154 goto err_cb;
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155
156 of_property_read_u32(node, "ti,max-irqs", &max);
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157 if (!max) {
158 pr_err("missing 'ti,max-irqs' property\n");
159 ret = -EINVAL;
3c44d515 160 goto err_base;
edb442de 161 }
4dbf45e3 162 cb->irq_map = kcalloc(max, sizeof(int), GFP_KERNEL);
96ca848e 163 if (!cb->irq_map)
3c44d515 164 goto err_base;
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165
166 cb->int_max = max;
167
168 for (i = 0; i < max; i++)
169 cb->irq_map[i] = IRQ_FREE;
170
171 /* Get and mark reserved irqs */
172 irqsr = of_get_property(node, "ti,irqs-reserved", &size);
173 if (irqsr) {
174 size /= sizeof(__be32);
175
176 for (i = 0; i < size; i++) {
177 of_property_read_u32_index(node,
178 "ti,irqs-reserved",
179 i, &entry);
180 if (entry > max) {
181 pr_err("Invalid reserved entry\n");
edb442de 182 ret = -EINVAL;
3c44d515 183 goto err_irq_map;
96ca848e 184 }
1d50d2ce 185 cb->irq_map[entry] = IRQ_RESERVED;
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186 }
187 }
188
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189 /* Skip irqs hardwired to bypass the crossbar */
190 irqsr = of_get_property(node, "ti,irqs-skip", &size);
191 if (irqsr) {
192 size /= sizeof(__be32);
193
194 for (i = 0; i < size; i++) {
195 of_property_read_u32_index(node,
196 "ti,irqs-skip",
197 i, &entry);
198 if (entry > max) {
199 pr_err("Invalid skip entry\n");
200 ret = -EINVAL;
3c44d515 201 goto err_irq_map;
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202 }
203 cb->irq_map[entry] = IRQ_SKIP;
204 }
205 }
206
207
4dbf45e3 208 cb->register_offsets = kcalloc(max, sizeof(int), GFP_KERNEL);
96ca848e 209 if (!cb->register_offsets)
3c44d515 210 goto err_irq_map;
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211
212 of_property_read_u32(node, "ti,reg-size", &size);
213
214 switch (size) {
215 case 1:
216 cb->write = crossbar_writeb;
217 break;
218 case 2:
219 cb->write = crossbar_writew;
220 break;
221 case 4:
222 cb->write = crossbar_writel;
223 break;
224 default:
225 pr_err("Invalid reg-size property\n");
edb442de 226 ret = -EINVAL;
3c44d515 227 goto err_reg_offset;
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228 break;
229 }
230
231 /*
232 * Register offsets are not linear because of the
233 * reserved irqs. so find and store the offsets once.
234 */
235 for (i = 0; i < max; i++) {
1d50d2ce 236 if (cb->irq_map[i] == IRQ_RESERVED)
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237 continue;
238
239 cb->register_offsets[i] = reserved;
240 reserved += size;
241 }
242
a35057d1 243 of_property_read_u32(node, "ti,irqs-safe-map", &cb->safe_map);
a35057d1
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244 /* Initialize the crossbar with safe map to start with */
245 for (i = 0; i < max; i++) {
246 if (cb->irq_map[i] == IRQ_RESERVED ||
247 cb->irq_map[i] == IRQ_SKIP)
248 continue;
249
250 cb->write(i, cb->safe_map);
251 }
252
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253 register_routable_domain_ops(&routable_irq_domain_ops);
254 return 0;
255
3c44d515 256err_reg_offset:
96ca848e 257 kfree(cb->register_offsets);
3c44d515 258err_irq_map:
96ca848e 259 kfree(cb->irq_map);
3c44d515 260err_base:
96ca848e 261 iounmap(cb->crossbar_base);
3c44d515 262err_cb:
96ca848e 263 kfree(cb);
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264
265 cb = NULL;
edb442de 266 return ret;
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267}
268
269static const struct of_device_id crossbar_match[] __initconst = {
270 { .compatible = "ti,irq-crossbar" },
271 {}
272};
273
274int __init irqcrossbar_init(void)
275{
276 struct device_node *np;
277 np = of_find_matching_node(NULL, crossbar_match);
278 if (!np)
279 return -ENODEV;
280
281 crossbar_of_init(np);
282 return 0;
283}