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[thirdparty/kernel/linux.git] / drivers / macintosh / via-pmu.c
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b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT		 2/*
3 * Device driver for the via-pmu on Apple Powermacs.
4 *
5 * The VIA (versatile interface adapter) interfaces to the PMU,
6 * a 6805 microprocessor core whose primary function is to control
7 * battery charging and system power on the PowerBook 3400 and 2400.
8 * The PMU also controls the ADB (Apple Desktop Bus) which connects
9 * to the keyboard and mouse, as well as the non-volatile RAM
10 * and the RTC (real time clock) chip.
11 *
12 * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
13 * Copyright (C) 2001-2002 Benjamin Herrenschmidt
f91266ed 14 * Copyright (C) 2006-2007 Johannes Berg
1da177e4
LT		 15 *
16 * THIS DRIVER IS BECOMING A TOTAL MESS !
17 * - Cleanup atomically disabling reply to PMU events after
18 * a sleep or a freq. switch
1da177e4
LT		 19 *
20 */
21#include <stdarg.h>
d851b6e0 22#include <linux/mutex.h>
1da177e4
LT		 23#include <linux/types.h>
24#include <linux/errno.h>
25#include <linux/kernel.h>
26#include <linux/delay.h>
174cd4b1 27#include <linux/sched/signal.h>
1da177e4
LT		 28#include <linux/miscdevice.h>
29#include <linux/blkdev.h>
30#include <linux/pci.h>
31#include <linux/slab.h>
32#include <linux/poll.h>
33#include <linux/adb.h>
34#include <linux/pmu.h>
35#include <linux/cuda.h>
1da177e4
LT		 36#include <linux/module.h>
37#include <linux/spinlock.h>
38#include <linux/pm.h>
39#include <linux/proc_fs.h>
9d2f7342 40#include <linux/seq_file.h>
1da177e4
LT		 41#include <linux/init.h>
42#include <linux/interrupt.h>
43#include <linux/device.h>
e83b906c 44#include <linux/syscore_ops.h>
7dfb7103 45#include <linux/freezer.h>
1da177e4 46#include <linux/syscalls.h>
6002f544 47#include <linux/suspend.h>
1da177e4 48#include <linux/cpu.h>
4cc4587f 49#include <linux/compat.h>
5af50730
RH		 50#include <linux/of_address.h>
51#include <linux/of_irq.h>
1da177e4
LT		 52#include <asm/prom.h>
53#include <asm/machdep.h>
54#include <asm/io.h>
55#include <asm/pgtable.h>
1da177e4
LT		 56#include <asm/sections.h>
57#include <asm/irq.h>
58#include <asm/pmac_feature.h>
5b9ca526
BH		 59#include <asm/pmac_pfunc.h>
60#include <asm/pmac_low_i2c.h>
7c0f6ba6 61#include <linux/uaccess.h>
1da177e4
LT		 62#include <asm/mmu_context.h>
63#include <asm/cputable.h>
64#include <asm/time.h>
1da177e4 65#include <asm/backlight.h>
1da177e4 66
9e8e30a0
JB		 67#include "via-pmu-event.h"
68
1da177e4 69/* Some compile options */
f91266ed 70#undef DEBUG_SLEEP
1da177e4
LT		 71
72/* Misc minor number allocated for /dev/pmu */
73#define PMU_MINOR 154
74
75/* How many iterations between battery polls */
76#define BATTERY_POLLING_COUNT 2
77
d851b6e0 78static DEFINE_MUTEX(pmu_info_proc_mutex);
1da177e4
LT		 79static volatile unsigned char __iomem *via;
80
81/* VIA registers - spaced 0x200 bytes apart */
82#define RS 0x200 /* skip between registers */
83#define B 0 /* B-side data */
84#define A RS /* A-side data */
85#define DIRB (2*RS) /* B-side direction (1=output) */
86#define DIRA (3*RS) /* A-side direction (1=output) */
87#define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
88#define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
89#define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
90#define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
91#define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
92#define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
93#define SR (10*RS) /* Shift register */
94#define ACR (11*RS) /* Auxiliary control register */
95#define PCR (12*RS) /* Peripheral control register */
96#define IFR (13*RS) /* Interrupt flag register */
97#define IER (14*RS) /* Interrupt enable register */
98#define ANH (15*RS) /* A-side data, no handshake */
99
100/* Bits in B data register: both active low */
101#define TACK 0x08 /* Transfer acknowledge (input) */
102#define TREQ 0x10 /* Transfer request (output) */
103
104/* Bits in ACR */
105#define SR_CTRL 0x1c /* Shift register control bits */
106#define SR_EXT 0x0c /* Shift on external clock */
107#define SR_OUT 0x10 /* Shift out if 1 */
108
109/* Bits in IFR and IER */
110#define IER_SET 0x80 /* set bits in IER */
111#define IER_CLR 0 /* clear bits in IER */
112#define SR_INT 0x04 /* Shift register full/empty */
113#define CB2_INT 0x08
114#define CB1_INT 0x10 /* transition on CB1 input */
115
116static volatile enum pmu_state {
117 idle,
118 sending,
119 intack,
120 reading,
121 reading_intr,
122 locked,
123} pmu_state;
124
125static volatile enum int_data_state {
126 int_data_empty,
127 int_data_fill,
128 int_data_ready,
129 int_data_flush
130} int_data_state[2] = { int_data_empty, int_data_empty };
131
132static struct adb_request *current_req;
133static struct adb_request *last_req;
134static struct adb_request *req_awaiting_reply;
135static unsigned char interrupt_data[2][32];
136static int interrupt_data_len[2];
137static int int_data_last;
138static unsigned char *reply_ptr;
139static int data_index;
140static int data_len;
141static volatile int adb_int_pending;
142static volatile int disable_poll;
1da177e4
LT		 143static struct device_node *vias;
144static int pmu_kind = PMU_UNKNOWN;
87275856 145static int pmu_fully_inited;
1da177e4 146static int pmu_has_adb;
51d3082f 147static struct device_node *gpio_node;
87275856 148static unsigned char __iomem *gpio_reg;
ef24ba70 149static int gpio_irq = 0;
1da177e4 150static int gpio_irq_enabled = -1;
87275856 151static volatile int pmu_suspended;
1da177e4
LT		 152static spinlock_t pmu_lock;
153static u8 pmu_intr_mask;
154static int pmu_version;
155static int drop_interrupts;
f91266ed 156#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4 157static int option_lid_wakeup = 1;
f91266ed 158#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 159static unsigned long async_req_locks;
160static unsigned int pmu_irq_stats[11];
161
162static struct proc_dir_entry *proc_pmu_root;
163static struct proc_dir_entry *proc_pmu_info;
164static struct proc_dir_entry *proc_pmu_irqstats;
165static struct proc_dir_entry *proc_pmu_options;
166static int option_server_mode;
167
1da177e4
LT		 168int pmu_battery_count;
169int pmu_cur_battery;
a334bdbd 170unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
1da177e4
LT		 171struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
172static int query_batt_timer = BATTERY_POLLING_COUNT;
173static struct adb_request batt_req;
174static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
1da177e4 175
1da177e4
LT		 176int __fake_sleep;
177int asleep;
1da177e4
LT		 178
179#ifdef CONFIG_ADB
87275856 180static int adb_dev_map;
1da177e4
LT		 181static int pmu_adb_flags;
182
183static int pmu_probe(void);
184static int pmu_init(void);
185static int pmu_send_request(struct adb_request *req, int sync);
186static int pmu_adb_autopoll(int devs);
187static int pmu_adb_reset_bus(void);
188#endif /* CONFIG_ADB */
189
190static int init_pmu(void);
1da177e4 191static void pmu_start(void);
7d12e780
DH		 192static irqreturn_t via_pmu_interrupt(int irq, void *arg);
193static irqreturn_t gpio1_interrupt(int irq, void *arg);
9d2f7342
AD		 194static const struct file_operations pmu_info_proc_fops;
195static const struct file_operations pmu_irqstats_proc_fops;
1da177e4 196static void pmu_pass_intr(unsigned char *data, int len);
9d2f7342
AD		 197static const struct file_operations pmu_battery_proc_fops;
198static const struct file_operations pmu_options_proc_fops;
1da177e4
LT		 199
200#ifdef CONFIG_ADB
201struct adb_driver via_pmu_driver = {
202 "PMU",
203 pmu_probe,
204 pmu_init,
205 pmu_send_request,
206 pmu_adb_autopoll,
207 pmu_poll_adb,
208 pmu_adb_reset_bus
209};
210#endif /* CONFIG_ADB */
211
212extern void low_sleep_handler(void);
213extern void enable_kernel_altivec(void);
214extern void enable_kernel_fp(void);
215
216#ifdef DEBUG_SLEEP
217int pmu_polled_request(struct adb_request *req);
f91266ed 218void pmu_blink(int n);
1da177e4
LT		 219#endif
220
221/*
222 * This table indicates for each PMU opcode:
223 * - the number of data bytes to be sent with the command, or -1
224 * if a length byte should be sent,
225 * - the number of response bytes which the PMU will return, or
226 * -1 if it will send a length byte.
227 */
aacaf9bd 228static const s8 pmu_data_len[256][2] = {
1da177e4
LT		 229/* 0 1 2 3 4 5 6 7 */
230/*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
231/*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
232/*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
233/*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
234/*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
235/*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
236/*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
237/*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
238/*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
239/*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
240/*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
241/*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
242/*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
243/*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
244/*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
245/*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
246/*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
247/*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
248/*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
249/*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
250/*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
251/*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
252/*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
253/*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
254/*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
255/*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
256/*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
257/*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
258/*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
259/*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
260/*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
261/*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
262};
263
264static char *pbook_type[] = {
265 "Unknown PowerBook",
266 "PowerBook 2400/3400/3500(G3)",
267 "PowerBook G3 Series",
268 "1999 PowerBook G3",
269 "Core99"
270};
271
51d3082f 272int __init find_via_pmu(void)
1da177e4 273{
cc5d0189 274 u64 taddr;
018a3d1d 275 const u32 *reg;
51d3082f 276
1da177e4
LT		 277 if (via != 0)
278 return 1;
51d3082f
BH		 279 vias = of_find_node_by_name(NULL, "via-pmu");
280 if (vias == NULL)
1da177e4 281 return 0;
1da177e4 282
01b2726d 283 reg = of_get_property(vias, "reg", NULL);
51d3082f
BH		 284 if (reg == NULL) {
285 printk(KERN_ERR "via-pmu: No \"reg\" property !\n");
286 goto fail;
287 }
288 taddr = of_translate_address(vias, reg);
bb6b9b28 289 if (taddr == OF_BAD_ADDR) {
51d3082f
BH		 290 printk(KERN_ERR "via-pmu: Can't translate address !\n");
291 goto fail;
1da177e4
LT		 292 }
293
294 spin_lock_init(&pmu_lock);
295
296 pmu_has_adb = 1;
297
298 pmu_intr_mask = PMU_INT_PCEJECT |
299 PMU_INT_SNDBRT |
300 PMU_INT_ADB |
301 PMU_INT_TICK;
302
303 if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
55b61fec 304 || of_device_is_compatible(vias->parent, "ohare")))
1da177e4 305 pmu_kind = PMU_OHARE_BASED;
55b61fec 306 else if (of_device_is_compatible(vias->parent, "paddington"))
1da177e4 307 pmu_kind = PMU_PADDINGTON_BASED;
55b61fec 308 else if (of_device_is_compatible(vias->parent, "heathrow"))
1da177e4 309 pmu_kind = PMU_HEATHROW_BASED;
55b61fec
SR		 310 else if (of_device_is_compatible(vias->parent, "Keylargo")
311 || of_device_is_compatible(vias->parent, "K2-Keylargo")) {
51d3082f 312 struct device_node *gpiop;
1658ab66 313 struct device_node *adbp;
cc5d0189 314 u64 gaddr = OF_BAD_ADDR;
1da177e4
LT		 315
316 pmu_kind = PMU_KEYLARGO_BASED;
1658ab66
SR		 317 adbp = of_find_node_by_type(NULL, "adb");
318 pmu_has_adb = (adbp != NULL);
319 of_node_put(adbp);
1da177e4
LT		 320 pmu_intr_mask = PMU_INT_PCEJECT |
321 PMU_INT_SNDBRT |
322 PMU_INT_ADB |
323 PMU_INT_TICK |
324 PMU_INT_ENVIRONMENT;
325
51d3082f
BH		 326 gpiop = of_find_node_by_name(NULL, "gpio");
327 if (gpiop) {
01b2726d 328 reg = of_get_property(gpiop, "reg", NULL);
51d3082f
BH		 329 if (reg)
330 gaddr = of_translate_address(gpiop, reg);
cc5d0189 331 if (gaddr != OF_BAD_ADDR)
51d3082f 332 gpio_reg = ioremap(gaddr, 0x10);
e702240e 333 of_node_put(gpiop);
1da177e4 334 }
61e37ca2 335 if (gpio_reg == NULL) {
51d3082f 336 printk(KERN_ERR "via-pmu: Can't find GPIO reg !\n");
ffa3eb01 337 goto fail;
61e37ca2 338 }
1da177e4
LT		 339 } else
340 pmu_kind = PMU_UNKNOWN;
341
51d3082f
BH		 342 via = ioremap(taddr, 0x2000);
343 if (via == NULL) {
344 printk(KERN_ERR "via-pmu: Can't map address !\n");
ffa3eb01 345 goto fail_via_remap;
51d3082f 346 }
1da177e4
LT		 347
348 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
349 out_8(&via[IFR], 0x7f); /* clear IFR */
350
351 pmu_state = idle;
352
ffa3eb01
PC		 353 if (!init_pmu())
354 goto fail_init;
1da177e4 355
bb6b9b28 356 printk(KERN_INFO "PMU driver v%d initialized for %s, firmware: %02x\n",
1da177e4
LT		 357 PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
358
359 sys_ctrler = SYS_CTRLER_PMU;
360
361 return 1;
ffa3eb01
PC		 362
363 fail_init:
364 iounmap(via);
365 via = NULL;
366 fail_via_remap:
61e37ca2
OH		 367 iounmap(gpio_reg);
368 gpio_reg = NULL;
ffa3eb01
PC		 369 fail:
370 of_node_put(vias);
51d3082f
BH		 371 vias = NULL;
372 return 0;
1da177e4
LT		 373}
374
375#ifdef CONFIG_ADB
51d3082f 376static int pmu_probe(void)
1da177e4
LT		 377{
378 return vias == NULL? -ENODEV: 0;
379}
380
51d3082f 381static int __init pmu_init(void)
1da177e4
LT		 382{
383 if (vias == NULL)
384 return -ENODEV;
385 return 0;
386}
387#endif /* CONFIG_ADB */
388
389/*
390 * We can't wait until pmu_init gets called, that happens too late.
391 * It happens after IDE and SCSI initialization, which can take a few
392 * seconds, and by that time the PMU could have given up on us and
393 * turned us off.
394 * Thus this is called with arch_initcall rather than device_initcall.
395 */
396static int __init via_pmu_start(void)
397{
0ebfff14
BH		 398 unsigned int irq;
399
1da177e4
LT		 400 if (vias == NULL)
401 return -ENODEV;
402
1da177e4 403 batt_req.complete = 1;
1da177e4 404
0ebfff14 405 irq = irq_of_parse_and_map(vias, 0);
ef24ba70 406 if (!irq) {
7b52b440 407 printk(KERN_ERR "via-pmu: can't map interrupt\n");
0ebfff14
BH		 408 return -ENODEV;
409 }
ba461f09
IC		 410 /* We set IRQF_NO_SUSPEND because we don't want the interrupt
411 * to be disabled between the 2 passes of driver suspend, we
412 * control our own disabling for that one
11a50873 413 */
ba461f09
IC		 414 if (request_irq(irq, via_pmu_interrupt, IRQF_NO_SUSPEND,
415 "VIA-PMU", (void *)0)) {
0ebfff14
BH		 416 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
417 return -ENODEV;
1da177e4
LT		 418 }
419
51d3082f
BH		 420 if (pmu_kind == PMU_KEYLARGO_BASED) {
421 gpio_node = of_find_node_by_name(NULL, "extint-gpio1");
422 if (gpio_node == NULL)
423 gpio_node = of_find_node_by_name(NULL,
424 "pmu-interrupt");
0ebfff14
BH		 425 if (gpio_node)
426 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
51d3082f 427
ef24ba70 428 if (gpio_irq) {
6c308215
JO		 429 if (request_irq(gpio_irq, gpio1_interrupt,
430 IRQF_NO_SUSPEND, "GPIO1 ADB",
431 (void *)0))
51d3082f
BH		 432 printk(KERN_ERR "pmu: can't get irq %d"
433 " (GPIO1)\n", gpio_irq);
434 else
435 gpio_irq_enabled = 1;
436 }
1da177e4
LT		 437 }
438
439 /* Enable interrupts */
440 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
441
442 pmu_fully_inited = 1;
443
444 /* Make sure PMU settle down before continuing. This is _very_ important
445 * since the IDE probe may shut interrupts down for quite a bit of time. If
446 * a PMU communication is pending while this happens, the PMU may timeout
447 * Not that on Core99 machines, the PMU keeps sending us environement
448 * messages, we should find a way to either fix IDE or make it call
449 * pmu_suspend() before masking interrupts. This can also happens while
450 * scolling with some fbdevs.
451 */
452 do {
453 pmu_poll();
454 } while (pmu_state != idle);
455
456 return 0;
457}
458
459arch_initcall(via_pmu_start);
460
461/*
462 * This has to be done after pci_init, which is a subsys_initcall.
463 */
464static int __init via_pmu_dev_init(void)
465{
466 if (vias == NULL)
467 return -ENODEV;
468
1da177e4 469#ifdef CONFIG_PMAC_BACKLIGHT
5474c120 470 /* Initialize backlight */
4b755999 471 pmu_backlight_init();
5474c120 472#endif
1da177e4 473
8c870933 474#ifdef CONFIG_PPC32
71a157e8
GL		 475 if (of_machine_is_compatible("AAPL,3400/2400") ||
476 of_machine_is_compatible("AAPL,3500")) {
1da177e4
LT		 477 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
478 NULL, PMAC_MB_INFO_MODEL, 0);
479 pmu_battery_count = 1;
480 if (mb == PMAC_TYPE_COMET)
481 pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
482 else
483 pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
71a157e8
GL		 484 } else if (of_machine_is_compatible("AAPL,PowerBook1998") ||
485 of_machine_is_compatible("PowerBook1,1")) {
1da177e4
LT		 486 pmu_battery_count = 2;
487 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
488 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
489 } else {
30686ba6
SR		 490 struct device_node* prim =
491 of_find_node_by_name(NULL, "power-mgt");
018a3d1d 492 const u32 *prim_info = NULL;
1da177e4 493 if (prim)
01b2726d 494 prim_info = of_get_property(prim, "prim-info", NULL);
1da177e4
LT		 495 if (prim_info) {
496 /* Other stuffs here yet unknown */
497 pmu_battery_count = (prim_info[6] >> 16) & 0xff;
498 pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
499 if (pmu_battery_count > 1)
500 pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
501 }
30686ba6 502 of_node_put(prim);
1da177e4 503 }
8c870933
BH		 504#endif /* CONFIG_PPC32 */
505
1da177e4
LT		 506 /* Create /proc/pmu */
507 proc_pmu_root = proc_mkdir("pmu", NULL);
508 if (proc_pmu_root) {
8c870933 509 long i;
1da177e4
LT		 510
511 for (i=0; i<pmu_battery_count; i++) {
512 char title[16];
8c870933 513 sprintf(title, "battery_%ld", i);
9d2f7342
AD		 514 proc_pmu_batt[i] = proc_create_data(title, 0, proc_pmu_root,
515 &pmu_battery_proc_fops, (void *)i);
1da177e4 516 }
1da177e4 517
9d2f7342
AD		 518 proc_pmu_info = proc_create("info", 0, proc_pmu_root, &pmu_info_proc_fops);
519 proc_pmu_irqstats = proc_create("interrupts", 0, proc_pmu_root,
520 &pmu_irqstats_proc_fops);
521 proc_pmu_options = proc_create("options", 0600, proc_pmu_root,
522 &pmu_options_proc_fops);
1da177e4
LT		 523 }
524 return 0;
525}
526
527device_initcall(via_pmu_dev_init);
528
aacaf9bd 529static int
1da177e4
LT		 530init_pmu(void)
531{
532 int timeout;
533 struct adb_request req;
534
535 out_8(&via[B], via[B] | TREQ); /* negate TREQ */
536 out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
537
538 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
539 timeout = 100000;
540 while (!req.complete) {
541 if (--timeout < 0) {
542 printk(KERN_ERR "init_pmu: no response from PMU\n");
543 return 0;
544 }
545 udelay(10);
546 pmu_poll();
547 }
548
549 /* ack all pending interrupts */
550 timeout = 100000;
551 interrupt_data[0][0] = 1;
552 while (interrupt_data[0][0] || pmu_state != idle) {
553 if (--timeout < 0) {
554 printk(KERN_ERR "init_pmu: timed out acking intrs\n");
555 return 0;
556 }
557 if (pmu_state == idle)
558 adb_int_pending = 1;
7d12e780 559 via_pmu_interrupt(0, NULL);
1da177e4
LT		 560 udelay(10);
561 }
562
563 /* Tell PMU we are ready. */
564 if (pmu_kind == PMU_KEYLARGO_BASED) {
565 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
566 while (!req.complete)
567 pmu_poll();
568 }
569
570 /* Read PMU version */
571 pmu_request(&req, NULL, 1, PMU_GET_VERSION);
572 pmu_wait_complete(&req);
573 if (req.reply_len > 0)
574 pmu_version = req.reply[0];
575
576 /* Read server mode setting */
577 if (pmu_kind == PMU_KEYLARGO_BASED) {
578 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
579 PMU_PWR_GET_POWERUP_EVENTS);
580 pmu_wait_complete(&req);
581 if (req.reply_len == 2) {
582 if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
583 option_server_mode = 1;
584 printk(KERN_INFO "via-pmu: Server Mode is %s\n",
585 option_server_mode ? "enabled" : "disabled");
586 }
587 }
588 return 1;
589}
590
591int
592pmu_get_model(void)
593{
594 return pmu_kind;
595}
596
1da177e4
LT		 597static void pmu_set_server_mode(int server_mode)
598{
599 struct adb_request req;
600
601 if (pmu_kind != PMU_KEYLARGO_BASED)
602 return;
603
604 option_server_mode = server_mode;
605 pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
606 pmu_wait_complete(&req);
607 if (req.reply_len < 2)
608 return;
609 if (server_mode)
610 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
611 PMU_PWR_SET_POWERUP_EVENTS,
612 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
613 else
614 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
615 PMU_PWR_CLR_POWERUP_EVENTS,
616 req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
617 pmu_wait_complete(&req);
618}
619
1da177e4
LT		 620/* This new version of the code for 2400/3400/3500 powerbooks
621 * is inspired from the implementation in gkrellm-pmu
622 */
aacaf9bd 623static void
1da177e4
LT		 624done_battery_state_ohare(struct adb_request* req)
625{
626 /* format:
627 * [0] : flags
628 * 0x01 : AC indicator
629 * 0x02 : charging
630 * 0x04 : battery exist
631 * 0x08 :
632 * 0x10 :
633 * 0x20 : full charged
634 * 0x40 : pcharge reset
635 * 0x80 : battery exist
636 *
637 * [1][2] : battery voltage
638 * [3] : CPU temperature
639 * [4] : battery temperature
640 * [5] : current
641 * [6][7] : pcharge
642 * --tkoba
643 */
644 unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
645 long pcharge, charge, vb, vmax, lmax;
646 long vmax_charging, vmax_charged;
647 long amperage, voltage, time, max;
648 int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
649 NULL, PMAC_MB_INFO_MODEL, 0);
650
651 if (req->reply[0] & 0x01)
652 pmu_power_flags |= PMU_PWR_AC_PRESENT;
653 else
654 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
655
656 if (mb == PMAC_TYPE_COMET) {
657 vmax_charged = 189;
658 vmax_charging = 213;
659 lmax = 6500;
660 } else {
661 vmax_charged = 330;
662 vmax_charging = 330;
663 lmax = 6500;
664 }
665 vmax = vmax_charged;
666
667 /* If battery installed */
668 if (req->reply[0] & 0x04) {
669 bat_flags |= PMU_BATT_PRESENT;
670 if (req->reply[0] & 0x02)
671 bat_flags |= PMU_BATT_CHARGING;
672 vb = (req->reply[1] << 8) | req->reply[2];
673 voltage = (vb * 265 + 72665) / 10;
674 amperage = req->reply[5];
675 if ((req->reply[0] & 0x01) == 0) {
676 if (amperage > 200)
677 vb += ((amperage - 200) * 15)/100;
678 } else if (req->reply[0] & 0x02) {
679 vb = (vb * 97) / 100;
680 vmax = vmax_charging;
681 }
682 charge = (100 * vb) / vmax;
683 if (req->reply[0] & 0x40) {
684 pcharge = (req->reply[6] << 8) + req->reply[7];
685 if (pcharge > lmax)
686 pcharge = lmax;
687 pcharge *= 100;
688 pcharge = 100 - pcharge / lmax;
689 if (pcharge < charge)
690 charge = pcharge;
691 }
692 if (amperage > 0)
693 time = (charge * 16440) / amperage;
694 else
695 time = 0;
696 max = 100;
697 amperage = -amperage;
698 } else
699 charge = max = amperage = voltage = time = 0;
700
701 pmu_batteries[pmu_cur_battery].flags = bat_flags;
702 pmu_batteries[pmu_cur_battery].charge = charge;
703 pmu_batteries[pmu_cur_battery].max_charge = max;
704 pmu_batteries[pmu_cur_battery].amperage = amperage;
705 pmu_batteries[pmu_cur_battery].voltage = voltage;
706 pmu_batteries[pmu_cur_battery].time_remaining = time;
707
708 clear_bit(0, &async_req_locks);
709}
710
aacaf9bd 711static void
1da177e4
LT		 712done_battery_state_smart(struct adb_request* req)
713{
714 /* format:
715 * [0] : format of this structure (known: 3,4,5)
716 * [1] : flags
717 *
718 * format 3 & 4:
719 *
720 * [2] : charge
721 * [3] : max charge
722 * [4] : current
723 * [5] : voltage
724 *
725 * format 5:
726 *
727 * [2][3] : charge
728 * [4][5] : max charge
729 * [6][7] : current
730 * [8][9] : voltage
731 */
732
733 unsigned int bat_flags = PMU_BATT_TYPE_SMART;
734 int amperage;
735 unsigned int capa, max, voltage;
736
737 if (req->reply[1] & 0x01)
738 pmu_power_flags |= PMU_PWR_AC_PRESENT;
739 else
740 pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
741
742
743 capa = max = amperage = voltage = 0;
744
745 if (req->reply[1] & 0x04) {
746 bat_flags |= PMU_BATT_PRESENT;
747 switch(req->reply[0]) {
748 case 3:
749 case 4: capa = req->reply[2];
750 max = req->reply[3];
751 amperage = *((signed char *)&req->reply[4]);
752 voltage = req->reply[5];
753 break;
754 case 5: capa = (req->reply[2] << 8) | req->reply[3];
755 max = (req->reply[4] << 8) | req->reply[5];
756 amperage = *((signed short *)&req->reply[6]);
757 voltage = (req->reply[8] << 8) | req->reply[9];
758 break;
759 default:
ebd004e4
AS		 760 pr_warn("pmu.c: unrecognized battery info, "
761 "len: %d, %4ph\n", req->reply_len,
762 req->reply);
1da177e4
LT		 763 break;
764 }
765 }
766
767 if ((req->reply[1] & 0x01) && (amperage > 0))
768 bat_flags |= PMU_BATT_CHARGING;
769
770 pmu_batteries[pmu_cur_battery].flags = bat_flags;
771 pmu_batteries[pmu_cur_battery].charge = capa;
772 pmu_batteries[pmu_cur_battery].max_charge = max;
773 pmu_batteries[pmu_cur_battery].amperage = amperage;
774 pmu_batteries[pmu_cur_battery].voltage = voltage;
775 if (amperage) {
776 if ((req->reply[1] & 0x01) && (amperage > 0))
777 pmu_batteries[pmu_cur_battery].time_remaining
778 = ((max-capa) * 3600) / amperage;
779 else
780 pmu_batteries[pmu_cur_battery].time_remaining
781 = (capa * 3600) / (-amperage);
782 } else
783 pmu_batteries[pmu_cur_battery].time_remaining = 0;
784
785 pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
786
787 clear_bit(0, &async_req_locks);
788}
789
aacaf9bd 790static void
1da177e4
LT		 791query_battery_state(void)
792{
793 if (test_and_set_bit(0, &async_req_locks))
794 return;
795 if (pmu_kind == PMU_OHARE_BASED)
796 pmu_request(&batt_req, done_battery_state_ohare,
797 1, PMU_BATTERY_STATE);
798 else
799 pmu_request(&batt_req, done_battery_state_smart,
800 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
801}
802
9d2f7342 803static int pmu_info_proc_show(struct seq_file *m, void *v)
1da177e4 804{
9d2f7342
AD		 805 seq_printf(m, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
806 seq_printf(m, "PMU firmware version : %02x\n", pmu_version);
807 seq_printf(m, "AC Power : %d\n",
63e1fd41 808 ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0) || pmu_battery_count == 0);
9d2f7342
AD		 809 seq_printf(m, "Battery count : %d\n", pmu_battery_count);
810
811 return 0;
812}
1da177e4 813
9d2f7342
AD		 814static int pmu_info_proc_open(struct inode *inode, struct file *file)
815{
816 return single_open(file, pmu_info_proc_show, NULL);
1da177e4
LT		 817}
818
9d2f7342
AD		 819static const struct file_operations pmu_info_proc_fops = {
820 .owner = THIS_MODULE,
821 .open = pmu_info_proc_open,
822 .read = seq_read,
823 .llseek = seq_lseek,
824 .release = single_release,
825};
826
827static int pmu_irqstats_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 828{
829 int i;
1da177e4
LT		 830 static const char *irq_names[] = {
831 "Total CB1 triggered events",
832 "Total GPIO1 triggered events",
833 "PC-Card eject button",
834 "Sound/Brightness button",
835 "ADB message",
836 "Battery state change",
837 "Environment interrupt",
838 "Tick timer",
839 "Ghost interrupt (zero len)",
840 "Empty interrupt (empty mask)",
841 "Max irqs in a row"
842 };
843
844 for (i=0; i<11; i++) {
9d2f7342 845 seq_printf(m, " %2u: %10u (%s)\n",
1da177e4
LT		 846 i, pmu_irq_stats[i], irq_names[i]);
847 }
9d2f7342 848 return 0;
1da177e4
LT		 849}
850
9d2f7342 851static int pmu_irqstats_proc_open(struct inode *inode, struct file *file)
1da177e4 852{
9d2f7342
AD		 853 return single_open(file, pmu_irqstats_proc_show, NULL);
854}
855
856static const struct file_operations pmu_irqstats_proc_fops = {
857 .owner = THIS_MODULE,
858 .open = pmu_irqstats_proc_open,
859 .read = seq_read,
860 .llseek = seq_lseek,
861 .release = single_release,
862};
863
864static int pmu_battery_proc_show(struct seq_file *m, void *v)
865{
866 long batnum = (long)m->private;
1da177e4 867
9d2f7342
AD		 868 seq_putc(m, '\n');
869 seq_printf(m, "flags : %08x\n", pmu_batteries[batnum].flags);
870 seq_printf(m, "charge : %d\n", pmu_batteries[batnum].charge);
871 seq_printf(m, "max_charge : %d\n", pmu_batteries[batnum].max_charge);
872 seq_printf(m, "current : %d\n", pmu_batteries[batnum].amperage);
873 seq_printf(m, "voltage : %d\n", pmu_batteries[batnum].voltage);
874 seq_printf(m, "time rem. : %d\n", pmu_batteries[batnum].time_remaining);
875 return 0;
1da177e4 876}
1da177e4 877
9d2f7342 878static int pmu_battery_proc_open(struct inode *inode, struct file *file)
1da177e4 879{
d9dda78b 880 return single_open(file, pmu_battery_proc_show, PDE_DATA(inode));
9d2f7342 881}
1da177e4 882
9d2f7342
AD		 883static const struct file_operations pmu_battery_proc_fops = {
884 .owner = THIS_MODULE,
885 .open = pmu_battery_proc_open,
886 .read = seq_read,
887 .llseek = seq_lseek,
888 .release = single_release,
889};
890
891static int pmu_options_proc_show(struct seq_file *m, void *v)
892{
f91266ed 893#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 894 if (pmu_kind == PMU_KEYLARGO_BASED &&
895 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
9d2f7342 896 seq_printf(m, "lid_wakeup=%d\n", option_lid_wakeup);
8c870933 897#endif
1da177e4 898 if (pmu_kind == PMU_KEYLARGO_BASED)
9d2f7342 899 seq_printf(m, "server_mode=%d\n", option_server_mode);
1da177e4 900
9d2f7342 901 return 0;
1da177e4 902}
9d2f7342
AD		 903
904static int pmu_options_proc_open(struct inode *inode, struct file *file)
905{
906 return single_open(file, pmu_options_proc_show, NULL);
907}
908
909static ssize_t pmu_options_proc_write(struct file *file,
910 const char __user *buffer, size_t count, loff_t *pos)
1da177e4
LT		 911{
912 char tmp[33];
913 char *label, *val;
9d2f7342 914 size_t fcount = count;
1da177e4
LT		 915
916 if (!count)
917 return -EINVAL;
918 if (count > 32)
919 count = 32;
920 if (copy_from_user(tmp, buffer, count))
921 return -EFAULT;
922 tmp[count] = 0;
923
924 label = tmp;
925 while(*label == ' ')
926 label++;
927 val = label;
928 while(*val && (*val != '=')) {
929 if (*val == ' ')
930 *val = 0;
931 val++;
932 }
933 if ((*val) == 0)
934 return -EINVAL;
935 *(val++) = 0;
936 while(*val == ' ')
937 val++;
f91266ed 938#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 939 if (pmu_kind == PMU_KEYLARGO_BASED &&
940 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
941 if (!strcmp(label, "lid_wakeup"))
942 option_lid_wakeup = ((*val) == '1');
8c870933 943#endif
1da177e4
LT		 944 if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
945 int new_value;
946 new_value = ((*val) == '1');
947 if (new_value != option_server_mode)
948 pmu_set_server_mode(new_value);
949 }
950 return fcount;
951}
952
9d2f7342
AD		 953static const struct file_operations pmu_options_proc_fops = {
954 .owner = THIS_MODULE,
955 .open = pmu_options_proc_open,
956 .read = seq_read,
957 .llseek = seq_lseek,
958 .release = single_release,
959 .write = pmu_options_proc_write,
960};
961
1da177e4
LT		 962#ifdef CONFIG_ADB
963/* Send an ADB command */
11a50873 964static int pmu_send_request(struct adb_request *req, int sync)
1da177e4
LT		 965{
966 int i, ret;
967
968 if ((vias == NULL) || (!pmu_fully_inited)) {
969 req->complete = 1;
970 return -ENXIO;
971 }
972
973 ret = -EINVAL;
974
975 switch (req->data[0]) {
976 case PMU_PACKET:
977 for (i = 0; i < req->nbytes - 1; ++i)
978 req->data[i] = req->data[i+1];
979 --req->nbytes;
980 if (pmu_data_len[req->data[0]][1] != 0) {
981 req->reply[0] = ADB_RET_OK;
982 req->reply_len = 1;
983 } else
984 req->reply_len = 0;
985 ret = pmu_queue_request(req);
986 break;
987 case CUDA_PACKET:
988 switch (req->data[1]) {
989 case CUDA_GET_TIME:
990 if (req->nbytes != 2)
991 break;
992 req->data[0] = PMU_READ_RTC;
993 req->nbytes = 1;
994 req->reply_len = 3;
995 req->reply[0] = CUDA_PACKET;
996 req->reply[1] = 0;
997 req->reply[2] = CUDA_GET_TIME;
998 ret = pmu_queue_request(req);
999 break;
1000 case CUDA_SET_TIME:
1001 if (req->nbytes != 6)
1002 break;
1003 req->data[0] = PMU_SET_RTC;
1004 req->nbytes = 5;
1005 for (i = 1; i <= 4; ++i)
1006 req->data[i] = req->data[i+1];
1007 req->reply_len = 3;
1008 req->reply[0] = CUDA_PACKET;
1009 req->reply[1] = 0;
1010 req->reply[2] = CUDA_SET_TIME;
1011 ret = pmu_queue_request(req);
1012 break;
1013 }
1014 break;
1015 case ADB_PACKET:
1016 if (!pmu_has_adb)
1017 return -ENXIO;
1018 for (i = req->nbytes - 1; i > 1; --i)
1019 req->data[i+2] = req->data[i];
1020 req->data[3] = req->nbytes - 2;
1021 req->data[2] = pmu_adb_flags;
1022 /*req->data[1] = req->data[1];*/
1023 req->data[0] = PMU_ADB_CMD;
1024 req->nbytes += 2;
1025 req->reply_expected = 1;
1026 req->reply_len = 0;
1027 ret = pmu_queue_request(req);
1028 break;
1029 }
1030 if (ret) {
1031 req->complete = 1;
1032 return ret;
1033 }
1034
1035 if (sync)
1036 while (!req->complete)
1037 pmu_poll();
1038
1039 return 0;
1040}
1041
1042/* Enable/disable autopolling */
11a50873 1043static int __pmu_adb_autopoll(int devs)
1da177e4
LT		 1044{
1045 struct adb_request req;
1046
1da177e4 1047 if (devs) {
1da177e4
LT		 1048 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1049 adb_dev_map >> 8, adb_dev_map);
1050 pmu_adb_flags = 2;
1051 } else {
1052 pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
1053 pmu_adb_flags = 0;
1054 }
1055 while (!req.complete)
1056 pmu_poll();
1057 return 0;
1058}
1059
11a50873
BH		 1060static int pmu_adb_autopoll(int devs)
1061{
1062 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1063 return -ENXIO;
1064
1065 adb_dev_map = devs;
1066 return __pmu_adb_autopoll(devs);
1067}
1068
1da177e4 1069/* Reset the ADB bus */
11a50873 1070static int pmu_adb_reset_bus(void)
1da177e4
LT		 1071{
1072 struct adb_request req;
1073 int save_autopoll = adb_dev_map;
1074
1075 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1076 return -ENXIO;
1077
1078 /* anyone got a better idea?? */
11a50873 1079 __pmu_adb_autopoll(0);
1da177e4 1080
11a50873 1081 req.nbytes = 4;
1da177e4
LT		 1082 req.done = NULL;
1083 req.data[0] = PMU_ADB_CMD;
11a50873
BH		 1084 req.data[1] = ADB_BUSRESET;
1085 req.data[2] = 0;
1da177e4
LT		 1086 req.data[3] = 0;
1087 req.data[4] = 0;
1088 req.reply_len = 0;
1089 req.reply_expected = 1;
1090 if (pmu_queue_request(&req) != 0) {
1091 printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
1092 return -EIO;
1093 }
1094 pmu_wait_complete(&req);
1095
1096 if (save_autopoll != 0)
11a50873 1097 __pmu_adb_autopoll(save_autopoll);
1da177e4
LT		 1098
1099 return 0;
1100}
1101#endif /* CONFIG_ADB */
1102
1103/* Construct and send a pmu request */
aacaf9bd 1104int
1da177e4
LT		 1105pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
1106 int nbytes, ...)
1107{
1108 va_list list;
1109 int i;
1110
1111 if (vias == NULL)
1112 return -ENXIO;
1113
1114 if (nbytes < 0 || nbytes > 32) {
1115 printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
1116 req->complete = 1;
1117 return -EINVAL;
1118 }
1119 req->nbytes = nbytes;
1120 req->done = done;
1121 va_start(list, nbytes);
1122 for (i = 0; i < nbytes; ++i)
1123 req->data[i] = va_arg(list, int);
1124 va_end(list);
1125 req->reply_len = 0;
1126 req->reply_expected = 0;
1127 return pmu_queue_request(req);
1128}
1129
aacaf9bd 1130int
1da177e4
LT		 1131pmu_queue_request(struct adb_request *req)
1132{
1133 unsigned long flags;
1134 int nsend;
1135
1136 if (via == NULL) {
1137 req->complete = 1;
1138 return -ENXIO;
1139 }
1140 if (req->nbytes <= 0) {
1141 req->complete = 1;
1142 return 0;
1143 }
1144 nsend = pmu_data_len[req->data[0]][0];
1145 if (nsend >= 0 && req->nbytes != nsend + 1) {
1146 req->complete = 1;
1147 return -EINVAL;
1148 }
1149
1150 req->next = NULL;
1151 req->sent = 0;
1152 req->complete = 0;
1153
1154 spin_lock_irqsave(&pmu_lock, flags);
1155 if (current_req != 0) {
1156 last_req->next = req;
1157 last_req = req;
1158 } else {
1159 current_req = req;
1160 last_req = req;
1161 if (pmu_state == idle)
1162 pmu_start();
1163 }
1164 spin_unlock_irqrestore(&pmu_lock, flags);
1165
1166 return 0;
1167}
1168
1169static inline void
1170wait_for_ack(void)
1171{
1172 /* Sightly increased the delay, I had one occurrence of the message
1173 * reported
1174 */
1175 int timeout = 4000;
1176 while ((in_8(&via[B]) & TACK) == 0) {
1177 if (--timeout < 0) {
1178 printk(KERN_ERR "PMU not responding (!ack)\n");
1179 return;
1180 }
1181 udelay(10);
1182 }
1183}
1184
1185/* New PMU seems to be very sensitive to those timings, so we make sure
1186 * PCI is flushed immediately */
1187static inline void
1188send_byte(int x)
1189{
1190 volatile unsigned char __iomem *v = via;
1191
1192 out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
1193 out_8(&v[SR], x);
1194 out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
1195 (void)in_8(&v[B]);
1196}
1197
1198static inline void
1199recv_byte(void)
1200{
1201 volatile unsigned char __iomem *v = via;
1202
1203 out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
1204 in_8(&v[SR]); /* resets SR */
1205 out_8(&v[B], in_8(&v[B]) & ~TREQ);
1206 (void)in_8(&v[B]);
1207}
1208
1209static inline void
1210pmu_done(struct adb_request *req)
1211{
1212 void (*done)(struct adb_request *) = req->done;
1213 mb();
1214 req->complete = 1;
1215 /* Here, we assume that if the request has a done member, the
1216 * struct request will survive to setting req->complete to 1
1217 */
1218 if (done)
1219 (*done)(req);
1220}
1221
aacaf9bd 1222static void
1da177e4
LT		 1223pmu_start(void)
1224{
1225 struct adb_request *req;
1226
1227 /* assert pmu_state == idle */
1228 /* get the packet to send */
1229 req = current_req;
1230 if (req == 0 || pmu_state != idle
1231 || (/*req->reply_expected && */req_awaiting_reply))
1232 return;
1233
1234 pmu_state = sending;
1235 data_index = 1;
1236 data_len = pmu_data_len[req->data[0]][0];
1237
1238 /* Sounds safer to make sure ACK is high before writing. This helped
1239 * kill a problem with ADB and some iBooks
1240 */
1241 wait_for_ack();
1242 /* set the shift register to shift out and send a byte */
1243 send_byte(req->data[0]);
1244}
1245
aacaf9bd 1246void
1da177e4
LT		 1247pmu_poll(void)
1248{
1249 if (!via)
1250 return;
1251 if (disable_poll)
1252 return;
7d12e780 1253 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1254}
1255
aacaf9bd 1256void
1da177e4
LT		 1257pmu_poll_adb(void)
1258{
1259 if (!via)
1260 return;
1261 if (disable_poll)
1262 return;
1263 /* Kicks ADB read when PMU is suspended */
1264 adb_int_pending = 1;
1265 do {
7d12e780 1266 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1267 } while (pmu_suspended && (adb_int_pending || pmu_state != idle
1268 || req_awaiting_reply));
1269}
1270
aacaf9bd 1271void
1da177e4
LT		 1272pmu_wait_complete(struct adb_request *req)
1273{
1274 if (!via)
1275 return;
1276 while((pmu_state != idle && pmu_state != locked) || !req->complete)
7d12e780 1277 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1278}
1279
1280/* This function loops until the PMU is idle and prevents it from
1281 * anwsering to ADB interrupts. pmu_request can still be called.
1282 * This is done to avoid spurrious shutdowns when we know we'll have
1283 * interrupts switched off for a long time
1284 */
aacaf9bd 1285void
1da177e4
LT		 1286pmu_suspend(void)
1287{
1288 unsigned long flags;
1b0e9d44 1289
1da177e4
LT		 1290 if (!via)
1291 return;
1292
1293 spin_lock_irqsave(&pmu_lock, flags);
1294 pmu_suspended++;
1295 if (pmu_suspended > 1) {
1296 spin_unlock_irqrestore(&pmu_lock, flags);
1297 return;
1298 }
1299
1300 do {
1301 spin_unlock_irqrestore(&pmu_lock, flags);
1302 if (req_awaiting_reply)
1303 adb_int_pending = 1;
7d12e780 1304 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1305 spin_lock_irqsave(&pmu_lock, flags);
1306 if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
1da177e4
LT		 1307 if (gpio_irq >= 0)
1308 disable_irq_nosync(gpio_irq);
1309 out_8(&via[IER], CB1_INT | IER_CLR);
1310 spin_unlock_irqrestore(&pmu_lock, flags);
1da177e4
LT		 1311 break;
1312 }
1313 } while (1);
1314}
1315
aacaf9bd 1316void
1da177e4
LT		 1317pmu_resume(void)
1318{
1319 unsigned long flags;
1320
1321 if (!via || (pmu_suspended < 1))
1322 return;
1323
1324 spin_lock_irqsave(&pmu_lock, flags);
1325 pmu_suspended--;
1326 if (pmu_suspended > 0) {
1327 spin_unlock_irqrestore(&pmu_lock, flags);
1328 return;
1329 }
1330 adb_int_pending = 1;
1da177e4
LT		 1331 if (gpio_irq >= 0)
1332 enable_irq(gpio_irq);
1333 out_8(&via[IER], CB1_INT | IER_SET);
1334 spin_unlock_irqrestore(&pmu_lock, flags);
1335 pmu_poll();
1da177e4
LT		 1336}
1337
1338/* Interrupt data could be the result data from an ADB cmd */
aacaf9bd 1339static void
7d12e780 1340pmu_handle_data(unsigned char *data, int len)
1da177e4
LT		 1341{
1342 unsigned char ints, pirq;
1343 int i = 0;
1344
1345 asleep = 0;
1346 if (drop_interrupts || len < 1) {
1347 adb_int_pending = 0;
1348 pmu_irq_stats[8]++;
1349 return;
1350 }
1351
1352 /* Get PMU interrupt mask */
1353 ints = data[0];
1354
1355 /* Record zero interrupts for stats */
1356 if (ints == 0)
1357 pmu_irq_stats[9]++;
1358
1359 /* Hack to deal with ADB autopoll flag */
1360 if (ints & PMU_INT_ADB)
1361 ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
1362
1363next:
1364
1365 if (ints == 0) {
1366 if (i > pmu_irq_stats[10])
1367 pmu_irq_stats[10] = i;
1368 return;
1369 }
1370
1371 for (pirq = 0; pirq < 8; pirq++)
1372 if (ints & (1 << pirq))
1373 break;
1374 pmu_irq_stats[pirq]++;
1375 i++;
1376 ints &= ~(1 << pirq);
1377
1378 /* Note: for some reason, we get an interrupt with len=1,
1379 * data[0]==0 after each normal ADB interrupt, at least
1380 * on the Pismo. Still investigating... --BenH
1381 */
1382 if ((1 << pirq) & PMU_INT_ADB) {
1383 if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
1384 struct adb_request *req = req_awaiting_reply;
1385 if (req == 0) {
1386 printk(KERN_ERR "PMU: extra ADB reply\n");
1387 return;
1388 }
1389 req_awaiting_reply = NULL;
1390 if (len <= 2)
1391 req->reply_len = 0;
1392 else {
1393 memcpy(req->reply, data + 1, len - 1);
1394 req->reply_len = len - 1;
1395 }
1396 pmu_done(req);
1397 } else {
1da177e4
LT		 1398 if (len == 4 && data[1] == 0x2c) {
1399 extern int xmon_wants_key, xmon_adb_keycode;
1400 if (xmon_wants_key) {
1401 xmon_adb_keycode = data[2];
1402 return;
1403 }
1404 }
1da177e4
LT		 1405#ifdef CONFIG_ADB
1406 /*
1407 * XXX On the [23]400 the PMU gives us an up
1408 * event for keycodes 0x74 or 0x75 when the PC
1409 * card eject buttons are released, so we
1410 * ignore those events.
1411 */
1412 if (!(pmu_kind == PMU_OHARE_BASED && len == 4
1413 && data[1] == 0x2c && data[3] == 0xff
1414 && (data[2] & ~1) == 0xf4))
7d12e780 1415 adb_input(data+1, len-1, 1);
1da177e4
LT		 1416#endif /* CONFIG_ADB */
1417 }
1418 }
1419 /* Sound/brightness button pressed */
1420 else if ((1 << pirq) & PMU_INT_SNDBRT) {
1421#ifdef CONFIG_PMAC_BACKLIGHT
1422 if (len == 3)
4b755999
MH		 1423 pmac_backlight_set_legacy_brightness_pmu(data[1] >> 4);
1424#endif
1da177e4
LT		 1425 }
1426 /* Tick interrupt */
1427 else if ((1 << pirq) & PMU_INT_TICK) {
1da177e4
LT		 1428 /* Environement or tick interrupt, query batteries */
1429 if (pmu_battery_count) {
1430 if ((--query_batt_timer) == 0) {
1431 query_battery_state();
1432 query_batt_timer = BATTERY_POLLING_COUNT;
1433 }
1434 }
1435 }
1436 else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
1437 if (pmu_battery_count)
1438 query_battery_state();
1439 pmu_pass_intr(data, len);
9e8e30a0
JB		 1440 /* len == 6 is probably a bad check. But how do I
1441 * know what PMU versions send what events here? */
1442 if (len == 6) {
1443 via_pmu_event(PMU_EVT_POWER, !!(data[1]&8));
1444 via_pmu_event(PMU_EVT_LID, data[1]&1);
1445 }
1da177e4
LT		 1446 } else {
1447 pmu_pass_intr(data, len);
1da177e4
LT		 1448 }
1449 goto next;
1450}
1451
aacaf9bd 1452static struct adb_request*
7d12e780 1453pmu_sr_intr(void)
1da177e4
LT		 1454{
1455 struct adb_request *req;
1456 int bite = 0;
1457
1458 if (via[B] & TREQ) {
1459 printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
1460 out_8(&via[IFR], SR_INT);
1461 return NULL;
1462 }
1463 /* The ack may not yet be low when we get the interrupt */
1464 while ((in_8(&via[B]) & TACK) != 0)
1465 ;
1466
1467 /* if reading grab the byte, and reset the interrupt */
1468 if (pmu_state == reading || pmu_state == reading_intr)
1469 bite = in_8(&via[SR]);
1470
1471 /* reset TREQ and wait for TACK to go high */
1472 out_8(&via[B], in_8(&via[B]) | TREQ);
1473 wait_for_ack();
1474
1475 switch (pmu_state) {
1476 case sending:
1477 req = current_req;
1478 if (data_len < 0) {
1479 data_len = req->nbytes - 1;
1480 send_byte(data_len);
1481 break;
1482 }
1483 if (data_index <= data_len) {
1484 send_byte(req->data[data_index++]);
1485 break;
1486 }
1487 req->sent = 1;
1488 data_len = pmu_data_len[req->data[0]][1];
1489 if (data_len == 0) {
1490 pmu_state = idle;
1491 current_req = req->next;
1492 if (req->reply_expected)
1493 req_awaiting_reply = req;
1494 else
1495 return req;
1496 } else {
1497 pmu_state = reading;
1498 data_index = 0;
1499 reply_ptr = req->reply + req->reply_len;
1500 recv_byte();
1501 }
1502 break;
1503
1504 case intack:
1505 data_index = 0;
1506 data_len = -1;
1507 pmu_state = reading_intr;
1508 reply_ptr = interrupt_data[int_data_last];
1509 recv_byte();
1510 if (gpio_irq >= 0 && !gpio_irq_enabled) {
1511 enable_irq(gpio_irq);
1512 gpio_irq_enabled = 1;
1513 }
1514 break;
1515
1516 case reading:
1517 case reading_intr:
1518 if (data_len == -1) {
1519 data_len = bite;
1520 if (bite > 32)
1521 printk(KERN_ERR "PMU: bad reply len %d\n", bite);
1522 } else if (data_index < 32) {
1523 reply_ptr[data_index++] = bite;
1524 }
1525 if (data_index < data_len) {
1526 recv_byte();
1527 break;
1528 }
1529
1530 if (pmu_state == reading_intr) {
1531 pmu_state = idle;
1532 int_data_state[int_data_last] = int_data_ready;
1533 interrupt_data_len[int_data_last] = data_len;
1534 } else {
1535 req = current_req;
1536 /*
1537 * For PMU sleep and freq change requests, we lock the
c03983ac 1538 * PMU until it's explicitly unlocked. This avoids any
1da177e4
LT		 1539 * spurrious event polling getting in
1540 */
1541 current_req = req->next;
1542 req->reply_len += data_index;
1543 if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
1544 pmu_state = locked;
1545 else
1546 pmu_state = idle;
1547 return req;
1548 }
1549 break;
1550
1551 default:
1552 printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
1553 pmu_state);
1554 }
1555 return NULL;
1556}
1557
aacaf9bd 1558static irqreturn_t
7d12e780 1559via_pmu_interrupt(int irq, void *arg)
1da177e4
LT		 1560{
1561 unsigned long flags;
1562 int intr;
1563 int nloop = 0;
1564 int int_data = -1;
1565 struct adb_request *req = NULL;
1566 int handled = 0;
1567
1568 /* This is a bit brutal, we can probably do better */
1569 spin_lock_irqsave(&pmu_lock, flags);
1570 ++disable_poll;
1571
1572 for (;;) {
1573 intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
1574 if (intr == 0)
1575 break;
1576 handled = 1;
1577 if (++nloop > 1000) {
1578 printk(KERN_DEBUG "PMU: stuck in intr loop, "
1579 "intr=%x, ier=%x pmu_state=%d\n",
1580 intr, in_8(&via[IER]), pmu_state);
1581 break;
1582 }
1583 out_8(&via[IFR], intr);
1584 if (intr & CB1_INT) {
1585 adb_int_pending = 1;
1586 pmu_irq_stats[0]++;
1587 }
1588 if (intr & SR_INT) {
7d12e780 1589 req = pmu_sr_intr();
1da177e4
LT		 1590 if (req)
1591 break;
1592 }
1593 }
1594
1595recheck:
1596 if (pmu_state == idle) {
1597 if (adb_int_pending) {
1598 if (int_data_state[0] == int_data_empty)
1599 int_data_last = 0;
1600 else if (int_data_state[1] == int_data_empty)
1601 int_data_last = 1;
1602 else
1603 goto no_free_slot;
1604 pmu_state = intack;
1605 int_data_state[int_data_last] = int_data_fill;
1606 /* Sounds safer to make sure ACK is high before writing.
1607 * This helped kill a problem with ADB and some iBooks
1608 */
1609 wait_for_ack();
1610 send_byte(PMU_INT_ACK);
1611 adb_int_pending = 0;
1612 } else if (current_req)
1613 pmu_start();
1614 }
1615no_free_slot:
1616 /* Mark the oldest buffer for flushing */
1617 if (int_data_state[!int_data_last] == int_data_ready) {
1618 int_data_state[!int_data_last] = int_data_flush;
1619 int_data = !int_data_last;
1620 } else if (int_data_state[int_data_last] == int_data_ready) {
1621 int_data_state[int_data_last] = int_data_flush;
1622 int_data = int_data_last;
1623 }
1624 --disable_poll;
1625 spin_unlock_irqrestore(&pmu_lock, flags);
1626
1627 /* Deal with completed PMU requests outside of the lock */
1628 if (req) {
1629 pmu_done(req);
1630 req = NULL;
1631 }
1632
1633 /* Deal with interrupt datas outside of the lock */
1634 if (int_data >= 0) {
7d12e780 1635 pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data]);
1da177e4
LT		 1636 spin_lock_irqsave(&pmu_lock, flags);
1637 ++disable_poll;
1638 int_data_state[int_data] = int_data_empty;
1639 int_data = -1;
1640 goto recheck;
1641 }
1642
1643 return IRQ_RETVAL(handled);
1644}
1645
aacaf9bd 1646void
1da177e4
LT		 1647pmu_unlock(void)
1648{
1649 unsigned long flags;
1650
1651 spin_lock_irqsave(&pmu_lock, flags);
1652 if (pmu_state == locked)
1653 pmu_state = idle;
1654 adb_int_pending = 1;
1655 spin_unlock_irqrestore(&pmu_lock, flags);
1656}
1657
1658
aacaf9bd 1659static irqreturn_t
7d12e780 1660gpio1_interrupt(int irq, void *arg)
1da177e4
LT		 1661{
1662 unsigned long flags;
1663
1664 if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
1665 spin_lock_irqsave(&pmu_lock, flags);
1666 if (gpio_irq_enabled > 0) {
1667 disable_irq_nosync(gpio_irq);
1668 gpio_irq_enabled = 0;
1669 }
1670 pmu_irq_stats[1]++;
1671 adb_int_pending = 1;
1672 spin_unlock_irqrestore(&pmu_lock, flags);
7d12e780 1673 via_pmu_interrupt(0, NULL);
1da177e4
LT		 1674 return IRQ_HANDLED;
1675 }
1676 return IRQ_NONE;
1677}
1678
aacaf9bd 1679void
1da177e4
LT		 1680pmu_enable_irled(int on)
1681{
1682 struct adb_request req;
1683
1684 if (vias == NULL)
1685 return ;
1686 if (pmu_kind == PMU_KEYLARGO_BASED)
1687 return ;
1688
1689 pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
1690 (on ? PMU_POW_ON : PMU_POW_OFF));
1691 pmu_wait_complete(&req);
1692}
1693
aacaf9bd 1694void
1da177e4
LT		 1695pmu_restart(void)
1696{
1697 struct adb_request req;
1698
1699 if (via == NULL)
1700 return;
1701
1702 local_irq_disable();
1703
1704 drop_interrupts = 1;
1705
1706 if (pmu_kind != PMU_KEYLARGO_BASED) {
1707 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1708 PMU_INT_TICK );
1709 while(!req.complete)
1710 pmu_poll();
1711 }
1712
1713 pmu_request(&req, NULL, 1, PMU_RESET);
1714 pmu_wait_complete(&req);
1715 for (;;)
1716 ;
1717}
1718
aacaf9bd 1719void
1da177e4
LT		 1720pmu_shutdown(void)
1721{
1722 struct adb_request req;
1723
1724 if (via == NULL)
1725 return;
1726
1727 local_irq_disable();
1728
1729 drop_interrupts = 1;
1730
1731 if (pmu_kind != PMU_KEYLARGO_BASED) {
1732 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
1733 PMU_INT_TICK );
1734 pmu_wait_complete(&req);
1735 } else {
1736 /* Disable server mode on shutdown or we'll just
1737 * wake up again
1738 */
1739 pmu_set_server_mode(0);
1740 }
1741
1742 pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
1743 'M', 'A', 'T', 'T');
1744 pmu_wait_complete(&req);
1745 for (;;)
1746 ;
1747}
1748
1749int
1750pmu_present(void)
1751{
1752 return via != 0;
1753}
1754
f91266ed 1755#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
1da177e4
LT		 1756/*
1757 * Put the powerbook to sleep.
1758 */
1759
aacaf9bd 1760static u32 save_via[8];
1da177e4 1761
aacaf9bd 1762static void
1da177e4
LT		 1763save_via_state(void)
1764{
1765 save_via[0] = in_8(&via[ANH]);
1766 save_via[1] = in_8(&via[DIRA]);
1767 save_via[2] = in_8(&via[B]);
1768 save_via[3] = in_8(&via[DIRB]);
1769 save_via[4] = in_8(&via[PCR]);
1770 save_via[5] = in_8(&via[ACR]);
1771 save_via[6] = in_8(&via[T1CL]);
1772 save_via[7] = in_8(&via[T1CH]);
1773}
aacaf9bd 1774static void
1da177e4
LT		 1775restore_via_state(void)
1776{
1777 out_8(&via[ANH], save_via[0]);
1778 out_8(&via[DIRA], save_via[1]);
1779 out_8(&via[B], save_via[2]);
1780 out_8(&via[DIRB], save_via[3]);
1781 out_8(&via[PCR], save_via[4]);
1782 out_8(&via[ACR], save_via[5]);
1783 out_8(&via[T1CL], save_via[6]);
1784 out_8(&via[T1CH], save_via[7]);
1785 out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
1786 out_8(&via[IFR], 0x7f); /* clear IFR */
1787 out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
1788}
1789
1da177e4
LT		 1790#define GRACKLE_PM (1<<7)
1791#define GRACKLE_DOZE (1<<5)
1792#define GRACKLE_NAP (1<<4)
1793#define GRACKLE_SLEEP (1<<3)
1794
3bea6313 1795static int powerbook_sleep_grackle(void)
1da177e4
LT		 1796{
1797 unsigned long save_l2cr;
1798 unsigned short pmcr1;
1799 struct adb_request req;
1da177e4
LT		 1800 struct pci_dev *grackle;
1801
c78f8305 1802 grackle = pci_get_bus_and_slot(0, 0);
1da177e4
LT		 1803 if (!grackle)
1804 return -ENODEV;
1805
1da177e4
LT		 1806 /* Turn off various things. Darwin does some retry tests here... */
1807 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
1808 pmu_wait_complete(&req);
1809 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1810 PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1811 pmu_wait_complete(&req);
1812
1813 /* For 750, save backside cache setting and disable it */
1814 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1815
1816 if (!__fake_sleep) {
1817 /* Ask the PMU to put us to sleep */
1818 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1819 pmu_wait_complete(&req);
1820 }
1821
1822 /* The VIA is supposed not to be restored correctly*/
1823 save_via_state();
1824 /* We shut down some HW */
1825 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
1826
1827 pci_read_config_word(grackle, 0x70, &pmcr1);
1828 /* Apparently, MacOS uses NAP mode for Grackle ??? */
1829 pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
1830 pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
1831 pci_write_config_word(grackle, 0x70, pmcr1);
1832
1833 /* Call low-level ASM sleep handler */
1834 if (__fake_sleep)
1835 mdelay(5000);
1836 else
1837 low_sleep_handler();
1838
1839 /* We're awake again, stop grackle PM */
1840 pci_read_config_word(grackle, 0x70, &pmcr1);
1841 pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
1842 pci_write_config_word(grackle, 0x70, pmcr1);
1843
c78f8305
AC		 1844 pci_dev_put(grackle);
1845
1da177e4
LT		 1846 /* Make sure the PMU is idle */
1847 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
1848 restore_via_state();
1849
1850 /* Restore L2 cache */
1851 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1852 _set_L2CR(save_l2cr);
1853
1854 /* Restore userland MMU context */
d2adba3f 1855 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 1856
1857 /* Power things up */
1858 pmu_unlock();
1859 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1860 pmu_wait_complete(&req);
1861 pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
1862 PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
1863 pmu_wait_complete(&req);
1864 pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
1865 PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
1866 pmu_wait_complete(&req);
1867
1da177e4
LT		 1868 return 0;
1869}
1870
aacaf9bd 1871static int
1da177e4
LT		 1872powerbook_sleep_Core99(void)
1873{
1874 unsigned long save_l2cr;
1875 unsigned long save_l3cr;
1876 struct adb_request req;
1da177e4
LT		 1877
1878 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
1879 printk(KERN_ERR "Sleep mode not supported on this machine\n");
1880 return -ENOSYS;
1881 }
1882
1883 if (num_online_cpus() > 1 || cpu_is_offline(0))
1884 return -EAGAIN;
1885
b16eeb47
BH		 1886 /* Stop environment and ADB interrupts */
1887 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
1888 pmu_wait_complete(&req);
1da177e4
LT		 1889
1890 /* Tell PMU what events will wake us up */
1891 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
1892 0xff, 0xff);
1893 pmu_wait_complete(&req);
1894 pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
1895 0, PMU_PWR_WAKEUP_KEY |
1896 (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
1897 pmu_wait_complete(&req);
1898
1899 /* Save the state of the L2 and L3 caches */
1900 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
1901 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
1902
1903 if (!__fake_sleep) {
1904 /* Ask the PMU to put us to sleep */
1905 pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
1906 pmu_wait_complete(&req);
1907 }
1908
1909 /* The VIA is supposed not to be restored correctly*/
1910 save_via_state();
1911
1912 /* Shut down various ASICs. There's a chance that we can no longer
1913 * talk to the PMU after this, so I moved it to _after_ sending the
1914 * sleep command to it. Still need to be checked.
1915 */
1916 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1917
1918 /* Call low-level ASM sleep handler */
1919 if (__fake_sleep)
1920 mdelay(5000);
1921 else
1922 low_sleep_handler();
1923
1924 /* Restore Apple core ASICs state */
1925 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1926
1927 /* Restore VIA */
1928 restore_via_state();
1929
0086b5ec
BH		 1930 /* tweak LPJ before cpufreq is there */
1931 loops_per_jiffy *= 2;
1932
1da177e4
LT		 1933 /* Restore video */
1934 pmac_call_early_video_resume();
1935
1936 /* Restore L2 cache */
1937 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
1938 _set_L2CR(save_l2cr);
1939 /* Restore L3 cache */
1940 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
1941 _set_L3CR(save_l3cr);
1942
1943 /* Restore userland MMU context */
d2adba3f 1944 switch_mmu_context(NULL, current->active_mm, NULL);
1da177e4
LT		 1945
1946 /* Tell PMU we are ready */
1947 pmu_unlock();
1948 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
1949 pmu_wait_complete(&req);
1950 pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
1951 pmu_wait_complete(&req);
1952
0086b5ec
BH		 1953 /* Restore LPJ, cpufreq will adjust the cpu frequency */
1954 loops_per_jiffy /= 2;
1955
1da177e4
LT		 1956 return 0;
1957}
1958
1959#define PB3400_MEM_CTRL 0xf8000000
1960#define PB3400_MEM_CTRL_SLEEP 0x70
1961
887ef35a
PM		 1962static void __iomem *pb3400_mem_ctrl;
1963
1964static void powerbook_sleep_init_3400(void)
1965{
1966 /* map in the memory controller registers */
1967 pb3400_mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
1968 if (pb3400_mem_ctrl == NULL)
1969 printk(KERN_WARNING "ioremap failed: sleep won't be possible");
1970}
1971
1972static int powerbook_sleep_3400(void)
1da177e4 1973{
f91266ed 1974 int i, x;
1da177e4 1975 unsigned int hid0;
887ef35a 1976 unsigned long msr;
1da177e4 1977 struct adb_request sleep_req;
1da177e4
LT		 1978 unsigned int __iomem *mem_ctrl_sleep;
1979
887ef35a 1980 if (pb3400_mem_ctrl == NULL)
1da177e4 1981 return -ENOMEM;
887ef35a 1982 mem_ctrl_sleep = pb3400_mem_ctrl + PB3400_MEM_CTRL_SLEEP;
1da177e4 1983
1da177e4
LT		 1984 /* Set the memory controller to keep the memory refreshed
1985 while we're asleep */
1986 for (i = 0x403f; i >= 0x4000; --i) {
1987 out_be32(mem_ctrl_sleep, i);
1988 do {
1989 x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
1990 } while (x == 0);
1991 if (x >= 0x100)
1992 break;
1993 }
1994
1995 /* Ask the PMU to put us to sleep */
1996 pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
887ef35a
PM		 1997 pmu_wait_complete(&sleep_req);
1998 pmu_unlock();
1da177e4 1999
887ef35a 2000 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
1da177e4 2001
1da177e4
LT		 2002 asleep = 1;
2003
2004 /* Put the CPU into sleep mode */
21fe3301 2005 hid0 = mfspr(SPRN_HID0);
1da177e4 2006 hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
21fe3301 2007 mtspr(SPRN_HID0, hid0);
887ef35a
PM		 2008 local_irq_enable();
2009 msr = mfmsr() | MSR_POW;
2010 while (asleep) {
2011 mb();
2012 mtmsr(msr);
2013 isync();
2014 }
2015 local_irq_disable();
1da177e4
LT		 2016
2017 /* OK, we're awake again, start restoring things */
2018 out_be32(mem_ctrl_sleep, 0x3f);
887ef35a 2019 pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
1da177e4 2020
1da177e4
LT		 2021 return 0;
2022}
2023
f91266ed 2024#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
8c870933 2025
1da177e4
LT		 2026/*
2027 * Support for /dev/pmu device
2028 */
2029#define RB_SIZE 0x10
2030struct pmu_private {
2031 struct list_head list;
2032 int rb_get;
2033 int rb_put;
2034 struct rb_entry {
2035 unsigned short len;
2036 unsigned char data[16];
2037 } rb_buf[RB_SIZE];
2038 wait_queue_head_t wait;
2039 spinlock_t lock;
2040#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2041 int backlight_locker;
4b755999 2042#endif
1da177e4
LT		 2043};
2044
2045static LIST_HEAD(all_pmu_pvt);
aacaf9bd 2046static DEFINE_SPINLOCK(all_pvt_lock);
1da177e4 2047
aacaf9bd 2048static void
1da177e4
LT		 2049pmu_pass_intr(unsigned char *data, int len)
2050{
2051 struct pmu_private *pp;
2052 struct list_head *list;
2053 int i;
2054 unsigned long flags;
2055
2056 if (len > sizeof(pp->rb_buf[0].data))
2057 len = sizeof(pp->rb_buf[0].data);
2058 spin_lock_irqsave(&all_pvt_lock, flags);
2059 for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
2060 pp = list_entry(list, struct pmu_private, list);
2061 spin_lock(&pp->lock);
2062 i = pp->rb_put + 1;
2063 if (i >= RB_SIZE)
2064 i = 0;
2065 if (i != pp->rb_get) {
2066 struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
2067 rp->len = len;
2068 memcpy(rp->data, data, len);
2069 pp->rb_put = i;
2070 wake_up_interruptible(&pp->wait);
2071 }
2072 spin_unlock(&pp->lock);
2073 }
2074 spin_unlock_irqrestore(&all_pvt_lock, flags);
2075}
2076
aacaf9bd 2077static int
1da177e4
LT		 2078pmu_open(struct inode *inode, struct file *file)
2079{
2080 struct pmu_private *pp;
2081 unsigned long flags;
2082
2083 pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
2084 if (pp == 0)
2085 return -ENOMEM;
2086 pp->rb_get = pp->rb_put = 0;
2087 spin_lock_init(&pp->lock);
2088 init_waitqueue_head(&pp->wait);
d851b6e0 2089 mutex_lock(&pmu_info_proc_mutex);
1da177e4
LT		 2090 spin_lock_irqsave(&all_pvt_lock, flags);
2091#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
2092 pp->backlight_locker = 0;
4b755999 2093#endif
1da177e4
LT		 2094 list_add(&pp->list, &all_pmu_pvt);
2095 spin_unlock_irqrestore(&all_pvt_lock, flags);
2096 file->private_data = pp;
d851b6e0 2097 mutex_unlock(&pmu_info_proc_mutex);
1da177e4
LT		 2098 return 0;
2099}
2100
aacaf9bd 2101static ssize_t
1da177e4
LT		 2102pmu_read(struct file *file, char __user *buf,
2103 size_t count, loff_t *ppos)
2104{
2105 struct pmu_private *pp = file->private_data;
2106 DECLARE_WAITQUEUE(wait, current);
2107 unsigned long flags;
2108 int ret = 0;
2109
2110 if (count < 1 || pp == 0)
2111 return -EINVAL;
2112 if (!access_ok(VERIFY_WRITE, buf, count))
2113 return -EFAULT;
2114
2115 spin_lock_irqsave(&pp->lock, flags);
2116 add_wait_queue(&pp->wait, &wait);
111fbc68 2117 set_current_state(TASK_INTERRUPTIBLE);
1da177e4
LT		 2118
2119 for (;;) {
2120 ret = -EAGAIN;
2121 if (pp->rb_get != pp->rb_put) {
2122 int i = pp->rb_get;
2123 struct rb_entry *rp = &pp->rb_buf[i];
2124 ret = rp->len;
2125 spin_unlock_irqrestore(&pp->lock, flags);
2126 if (ret > count)
2127 ret = count;
2128 if (ret > 0 && copy_to_user(buf, rp->data, ret))
2129 ret = -EFAULT;
2130 if (++i >= RB_SIZE)
2131 i = 0;
2132 spin_lock_irqsave(&pp->lock, flags);
2133 pp->rb_get = i;
2134 }
2135 if (ret >= 0)
2136 break;
2137 if (file->f_flags & O_NONBLOCK)
2138 break;
2139 ret = -ERESTARTSYS;
2140 if (signal_pending(current))
2141 break;
2142 spin_unlock_irqrestore(&pp->lock, flags);
2143 schedule();
2144 spin_lock_irqsave(&pp->lock, flags);
2145 }
111fbc68 2146 __set_current_state(TASK_RUNNING);
1da177e4
LT		 2147 remove_wait_queue(&pp->wait, &wait);
2148 spin_unlock_irqrestore(&pp->lock, flags);
2149
2150 return ret;
2151}
2152
aacaf9bd 2153static ssize_t
1da177e4
LT		 2154pmu_write(struct file *file, const char __user *buf,
2155 size_t count, loff_t *ppos)
2156{
2157 return 0;
2158}
2159
aacaf9bd 2160static unsigned int
1da177e4
LT		 2161pmu_fpoll(struct file *filp, poll_table *wait)
2162{
2163 struct pmu_private *pp = filp->private_data;
2164 unsigned int mask = 0;
2165 unsigned long flags;
2166
2167 if (pp == 0)
2168 return 0;
2169 poll_wait(filp, &pp->wait, wait);
2170 spin_lock_irqsave(&pp->lock, flags);
2171 if (pp->rb_get != pp->rb_put)
2172 mask |= POLLIN;
2173 spin_unlock_irqrestore(&pp->lock, flags);
2174 return mask;
2175}
2176
aacaf9bd 2177static int
1da177e4
LT		 2178pmu_release(struct inode *inode, struct file *file)
2179{
2180 struct pmu_private *pp = file->private_data;
2181 unsigned long flags;
2182
1da177e4
LT		 2183 if (pp != 0) {
2184 file->private_data = NULL;
2185 spin_lock_irqsave(&all_pvt_lock, flags);
2186 list_del(&pp->list);
2187 spin_unlock_irqrestore(&all_pvt_lock, flags);
4b755999 2188
1da177e4 2189#if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
4b755999
MH		 2190 if (pp->backlight_locker)
2191 pmac_backlight_enable();
2192#endif
2193
1da177e4
LT		 2194 kfree(pp);
2195 }
1da177e4
LT		 2196 return 0;
2197}
2198
f91266ed 2199#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
7ac5dde9 2200static void pmac_suspend_disable_irqs(void)
f91266ed 2201{
f91266ed
JB		 2202 /* Call platform functions marked "on sleep" */
2203 pmac_pfunc_i2c_suspend();
2204 pmac_pfunc_base_suspend();
f91266ed
JB		 2205}
2206
2207static int powerbook_sleep(suspend_state_t state)
2208{
2209 int error = 0;
2210
2211 /* Wait for completion of async requests */
2212 while (!batt_req.complete)
2213 pmu_poll();
2214
2215 /* Giveup the lazy FPU & vec so we don't have to back them
2216 * up from the low level code
2217 */
2218 enable_kernel_fp();
2219
2220#ifdef CONFIG_ALTIVEC
2221 if (cpu_has_feature(CPU_FTR_ALTIVEC))
2222 enable_kernel_altivec();
2223#endif /* CONFIG_ALTIVEC */
2224
2225 switch (pmu_kind) {
2226 case PMU_OHARE_BASED:
2227 error = powerbook_sleep_3400();
2228 break;
2229 case PMU_HEATHROW_BASED:
2230 case PMU_PADDINGTON_BASED:
2231 error = powerbook_sleep_grackle();
2232 break;
2233 case PMU_KEYLARGO_BASED:
2234 error = powerbook_sleep_Core99();
2235 break;
2236 default:
2237 return -ENOSYS;
2238 }
2239
2240 if (error)
2241 return error;
2242
2243 mdelay(100);
2244
f91266ed
JB		 2245 return 0;
2246}
2247
7ac5dde9 2248static void pmac_suspend_enable_irqs(void)
f91266ed
JB		 2249{
2250 /* Force a poll of ADB interrupts */
2251 adb_int_pending = 1;
2252 via_pmu_interrupt(0, NULL);
2253
f91266ed 2254 mdelay(10);
f91266ed
JB		 2255
2256 /* Call platform functions marked "on wake" */
2257 pmac_pfunc_base_resume();
2258 pmac_pfunc_i2c_resume();
2259}
2260
2261static int pmu_sleep_valid(suspend_state_t state)
2262{
2263 return state == PM_SUSPEND_MEM
2264 && (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) >= 0);
2265}
2266
2f55ac07 2267static const struct platform_suspend_ops pmu_pm_ops = {
f91266ed
JB		 2268 .enter = powerbook_sleep,
2269 .valid = pmu_sleep_valid,
2270};
2271
2272static int register_pmu_pm_ops(void)
2273{
7ac5dde9
SW		 2274 if (pmu_kind == PMU_OHARE_BASED)
2275 powerbook_sleep_init_3400();
2276 ppc_md.suspend_disable_irqs = pmac_suspend_disable_irqs;
2277 ppc_md.suspend_enable_irqs = pmac_suspend_enable_irqs;
f91266ed
JB		 2278 suspend_set_ops(&pmu_pm_ops);
2279
2280 return 0;
2281}
2282
2283device_initcall(register_pmu_pm_ops);
2284#endif
2285
55929332 2286static int pmu_ioctl(struct file *filp,
1da177e4
LT		 2287 u_int cmd, u_long arg)
2288{
1da177e4 2289 __u32 __user *argp = (__u32 __user *)arg;
8c870933 2290 int error = -EINVAL;
1da177e4
LT		 2291
2292 switch (cmd) {
2293 case PMU_IOC_SLEEP:
2294 if (!capable(CAP_SYS_ADMIN))
2295 return -EACCES;
f91266ed 2296 return pm_suspend(PM_SUSPEND_MEM);
1da177e4 2297 case PMU_IOC_CAN_SLEEP:
f91266ed 2298 if (pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, -1) < 0)
1da177e4
LT		 2299 return put_user(0, argp);
2300 else
2301 return put_user(1, argp);
2302
5474c120
MH		 2303#ifdef CONFIG_PMAC_BACKLIGHT_LEGACY
2304 /* Compatibility ioctl's for backlight */
1da177e4 2305 case PMU_IOC_GET_BACKLIGHT:
5474c120
MH		 2306 {
2307 int brightness;
2308
5474c120
MH		 2309 brightness = pmac_backlight_get_legacy_brightness();
2310 if (brightness < 0)
2311 return brightness;
2312 else
2313 return put_user(brightness, argp);
2314
2315 }
1da177e4
LT		 2316 case PMU_IOC_SET_BACKLIGHT:
2317 {
5474c120
MH		 2318 int brightness;
2319
5474c120
MH		 2320 error = get_user(brightness, argp);
2321 if (error)
2322 return error;
2323
2324 return pmac_backlight_set_legacy_brightness(brightness);
1da177e4
LT		 2325 }
2326#ifdef CONFIG_INPUT_ADBHID
2327 case PMU_IOC_GRAB_BACKLIGHT: {
8c870933 2328 struct pmu_private *pp = filp->private_data;
8c870933 2329
1da177e4
LT		 2330 if (pp->backlight_locker)
2331 return 0;
4b755999 2332
1da177e4 2333 pp->backlight_locker = 1;
4b755999
MH		 2334 pmac_backlight_disable();
2335
1da177e4
LT		 2336 return 0;
2337 }
2338#endif /* CONFIG_INPUT_ADBHID */
5474c120 2339#endif /* CONFIG_PMAC_BACKLIGHT_LEGACY */
4b755999 2340
1da177e4
LT		 2341 case PMU_IOC_GET_MODEL:
2342 return put_user(pmu_kind, argp);
2343 case PMU_IOC_HAS_ADB:
2344 return put_user(pmu_has_adb, argp);
2345 }
8c870933 2346 return error;
1da177e4
LT		 2347}
2348
55929332
AB		 2349static long pmu_unlocked_ioctl(struct file *filp,
2350 u_int cmd, u_long arg)
2351{
2352 int ret;
2353
d851b6e0 2354 mutex_lock(&pmu_info_proc_mutex);
55929332 2355 ret = pmu_ioctl(filp, cmd, arg);
d851b6e0 2356 mutex_unlock(&pmu_info_proc_mutex);
55929332
AB		 2357
2358 return ret;
2359}
2360
4cc4587f
AS		 2361#ifdef CONFIG_COMPAT
2362#define PMU_IOC_GET_BACKLIGHT32 _IOR('B', 1, compat_size_t)
2363#define PMU_IOC_SET_BACKLIGHT32 _IOW('B', 2, compat_size_t)
2364#define PMU_IOC_GET_MODEL32 _IOR('B', 3, compat_size_t)
2365#define PMU_IOC_HAS_ADB32 _IOR('B', 4, compat_size_t)
2366#define PMU_IOC_CAN_SLEEP32 _IOR('B', 5, compat_size_t)
2367#define PMU_IOC_GRAB_BACKLIGHT32 _IOR('B', 6, compat_size_t)
2368
2369static long compat_pmu_ioctl (struct file *filp, u_int cmd, u_long arg)
2370{
2371 switch (cmd) {
2372 case PMU_IOC_SLEEP:
2373 break;
2374 case PMU_IOC_GET_BACKLIGHT32:
2375 cmd = PMU_IOC_GET_BACKLIGHT;
2376 break;
2377 case PMU_IOC_SET_BACKLIGHT32:
2378 cmd = PMU_IOC_SET_BACKLIGHT;
2379 break;
2380 case PMU_IOC_GET_MODEL32:
2381 cmd = PMU_IOC_GET_MODEL;
2382 break;
2383 case PMU_IOC_HAS_ADB32:
2384 cmd = PMU_IOC_HAS_ADB;
2385 break;
2386 case PMU_IOC_CAN_SLEEP32:
2387 cmd = PMU_IOC_CAN_SLEEP;
2388 break;
2389 case PMU_IOC_GRAB_BACKLIGHT32:
2390 cmd = PMU_IOC_GRAB_BACKLIGHT;
2391 break;
2392 default:
2393 return -ENOIOCTLCMD;
2394 }
2395 return pmu_unlocked_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
2396}
2397#endif
2398
fa027c2a 2399static const struct file_operations pmu_device_fops = {
1da177e4
LT		 2400 .read = pmu_read,
2401 .write = pmu_write,
2402 .poll = pmu_fpoll,
55929332 2403 .unlocked_ioctl = pmu_unlocked_ioctl,
4cc4587f
AS		 2404#ifdef CONFIG_COMPAT
2405 .compat_ioctl = compat_pmu_ioctl,
2406#endif
1da177e4
LT		 2407 .open = pmu_open,
2408 .release = pmu_release,
6038f373 2409 .llseek = noop_llseek,
1da177e4
LT		 2410};
2411
aacaf9bd 2412static struct miscdevice pmu_device = {
1da177e4
LT		 2413 PMU_MINOR, "pmu", &pmu_device_fops
2414};
2415
8c870933 2416static int pmu_device_init(void)
1da177e4
LT		 2417{
2418 if (!via)
8c870933 2419 return 0;
1da177e4
LT		 2420 if (misc_register(&pmu_device) < 0)
2421 printk(KERN_ERR "via-pmu: cannot register misc device.\n");
8c870933 2422 return 0;
1da177e4 2423}
8c870933
BH		 2424device_initcall(pmu_device_init);
2425
1da177e4
LT		 2426
2427#ifdef DEBUG_SLEEP
aacaf9bd 2428static inline void
1da177e4
LT		 2429polled_handshake(volatile unsigned char __iomem *via)
2430{
2431 via[B] &= ~TREQ; eieio();
2432 while ((via[B] & TACK) != 0)
2433 ;
2434 via[B] |= TREQ; eieio();
2435 while ((via[B] & TACK) == 0)
2436 ;
2437}
2438
aacaf9bd 2439static inline void
1da177e4
LT		 2440polled_send_byte(volatile unsigned char __iomem *via, int x)
2441{
2442 via[ACR] |= SR_OUT | SR_EXT; eieio();
2443 via[SR] = x; eieio();
2444 polled_handshake(via);
2445}
2446
aacaf9bd 2447static inline int
1da177e4
LT		 2448polled_recv_byte(volatile unsigned char __iomem *via)
2449{
2450 int x;
2451
2452 via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
2453 x = via[SR]; eieio();
2454 polled_handshake(via);
2455 x = via[SR]; eieio();
2456 return x;
2457}
2458
aacaf9bd 2459int
1da177e4
LT		 2460pmu_polled_request(struct adb_request *req)
2461{
2462 unsigned long flags;
2463 int i, l, c;
2464 volatile unsigned char __iomem *v = via;
2465
2466 req->complete = 1;
2467 c = req->data[0];
2468 l = pmu_data_len[c][0];
2469 if (l >= 0 && req->nbytes != l + 1)
2470 return -EINVAL;
2471
2472 local_irq_save(flags);
2473 while (pmu_state != idle)
2474 pmu_poll();
2475
2476 while ((via[B] & TACK) == 0)
2477 ;
2478 polled_send_byte(v, c);
2479 if (l < 0) {
2480 l = req->nbytes - 1;
2481 polled_send_byte(v, l);
2482 }
2483 for (i = 1; i <= l; ++i)
2484 polled_send_byte(v, req->data[i]);
2485
2486 l = pmu_data_len[c][1];
2487 if (l < 0)
2488 l = polled_recv_byte(v);
2489 for (i = 0; i < l; ++i)
2490 req->reply[i + req->reply_len] = polled_recv_byte(v);
2491
2492 if (req->done)
2493 (*req->done)(req);
2494
2495 local_irq_restore(flags);
2496 return 0;
2497}
1da177e4 2498
f91266ed
JB		 2499/* N.B. This doesn't work on the 3400 */
2500void pmu_blink(int n)
2501{
2502 struct adb_request req;
1da177e4 2503
f91266ed 2504 memset(&req, 0, sizeof(req));
1da177e4 2505
f91266ed
JB		 2506 for (; n > 0; --n) {
2507 req.nbytes = 4;
2508 req.done = NULL;
2509 req.data[0] = 0xee;
2510 req.data[1] = 4;
2511 req.data[2] = 0;
2512 req.data[3] = 1;
2513 req.reply[0] = ADB_RET_OK;
2514 req.reply_len = 1;
2515 req.reply_expected = 0;
2516 pmu_polled_request(&req);
2517 mdelay(50);
2518 req.nbytes = 4;
2519 req.done = NULL;
2520 req.data[0] = 0xee;
2521 req.data[1] = 4;
2522 req.data[2] = 0;
2523 req.data[3] = 0;
2524 req.reply[0] = ADB_RET_OK;
2525 req.reply_len = 1;
2526 req.reply_expected = 0;
2527 pmu_polled_request(&req);
2528 mdelay(50);
2529 }
2530 mdelay(50);
2531}
2532#endif /* DEBUG_SLEEP */
1da177e4 2533
f91266ed 2534#if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC32)
f596575e 2535int pmu_sys_suspended;
1da177e4 2536
e83b906c 2537static int pmu_syscore_suspend(void)
1da177e4 2538{
e83b906c 2539 /* Suspend PMU event interrupts */
1da177e4 2540 pmu_suspend();
1da177e4 2541 pmu_sys_suspended = 1;
0094f2cd
BH		 2542
2543#ifdef CONFIG_PMAC_BACKLIGHT
2544 /* Tell backlight code not to muck around with the chip anymore */
2545 pmu_backlight_set_sleep(1);
2546#endif
2547
1da177e4
LT		 2548 return 0;
2549}
2550
e83b906c 2551static void pmu_syscore_resume(void)
1da177e4
LT		 2552{
2553 struct adb_request req;
2554
2555 if (!pmu_sys_suspended)
e83b906c 2556 return;
1da177e4
LT		 2557
2558 /* Tell PMU we are ready */
2559 pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
2560 pmu_wait_complete(&req);
2561
0094f2cd
BH		 2562#ifdef CONFIG_PMAC_BACKLIGHT
2563 /* Tell backlight code it can use the chip again */
2564 pmu_backlight_set_sleep(0);
2565#endif
1da177e4
LT		 2566 /* Resume PMU event interrupts */
2567 pmu_resume();
1da177e4 2568 pmu_sys_suspended = 0;
1da177e4
LT		 2569}
2570
e83b906c
BH		 2571static struct syscore_ops pmu_syscore_ops = {
2572 .suspend = pmu_syscore_suspend,
2573 .resume = pmu_syscore_resume,
1da177e4
LT		 2574};
2575
e83b906c 2576static int pmu_syscore_register(void)
1da177e4 2577{
e83b906c 2578 register_syscore_ops(&pmu_syscore_ops);
1da177e4 2579
1da177e4
LT		 2580 return 0;
2581}
e83b906c
BH		 2582subsys_initcall(pmu_syscore_register);
2583#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4
LT		 2584
2585EXPORT_SYMBOL(pmu_request);
730745a5 2586EXPORT_SYMBOL(pmu_queue_request);
1da177e4
LT		 2587EXPORT_SYMBOL(pmu_poll);
2588EXPORT_SYMBOL(pmu_poll_adb);
2589EXPORT_SYMBOL(pmu_wait_complete);
2590EXPORT_SYMBOL(pmu_suspend);
2591EXPORT_SYMBOL(pmu_resume);
2592EXPORT_SYMBOL(pmu_unlock);
620a2459 2593#if defined(CONFIG_PPC32)
1da177e4
LT		 2594EXPORT_SYMBOL(pmu_enable_irled);
2595EXPORT_SYMBOL(pmu_battery_count);
2596EXPORT_SYMBOL(pmu_batteries);
2597EXPORT_SYMBOL(pmu_power_flags);
f91266ed 2598#endif /* CONFIG_SUSPEND && CONFIG_PPC32 */
1da177e4 2599
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