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Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1c1e45d1 HV |
2 | /* |
3 | * cx18 driver initialization and card probing | |
4 | * | |
5 | * Derived from ivtv-driver.c | |
6 | * | |
7 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
6afdeaf8 | 8 | * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> |
1c1e45d1 HV |
9 | */ |
10 | ||
11 | #include "cx18-driver.h" | |
b1526421 | 12 | #include "cx18-io.h" |
1c1e45d1 HV |
13 | #include "cx18-version.h" |
14 | #include "cx18-cards.h" | |
15 | #include "cx18-i2c.h" | |
16 | #include "cx18-irq.h" | |
17 | #include "cx18-gpio.h" | |
18 | #include "cx18-firmware.h" | |
21a278b8 | 19 | #include "cx18-queue.h" |
1c1e45d1 HV |
20 | #include "cx18-streams.h" |
21 | #include "cx18-av-core.h" | |
22 | #include "cx18-scb.h" | |
23 | #include "cx18-mailbox.h" | |
24 | #include "cx18-ioctl.h" | |
a75b9be1 | 25 | #include "cx18-controls.h" |
1c1e45d1 | 26 | #include "tuner-xc2028.h" |
3907b019 | 27 | #include <linux/dma-mapping.h> |
1c1e45d1 HV |
28 | #include <media/tveeprom.h> |
29 | ||
1c1e45d1 HV |
30 | /* If you have already X v4l cards, then set this to X. This way |
31 | the device numbers stay matched. Example: you have a WinTV card | |
32 | without radio and a Compro H900 with. Normally this would give a | |
33 | video1 device together with a radio0 device for the Compro. By | |
34 | setting this to 1 you ensure that radio0 is now also radio1. */ | |
35 | int cx18_first_minor; | |
36 | ||
d68b687b DH |
37 | /* Callback for registering extensions */ |
38 | int (*cx18_ext_init)(struct cx18 *); | |
39 | EXPORT_SYMBOL(cx18_ext_init); | |
40 | ||
1c1e45d1 | 41 | /* add your revision and whatnot here */ |
1482ccda | 42 | static const struct pci_device_id cx18_pci_tbl[] = { |
1c1e45d1 HV |
43 | {PCI_VENDOR_ID_CX, PCI_DEVICE_ID_CX23418, |
44 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | |
45 | {0,} | |
46 | }; | |
47 | ||
48 | MODULE_DEVICE_TABLE(pci, cx18_pci_tbl); | |
49 | ||
5811cf99 AW |
50 | static atomic_t cx18_instance = ATOMIC_INIT(0); |
51 | ||
1c1e45d1 HV |
52 | /* Parameter declarations */ |
53 | static int cardtype[CX18_MAX_CARDS]; | |
54 | static int tuner[CX18_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1, | |
55 | -1, -1, -1, -1, -1, -1, -1, -1, | |
56 | -1, -1, -1, -1, -1, -1, -1, -1, | |
57 | -1, -1, -1, -1, -1, -1, -1, -1 }; | |
58 | static int radio[CX18_MAX_CARDS] = { -1, -1, -1, -1, -1, -1, -1, -1, | |
59 | -1, -1, -1, -1, -1, -1, -1, -1, | |
60 | -1, -1, -1, -1, -1, -1, -1, -1, | |
61 | -1, -1, -1, -1, -1, -1, -1, -1 }; | |
c6eb8eaf HV |
62 | static unsigned cardtype_c = 1; |
63 | static unsigned tuner_c = 1; | |
b3f5bada | 64 | static unsigned radio_c = 1; |
1c1e45d1 HV |
65 | static char pal[] = "--"; |
66 | static char secam[] = "--"; | |
67 | static char ntsc[] = "-"; | |
68 | ||
69 | /* Buffers */ | |
1c1e45d1 | 70 | static int enc_ts_buffers = CX18_DEFAULT_ENC_TS_BUFFERS; |
6ecd86dc AW |
71 | static int enc_mpg_buffers = CX18_DEFAULT_ENC_MPG_BUFFERS; |
72 | static int enc_idx_buffers = CX18_DEFAULT_ENC_IDX_BUFFERS; | |
1c1e45d1 HV |
73 | static int enc_yuv_buffers = CX18_DEFAULT_ENC_YUV_BUFFERS; |
74 | static int enc_vbi_buffers = CX18_DEFAULT_ENC_VBI_BUFFERS; | |
75 | static int enc_pcm_buffers = CX18_DEFAULT_ENC_PCM_BUFFERS; | |
76 | ||
6ecd86dc AW |
77 | static int enc_ts_bufsize = CX18_DEFAULT_ENC_TS_BUFSIZE; |
78 | static int enc_mpg_bufsize = CX18_DEFAULT_ENC_MPG_BUFSIZE; | |
79 | static int enc_idx_bufsize = CX18_DEFAULT_ENC_IDX_BUFSIZE; | |
80 | static int enc_yuv_bufsize = CX18_DEFAULT_ENC_YUV_BUFSIZE; | |
6ecd86dc AW |
81 | static int enc_pcm_bufsize = CX18_DEFAULT_ENC_PCM_BUFSIZE; |
82 | ||
83 | static int enc_ts_bufs = -1; | |
84 | static int enc_mpg_bufs = -1; | |
efc0b127 | 85 | static int enc_idx_bufs = CX18_MAX_FW_MDLS_PER_STREAM; |
6ecd86dc AW |
86 | static int enc_yuv_bufs = -1; |
87 | static int enc_vbi_bufs = -1; | |
88 | static int enc_pcm_bufs = -1; | |
89 | ||
90 | ||
1c1e45d1 HV |
91 | static int cx18_pci_latency = 1; |
92 | ||
3f75c616 AW |
93 | static int mmio_ndelay; |
94 | static int retry_mmio = 1; | |
95 | ||
1c1e45d1 HV |
96 | int cx18_debug; |
97 | ||
98 | module_param_array(tuner, int, &tuner_c, 0644); | |
b3f5bada | 99 | module_param_array(radio, int, &radio_c, 0644); |
1c1e45d1 HV |
100 | module_param_array(cardtype, int, &cardtype_c, 0644); |
101 | module_param_string(pal, pal, sizeof(pal), 0644); | |
102 | module_param_string(secam, secam, sizeof(secam), 0644); | |
103 | module_param_string(ntsc, ntsc, sizeof(ntsc), 0644); | |
104 | module_param_named(debug, cx18_debug, int, 0644); | |
3f75c616 AW |
105 | module_param(mmio_ndelay, int, 0644); |
106 | module_param(retry_mmio, int, 0644); | |
1c1e45d1 HV |
107 | module_param(cx18_pci_latency, int, 0644); |
108 | module_param(cx18_first_minor, int, 0644); | |
109 | ||
1c1e45d1 | 110 | module_param(enc_ts_buffers, int, 0644); |
6ecd86dc AW |
111 | module_param(enc_mpg_buffers, int, 0644); |
112 | module_param(enc_idx_buffers, int, 0644); | |
1c1e45d1 HV |
113 | module_param(enc_yuv_buffers, int, 0644); |
114 | module_param(enc_vbi_buffers, int, 0644); | |
115 | module_param(enc_pcm_buffers, int, 0644); | |
116 | ||
6ecd86dc AW |
117 | module_param(enc_ts_bufsize, int, 0644); |
118 | module_param(enc_mpg_bufsize, int, 0644); | |
119 | module_param(enc_idx_bufsize, int, 0644); | |
120 | module_param(enc_yuv_bufsize, int, 0644); | |
6ecd86dc AW |
121 | module_param(enc_pcm_bufsize, int, 0644); |
122 | ||
123 | module_param(enc_ts_bufs, int, 0644); | |
124 | module_param(enc_mpg_bufs, int, 0644); | |
125 | module_param(enc_idx_bufs, int, 0644); | |
126 | module_param(enc_yuv_bufs, int, 0644); | |
127 | module_param(enc_vbi_bufs, int, 0644); | |
128 | module_param(enc_pcm_bufs, int, 0644); | |
129 | ||
1c1e45d1 HV |
130 | MODULE_PARM_DESC(tuner, "Tuner type selection,\n" |
131 | "\t\t\tsee tuner.h for values"); | |
132 | MODULE_PARM_DESC(radio, | |
133 | "Enable or disable the radio. Use only if autodetection\n" | |
134 | "\t\t\tfails. 0 = disable, 1 = enable"); | |
135 | MODULE_PARM_DESC(cardtype, | |
136 | "Only use this option if your card is not detected properly.\n" | |
137 | "\t\tSpecify card type:\n" | |
138 | "\t\t\t 1 = Hauppauge HVR 1600 (ESMT memory)\n" | |
139 | "\t\t\t 2 = Hauppauge HVR 1600 (Samsung memory)\n" | |
140 | "\t\t\t 3 = Compro VideoMate H900\n" | |
141 | "\t\t\t 4 = Yuan MPC718\n" | |
03c28085 | 142 | "\t\t\t 5 = Conexant Raptor PAL/SECAM\n" |
9eee4fb6 | 143 | "\t\t\t 6 = Toshiba Qosmio DVB-T/Analog\n" |
9d5af862 AW |
144 | "\t\t\t 7 = Leadtek WinFast PVR2100\n" |
145 | "\t\t\t 8 = Leadtek WinFast DVR3100 H\n" | |
a3634363 | 146 | "\t\t\t 9 = GoTView PCI DVD3 Hybrid\n" |
e3bfeabb | 147 | "\t\t\t 10 = Hauppauge HVR 1600 (S5H1411)\n" |
1c1e45d1 HV |
148 | "\t\t\t 0 = Autodetect (default)\n" |
149 | "\t\t\t-1 = Ignore this card\n\t\t"); | |
150 | MODULE_PARM_DESC(pal, "Set PAL standard: B, G, H, D, K, I, M, N, Nc, 60"); | |
151 | MODULE_PARM_DESC(secam, "Set SECAM standard: B, G, H, D, K, L, LC"); | |
152 | MODULE_PARM_DESC(ntsc, "Set NTSC standard: M, J, K"); | |
153 | MODULE_PARM_DESC(debug, | |
154 | "Debug level (bitmask). Default: 0\n" | |
155 | "\t\t\t 1/0x0001: warning\n" | |
156 | "\t\t\t 2/0x0002: info\n" | |
157 | "\t\t\t 4/0x0004: mailbox\n" | |
158 | "\t\t\t 8/0x0008: dma\n" | |
159 | "\t\t\t 16/0x0010: ioctl\n" | |
160 | "\t\t\t 32/0x0020: file\n" | |
161 | "\t\t\t 64/0x0040: i2c\n" | |
162 | "\t\t\t128/0x0080: irq\n" | |
163 | "\t\t\t256/0x0100: high volume\n"); | |
164 | MODULE_PARM_DESC(cx18_pci_latency, | |
165 | "Change the PCI latency to 64 if lower: 0 = No, 1 = Yes,\n" | |
166 | "\t\t\tDefault: Yes"); | |
d267d851 | 167 | MODULE_PARM_DESC(retry_mmio, |
3f75c616 AW |
168 | "(Deprecated) MMIO writes are now always checked and retried\n" |
169 | "\t\t\tEffectively: 1 [Yes]"); | |
c641d09c | 170 | MODULE_PARM_DESC(mmio_ndelay, |
3f75c616 AW |
171 | "(Deprecated) MMIO accesses are now never purposely delayed\n" |
172 | "\t\t\tEffectively: 0 ns"); | |
1c1e45d1 | 173 | MODULE_PARM_DESC(enc_ts_buffers, |
6ecd86dc | 174 | "Encoder TS buffer memory (MB). (enc_ts_bufs can override)\n" |
1c1e45d1 | 175 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_TS_BUFFERS)); |
6ecd86dc AW |
176 | MODULE_PARM_DESC(enc_ts_bufsize, |
177 | "Size of an encoder TS buffer (kB)\n" | |
178 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_TS_BUFSIZE)); | |
179 | MODULE_PARM_DESC(enc_ts_bufs, | |
180 | "Number of encoder TS buffers\n" | |
181 | "\t\t\tDefault is computed from other enc_ts_* parameters"); | |
182 | MODULE_PARM_DESC(enc_mpg_buffers, | |
183 | "Encoder MPG buffer memory (MB). (enc_mpg_bufs can override)\n" | |
184 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_MPG_BUFFERS)); | |
185 | MODULE_PARM_DESC(enc_mpg_bufsize, | |
186 | "Size of an encoder MPG buffer (kB)\n" | |
187 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_MPG_BUFSIZE)); | |
188 | MODULE_PARM_DESC(enc_mpg_bufs, | |
189 | "Number of encoder MPG buffers\n" | |
190 | "\t\t\tDefault is computed from other enc_mpg_* parameters"); | |
191 | MODULE_PARM_DESC(enc_idx_buffers, | |
efc0b127 AW |
192 | "(Deprecated) Encoder IDX buffer memory (MB)\n" |
193 | "\t\t\tIgnored, except 0 disables IDX buffer allocations\n" | |
194 | "\t\t\tDefault: 1 [Enabled]"); | |
6ecd86dc AW |
195 | MODULE_PARM_DESC(enc_idx_bufsize, |
196 | "Size of an encoder IDX buffer (kB)\n" | |
efc0b127 AW |
197 | "\t\t\tAllowed values are multiples of 1.5 kB rounded up\n" |
198 | "\t\t\t(multiples of size required for 64 index entries)\n" | |
199 | "\t\t\tDefault: 2"); | |
6ecd86dc AW |
200 | MODULE_PARM_DESC(enc_idx_bufs, |
201 | "Number of encoder IDX buffers\n" | |
efc0b127 | 202 | "\t\t\tDefault: " __stringify(CX18_MAX_FW_MDLS_PER_STREAM)); |
1c1e45d1 | 203 | MODULE_PARM_DESC(enc_yuv_buffers, |
6ecd86dc | 204 | "Encoder YUV buffer memory (MB). (enc_yuv_bufs can override)\n" |
1c1e45d1 | 205 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_YUV_BUFFERS)); |
6ecd86dc AW |
206 | MODULE_PARM_DESC(enc_yuv_bufsize, |
207 | "Size of an encoder YUV buffer (kB)\n" | |
22dce188 AW |
208 | "\t\t\tAllowed values are multiples of 33.75 kB rounded up\n" |
209 | "\t\t\t(multiples of size required for 32 screen lines)\n" | |
210 | "\t\t\tDefault: 102"); | |
6ecd86dc AW |
211 | MODULE_PARM_DESC(enc_yuv_bufs, |
212 | "Number of encoder YUV buffers\n" | |
213 | "\t\t\tDefault is computed from other enc_yuv_* parameters"); | |
1c1e45d1 | 214 | MODULE_PARM_DESC(enc_vbi_buffers, |
6ecd86dc | 215 | "Encoder VBI buffer memory (MB). (enc_vbi_bufs can override)\n" |
1c1e45d1 | 216 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_VBI_BUFFERS)); |
6ecd86dc AW |
217 | MODULE_PARM_DESC(enc_vbi_bufs, |
218 | "Number of encoder VBI buffers\n" | |
127ce5f0 | 219 | "\t\t\tDefault is computed from enc_vbi_buffers"); |
1c1e45d1 | 220 | MODULE_PARM_DESC(enc_pcm_buffers, |
6ecd86dc | 221 | "Encoder PCM buffer memory (MB). (enc_pcm_bufs can override)\n" |
1c1e45d1 | 222 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_PCM_BUFFERS)); |
6ecd86dc AW |
223 | MODULE_PARM_DESC(enc_pcm_bufsize, |
224 | "Size of an encoder PCM buffer (kB)\n" | |
225 | "\t\t\tDefault: " __stringify(CX18_DEFAULT_ENC_PCM_BUFSIZE)); | |
226 | MODULE_PARM_DESC(enc_pcm_bufs, | |
227 | "Number of encoder PCM buffers\n" | |
228 | "\t\t\tDefault is computed from other enc_pcm_* parameters"); | |
1c1e45d1 | 229 | |
f8bd9d26 DH |
230 | MODULE_PARM_DESC(cx18_first_minor, |
231 | "Set device node number assigned to first card"); | |
1c1e45d1 HV |
232 | |
233 | MODULE_AUTHOR("Hans Verkuil"); | |
234 | MODULE_DESCRIPTION("CX23418 driver"); | |
235 | MODULE_SUPPORTED_DEVICE("CX23418 MPEG2 encoder"); | |
236 | MODULE_LICENSE("GPL"); | |
237 | ||
238 | MODULE_VERSION(CX18_VERSION); | |
239 | ||
583d338d MCC |
240 | #if defined(CONFIG_MODULES) && defined(MODULE) |
241 | static void request_module_async(struct work_struct *work) | |
242 | { | |
243 | struct cx18 *dev = container_of(work, struct cx18, request_module_wk); | |
244 | ||
245 | /* Make sure cx18-alsa module is loaded */ | |
246 | request_module("cx18-alsa"); | |
247 | ||
248 | /* Initialize cx18-alsa for this instance of the cx18 device */ | |
af28c996 | 249 | if (cx18_ext_init) |
583d338d MCC |
250 | cx18_ext_init(dev); |
251 | } | |
252 | ||
253 | static void request_modules(struct cx18 *dev) | |
254 | { | |
255 | INIT_WORK(&dev->request_module_wk, request_module_async); | |
256 | schedule_work(&dev->request_module_wk); | |
257 | } | |
707bcf32 TH |
258 | |
259 | static void flush_request_modules(struct cx18 *dev) | |
260 | { | |
43829731 | 261 | flush_work(&dev->request_module_wk); |
707bcf32 | 262 | } |
583d338d MCC |
263 | #else |
264 | #define request_modules(dev) | |
707bcf32 | 265 | #define flush_request_modules(dev) |
583d338d | 266 | #endif /* CONFIG_MODULES */ |
d68b687b | 267 | |
1c1e45d1 HV |
268 | /* Generic utility functions */ |
269 | int cx18_msleep_timeout(unsigned int msecs, int intr) | |
270 | { | |
330c6ec8 | 271 | long int timeout = msecs_to_jiffies(msecs); |
1c1e45d1 HV |
272 | int sig; |
273 | ||
274 | do { | |
275 | set_current_state(intr ? TASK_INTERRUPTIBLE : TASK_UNINTERRUPTIBLE); | |
276 | timeout = schedule_timeout(timeout); | |
277 | sig = intr ? signal_pending(current) : 0; | |
278 | } while (!sig && timeout); | |
279 | return sig; | |
280 | } | |
281 | ||
282 | /* Release ioremapped memory */ | |
283 | static void cx18_iounmap(struct cx18 *cx) | |
284 | { | |
af28c996 | 285 | if (!cx) |
1c1e45d1 HV |
286 | return; |
287 | ||
288 | /* Release io memory */ | |
af28c996 | 289 | if (cx->enc_mem) { |
1c1e45d1 HV |
290 | CX18_DEBUG_INFO("releasing enc_mem\n"); |
291 | iounmap(cx->enc_mem); | |
292 | cx->enc_mem = NULL; | |
293 | } | |
294 | } | |
295 | ||
25a42e4d AW |
296 | static void cx18_eeprom_dump(struct cx18 *cx, unsigned char *eedata, int len) |
297 | { | |
298 | int i; | |
299 | ||
300 | CX18_INFO("eeprom dump:\n"); | |
301 | for (i = 0; i < len; i++) { | |
302 | if (0 == (i % 16)) | |
303 | CX18_INFO("eeprom %02x:", i); | |
304 | printk(KERN_CONT " %02x", eedata[i]); | |
305 | if (15 == (i % 16)) | |
306 | printk(KERN_CONT "\n"); | |
307 | } | |
308 | } | |
309 | ||
1c1e45d1 HV |
310 | /* Hauppauge card? get values from tveeprom */ |
311 | void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv) | |
312 | { | |
1d212cf0 | 313 | struct i2c_client *c; |
1c1e45d1 HV |
314 | u8 eedata[256]; |
315 | ||
e351bf25 DC |
316 | memset(tv, 0, sizeof(*tv)); |
317 | ||
1d212cf0 | 318 | c = kzalloc(sizeof(*c), GFP_KERNEL); |
e351bf25 DC |
319 | if (!c) |
320 | return; | |
1d212cf0 | 321 | |
c0decac1 | 322 | strscpy(c->name, "cx18 tveeprom tmp", sizeof(c->name)); |
1d212cf0 MCC |
323 | c->adapter = &cx->i2c_adap[0]; |
324 | c->addr = 0xa0 >> 1; | |
ff2a2001 | 325 | |
1d212cf0 MCC |
326 | if (tveeprom_read(c, eedata, sizeof(eedata))) |
327 | goto ret; | |
25a42e4d AW |
328 | |
329 | switch (cx->card->type) { | |
330 | case CX18_CARD_HVR_1600_ESMT: | |
331 | case CX18_CARD_HVR_1600_SAMSUNG: | |
e3bfeabb | 332 | case CX18_CARD_HVR_1600_S5H1411: |
446aba66 | 333 | tveeprom_hauppauge_analog(tv, eedata); |
25a42e4d AW |
334 | break; |
335 | case CX18_CARD_YUAN_MPC718: | |
a3634363 | 336 | case CX18_CARD_GOTVIEW_PCI_DVD3: |
25a42e4d AW |
337 | tv->model = 0x718; |
338 | cx18_eeprom_dump(cx, eedata, sizeof(eedata)); | |
339 | CX18_INFO("eeprom PCI ID: %02x%02x:%02x%02x\n", | |
340 | eedata[2], eedata[1], eedata[4], eedata[3]); | |
341 | break; | |
342 | default: | |
343 | tv->model = 0xffffffff; | |
344 | cx18_eeprom_dump(cx, eedata, sizeof(eedata)); | |
345 | break; | |
346 | } | |
1d212cf0 MCC |
347 | |
348 | ret: | |
349 | kfree(c); | |
1c1e45d1 HV |
350 | } |
351 | ||
352 | static void cx18_process_eeprom(struct cx18 *cx) | |
353 | { | |
354 | struct tveeprom tv; | |
355 | ||
356 | cx18_read_eeprom(cx, &tv); | |
357 | ||
358 | /* Many thanks to Steven Toth from Hauppauge for providing the | |
359 | model numbers */ | |
1d081601 HV |
360 | /* Note: the Samsung memory models cannot be reliably determined |
361 | from the model number. Use the cardtype module option if you | |
362 | have one of these preproduction models. */ | |
1c1e45d1 | 363 | switch (tv.model) { |
e3bfeabb DH |
364 | case 74301: /* Retail models */ |
365 | case 74321: | |
366 | case 74351: /* OEM models */ | |
367 | case 74361: | |
368 | /* Digital side is s5h1411/tda18271 */ | |
369 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_S5H1411); | |
370 | break; | |
371 | case 74021: /* Retail models */ | |
372 | case 74031: | |
373 | case 74041: | |
374 | case 74141: | |
375 | case 74541: /* OEM models */ | |
376 | case 74551: | |
377 | case 74591: | |
378 | case 74651: | |
379 | case 74691: | |
380 | case 74751: | |
381 | case 74891: | |
382 | /* Digital side is s5h1409/mxl5005s */ | |
1c1e45d1 HV |
383 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
384 | break; | |
25a42e4d AW |
385 | case 0x718: |
386 | return; | |
387 | case 0xffffffff: | |
388 | CX18_INFO("Unknown EEPROM encoding\n"); | |
389 | return; | |
1c1e45d1 HV |
390 | case 0: |
391 | CX18_ERR("Invalid EEPROM\n"); | |
392 | return; | |
393 | default: | |
6beb1388 MCC |
394 | CX18_ERR("Unknown model %d, defaulting to original HVR-1600 (cardtype=1)\n", |
395 | tv.model); | |
1c1e45d1 HV |
396 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
397 | break; | |
398 | } | |
399 | ||
400 | cx->v4l2_cap = cx->card->v4l2_capabilities; | |
401 | cx->card_name = cx->card->name; | |
402 | cx->card_i2c = cx->card->i2c; | |
403 | ||
404 | CX18_INFO("Autodetected %s\n", cx->card_name); | |
405 | ||
406 | if (tv.tuner_type == TUNER_ABSENT) | |
4442ee8b | 407 | CX18_ERR("tveeprom cannot autodetect tuner!\n"); |
1c1e45d1 HV |
408 | |
409 | if (cx->options.tuner == -1) | |
410 | cx->options.tuner = tv.tuner_type; | |
411 | if (cx->options.radio == -1) | |
412 | cx->options.radio = (tv.has_radio != 0); | |
413 | ||
414 | if (cx->std != 0) | |
415 | /* user specified tuner standard */ | |
416 | return; | |
417 | ||
418 | /* autodetect tuner standard */ | |
2bfe2fa4 AW |
419 | #define TVEEPROM_TUNER_FORMAT_ALL (V4L2_STD_B | V4L2_STD_GH | \ |
420 | V4L2_STD_MN | \ | |
421 | V4L2_STD_PAL_I | \ | |
422 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC | \ | |
423 | V4L2_STD_DK) | |
424 | if ((tv.tuner_formats & TVEEPROM_TUNER_FORMAT_ALL) | |
425 | == TVEEPROM_TUNER_FORMAT_ALL) { | |
426 | CX18_DEBUG_INFO("Worldwide tuner detected\n"); | |
427 | cx->std = V4L2_STD_ALL; | |
428 | } else if (tv.tuner_formats & V4L2_STD_PAL) { | |
1c1e45d1 HV |
429 | CX18_DEBUG_INFO("PAL tuner detected\n"); |
430 | cx->std |= V4L2_STD_PAL_BG | V4L2_STD_PAL_H; | |
431 | } else if (tv.tuner_formats & V4L2_STD_NTSC) { | |
432 | CX18_DEBUG_INFO("NTSC tuner detected\n"); | |
433 | cx->std |= V4L2_STD_NTSC_M; | |
434 | } else if (tv.tuner_formats & V4L2_STD_SECAM) { | |
435 | CX18_DEBUG_INFO("SECAM tuner detected\n"); | |
436 | cx->std |= V4L2_STD_SECAM_L; | |
437 | } else { | |
438 | CX18_INFO("No tuner detected, default to NTSC-M\n"); | |
439 | cx->std |= V4L2_STD_NTSC_M; | |
440 | } | |
441 | } | |
442 | ||
443 | static v4l2_std_id cx18_parse_std(struct cx18 *cx) | |
444 | { | |
445 | switch (pal[0]) { | |
446 | case '6': | |
447 | return V4L2_STD_PAL_60; | |
448 | case 'b': | |
449 | case 'B': | |
450 | case 'g': | |
451 | case 'G': | |
452 | return V4L2_STD_PAL_BG; | |
453 | case 'h': | |
454 | case 'H': | |
455 | return V4L2_STD_PAL_H; | |
456 | case 'n': | |
457 | case 'N': | |
458 | if (pal[1] == 'c' || pal[1] == 'C') | |
459 | return V4L2_STD_PAL_Nc; | |
460 | return V4L2_STD_PAL_N; | |
461 | case 'i': | |
462 | case 'I': | |
463 | return V4L2_STD_PAL_I; | |
464 | case 'd': | |
465 | case 'D': | |
466 | case 'k': | |
467 | case 'K': | |
468 | return V4L2_STD_PAL_DK; | |
469 | case 'M': | |
470 | case 'm': | |
471 | return V4L2_STD_PAL_M; | |
472 | case '-': | |
473 | break; | |
474 | default: | |
475 | CX18_WARN("pal= argument not recognised\n"); | |
476 | return 0; | |
477 | } | |
478 | ||
479 | switch (secam[0]) { | |
480 | case 'b': | |
481 | case 'B': | |
482 | case 'g': | |
483 | case 'G': | |
484 | case 'h': | |
485 | case 'H': | |
486 | return V4L2_STD_SECAM_B | V4L2_STD_SECAM_G | V4L2_STD_SECAM_H; | |
487 | case 'd': | |
488 | case 'D': | |
489 | case 'k': | |
490 | case 'K': | |
491 | return V4L2_STD_SECAM_DK; | |
492 | case 'l': | |
493 | case 'L': | |
494 | if (secam[1] == 'C' || secam[1] == 'c') | |
495 | return V4L2_STD_SECAM_LC; | |
496 | return V4L2_STD_SECAM_L; | |
497 | case '-': | |
498 | break; | |
499 | default: | |
500 | CX18_WARN("secam= argument not recognised\n"); | |
501 | return 0; | |
502 | } | |
503 | ||
504 | switch (ntsc[0]) { | |
505 | case 'm': | |
506 | case 'M': | |
507 | return V4L2_STD_NTSC_M; | |
508 | case 'j': | |
509 | case 'J': | |
510 | return V4L2_STD_NTSC_M_JP; | |
511 | case 'k': | |
512 | case 'K': | |
513 | return V4L2_STD_NTSC_M_KR; | |
514 | case '-': | |
515 | break; | |
516 | default: | |
517 | CX18_WARN("ntsc= argument not recognised\n"); | |
518 | return 0; | |
519 | } | |
520 | ||
521 | /* no match found */ | |
522 | return 0; | |
523 | } | |
524 | ||
525 | static void cx18_process_options(struct cx18 *cx) | |
526 | { | |
527 | int i, j; | |
528 | ||
1c1e45d1 | 529 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_TS] = enc_ts_buffers; |
6ecd86dc AW |
530 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_MPG] = enc_mpg_buffers; |
531 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_IDX] = enc_idx_buffers; | |
1c1e45d1 HV |
532 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_YUV] = enc_yuv_buffers; |
533 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_VBI] = enc_vbi_buffers; | |
534 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_PCM] = enc_pcm_buffers; | |
6ecd86dc AW |
535 | cx->options.megabytes[CX18_ENC_STREAM_TYPE_RAD] = 0; /* control only */ |
536 | ||
537 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_TS] = enc_ts_bufs; | |
538 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_MPG] = enc_mpg_bufs; | |
539 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_IDX] = enc_idx_bufs; | |
540 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_YUV] = enc_yuv_bufs; | |
541 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_VBI] = enc_vbi_bufs; | |
542 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_PCM] = enc_pcm_bufs; | |
543 | cx->stream_buffers[CX18_ENC_STREAM_TYPE_RAD] = 0; /* control, no data */ | |
544 | ||
545 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_TS] = enc_ts_bufsize; | |
546 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_MPG] = enc_mpg_bufsize; | |
547 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_IDX] = enc_idx_bufsize; | |
548 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_YUV] = enc_yuv_bufsize; | |
318de791 | 549 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_VBI] = VBI_ACTIVE_SAMPLES * 36; |
6ecd86dc AW |
550 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_PCM] = enc_pcm_bufsize; |
551 | cx->stream_buf_size[CX18_ENC_STREAM_TYPE_RAD] = 0; /* control no data */ | |
552 | ||
466df464 | 553 | /* Ensure stream_buffers & stream_buf_size are valid */ |
6ecd86dc | 554 | for (i = 0; i < CX18_MAX_STREAMS; i++) { |
466df464 AW |
555 | if (cx->stream_buffers[i] == 0 || /* User said 0 buffers */ |
556 | cx->options.megabytes[i] <= 0 || /* User said 0 MB total */ | |
557 | cx->stream_buf_size[i] <= 0) { /* User said buf size 0 */ | |
6ecd86dc AW |
558 | cx->options.megabytes[i] = 0; |
559 | cx->stream_buffers[i] = 0; | |
560 | cx->stream_buf_size[i] = 0; | |
561 | continue; | |
562 | } | |
466df464 | 563 | /* |
22dce188 AW |
564 | * YUV is a special case where the stream_buf_size needs to be |
565 | * an integral multiple of 33.75 kB (storage for 32 screens | |
efc0b127 AW |
566 | * lines to maintain alignment in case of lost buffers). |
567 | * | |
568 | * IDX is a special case where the stream_buf_size should be | |
569 | * an integral multiple of 1.5 kB (storage for 64 index entries | |
570 | * to maintain alignment in case of lost buffers). | |
571 | * | |
22dce188 AW |
572 | */ |
573 | if (i == CX18_ENC_STREAM_TYPE_YUV) { | |
574 | cx->stream_buf_size[i] *= 1024; | |
575 | cx->stream_buf_size[i] -= | |
576 | (cx->stream_buf_size[i] % CX18_UNIT_ENC_YUV_BUFSIZE); | |
577 | ||
578 | if (cx->stream_buf_size[i] < CX18_UNIT_ENC_YUV_BUFSIZE) | |
579 | cx->stream_buf_size[i] = | |
580 | CX18_UNIT_ENC_YUV_BUFSIZE; | |
efc0b127 AW |
581 | } else if (i == CX18_ENC_STREAM_TYPE_IDX) { |
582 | cx->stream_buf_size[i] *= 1024; | |
583 | cx->stream_buf_size[i] -= | |
584 | (cx->stream_buf_size[i] % CX18_UNIT_ENC_IDX_BUFSIZE); | |
585 | ||
586 | if (cx->stream_buf_size[i] < CX18_UNIT_ENC_IDX_BUFSIZE) | |
587 | cx->stream_buf_size[i] = | |
588 | CX18_UNIT_ENC_IDX_BUFSIZE; | |
22dce188 AW |
589 | } |
590 | /* | |
efc0b127 | 591 | * YUV and IDX are special cases where the stream_buf_size is |
22dce188 | 592 | * now in bytes. |
466df464 AW |
593 | * VBI is a special case where the stream_buf_size is fixed |
594 | * and already in bytes | |
595 | */ | |
22dce188 | 596 | if (i == CX18_ENC_STREAM_TYPE_VBI || |
efc0b127 AW |
597 | i == CX18_ENC_STREAM_TYPE_YUV || |
598 | i == CX18_ENC_STREAM_TYPE_IDX) { | |
466df464 AW |
599 | if (cx->stream_buffers[i] < 0) { |
600 | cx->stream_buffers[i] = | |
601 | cx->options.megabytes[i] * 1024 * 1024 | |
602 | / cx->stream_buf_size[i]; | |
603 | } else { | |
604 | /* N.B. This might round down to 0 */ | |
605 | cx->options.megabytes[i] = | |
606 | cx->stream_buffers[i] | |
607 | * cx->stream_buf_size[i]/(1024 * 1024); | |
6ecd86dc | 608 | } |
6ecd86dc | 609 | } else { |
22dce188 AW |
610 | /* All other streams have stream_buf_size in kB here */ |
611 | if (cx->stream_buffers[i] < 0) { | |
612 | cx->stream_buffers[i] = | |
613 | cx->options.megabytes[i] * 1024 | |
614 | / cx->stream_buf_size[i]; | |
615 | } else { | |
616 | /* N.B. This might round down to 0 */ | |
617 | cx->options.megabytes[i] = | |
618 | cx->stream_buffers[i] | |
619 | * cx->stream_buf_size[i] / 1024; | |
620 | } | |
621 | /* convert from kB to bytes */ | |
622 | cx->stream_buf_size[i] *= 1024; | |
6ecd86dc | 623 | } |
6beb1388 MCC |
624 | CX18_DEBUG_INFO("Stream type %d options: %d MB, %d buffers, %d bytes\n", |
625 | i, cx->options.megabytes[i], | |
22dce188 | 626 | cx->stream_buffers[i], cx->stream_buf_size[i]); |
6ecd86dc AW |
627 | } |
628 | ||
5811cf99 AW |
629 | cx->options.cardtype = cardtype[cx->instance]; |
630 | cx->options.tuner = tuner[cx->instance]; | |
631 | cx->options.radio = radio[cx->instance]; | |
1c1e45d1 HV |
632 | |
633 | cx->std = cx18_parse_std(cx); | |
634 | if (cx->options.cardtype == -1) { | |
635 | CX18_INFO("Ignore card\n"); | |
636 | return; | |
637 | } | |
638 | cx->card = cx18_get_card(cx->options.cardtype - 1); | |
639 | if (cx->card) | |
640 | CX18_INFO("User specified %s card\n", cx->card->name); | |
641 | else if (cx->options.cardtype != 0) | |
642 | CX18_ERR("Unknown user specified type, trying to autodetect card\n"); | |
af28c996 | 643 | if (!cx->card) { |
3d05913d | 644 | if (cx->pci_dev->subsystem_vendor == CX18_PCI_ID_HAUPPAUGE) { |
1c1e45d1 HV |
645 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
646 | CX18_INFO("Autodetected Hauppauge card\n"); | |
647 | } | |
648 | } | |
af28c996 | 649 | if (!cx->card) { |
1c1e45d1 | 650 | for (i = 0; (cx->card = cx18_get_card(i)); i++) { |
af28c996 | 651 | if (!cx->card->pci_list) |
1c1e45d1 HV |
652 | continue; |
653 | for (j = 0; cx->card->pci_list[j].device; j++) { | |
3d05913d | 654 | if (cx->pci_dev->device != |
1c1e45d1 HV |
655 | cx->card->pci_list[j].device) |
656 | continue; | |
3d05913d | 657 | if (cx->pci_dev->subsystem_vendor != |
1c1e45d1 HV |
658 | cx->card->pci_list[j].subsystem_vendor) |
659 | continue; | |
3d05913d | 660 | if (cx->pci_dev->subsystem_device != |
1c1e45d1 HV |
661 | cx->card->pci_list[j].subsystem_device) |
662 | continue; | |
663 | CX18_INFO("Autodetected %s card\n", cx->card->name); | |
664 | goto done; | |
665 | } | |
666 | } | |
667 | } | |
668 | done: | |
669 | ||
af28c996 | 670 | if (!cx->card) { |
1c1e45d1 | 671 | cx->card = cx18_get_card(CX18_CARD_HVR_1600_ESMT); |
29e66a6c | 672 | CX18_ERR("Unknown card: vendor/device: [%04x:%04x]\n", |
3d05913d | 673 | cx->pci_dev->vendor, cx->pci_dev->device); |
29e66a6c | 674 | CX18_ERR(" subsystem vendor/device: [%04x:%04x]\n", |
3d05913d AW |
675 | cx->pci_dev->subsystem_vendor, |
676 | cx->pci_dev->subsystem_device); | |
1c1e45d1 HV |
677 | CX18_ERR("Defaulting to %s card\n", cx->card->name); |
678 | CX18_ERR("Please mail the vendor/device and subsystem vendor/device IDs and what kind of\n"); | |
679 | CX18_ERR("card you have to the ivtv-devel mailinglist (www.ivtvdriver.org)\n"); | |
680 | CX18_ERR("Prefix your subject line with [UNKNOWN CX18 CARD].\n"); | |
681 | } | |
682 | cx->v4l2_cap = cx->card->v4l2_capabilities; | |
683 | cx->card_name = cx->card->name; | |
684 | cx->card_i2c = cx->card->i2c; | |
685 | } | |
686 | ||
4c62e976 | 687 | static int cx18_create_in_workq(struct cx18 *cx) |
87116159 AW |
688 | { |
689 | snprintf(cx->in_workq_name, sizeof(cx->in_workq_name), "%s-in", | |
690 | cx->v4l2_dev.name); | |
d8537548 | 691 | cx->in_work_queue = alloc_ordered_workqueue("%s", 0, cx->in_workq_name); |
af28c996 | 692 | if (!cx->in_work_queue) { |
87116159 AW |
693 | CX18_ERR("Unable to create incoming mailbox handler thread\n"); |
694 | return -ENOMEM; | |
695 | } | |
696 | return 0; | |
697 | } | |
698 | ||
4c62e976 | 699 | static void cx18_init_in_work_orders(struct cx18 *cx) |
87116159 AW |
700 | { |
701 | int i; | |
702 | for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) { | |
703 | cx->in_work_order[i].cx = cx; | |
704 | cx->in_work_order[i].str = cx->epu_debug_str; | |
705 | INIT_WORK(&cx->in_work_order[i].work, cx18_in_work_handler); | |
706 | } | |
707 | } | |
708 | ||
1c1e45d1 | 709 | /* Precondition: the cx18 structure has been memset to 0. Only |
5811cf99 | 710 | the dev and instance fields have been filled in. |
1c1e45d1 HV |
711 | No assumptions on the card type may be made here (see cx18_init_struct2 |
712 | for that). | |
713 | */ | |
4c62e976 | 714 | static int cx18_init_struct1(struct cx18 *cx) |
1c1e45d1 | 715 | { |
87116159 | 716 | int ret; |
ee2d64f5 | 717 | |
3d05913d | 718 | cx->base_addr = pci_resource_start(cx->pci_dev, 0); |
1c1e45d1 HV |
719 | |
720 | mutex_init(&cx->serialize_lock); | |
8abdd00d | 721 | mutex_init(&cx->gpio_lock); |
72c2d6d3 AW |
722 | mutex_init(&cx->epu2apu_mb_lock); |
723 | mutex_init(&cx->epu2cpu_mb_lock); | |
1c1e45d1 | 724 | |
87116159 | 725 | ret = cx18_create_in_workq(cx); |
a3bc5e33 | 726 | if (ret) |
87116159 | 727 | return ret; |
1d6782bd | 728 | |
87116159 AW |
729 | cx18_init_in_work_orders(cx); |
730 | ||
1c1e45d1 HV |
731 | /* start counting open_id at 1 */ |
732 | cx->open_id = 1; | |
733 | ||
734 | /* Initial settings */ | |
a75b9be1 HV |
735 | cx->cxhdl.port = CX2341X_PORT_MEMORY; |
736 | cx->cxhdl.capabilities = CX2341X_CAP_HAS_TS | CX2341X_CAP_HAS_SLICED_VBI; | |
737 | cx->cxhdl.ops = &cx18_cxhdl_ops; | |
738 | cx->cxhdl.func = cx18_api_func; | |
7ee9e64a | 739 | cx->cxhdl.priv = &cx->streams[CX18_ENC_STREAM_TYPE_MPG]; |
a75b9be1 HV |
740 | ret = cx2341x_handler_init(&cx->cxhdl, 50); |
741 | if (ret) | |
742 | return ret; | |
743 | cx->v4l2_dev.ctrl_handler = &cx->cxhdl.hdl; | |
744 | ||
745 | cx->temporal_strength = cx->cxhdl.video_temporal_filter->cur.val; | |
746 | cx->spatial_strength = cx->cxhdl.video_spatial_filter->cur.val; | |
747 | cx->filter_mode = cx->cxhdl.video_spatial_filter_mode->cur.val | | |
748 | (cx->cxhdl.video_temporal_filter_mode->cur.val << 1) | | |
749 | (cx->cxhdl.video_median_filter_type->cur.val << 2); | |
750 | ||
1c1e45d1 HV |
751 | init_waitqueue_head(&cx->cap_w); |
752 | init_waitqueue_head(&cx->mb_apu_waitq); | |
753 | init_waitqueue_head(&cx->mb_cpu_waitq); | |
1c1e45d1 HV |
754 | init_waitqueue_head(&cx->dma_waitq); |
755 | ||
756 | /* VBI */ | |
dd073434 | 757 | cx->vbi.in.type = V4L2_BUF_TYPE_VBI_CAPTURE; |
1c1e45d1 | 758 | cx->vbi.sliced_in = &cx->vbi.in.fmt.sliced; |
af009cf6 | 759 | |
52fcb3ec AW |
760 | /* IVTV style VBI insertion into MPEG streams */ |
761 | INIT_LIST_HEAD(&cx->vbi.sliced_mpeg_buf.list); | |
762 | INIT_LIST_HEAD(&cx->vbi.sliced_mpeg_mdl.list); | |
763 | INIT_LIST_HEAD(&cx->vbi.sliced_mpeg_mdl.buf_list); | |
764 | list_add(&cx->vbi.sliced_mpeg_buf.list, | |
765 | &cx->vbi.sliced_mpeg_mdl.buf_list); | |
1c1e45d1 HV |
766 | return 0; |
767 | } | |
768 | ||
769 | /* Second initialization part. Here the card type has been | |
770 | autodetected. */ | |
4c62e976 | 771 | static void cx18_init_struct2(struct cx18 *cx) |
1c1e45d1 HV |
772 | { |
773 | int i; | |
774 | ||
2f9e682d | 775 | for (i = 0; i < CX18_CARD_MAX_VIDEO_INPUTS - 1; i++) |
1c1e45d1 HV |
776 | if (cx->card->video_inputs[i].video_type == 0) |
777 | break; | |
778 | cx->nof_inputs = i; | |
2f9e682d | 779 | for (i = 0; i < CX18_CARD_MAX_AUDIO_INPUTS - 1; i++) |
1c1e45d1 HV |
780 | if (cx->card->audio_inputs[i].audio_type == 0) |
781 | break; | |
782 | cx->nof_audio_inputs = i; | |
783 | ||
784 | /* Find tuner input */ | |
785 | for (i = 0; i < cx->nof_inputs; i++) { | |
786 | if (cx->card->video_inputs[i].video_type == | |
787 | CX18_CARD_INPUT_VID_TUNER) | |
788 | break; | |
789 | } | |
790 | if (i == cx->nof_inputs) | |
791 | i = 0; | |
792 | cx->active_input = i; | |
793 | cx->audio_input = cx->card->video_inputs[i].audio_index; | |
1c1e45d1 HV |
794 | } |
795 | ||
3d05913d | 796 | static int cx18_setup_pci(struct cx18 *cx, struct pci_dev *pci_dev, |
1c1e45d1 HV |
797 | const struct pci_device_id *pci_id) |
798 | { | |
799 | u16 cmd; | |
800 | unsigned char pci_latency; | |
801 | ||
802 | CX18_DEBUG_INFO("Enabling pci device\n"); | |
803 | ||
3d05913d | 804 | if (pci_enable_device(pci_dev)) { |
5811cf99 | 805 | CX18_ERR("Can't enable device %d!\n", cx->instance); |
1c1e45d1 HV |
806 | return -EIO; |
807 | } | |
3907b019 | 808 | if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32))) { |
5811cf99 | 809 | CX18_ERR("No suitable DMA available, card %d\n", cx->instance); |
1c1e45d1 HV |
810 | return -EIO; |
811 | } | |
812 | if (!request_mem_region(cx->base_addr, CX18_MEM_SIZE, "cx18 encoder")) { | |
5811cf99 AW |
813 | CX18_ERR("Cannot request encoder memory region, card %d\n", |
814 | cx->instance); | |
1c1e45d1 HV |
815 | return -EIO; |
816 | } | |
817 | ||
4519064c | 818 | /* Enable bus mastering and memory mapped IO for the CX23418 */ |
3d05913d | 819 | pci_read_config_word(pci_dev, PCI_COMMAND, &cmd); |
4519064c | 820 | cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; |
3d05913d | 821 | pci_write_config_word(pci_dev, PCI_COMMAND, cmd); |
1c1e45d1 | 822 | |
abd34d8d | 823 | cx->card_rev = pci_dev->revision; |
3d05913d | 824 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &pci_latency); |
1c1e45d1 HV |
825 | |
826 | if (pci_latency < 64 && cx18_pci_latency) { | |
6beb1388 MCC |
827 | CX18_INFO("Unreasonably low latency timer, setting to 64 (was %d)\n", |
828 | pci_latency); | |
3d05913d AW |
829 | pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, 64); |
830 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &pci_latency); | |
1c1e45d1 | 831 | } |
1c1e45d1 | 832 | |
6beb1388 | 833 | CX18_DEBUG_INFO("cx%d (rev %d) at %02x:%02x.%x, irq: %d, latency: %d, memory: 0x%llx\n", |
3d05913d AW |
834 | cx->pci_dev->device, cx->card_rev, pci_dev->bus->number, |
835 | PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn), | |
42d0c3ad | 836 | cx->pci_dev->irq, pci_latency, (u64)cx->base_addr); |
1c1e45d1 HV |
837 | |
838 | return 0; | |
839 | } | |
840 | ||
ff2a2001 | 841 | static void cx18_init_subdevs(struct cx18 *cx) |
1c1e45d1 HV |
842 | { |
843 | u32 hw = cx->card->hw_all; | |
ff2a2001 | 844 | u32 device; |
1c1e45d1 HV |
845 | int i; |
846 | ||
ff2a2001 | 847 | for (i = 0, device = 1; i < 32; i++, device <<= 1) { |
1c1e45d1 HV |
848 | |
849 | if (!(device & hw)) | |
850 | continue; | |
ff2a2001 AW |
851 | |
852 | switch (device) { | |
ff2a2001 AW |
853 | case CX18_HW_DVB: |
854 | case CX18_HW_TVEEPROM: | |
855 | /* These subordinate devices do not use probing */ | |
1c1e45d1 | 856 | cx->hw_flags |= device; |
ff2a2001 AW |
857 | break; |
858 | case CX18_HW_418_AV: | |
859 | /* The A/V decoder gets probed earlier to set PLLs */ | |
860 | /* Just note that the card uses it (i.e. has analog) */ | |
1c1e45d1 | 861 | cx->hw_flags |= device; |
ff2a2001 | 862 | break; |
eefe1010 AW |
863 | case CX18_HW_GPIO_RESET_CTRL: |
864 | /* | |
865 | * The Reset Controller gets probed and added to | |
866 | * hw_flags earlier for i2c adapter/bus initialization | |
867 | */ | |
868 | break; | |
869 | case CX18_HW_GPIO_MUX: | |
870 | if (cx18_gpio_register(cx, device) == 0) | |
871 | cx->hw_flags |= device; | |
872 | break; | |
ff2a2001 AW |
873 | default: |
874 | if (cx18_i2c_register(cx, i) == 0) | |
875 | cx->hw_flags |= device; | |
876 | break; | |
877 | } | |
1c1e45d1 HV |
878 | } |
879 | ||
ff2a2001 AW |
880 | if (cx->hw_flags & CX18_HW_418_AV) |
881 | cx->sd_av = cx18_find_hw(cx, CX18_HW_418_AV); | |
882 | ||
883 | if (cx->card->hw_muxer != 0) | |
884 | cx->sd_extmux = cx18_find_hw(cx, cx->card->hw_muxer); | |
1c1e45d1 HV |
885 | } |
886 | ||
4c62e976 GKH |
887 | static int cx18_probe(struct pci_dev *pci_dev, |
888 | const struct pci_device_id *pci_id) | |
1c1e45d1 HV |
889 | { |
890 | int retval = 0; | |
ff086575 | 891 | int i; |
1c1e45d1 HV |
892 | u32 devtype; |
893 | struct cx18 *cx; | |
894 | ||
5811cf99 AW |
895 | /* FIXME - module parameter arrays constrain max instances */ |
896 | i = atomic_inc_return(&cx18_instance) - 1; | |
897 | if (i >= CX18_MAX_CARDS) { | |
6beb1388 MCC |
898 | printk(KERN_ERR "cx18: cannot manage card %d, driver has a limit of 0 - %d\n", |
899 | i, CX18_MAX_CARDS - 1); | |
1c1e45d1 HV |
900 | return -ENOMEM; |
901 | } | |
902 | ||
2d3da59f | 903 | cx = kzalloc(sizeof(*cx), GFP_ATOMIC); |
c38e8657 | 904 | if (!cx) |
1c1e45d1 | 905 | return -ENOMEM; |
c38e8657 | 906 | |
888cdb07 | 907 | cx->pci_dev = pci_dev; |
5811cf99 AW |
908 | cx->instance = i; |
909 | ||
888cdb07 AW |
910 | retval = v4l2_device_register(&pci_dev->dev, &cx->v4l2_dev); |
911 | if (retval) { | |
6beb1388 MCC |
912 | printk(KERN_ERR "cx18: v4l2_device_register of card %d failed\n", |
913 | cx->instance); | |
5811cf99 AW |
914 | kfree(cx); |
915 | return retval; | |
888cdb07 | 916 | } |
5811cf99 AW |
917 | snprintf(cx->v4l2_dev.name, sizeof(cx->v4l2_dev.name), "cx18-%d", |
918 | cx->instance); | |
919 | CX18_INFO("Initializing card %d\n", cx->instance); | |
888cdb07 | 920 | |
1c1e45d1 HV |
921 | cx18_process_options(cx); |
922 | if (cx->options.cardtype == -1) { | |
923 | retval = -ENODEV; | |
5811cf99 | 924 | goto err; |
1c1e45d1 | 925 | } |
87116159 AW |
926 | |
927 | retval = cx18_init_struct1(cx); | |
928 | if (retval) | |
5811cf99 | 929 | goto err; |
1c1e45d1 | 930 | |
42d0c3ad | 931 | CX18_DEBUG_INFO("base addr: 0x%llx\n", (u64)cx->base_addr); |
1c1e45d1 HV |
932 | |
933 | /* PCI Device Setup */ | |
3d05913d | 934 | retval = cx18_setup_pci(cx, pci_dev, pci_id); |
572bfea7 | 935 | if (retval != 0) |
87116159 | 936 | goto free_workqueues; |
572bfea7 | 937 | |
1c1e45d1 | 938 | /* map io memory */ |
42d0c3ad HV |
939 | CX18_DEBUG_INFO("attempting ioremap at 0x%llx len 0x%08x\n", |
940 | (u64)cx->base_addr + CX18_MEM_OFFSET, CX18_MEM_SIZE); | |
1c1e45d1 HV |
941 | cx->enc_mem = ioremap_nocache(cx->base_addr + CX18_MEM_OFFSET, |
942 | CX18_MEM_SIZE); | |
943 | if (!cx->enc_mem) { | |
6beb1388 MCC |
944 | CX18_ERR("ioremap failed. Can't get a window into CX23418 memory and register space\n"); |
945 | CX18_ERR("Each capture card with a CX23418 needs 64 MB of vmalloc address space for the window\n"); | |
fa98447f | 946 | CX18_ERR("Check the output of 'grep Vmalloc /proc/meminfo'\n"); |
6beb1388 | 947 | CX18_ERR("Use the vmalloc= kernel command line option to set VmallocTotal to a larger value\n"); |
1c1e45d1 HV |
948 | retval = -ENOMEM; |
949 | goto free_mem; | |
950 | } | |
951 | cx->reg_mem = cx->enc_mem + CX18_REG_OFFSET; | |
b1526421 | 952 | devtype = cx18_read_reg(cx, 0xC72028); |
1c1e45d1 HV |
953 | switch (devtype & 0xff000000) { |
954 | case 0xff000000: | |
955 | CX18_INFO("cx23418 revision %08x (A)\n", devtype); | |
956 | break; | |
957 | case 0x01000000: | |
958 | CX18_INFO("cx23418 revision %08x (B)\n", devtype); | |
959 | break; | |
960 | default: | |
961 | CX18_INFO("cx23418 revision %08x (Unknown)\n", devtype); | |
962 | break; | |
963 | } | |
964 | ||
965 | cx18_init_power(cx, 1); | |
966 | cx18_init_memory(cx); | |
967 | ||
990c81c8 | 968 | cx->scb = (struct cx18_scb __iomem *)(cx->enc_mem + SCB_OFFSET); |
1c1e45d1 HV |
969 | cx18_init_scb(cx); |
970 | ||
971 | cx18_gpio_init(cx); | |
972 | ||
ff2a2001 AW |
973 | /* Initialize integrated A/V decoder early to set PLLs, just in case */ |
974 | retval = cx18_av_probe(cx); | |
fa3e7036 AW |
975 | if (retval) { |
976 | CX18_ERR("Could not register A/V decoder subdevice\n"); | |
977 | goto free_map; | |
978 | } | |
fa3e7036 | 979 | |
eefe1010 AW |
980 | /* Initialize GPIO Reset Controller to do chip resets during i2c init */ |
981 | if (cx->card->hw_all & CX18_HW_GPIO_RESET_CTRL) { | |
982 | if (cx18_gpio_register(cx, CX18_HW_GPIO_RESET_CTRL) != 0) | |
6beb1388 | 983 | CX18_WARN("Could not register GPIO reset controllersubdevice; proceeding anyway.\n"); |
eefe1010 AW |
984 | else |
985 | cx->hw_flags |= CX18_HW_GPIO_RESET_CTRL; | |
986 | } | |
987 | ||
1c1e45d1 HV |
988 | /* active i2c */ |
989 | CX18_DEBUG_INFO("activating i2c...\n"); | |
9b4a7c8a AW |
990 | retval = init_cx18_i2c(cx); |
991 | if (retval) { | |
1c1e45d1 HV |
992 | CX18_ERR("Could not initialize i2c\n"); |
993 | goto free_map; | |
994 | } | |
995 | ||
1c1e45d1 HV |
996 | if (cx->card->hw_all & CX18_HW_TVEEPROM) { |
997 | /* Based on the model number the cardtype may be changed. | |
998 | The PCI IDs are not always reliable. */ | |
2bfe2fa4 | 999 | const struct cx18_card *orig_card = cx->card; |
1c1e45d1 | 1000 | cx18_process_eeprom(cx); |
2bfe2fa4 AW |
1001 | |
1002 | if (cx->card != orig_card) { | |
1003 | /* Changed the cardtype; re-reset the I2C chips */ | |
1004 | cx18_gpio_init(cx); | |
1005 | cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL, | |
1006 | core, reset, (u32) CX18_GPIO_RESET_I2C); | |
1007 | } | |
1c1e45d1 HV |
1008 | } |
1009 | if (cx->card->comment) | |
1010 | CX18_INFO("%s", cx->card->comment); | |
1011 | if (cx->card->v4l2_capabilities == 0) { | |
1012 | retval = -ENODEV; | |
1013 | goto free_i2c; | |
1014 | } | |
1015 | cx18_init_memory(cx); | |
fd6b9c97 | 1016 | cx18_init_scb(cx); |
1c1e45d1 HV |
1017 | |
1018 | /* Register IRQ */ | |
3d05913d | 1019 | retval = request_irq(cx->pci_dev->irq, cx18_irq_handler, |
9a373d17 | 1020 | IRQF_SHARED, cx->v4l2_dev.name, (void *)cx); |
1c1e45d1 HV |
1021 | if (retval) { |
1022 | CX18_ERR("Failed to register irq %d\n", retval); | |
1023 | goto free_i2c; | |
1024 | } | |
1025 | ||
1026 | if (cx->std == 0) | |
1027 | cx->std = V4L2_STD_NTSC_M; | |
1028 | ||
1029 | if (cx->options.tuner == -1) { | |
1c1e45d1 HV |
1030 | for (i = 0; i < CX18_CARD_MAX_TUNERS; i++) { |
1031 | if ((cx->std & cx->card->tuners[i].std) == 0) | |
1032 | continue; | |
1033 | cx->options.tuner = cx->card->tuners[i].tuner; | |
1034 | break; | |
1035 | } | |
1036 | } | |
1037 | /* if no tuner was found, then pick the first tuner in the card list */ | |
1038 | if (cx->options.tuner == -1 && cx->card->tuners[0].std) { | |
1039 | cx->std = cx->card->tuners[0].std; | |
c3cb4d95 HV |
1040 | if (cx->std & V4L2_STD_PAL) |
1041 | cx->std = V4L2_STD_PAL_BG | V4L2_STD_PAL_H; | |
1042 | else if (cx->std & V4L2_STD_NTSC) | |
1043 | cx->std = V4L2_STD_NTSC_M; | |
1044 | else if (cx->std & V4L2_STD_SECAM) | |
1045 | cx->std = V4L2_STD_SECAM_L; | |
1c1e45d1 HV |
1046 | cx->options.tuner = cx->card->tuners[0].tuner; |
1047 | } | |
1048 | if (cx->options.radio == -1) | |
1049 | cx->options.radio = (cx->card->radio_input.audio_type != 0); | |
1050 | ||
1051 | /* The card is now fully identified, continue with card-specific | |
1052 | initialization. */ | |
1053 | cx18_init_struct2(cx); | |
1054 | ||
ff2a2001 | 1055 | cx18_init_subdevs(cx); |
1c1e45d1 | 1056 | |
8d037ed1 | 1057 | if (cx->std & V4L2_STD_525_60) |
1c1e45d1 | 1058 | cx->is_60hz = 1; |
8d037ed1 | 1059 | else |
1c1e45d1 | 1060 | cx->is_50hz = 1; |
8d037ed1 | 1061 | |
a75b9be1 | 1062 | cx2341x_handler_set_50hz(&cx->cxhdl, !cx->is_60hz); |
1c1e45d1 | 1063 | |
1c1e45d1 HV |
1064 | if (cx->options.radio > 0) |
1065 | cx->v4l2_cap |= V4L2_CAP_RADIO; | |
1066 | ||
1c1e45d1 HV |
1067 | if (cx->options.tuner > -1) { |
1068 | struct tuner_setup setup; | |
1069 | ||
1070 | setup.addr = ADDR_UNSET; | |
1071 | setup.type = cx->options.tuner; | |
1072 | setup.mode_mask = T_ANALOG_TV; /* matches TV tuners */ | |
6a03dc92 | 1073 | setup.config = NULL; |
c8c741b6 AW |
1074 | if (cx->options.radio > 0) |
1075 | setup.mode_mask |= T_RADIO; | |
1c1e45d1 HV |
1076 | setup.tuner_callback = (setup.type == TUNER_XC2028) ? |
1077 | cx18_reset_tuner_gpio : NULL; | |
ff2a2001 | 1078 | cx18_call_all(cx, tuner, s_type_addr, &setup); |
1c1e45d1 HV |
1079 | if (setup.type == TUNER_XC2028) { |
1080 | static struct xc2028_ctrl ctrl = { | |
1081 | .fname = XC2028_DEFAULT_FIRMWARE, | |
1082 | .max_len = 64, | |
1083 | }; | |
1084 | struct v4l2_priv_tun_config cfg = { | |
1085 | .tuner = cx->options.tuner, | |
1086 | .priv = &ctrl, | |
1087 | }; | |
ff2a2001 | 1088 | cx18_call_all(cx, tuner, s_config, &cfg); |
1c1e45d1 HV |
1089 | } |
1090 | } | |
1091 | ||
1092 | /* The tuner is fixed to the standard. The other inputs (e.g. S-Video) | |
1093 | are not. */ | |
1094 | cx->tuner_std = cx->std; | |
2bfe2fa4 AW |
1095 | if (cx->std == V4L2_STD_ALL) |
1096 | cx->std = V4L2_STD_NTSC_M; | |
1c1e45d1 | 1097 | |
5e7fdc5e HV |
1098 | retval = cx18_streams_setup(cx); |
1099 | if (retval) { | |
1100 | CX18_ERR("Error %d setting up streams\n", retval); | |
1101 | goto free_irq; | |
1102 | } | |
1103 | retval = cx18_streams_register(cx); | |
1104 | if (retval) { | |
1105 | CX18_ERR("Error %d registering devices\n", retval); | |
1106 | goto free_streams; | |
1107 | } | |
1c1e45d1 | 1108 | |
5811cf99 | 1109 | CX18_INFO("Initialized card: %s\n", cx->card_name); |
d68b687b DH |
1110 | |
1111 | /* Load cx18 submodules (cx18-alsa) */ | |
1112 | request_modules(cx); | |
1c1e45d1 HV |
1113 | return 0; |
1114 | ||
1115 | free_streams: | |
3f98387e | 1116 | cx18_streams_cleanup(cx, 1); |
1c1e45d1 | 1117 | free_irq: |
3d05913d | 1118 | free_irq(cx->pci_dev->irq, (void *)cx); |
1c1e45d1 HV |
1119 | free_i2c: |
1120 | exit_cx18_i2c(cx); | |
1121 | free_map: | |
1122 | cx18_iounmap(cx); | |
1123 | free_mem: | |
1124 | release_mem_region(cx->base_addr, CX18_MEM_SIZE); | |
87116159 | 1125 | free_workqueues: |
deed75ed | 1126 | destroy_workqueue(cx->in_work_queue); |
1c1e45d1 | 1127 | err: |
1c1e45d1 HV |
1128 | CX18_ERR("Error %d on initialization\n", retval); |
1129 | ||
5811cf99 AW |
1130 | v4l2_device_unregister(&cx->v4l2_dev); |
1131 | kfree(cx); | |
1c1e45d1 HV |
1132 | return retval; |
1133 | } | |
1134 | ||
1135 | int cx18_init_on_first_open(struct cx18 *cx) | |
1136 | { | |
1137 | int video_input; | |
1138 | int fw_retry_count = 3; | |
1139 | struct v4l2_frequency vf; | |
3b6fe58f | 1140 | struct cx18_open_id fh; |
2bfe2fa4 | 1141 | v4l2_std_id std; |
3b6fe58f AW |
1142 | |
1143 | fh.cx = cx; | |
1c1e45d1 HV |
1144 | |
1145 | if (test_bit(CX18_F_I_FAILED, &cx->i_flags)) | |
1146 | return -ENXIO; | |
1147 | ||
1148 | if (test_and_set_bit(CX18_F_I_INITED, &cx->i_flags)) | |
1149 | return 0; | |
1150 | ||
1151 | while (--fw_retry_count > 0) { | |
1152 | /* load firmware */ | |
1153 | if (cx18_firmware_init(cx) == 0) | |
1154 | break; | |
1155 | if (fw_retry_count > 1) | |
1156 | CX18_WARN("Retry loading firmware\n"); | |
1157 | } | |
1158 | ||
1159 | if (fw_retry_count == 0) { | |
1160 | set_bit(CX18_F_I_FAILED, &cx->i_flags); | |
1161 | return -ENXIO; | |
1162 | } | |
1163 | set_bit(CX18_F_I_LOADED_FW, &cx->i_flags); | |
1164 | ||
350145a4 AW |
1165 | /* |
1166 | * Init the firmware twice to work around a silicon bug | |
1167 | * with the digital TS. | |
1168 | * | |
1169 | * The second firmware load requires us to normalize the APU state, | |
1170 | * or the audio for the first analog capture will be badly incorrect. | |
1171 | * | |
1172 | * I can't seem to call APU_RESETAI and have it succeed without the | |
1173 | * APU capturing audio, so we start and stop it here to do the reset | |
1174 | */ | |
1175 | ||
1176 | /* MPEG Encoding, 224 kbps, MPEG Layer II, 48 ksps */ | |
1177 | cx18_vapi(cx, CX18_APU_START, 2, CX18_APU_ENCODING_METHOD_MPEG|0xb9, 0); | |
1178 | cx18_vapi(cx, CX18_APU_RESETAI, 0); | |
1179 | cx18_vapi(cx, CX18_APU_STOP, 1, CX18_APU_ENCODING_METHOD_MPEG); | |
1c1e45d1 HV |
1180 | |
1181 | fw_retry_count = 3; | |
1182 | while (--fw_retry_count > 0) { | |
1183 | /* load firmware */ | |
1184 | if (cx18_firmware_init(cx) == 0) | |
1185 | break; | |
1186 | if (fw_retry_count > 1) | |
1187 | CX18_WARN("Retry loading firmware\n"); | |
1188 | } | |
1189 | ||
1190 | if (fw_retry_count == 0) { | |
1191 | set_bit(CX18_F_I_FAILED, &cx->i_flags); | |
1192 | return -ENXIO; | |
1193 | } | |
1194 | ||
d5c02f6b AW |
1195 | /* |
1196 | * The second firmware load requires us to normalize the APU state, | |
1197 | * or the audio for the first analog capture will be badly incorrect. | |
1198 | * | |
1199 | * I can't seem to call APU_RESETAI and have it succeed without the | |
1200 | * APU capturing audio, so we start and stop it here to do the reset | |
1201 | */ | |
1202 | ||
1203 | /* MPEG Encoding, 224 kbps, MPEG Layer II, 48 ksps */ | |
1204 | cx18_vapi(cx, CX18_APU_START, 2, CX18_APU_ENCODING_METHOD_MPEG|0xb9, 0); | |
1205 | cx18_vapi(cx, CX18_APU_RESETAI, 0); | |
1206 | cx18_vapi(cx, CX18_APU_STOP, 1, CX18_APU_ENCODING_METHOD_MPEG); | |
1207 | ||
fa3e7036 | 1208 | /* Init the A/V decoder, if it hasn't been already */ |
cc26b076 | 1209 | v4l2_subdev_call(cx->sd_av, core, load_fw); |
fa3e7036 | 1210 | |
1c1e45d1 HV |
1211 | vf.tuner = 0; |
1212 | vf.type = V4L2_TUNER_ANALOG_TV; | |
1213 | vf.frequency = 6400; /* the tuner 'baseline' frequency */ | |
1214 | ||
1215 | /* Set initial frequency. For PAL/SECAM broadcasts no | |
1216 | 'default' channel exists AFAIK. */ | |
1217 | if (cx->std == V4L2_STD_NTSC_M_JP) | |
1218 | vf.frequency = 1460; /* ch. 1 91250*16/1000 */ | |
1219 | else if (cx->std & V4L2_STD_NTSC_M) | |
1220 | vf.frequency = 1076; /* ch. 4 67250*16/1000 */ | |
1221 | ||
1222 | video_input = cx->active_input; | |
1223 | cx->active_input++; /* Force update of input */ | |
3b6fe58f | 1224 | cx18_s_input(NULL, &fh, video_input); |
1c1e45d1 HV |
1225 | |
1226 | /* Let the VIDIOC_S_STD ioctl do all the work, keeps the code | |
1227 | in one place. */ | |
1228 | cx->std++; /* Force full standard initialization */ | |
2bfe2fa4 | 1229 | std = (cx->tuner_std == V4L2_STD_ALL) ? V4L2_STD_NTSC_M : cx->tuner_std; |
314527ac | 1230 | cx18_s_std(NULL, &fh, std); |
3b6fe58f | 1231 | cx18_s_frequency(NULL, &fh, &vf); |
1c1e45d1 HV |
1232 | return 0; |
1233 | } | |
1234 | ||
deed75ed | 1235 | static void cx18_cancel_in_work_orders(struct cx18 *cx) |
18b5dc2e AW |
1236 | { |
1237 | int i; | |
deed75ed AW |
1238 | for (i = 0; i < CX18_MAX_IN_WORK_ORDERS; i++) |
1239 | cancel_work_sync(&cx->in_work_order[i].work); | |
18b5dc2e AW |
1240 | } |
1241 | ||
21a278b8 AW |
1242 | static void cx18_cancel_out_work_orders(struct cx18 *cx) |
1243 | { | |
1244 | int i; | |
1245 | for (i = 0; i < CX18_MAX_STREAMS; i++) | |
eb1ca9a4 | 1246 | if (cx->streams[i].video_dev.v4l2_dev) |
21a278b8 AW |
1247 | cancel_work_sync(&cx->streams[i].out_work_order); |
1248 | } | |
1249 | ||
1c1e45d1 HV |
1250 | static void cx18_remove(struct pci_dev *pci_dev) |
1251 | { | |
888cdb07 | 1252 | struct v4l2_device *v4l2_dev = pci_get_drvdata(pci_dev); |
5811cf99 | 1253 | struct cx18 *cx = to_cx18(v4l2_dev); |
6da6bf5e | 1254 | int i; |
1c1e45d1 | 1255 | |
5811cf99 | 1256 | CX18_DEBUG_INFO("Removing Card\n"); |
1c1e45d1 | 1257 | |
707bcf32 TH |
1258 | flush_request_modules(cx); |
1259 | ||
1c1e45d1 HV |
1260 | /* Stop all captures */ |
1261 | CX18_DEBUG_INFO("Stopping all streams\n"); | |
31554ae5 | 1262 | if (atomic_read(&cx->tot_capturing) > 0) |
1c1e45d1 HV |
1263 | cx18_stop_all_captures(cx); |
1264 | ||
87116159 | 1265 | /* Stop interrupts that cause incoming work to be queued */ |
b1526421 | 1266 | cx18_sw1_irq_disable(cx, IRQ_CPU_TO_EPU | IRQ_APU_TO_EPU); |
87116159 AW |
1267 | |
1268 | /* Incoming work can cause outgoing work, so clean up incoming first */ | |
1269 | cx18_cancel_in_work_orders(cx); | |
21a278b8 | 1270 | cx18_cancel_out_work_orders(cx); |
87116159 AW |
1271 | |
1272 | /* Stop ack interrupts that may have been needed for work to finish */ | |
b1526421 | 1273 | cx18_sw2_irq_disable(cx, IRQ_CPU_TO_EPU_ACK | IRQ_APU_TO_EPU_ACK); |
1c1e45d1 HV |
1274 | |
1275 | cx18_halt_firmware(cx); | |
1276 | ||
deed75ed | 1277 | destroy_workqueue(cx->in_work_queue); |
572bfea7 | 1278 | |
3f98387e | 1279 | cx18_streams_cleanup(cx, 1); |
1c1e45d1 HV |
1280 | |
1281 | exit_cx18_i2c(cx); | |
1282 | ||
3d05913d | 1283 | free_irq(cx->pci_dev->irq, (void *)cx); |
1c1e45d1 | 1284 | |
cba627a5 | 1285 | cx18_iounmap(cx); |
1c1e45d1 HV |
1286 | |
1287 | release_mem_region(cx->base_addr, CX18_MEM_SIZE); | |
1288 | ||
3d05913d | 1289 | pci_disable_device(cx->pci_dev); |
6da6bf5e | 1290 | |
af28c996 | 1291 | if (cx->vbi.sliced_mpeg_data[0]) |
6da6bf5e AW |
1292 | for (i = 0; i < CX18_VBI_FRAMES; i++) |
1293 | kfree(cx->vbi.sliced_mpeg_data[i]); | |
1c1e45d1 | 1294 | |
a75b9be1 HV |
1295 | v4l2_ctrl_handler_free(&cx->av_state.hdl); |
1296 | ||
5811cf99 | 1297 | CX18_INFO("Removed %s\n", cx->card_name); |
888cdb07 | 1298 | |
5811cf99 AW |
1299 | v4l2_device_unregister(v4l2_dev); |
1300 | kfree(cx); | |
1c1e45d1 HV |
1301 | } |
1302 | ||
d68b687b | 1303 | |
1c1e45d1 HV |
1304 | /* define a pci_driver for card detection */ |
1305 | static struct pci_driver cx18_pci_driver = { | |
1306 | .name = "cx18", | |
1307 | .id_table = cx18_pci_tbl, | |
1308 | .probe = cx18_probe, | |
1309 | .remove = cx18_remove, | |
1310 | }; | |
1311 | ||
9710e7a7 | 1312 | static int __init module_start(void) |
1c1e45d1 | 1313 | { |
f8bd9d26 DH |
1314 | printk(KERN_INFO "cx18: Start initialization, version %s\n", |
1315 | CX18_VERSION); | |
1c1e45d1 | 1316 | |
1c1e45d1 HV |
1317 | /* Validate parameters */ |
1318 | if (cx18_first_minor < 0 || cx18_first_minor >= CX18_MAX_CARDS) { | |
dd89601d | 1319 | printk(KERN_ERR "cx18: Exiting, cx18_first_minor must be between 0 and %d\n", |
1c1e45d1 HV |
1320 | CX18_MAX_CARDS - 1); |
1321 | return -1; | |
1322 | } | |
1323 | ||
1324 | if (cx18_debug < 0 || cx18_debug > 511) { | |
1325 | cx18_debug = 0; | |
1326 | printk(KERN_INFO "cx18: Debug value must be >= 0 and <= 511!\n"); | |
1327 | } | |
1328 | ||
1329 | if (pci_register_driver(&cx18_pci_driver)) { | |
1330 | printk(KERN_ERR "cx18: Error detecting PCI card\n"); | |
1331 | return -ENODEV; | |
1332 | } | |
1333 | printk(KERN_INFO "cx18: End initialization\n"); | |
1334 | return 0; | |
1335 | } | |
1336 | ||
9710e7a7 | 1337 | static void __exit module_cleanup(void) |
1c1e45d1 | 1338 | { |
1c1e45d1 | 1339 | pci_unregister_driver(&cx18_pci_driver); |
1c1e45d1 HV |
1340 | } |
1341 | ||
1342 | module_init(module_start); | |
1343 | module_exit(module_cleanup); | |
8a7bf1d4 | 1344 | MODULE_FIRMWARE(XC2028_DEFAULT_FIRMWARE); |