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[thirdparty/kernel/stable.git] / drivers / media / pci / cx18 / cx18-driver.h
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c942fddf 1/* SPDX-License-Identifier: GPL-2.0-or-later */
1c1e45d1
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2/*
3 * cx18 driver internal defines and structures
4 *
5 * Derived from ivtv-driver.h
6 *
7 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6afdeaf8 8 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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9 */
10
11#ifndef CX18_DRIVER_H
12#define CX18_DRIVER_H
13
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14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
174cd4b1 18#include <linux/sched/signal.h>
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19#include <linux/fs.h>
20#include <linux/pci.h>
21#include <linux/interrupt.h>
22#include <linux/spinlock.h>
23#include <linux/i2c.h>
24#include <linux/i2c-algo-bit.h>
25#include <linux/list.h>
26#include <linux/unistd.h>
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27#include <linux/pagemap.h>
28#include <linux/workqueue.h>
29#include <linux/mutex.h>
5a0e3ad6 30#include <linux/slab.h>
1a651a00 31#include <asm/byteorder.h>
1c1e45d1 32
1c1e45d1 33#include <media/v4l2-common.h>
35ea11ff 34#include <media/v4l2-ioctl.h>
888cdb07 35#include <media/v4l2-device.h>
0b5f265a 36#include <media/v4l2-fh.h>
1c1e45d1 37#include <media/tuner.h>
b5dcee22 38#include <media/i2c/ir-kbd-i2c.h>
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39#include "cx18-mailbox.h"
40#include "cx18-av-core.h"
41#include "cx23418.h"
42
43/* DVB */
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44#include <media/demux.h>
45#include <media/dmxdev.h>
46#include <media/dvb_demux.h>
47#include <media/dvb_frontend.h>
48#include <media/dvb_net.h>
49#include <media/dvbdev.h>
1c1e45d1 50
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51/* Videobuf / YUV support */
52#include <media/videobuf-core.h>
53#include <media/videobuf-vmalloc.h>
54
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55#ifndef CONFIG_PCI
56# error "This driver requires kernel PCI support."
57#endif
58
59#define CX18_MEM_OFFSET 0x00000000
60#define CX18_MEM_SIZE 0x04000000
61#define CX18_REG_OFFSET 0x02000000
62
63/* Maximum cx18 driver instances. */
64#define CX18_MAX_CARDS 32
65
66/* Supported cards */
67#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
68#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
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69#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
70#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
03c28085 71#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
9eee4fb6 72#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
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73#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
74#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
a3634363 75#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */
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76#define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/
77#define CX18_CARD_LAST 9
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78
79#define CX18_ENC_STREAM_TYPE_MPG 0
80#define CX18_ENC_STREAM_TYPE_TS 1
81#define CX18_ENC_STREAM_TYPE_YUV 2
82#define CX18_ENC_STREAM_TYPE_VBI 3
83#define CX18_ENC_STREAM_TYPE_PCM 4
84#define CX18_ENC_STREAM_TYPE_IDX 5
85#define CX18_ENC_STREAM_TYPE_RAD 6
86#define CX18_MAX_STREAMS 7
87
88/* system vendor and device IDs */
89#define PCI_VENDOR_ID_CX 0x14f1
90#define PCI_DEVICE_ID_CX23418 0x5b7a
91
92/* subsystem vendor ID */
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93#define CX18_PCI_ID_HAUPPAUGE 0x0070
94#define CX18_PCI_ID_COMPRO 0x185b
95#define CX18_PCI_ID_YUAN 0x12ab
03c28085 96#define CX18_PCI_ID_CONEXANT 0x14f1
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97#define CX18_PCI_ID_TOSHIBA 0x1179
98#define CX18_PCI_ID_LEADTEK 0x107D
a3634363 99#define CX18_PCI_ID_GOTVIEW 0x5854
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100
101/* ======================================================================== */
102/* ========================== START USER SETTABLE DMA VARIABLES =========== */
103/* ======================================================================== */
104
105/* DMA Buffers, Default size in MB allocated */
106#define CX18_DEFAULT_ENC_TS_BUFFERS 1
107#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
108#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
109#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
110#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
111#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
112
6ecd86dc 113/* Maximum firmware DMA buffers per stream */
0ef02892 114#define CX18_MAX_FW_MDLS_PER_STREAM 63
6ecd86dc 115
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116/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
117#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */
118#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
119#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
120
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121/* IDX buffer size should be a multiple of the index entry size from the chip */
122struct cx18_enc_idx_entry {
123 __le32 length;
124 __le32 offset_low;
125 __le32 offset_high;
126 __le32 flags;
127 __le32 pts_low;
128 __le32 pts_high;
129} __attribute__ ((packed));
130#define CX18_UNIT_ENC_IDX_BUFSIZE \
131 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
132
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133/* DMA buffer, default size in kB allocated */
134#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
135#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
efc0b127 136#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
22dce188 137#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
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138#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
139
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140/* i2c stuff */
141#define I2C_CLIENTS_MAX 16
142
143/* debugging */
144
145/* Flag to turn on high volume debugging */
146#define CX18_DBGFLG_WARN (1 << 0)
147#define CX18_DBGFLG_INFO (1 << 1)
148#define CX18_DBGFLG_API (1 << 2)
149#define CX18_DBGFLG_DMA (1 << 3)
150#define CX18_DBGFLG_IOCTL (1 << 4)
151#define CX18_DBGFLG_FILE (1 << 5)
152#define CX18_DBGFLG_I2C (1 << 6)
153#define CX18_DBGFLG_IRQ (1 << 7)
154/* Flag to turn on high volume debugging */
155#define CX18_DBGFLG_HIGHVOL (1 << 8)
156
5811cf99 157/* NOTE: extra space before comma in 'fmt , ## args' is required for
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158 gcc-2.95, otherwise it won't compile. */
159#define CX18_DEBUG(x, type, fmt, args...) \
160 do { \
161 if ((x) & cx18_debug) \
5811cf99 162 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
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163 } while (0)
164#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
165#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
166#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
167#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
168#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
169#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
170#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
171#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
172
173#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
174 do { \
175 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
5811cf99 176 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
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177 } while (0)
178#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
179#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
180#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
181#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
182#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
183#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
184#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
185#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
186
187/* Standard kernel messages */
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188#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
189#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
190#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
1c1e45d1 191
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192/* Messages for internal subdevs to use */
193#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
194 do { \
195 if ((x) & cx18_debug) \
196 v4l2_info(dev, " " type ": " fmt , ## args); \
197 } while (0)
198#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
199 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
200#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
201 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
202#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
203 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
204#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
205 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
206#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
207 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
208#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
209 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
210#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
211 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
212#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
213 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
214
215#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
216 do { \
217 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
218 v4l2_info(dev, " " type ": " fmt , ## args); \
219 } while (0)
220#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
221 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
222#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
223 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
224#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
225 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
226#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
227 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
228#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
229 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
230#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
231 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
232#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
233 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
234#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
235 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
236
237#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
238#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
239#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
240
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241extern int cx18_debug;
242
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243struct cx18_options {
244 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
245 int cardtype; /* force card type on load */
246 int tuner; /* set tuner on load */
247 int radio; /* enable/disable radio */
248};
249
52fcb3ec 250/* per-mdl bit flags */
39c1cb2b 251#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianness swapped */
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252
253/* per-stream, s_flags */
6e6a8b5a 254#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
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255#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
256#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
257#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
258#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
87116159 259#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
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260
261/* per-cx18, i_flags */
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262#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
263#define CX18_F_I_EOS 4 /* End of encoder stream */
264#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
265#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
266#define CX18_F_I_INITED 21 /* set after first open */
267#define CX18_F_I_FAILED 22 /* set if first open failed */
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268
269/* These are the VBI types as they appear in the embedded VBI private packets. */
270#define CX18_SLICED_TYPE_TELETEXT_B (1)
271#define CX18_SLICED_TYPE_CAPTION_525 (4)
272#define CX18_SLICED_TYPE_WSS_625 (5)
273#define CX18_SLICED_TYPE_VPS (7)
274
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275/**
276 * list_entry_is_past_end - check if a previous loop cursor is off list end
277 * @pos: the type * previously used as a loop cursor.
278 * @head: the head for your list.
3943f42c 279 * @member: the name of the list_head within the struct.
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280 *
281 * Check if the entry's list_head is the head of the list, thus it's not a
282 * real entry but was the loop cursor that walked past the end
283 */
284#define list_entry_is_past_end(pos, head, member) \
285 (&pos->member == (head))
286
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287struct cx18_buffer {
288 struct list_head list;
289 dma_addr_t dma_handle;
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290 char *buf;
291
292 u32 bytesused;
293 u32 readpos;
294};
295
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296struct cx18_mdl {
297 struct list_head list;
298 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
299
300 unsigned int skipped;
301 unsigned long m_flags;
302
303 struct list_head buf_list;
304 struct cx18_buffer *curr_buf; /* current buffer in list for reading */
305
306 u32 bytesused;
307 u32 readpos;
308};
309
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310struct cx18_queue {
311 struct list_head list;
c37b11bf 312 atomic_t depth;
1c1e45d1 313 u32 bytesused;
40c5520f 314 spinlock_t lock;
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315};
316
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317struct cx18_stream; /* forward reference */
318
1c1e45d1 319struct cx18_dvb {
754f9969 320 struct cx18_stream *stream;
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321 struct dmx_frontend hw_frontend;
322 struct dmx_frontend mem_frontend;
323 struct dmxdev dmxdev;
324 struct dvb_adapter dvb_adapter;
325 struct dvb_demux demux;
326 struct dvb_frontend *fe;
327 struct dvb_net dvbnet;
328 int enabled;
329 int feeding;
1c1e45d1 330 struct mutex feedlock;
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331};
332
333struct cx18; /* forward reference */
334struct cx18_scb; /* forward reference */
335
72a4f808 336
ee2d64f5 337#define CX18_MAX_MDL_ACKS 2
deed75ed 338#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
0ef02892 339/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
ee2d64f5 340
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341#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
342#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
343#define CX18_F_EWO_MB_STALE \
344 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
345
deed75ed 346struct cx18_in_work_order {
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347 struct work_struct work;
348 atomic_t pending;
349 struct cx18 *cx;
72a4f808 350 unsigned long flags;
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351 int rpu;
352 struct cx18_mailbox mb;
353 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
354 char *str;
355};
356
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357#define CX18_INVALID_TASK_HANDLE 0xffffffff
358
1c1e45d1 359struct cx18_stream {
754f9969 360 /* These first five fields are always set, even if the stream
1c1e45d1 361 is not actually created. */
08569d64 362 struct video_device video_dev; /* v4l2_dev is NULL when stream not created */
754f9969 363 struct cx18_dvb *dvb; /* DVB / Digital Transport */
6e6a8b5a 364 struct cx18 *cx; /* for ease of use */
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365 const char *name; /* name of the stream */
366 int type; /* stream type */
367 u32 handle; /* task handle */
dfdf780b 368 u32 v4l2_dev_caps; /* device capabilities */
fa655dda 369 unsigned int mdl_base_idx;
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370
371 u32 id;
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372 unsigned long s_flags; /* status flags, see above */
373 int dma; /* can be PCI_DMA_TODEVICE,
374 PCI_DMA_FROMDEVICE or
375 PCI_DMA_NONE */
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376 wait_queue_head_t waitq;
377
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378 /* Buffers */
379 struct list_head buf_pool; /* buffers not attached to an MDL */
380 u32 buffers; /* total buffers owned by this stream */
381 u32 buf_size; /* size in bytes of a single buffer */
382
383 /* MDL sizes - all stream MDLs are the same size */
384 u32 bufs_per_mdl;
385 u32 mdl_size; /* total bytes in all buffers in a mdl */
1c1e45d1 386
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387 /* MDL Queues */
388 struct cx18_queue q_free; /* free - in rotation, not committed */
389 struct cx18_queue q_busy; /* busy - in use by firmware */
390 struct cx18_queue q_full; /* full - data for user apps */
391 struct cx18_queue q_idle; /* idle - not in rotation */
1c1e45d1 392
21a278b8 393 struct work_struct out_work_order;
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394
395 /* Videobuf for YUV video */
396 u32 pixelformat;
09fc9802 397 u32 vb_bytes_per_frame;
48ab45ad 398 u32 vb_bytes_per_line;
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399 struct list_head vb_capture; /* video capture queue */
400 spinlock_t vb_lock;
b7101de3 401 struct timer_list vb_timeout;
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402
403 struct videobuf_queue vbuf_q;
404 spinlock_t vbuf_q_lock; /* Protect vbuf_q */
405 enum v4l2_buf_type vb_type;
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406};
407
408struct cx18_videobuf_buffer {
409 /* Common video buffer sub-system struct */
410 struct videobuf_buffer vb;
411 v4l2_std_id tvnorm; /* selected tv norm */
412 u32 bytes_used;
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413};
414
415struct cx18_open_id {
0b5f265a 416 struct v4l2_fh fh;
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417 u32 open_id;
418 int type;
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419 struct cx18 *cx;
420};
421
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422static inline struct cx18_open_id *fh2id(struct v4l2_fh *fh)
423{
424 return container_of(fh, struct cx18_open_id, fh);
425}
426
427static inline struct cx18_open_id *file2id(struct file *file)
428{
429 return fh2id(file->private_data);
430}
431
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432/* forward declaration of struct defined in cx18-cards.h */
433struct cx18_card;
434
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435/*
436 * A note about "sliced" VBI data as implemented in this driver:
437 *
438 * Currently we collect the sliced VBI in the form of Ancillary Data
439 * packets, inserted by the AV core decoder/digitizer/slicer in the
440 * horizontal blanking region of the VBI lines, in "raw" mode as far as
441 * the Encoder is concerned. We don't ever tell the Encoder itself
442 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
443 *
444 * We then process the ancillary data ourselves to send the sliced data
445 * to the user application directly or build up MPEG-2 private stream 1
446 * packets to splice into (only!) MPEG-2 PS streams for the user app.
447 *
448 * (That's how ivtv essentially does it.)
449 *
450 * The Encoder should be able to extract certain sliced VBI data for
451 * us and provide it in a separate stream or splice it into any type of
452 * MPEG PS or TS stream, but this isn't implemented yet.
453 */
454
455/*
456 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
457 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
458 * It depends on the pixel clock and the horiz rate:
459 *
460 * (1/Fh)*(2*Fp) = Samples/line
461 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
462 *
463 * Sliced VBI data is sent as ancillary data during horizontal blanking
464 * Raw VBI is sent as active video samples during vertcal blanking
465 *
466 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
467 * length of 720 pixels @ 4:2:2 sampling. Thus...
468 *
469 * For systems that use a 15.734 kHz horizontal rate, such as
470 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
471 *
472 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
473 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
474 *
475 * For systems that use a 15.625 kHz horizontal rate, such as
476 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
477 *
478 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
479 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
480 */
318de791
MCC
481#define VBI_ACTIVE_SAMPLES 1444 /* 4 byte SAV + 720 Y + 720 U/V */
482#define VBI_HBLANK_SAMPLES_60HZ 272 /* 4 byte EAV + 268 anc/fill */
483#define VBI_HBLANK_SAMPLES_50HZ 284 /* 4 byte EAV + 280 anc/fill */
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484
485#define CX18_VBI_FRAMES 32
486
1c1e45d1 487struct vbi_info {
302df970 488 /* Current state of v4l2 VBI settings for this device */
1c1e45d1 489 struct v4l2_format in;
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490 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
491 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
492 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
1c1e45d1 493
302df970 494 u32 frame; /* Count of VBI buffers/frames received from Encoder */
1c1e45d1 495
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496 /*
497 * Vars for creation and insertion of MPEG Private Stream 1 packets
498 * of sliced VBI data into an MPEG PS
499 */
1c1e45d1 500
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501 /* Boolean: create and insert Private Stream 1 packets into the PS */
502 int insert_mpeg;
503
504 /*
505 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
506 * Used in cx18-vbi.c only for collecting sliced data, and as a source
507 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
508 * We don't need to save state here, but the array may have been a bit
509 * too big (2304 bytes) to alloc from the stack.
510 */
511 struct v4l2_sliced_vbi_data sliced_data[36];
1c1e45d1 512
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513 /*
514 * A ring buffer of driver-generated MPEG-2 PS
515 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
516 * into the MPEG PS stream.
517 *
518 * In each sliced_mpeg_data[] buffer is:
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519 * 16 byte MPEG-2 PS Program Pack Header
520 * 16 byte MPEG-2 Private Stream 1 PES Header
521 * 4 byte magic number: "itv0" or "ITV0"
522 * 4 byte first field line mask, if "itv0"
523 * 4 byte second field line mask, if "itv0"
524 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
302df970 525 *
6e6a8b5a 526 * Each line in the payload is
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527 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
528 * 42 bytes of line data
529 *
530 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
531 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
532 * accept for VBI data. So, including the headers, it's a maximum 1584
533 * bytes total.
534 */
535#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
536 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
537#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
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538 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
539 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
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540
541 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
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542 u32 inserted_frame;
543
302df970 544 /*
52fcb3ec 545 * A dummy driver stream transfer mdl & buffer with a copy of the next
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546 * sliced_mpeg_data[] buffer for output to userland apps.
547 * Only used in cx18-fileops.c, but its state needs to persist at times.
548 */
52fcb3ec 549 struct cx18_mdl sliced_mpeg_mdl;
302df970 550 struct cx18_buffer sliced_mpeg_buf;
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551};
552
553/* Per cx23418, per I2C bus private algo callback data */
554struct cx18_i2c_algo_callback_data {
555 struct cx18 *cx;
556 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
557};
558
f7823f8f 559#define CX18_MAX_MMIO_WR_RETRIES 10
330c6ec8 560
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561/* Struct to hold info about cx18 cards */
562struct cx18 {
5811cf99 563 int instance;
3d05913d 564 struct pci_dev *pci_dev;
888cdb07 565 struct v4l2_device v4l2_dev;
ff2a2001 566 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
eefe1010 567 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
888cdb07 568
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569 const struct cx18_card *card; /* card information */
570 const char *card_name; /* full name of the card */
571 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
572 u8 is_50hz;
573 u8 is_60hz;
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574 u8 nof_inputs; /* number of video inputs */
575 u8 nof_audio_inputs; /* number of audio inputs */
1c1e45d1 576 u32 v4l2_cap; /* V4L2 capabilities of card */
6e6a8b5a 577 u32 hw_flags; /* Hardware description of the board */
fa655dda 578 unsigned int free_mdl_idx;
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579 struct cx18_scb __iomem *scb; /* pointer to SCB */
580 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
581 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
582
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583 struct cx18_av_state av_state;
584
585 /* codec settings */
a75b9be1 586 struct cx2341x_handler cxhdl;
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587 u32 filter_mode;
588 u32 temporal_strength;
589 u32 spatial_strength;
590
591 /* dualwatch */
592 unsigned long dualwatch_jiffies;
0d82fe80 593 u32 dualwatch_stereo_mode;
1c1e45d1 594
1c1e45d1 595 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
6e6a8b5a 596 struct cx18_options options; /* User options */
6ecd86dc 597 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
1c1e45d1 598 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
6e6a8b5a 599 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
9722c8f9 600 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
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601 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
602 size_t num_bytes);
603
1c1e45d1 604 unsigned long i_flags; /* global cx18 flags */
31554ae5
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605 atomic_t ana_capturing; /* count number of active analog capture streams */
606 atomic_t tot_capturing; /* total count number of active capture streams */
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607 int search_pack_header;
608
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609 int open_id; /* incremented each time an open occurs, used as
610 unique ID. Starts at 1, so 0 can be used as
611 uninitialized value in the stream->id. */
612
42d0c3ad 613 resource_size_t base_addr;
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614
615 u8 card_rev;
616 void __iomem *enc_mem, *reg_mem;
617
618 struct vbi_info vbi;
619
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620 u64 mpg_data_received;
621 u64 vbi_data_inserted;
622
623 wait_queue_head_t mb_apu_waitq;
624 wait_queue_head_t mb_cpu_waitq;
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625 wait_queue_head_t cap_w;
626 /* when the current DMA is finished this queue is woken up */
627 wait_queue_head_t dma_waitq;
628
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629 u32 sw1_irq_mask;
630 u32 sw2_irq_mask;
631 u32 hw2_irq_mask;
632
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633 struct workqueue_struct *in_work_queue;
634 char in_workq_name[11]; /* "cx18-NN-in" */
635 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
ee2d64f5 636 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
1d6782bd 637
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638 /* i2c */
639 struct i2c_adapter i2c_adap[2];
640 struct i2c_algo_bit_data i2c_algo[2];
641 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
1c1e45d1 642
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643 struct IR_i2c_init_data ir_i2c_init_data;
644
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645 /* gpio */
646 u32 gpio_dir;
647 u32 gpio_val;
8abdd00d 648 struct mutex gpio_lock;
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649 struct v4l2_subdev sd_gpiomux;
650 struct v4l2_subdev sd_resetctrl;
ba60bc67 651
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652 /* v4l2 and User settings */
653
654 /* codec settings */
655 u32 audio_input;
656 u32 active_input;
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657 v4l2_std_id std;
658 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
d68b687b
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659
660 /* Used for cx18-alsa module loading */
661 struct work_struct request_module_wk;
1c1e45d1
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662};
663
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664static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
665{
666 return container_of(v4l2_dev, struct cx18, v4l2_dev);
667}
668
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669/* cx18 extensions to be loaded */
670extern int (*cx18_ext_init)(struct cx18 *);
671
1c1e45d1 672/* Globals */
1c1e45d1 673extern int cx18_first_minor;
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674
675/*==============Prototypes==================*/
676
677/* Return non-zero if a signal is pending */
678int cx18_msleep_timeout(unsigned int msecs, int intr);
679
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680/* Read Hauppauge eeprom */
681struct tveeprom; /* forward reference */
682void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
683
684/* First-open initialization: load firmware, etc. */
685int cx18_init_on_first_open(struct cx18 *cx);
686
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687/* Test if the current VBI mode is raw (1) or sliced (0) */
688static inline int cx18_raw_vbi(const struct cx18 *cx)
689{
690 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
691}
692
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693/* Call the specified callback for all subdevs with a grp_id bit matching the
694 * mask in hw (if 0, then match them all). Ignore any errors. */
6c2d4dd1 695#define cx18_call_hw(cx, hw, o, f, args...) \
fe293011 696 v4l2_device_mask_call_all(&(cx)->v4l2_dev, hw, o, f, ##args)
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697
698#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
699
700/* Call the specified callback for all subdevs with a grp_id bit matching the
701 * mask in hw (if 0, then match them all). If the callback returns an error
702 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
6c2d4dd1 703#define cx18_call_hw_err(cx, hw, o, f, args...) \
fe293011 704 v4l2_device_mask_call_until_err(&(cx)->v4l2_dev, hw, o, f, ##args)
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705
706#define cx18_call_all_err(cx, o, f, args...) \
707 cx18_call_hw_err(cx, 0, o, f , ##args)
708
1c1e45d1 709#endif /* CX18_DRIVER_H */