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Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
e47f30b1 ST |
2 | /* |
3 | * Driver for the Conexant CX23885 PCIe bridge | |
4 | * | |
6d897616 | 5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> |
e47f30b1 ST |
6 | */ |
7 | ||
e39682b5 MCC |
8 | #include "cx23885.h" |
9 | #include "cx23885-video.h" | |
10 | ||
e47f30b1 ST |
11 | #include <linux/init.h> |
12 | #include <linux/list.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/moduleparam.h> | |
15 | #include <linux/kmod.h> | |
16 | #include <linux/kernel.h> | |
17 | #include <linux/slab.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/delay.h> | |
20 | #include <linux/kthread.h> | |
21 | #include <asm/div64.h> | |
22 | ||
e47f30b1 | 23 | #include <media/v4l2-common.h> |
35ea11ff | 24 | #include <media/v4l2-ioctl.h> |
da59a4de | 25 | #include <media/v4l2-event.h> |
74618244 | 26 | #include "cx23885-ioctl.h" |
0b32d65c | 27 | #include "tuner-xc2028.h" |
e47f30b1 | 28 | |
d647f0b7 | 29 | #include <media/drv-intf/cx25840.h> |
97ce5670 | 30 | |
e47f30b1 | 31 | MODULE_DESCRIPTION("v4l2 driver module for cx23885 based TV cards"); |
6d897616 | 32 | MODULE_AUTHOR("Steven Toth <stoth@linuxtv.org>"); |
e47f30b1 ST |
33 | MODULE_LICENSE("GPL"); |
34 | ||
35 | /* ------------------------------------------------------------------ */ | |
36 | ||
37 | static unsigned int video_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET }; | |
38 | static unsigned int vbi_nr[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET }; | |
e47f30b1 ST |
39 | |
40 | module_param_array(video_nr, int, NULL, 0444); | |
41 | module_param_array(vbi_nr, int, NULL, 0444); | |
e47f30b1 ST |
42 | |
43 | MODULE_PARM_DESC(video_nr, "video device numbers"); | |
44 | MODULE_PARM_DESC(vbi_nr, "vbi device numbers"); | |
e47f30b1 | 45 | |
4513fc69 | 46 | static unsigned int video_debug; |
e47f30b1 ST |
47 | module_param(video_debug, int, 0644); |
48 | MODULE_PARM_DESC(video_debug, "enable debug messages [video]"); | |
49 | ||
4513fc69 | 50 | static unsigned int irq_debug; |
e47f30b1 ST |
51 | module_param(irq_debug, int, 0644); |
52 | MODULE_PARM_DESC(irq_debug, "enable debug messages [IRQ handler]"); | |
53 | ||
54 | static unsigned int vid_limit = 16; | |
55 | module_param(vid_limit, int, 0644); | |
56 | MODULE_PARM_DESC(vid_limit, "capture memory limit in megabytes"); | |
57 | ||
58 | #define dprintk(level, fmt, arg...)\ | |
4513fc69 | 59 | do { if (video_debug >= level)\ |
e39682b5 MCC |
60 | printk(KERN_DEBUG pr_fmt("%s: video:" fmt), \ |
61 | __func__, ##arg); \ | |
4513fc69 | 62 | } while (0) |
e47f30b1 ST |
63 | |
64 | /* ------------------------------------------------------------------- */ | |
65 | /* static data */ | |
66 | ||
67 | #define FORMAT_FLAGS_PACKED 0x01 | |
e47f30b1 ST |
68 | static struct cx23885_fmt formats[] = { |
69 | { | |
af76e9f6 ST |
70 | .name = "4:2:2, packed, YUYV", |
71 | .fourcc = V4L2_PIX_FMT_YUYV, | |
72 | .depth = 16, | |
73 | .flags = FORMAT_FLAGS_PACKED, | |
74 | } | |
75 | }; | |
e47f30b1 ST |
76 | |
77 | static struct cx23885_fmt *format_by_fourcc(unsigned int fourcc) | |
78 | { | |
79 | unsigned int i; | |
80 | ||
81 | for (i = 0; i < ARRAY_SIZE(formats); i++) | |
82 | if (formats[i].fourcc == fourcc) | |
83 | return formats+i; | |
e47f30b1 ST |
84 | return NULL; |
85 | } | |
86 | ||
87 | /* ------------------------------------------------------------------- */ | |
88 | ||
79776c89 ST |
89 | void cx23885_video_wakeup(struct cx23885_dev *dev, |
90 | struct cx23885_dmaqueue *q, u32 count) | |
e47f30b1 ST |
91 | { |
92 | struct cx23885_buffer *buf; | |
453afdd9 | 93 | |
9c8ced51 | 94 | if (list_empty(&q->active)) |
453afdd9 HV |
95 | return; |
96 | buf = list_entry(q->active.next, | |
97 | struct cx23885_buffer, queue); | |
98 | ||
2d700715 | 99 | buf->vb.sequence = q->count++; |
d6dd645e | 100 | buf->vb.vb2_buf.timestamp = ktime_get_ns(); |
2d700715 JS |
101 | dprintk(2, "[%p/%d] wakeup reg=%d buf=%d\n", buf, |
102 | buf->vb.vb2_buf.index, count, q->count); | |
453afdd9 | 103 | list_del(&buf->queue); |
2d700715 | 104 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE); |
e47f30b1 ST |
105 | } |
106 | ||
35045137 | 107 | int cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm) |
e47f30b1 | 108 | { |
e80bf856 HV |
109 | struct v4l2_subdev_format format = { |
110 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | |
111 | .format.code = MEDIA_BUS_FMT_FIXED, | |
112 | }; | |
113 | ||
e47f30b1 | 114 | dprintk(1, "%s(norm = 0x%08x) name: [%s]\n", |
22b4e64f | 115 | __func__, |
e47f30b1 ST |
116 | (unsigned int)norm, |
117 | v4l2_norm_to_name(norm)); | |
118 | ||
e80bf856 HV |
119 | if (dev->tvnorm == norm) |
120 | return 0; | |
121 | ||
f1b6a735 HV |
122 | if (dev->tvnorm != norm) { |
123 | if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq) || | |
124 | vb2_is_busy(&dev->vb2_mpegq)) | |
125 | return -EBUSY; | |
126 | } | |
127 | ||
e47f30b1 | 128 | dev->tvnorm = norm; |
e80bf856 HV |
129 | dev->width = 720; |
130 | dev->height = norm_maxh(norm); | |
131 | dev->field = V4L2_FIELD_INTERLACED; | |
e47f30b1 | 132 | |
8774bed9 | 133 | call_all(dev, video, s_std, norm); |
e47f30b1 | 134 | |
e80bf856 HV |
135 | format.format.width = dev->width; |
136 | format.format.height = dev->height; | |
137 | format.format.field = dev->field; | |
138 | call_all(dev, pad, set_fmt, NULL, &format); | |
139 | ||
e47f30b1 ST |
140 | return 0; |
141 | } | |
142 | ||
d45b9b8a | 143 | static struct video_device *cx23885_vdev_init(struct cx23885_dev *dev, |
e47f30b1 ST |
144 | struct pci_dev *pci, |
145 | struct video_device *template, | |
146 | char *type) | |
147 | { | |
148 | struct video_device *vfd; | |
22b4e64f | 149 | dprintk(1, "%s()\n", __func__); |
e47f30b1 ST |
150 | |
151 | vfd = video_device_alloc(); | |
152 | if (NULL == vfd) | |
153 | return NULL; | |
154 | *vfd = *template; | |
c0714f6c | 155 | vfd->v4l2_dev = &dev->v4l2_dev; |
e47f30b1 | 156 | vfd->release = video_device_release; |
24a8f7b5 | 157 | vfd->lock = &dev->lock; |
9def5ed7 ST |
158 | snprintf(vfd->name, sizeof(vfd->name), "%s (%s)", |
159 | cx23885_boards[dev->board].name, type); | |
63b0d5ad | 160 | video_set_drvdata(vfd, dev); |
e47f30b1 ST |
161 | return vfd; |
162 | } | |
163 | ||
5bc08e19 | 164 | int cx23885_flatiron_write(struct cx23885_dev *dev, u8 reg, u8 data) |
33cdeb35 ST |
165 | { |
166 | /* 8 bit registers, 8 bit values */ | |
167 | u8 buf[] = { reg, data }; | |
168 | ||
169 | struct i2c_msg msg = { .addr = 0x98 >> 1, | |
170 | .flags = 0, .buf = buf, .len = 2 }; | |
171 | ||
172 | return i2c_transfer(&dev->i2c_bus[2].i2c_adap, &msg, 1); | |
173 | } | |
174 | ||
5bc08e19 | 175 | u8 cx23885_flatiron_read(struct cx23885_dev *dev, u8 reg) |
33cdeb35 ST |
176 | { |
177 | /* 8 bit registers, 8 bit values */ | |
178 | int ret; | |
179 | u8 b0[] = { reg }; | |
180 | u8 b1[] = { 0 }; | |
181 | ||
182 | struct i2c_msg msg[] = { | |
183 | { .addr = 0x98 >> 1, .flags = 0, .buf = b0, .len = 1 }, | |
184 | { .addr = 0x98 >> 1, .flags = I2C_M_RD, .buf = b1, .len = 1 } | |
185 | }; | |
186 | ||
187 | ret = i2c_transfer(&dev->i2c_bus[2].i2c_adap, &msg[0], 2); | |
188 | if (ret != 2) | |
e39682b5 | 189 | pr_err("%s() error\n", __func__); |
33cdeb35 ST |
190 | |
191 | return b1[0]; | |
192 | } | |
193 | ||
194 | static void cx23885_flatiron_dump(struct cx23885_dev *dev) | |
195 | { | |
196 | int i; | |
197 | dprintk(1, "Flatiron dump\n"); | |
198 | for (i = 0; i < 0x24; i++) { | |
199 | dprintk(1, "FI[%02x] = %02x\n", i, | |
200 | cx23885_flatiron_read(dev, i)); | |
201 | } | |
202 | } | |
203 | ||
204 | static int cx23885_flatiron_mux(struct cx23885_dev *dev, int input) | |
205 | { | |
206 | u8 val; | |
207 | dprintk(1, "%s(input = %d)\n", __func__, input); | |
208 | ||
209 | if (input == 1) | |
210 | val = cx23885_flatiron_read(dev, CH_PWR_CTRL1) & ~FLD_CH_SEL; | |
211 | else if (input == 2) | |
212 | val = cx23885_flatiron_read(dev, CH_PWR_CTRL1) | FLD_CH_SEL; | |
213 | else | |
214 | return -EINVAL; | |
215 | ||
216 | val |= 0x20; /* Enable clock to delta-sigma and dec filter */ | |
217 | ||
218 | cx23885_flatiron_write(dev, CH_PWR_CTRL1, val); | |
219 | ||
220 | /* Wake up */ | |
221 | cx23885_flatiron_write(dev, CH_PWR_CTRL2, 0); | |
222 | ||
223 | if (video_debug) | |
224 | cx23885_flatiron_dump(dev); | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
d45b9b8a | 229 | static int cx23885_video_mux(struct cx23885_dev *dev, unsigned int input) |
e47f30b1 | 230 | { |
e47f30b1 | 231 | dprintk(1, "%s() video_mux: %d [vmux=%d, gpio=0x%x,0x%x,0x%x,0x%x]\n", |
22b4e64f | 232 | __func__, |
e47f30b1 ST |
233 | input, INPUT(input)->vmux, |
234 | INPUT(input)->gpio0, INPUT(input)->gpio1, | |
235 | INPUT(input)->gpio2, INPUT(input)->gpio3); | |
236 | dev->input = input; | |
237 | ||
6f0d8c02 | 238 | if (dev->board == CX23885_BOARD_MYGICA_X8506 || |
87988753 AJD |
239 | dev->board == CX23885_BOARD_MAGICPRO_PROHDTVE2 || |
240 | dev->board == CX23885_BOARD_MYGICA_X8507) { | |
6f0d8c02 DW |
241 | /* Select Analog TV */ |
242 | if (INPUT(input)->type == CX23885_VMUX_TELEVISION) | |
243 | cx23885_gpio_clear(dev, GPIO_0); | |
244 | } | |
245 | ||
e47f30b1 | 246 | /* Tell the internal A/V decoder */ |
5325b427 HV |
247 | v4l2_subdev_call(dev->sd_cx25840, video, s_routing, |
248 | INPUT(input)->vmux, 0, 0); | |
e47f30b1 | 249 | |
2cb9ccd4 | 250 | if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1800) || |
35045137 | 251 | (dev->board == CX23885_BOARD_MPX885) || |
d214ddc8 | 252 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1250) || |
cce11b09 | 253 | (dev->board == CX23885_BOARD_HAUPPAUGE_IMPACTVCBE) || |
0ac60acb DH |
254 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || |
255 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) || | |
94f11518 | 256 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4) || |
082c0576 | 257 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) || |
e8d42373 | 258 | (dev->board == CX23885_BOARD_MYGICA_X8507) || |
6c43a217 HV |
259 | (dev->board == CX23885_BOARD_AVERMEDIA_HC81R) || |
260 | (dev->board == CX23885_BOARD_VIEWCAST_260E) || | |
261 | (dev->board == CX23885_BOARD_VIEWCAST_460E)) { | |
33cdeb35 ST |
262 | /* Configure audio routing */ |
263 | v4l2_subdev_call(dev->sd_cx25840, audio, s_routing, | |
264 | INPUT(input)->amux, 0, 0); | |
265 | ||
266 | if (INPUT(input)->amux == CX25840_AUDIO7) | |
267 | cx23885_flatiron_mux(dev, 1); | |
268 | else if (INPUT(input)->amux == CX25840_AUDIO6) | |
269 | cx23885_flatiron_mux(dev, 2); | |
270 | } | |
271 | ||
e47f30b1 ST |
272 | return 0; |
273 | } | |
e47f30b1 | 274 | |
fc1a889d ST |
275 | static int cx23885_audio_mux(struct cx23885_dev *dev, unsigned int input) |
276 | { | |
277 | dprintk(1, "%s(input=%d)\n", __func__, input); | |
278 | ||
fa1e0fd3 ST |
279 | /* The baseband video core of the cx23885 has two audio inputs. |
280 | * LR1 and LR2. In almost every single case so far only HVR1xxx | |
281 | * cards we've only ever supported LR1. Time to support LR2, | |
282 | * which is available via the optional white breakout header on | |
283 | * the board. | |
284 | * We'll use a could of existing enums in the card struct to allow | |
285 | * devs to specify which baseband input they need, or just default | |
286 | * to what we've always used. | |
287 | */ | |
288 | if (INPUT(input)->amux == CX25840_AUDIO7) | |
289 | cx23885_flatiron_mux(dev, 1); | |
290 | else if (INPUT(input)->amux == CX25840_AUDIO6) | |
291 | cx23885_flatiron_mux(dev, 2); | |
292 | else { | |
293 | /* Not specifically defined, assume the default. */ | |
294 | cx23885_flatiron_mux(dev, 1); | |
fc1a889d ST |
295 | } |
296 | ||
297 | return 0; | |
298 | } | |
299 | ||
e47f30b1 | 300 | /* ------------------------------------------------------------------ */ |
e47f30b1 ST |
301 | static int cx23885_start_video_dma(struct cx23885_dev *dev, |
302 | struct cx23885_dmaqueue *q, | |
303 | struct cx23885_buffer *buf) | |
304 | { | |
22b4e64f | 305 | dprintk(1, "%s()\n", __func__); |
e47f30b1 | 306 | |
a461e0ad ST |
307 | /* Stop the dma/fifo before we tamper with it's risc programs */ |
308 | cx_clear(VID_A_DMA_CTL, 0x11); | |
309 | ||
e47f30b1 ST |
310 | /* setup fifo + format */ |
311 | cx23885_sram_channel_setup(dev, &dev->sram_channels[SRAM_CH01], | |
312 | buf->bpl, buf->risc.dma); | |
e47f30b1 ST |
313 | |
314 | /* reset counter */ | |
315 | cx_write(VID_A_GPCNT_CTL, 3); | |
453afdd9 | 316 | q->count = 0; |
e47f30b1 ST |
317 | |
318 | /* enable irq */ | |
dbe83a3b | 319 | cx23885_irq_add_enable(dev, 0x01); |
e47f30b1 ST |
320 | cx_set(VID_A_INT_MSK, 0x000011); |
321 | ||
322 | /* start dma */ | |
323 | cx_set(DEV_CNTRL2, (1<<5)); | |
324 | cx_set(VID_A_DMA_CTL, 0x11); /* FIFO and RISC enable */ | |
325 | ||
326 | return 0; | |
327 | } | |
328 | ||
df9ecb0c | 329 | static int queue_setup(struct vb2_queue *q, |
453afdd9 | 330 | unsigned int *num_buffers, unsigned int *num_planes, |
36c0f8b3 | 331 | unsigned int sizes[], struct device *alloc_devs[]) |
e47f30b1 | 332 | { |
453afdd9 | 333 | struct cx23885_dev *dev = q->drv_priv; |
e47f30b1 | 334 | |
453afdd9 HV |
335 | *num_planes = 1; |
336 | sizes[0] = (dev->fmt->depth * dev->width * dev->height) >> 3; | |
e47f30b1 ST |
337 | return 0; |
338 | } | |
339 | ||
453afdd9 | 340 | static int buffer_prepare(struct vb2_buffer *vb) |
e47f30b1 | 341 | { |
2d700715 | 342 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
453afdd9 | 343 | struct cx23885_dev *dev = vb->vb2_queue->drv_priv; |
e47f30b1 | 344 | struct cx23885_buffer *buf = |
2d700715 | 345 | container_of(vbuf, struct cx23885_buffer, vb); |
e47f30b1 | 346 | u32 line0_offset, line1_offset; |
453afdd9 | 347 | struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0); |
35045137 | 348 | int field_tff; |
e47f30b1 | 349 | |
453afdd9 | 350 | buf->bpl = (dev->width * dev->fmt->depth) >> 3; |
91d2d674 | 351 | |
453afdd9 | 352 | if (vb2_plane_size(vb, 0) < dev->height * buf->bpl) |
e47f30b1 | 353 | return -EINVAL; |
453afdd9 | 354 | vb2_set_plane_payload(vb, 0, dev->height * buf->bpl); |
e47f30b1 | 355 | |
453afdd9 HV |
356 | switch (dev->field) { |
357 | case V4L2_FIELD_TOP: | |
358 | cx23885_risc_buffer(dev->pci, &buf->risc, | |
359 | sgt->sgl, 0, UNSET, | |
360 | buf->bpl, 0, dev->height); | |
361 | break; | |
362 | case V4L2_FIELD_BOTTOM: | |
363 | cx23885_risc_buffer(dev->pci, &buf->risc, | |
364 | sgt->sgl, UNSET, 0, | |
365 | buf->bpl, 0, dev->height); | |
366 | break; | |
367 | case V4L2_FIELD_INTERLACED: | |
96f233e9 | 368 | if (dev->tvnorm & V4L2_STD_525_60) |
453afdd9 HV |
369 | /* NTSC or */ |
370 | field_tff = 1; | |
371 | else | |
372 | field_tff = 0; | |
373 | ||
374 | if (cx23885_boards[dev->board].force_bff) | |
375 | /* PAL / SECAM OR 888 in NTSC MODE */ | |
376 | field_tff = 0; | |
e47f30b1 | 377 | |
453afdd9 HV |
378 | if (field_tff) { |
379 | /* cx25840 transmits NTSC bottom field first */ | |
380 | dprintk(1, "%s() Creating TFF/NTSC risc\n", | |
22b4e64f | 381 | __func__); |
453afdd9 HV |
382 | line0_offset = buf->bpl; |
383 | line1_offset = 0; | |
384 | } else { | |
385 | /* All other formats are top field first */ | |
386 | dprintk(1, "%s() Creating BFF/PAL/SECAM risc\n", | |
22b4e64f | 387 | __func__); |
453afdd9 HV |
388 | line0_offset = 0; |
389 | line1_offset = buf->bpl; | |
e47f30b1 | 390 | } |
453afdd9 HV |
391 | cx23885_risc_buffer(dev->pci, &buf->risc, |
392 | sgt->sgl, line0_offset, | |
393 | line1_offset, | |
394 | buf->bpl, buf->bpl, | |
395 | dev->height >> 1); | |
396 | break; | |
397 | case V4L2_FIELD_SEQ_TB: | |
398 | cx23885_risc_buffer(dev->pci, &buf->risc, | |
399 | sgt->sgl, | |
400 | 0, buf->bpl * (dev->height >> 1), | |
401 | buf->bpl, 0, | |
402 | dev->height >> 1); | |
403 | break; | |
404 | case V4L2_FIELD_SEQ_BT: | |
405 | cx23885_risc_buffer(dev->pci, &buf->risc, | |
406 | sgt->sgl, | |
407 | buf->bpl * (dev->height >> 1), 0, | |
408 | buf->bpl, 0, | |
409 | dev->height >> 1); | |
410 | break; | |
411 | default: | |
412 | BUG(); | |
e47f30b1 | 413 | } |
453afdd9 | 414 | dprintk(2, "[%p/%d] buffer_init - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", |
2d700715 | 415 | buf, buf->vb.vb2_buf.index, |
91d2d674 | 416 | dev->width, dev->height, dev->fmt->depth, dev->fmt->name, |
e47f30b1 | 417 | (unsigned long)buf->risc.dma); |
e47f30b1 | 418 | return 0; |
453afdd9 | 419 | } |
e47f30b1 | 420 | |
453afdd9 HV |
421 | static void buffer_finish(struct vb2_buffer *vb) |
422 | { | |
2d700715 JS |
423 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
424 | struct cx23885_buffer *buf = container_of(vbuf, | |
453afdd9 | 425 | struct cx23885_buffer, vb); |
453afdd9 HV |
426 | |
427 | cx23885_free_buffer(vb->vb2_queue->drv_priv, buf); | |
e47f30b1 ST |
428 | } |
429 | ||
453afdd9 HV |
430 | /* |
431 | * The risc program for each buffer works as follows: it starts with a simple | |
432 | * 'JUMP to addr + 12', which is effectively a NOP. Then the code to DMA the | |
433 | * buffer follows and at the end we have a JUMP back to the start + 12 (skipping | |
434 | * the initial JUMP). | |
435 | * | |
436 | * This is the risc program of the first buffer to be queued if the active list | |
437 | * is empty and it just keeps DMAing this buffer without generating any | |
438 | * interrupts. | |
439 | * | |
440 | * If a new buffer is added then the initial JUMP in the code for that buffer | |
441 | * will generate an interrupt which signals that the previous buffer has been | |
442 | * DMAed successfully and that it can be returned to userspace. | |
443 | * | |
444 | * It also sets the final jump of the previous buffer to the start of the new | |
445 | * buffer, thus chaining the new buffer into the DMA chain. This is a single | |
446 | * atomic u32 write, so there is no race condition. | |
447 | * | |
448 | * The end-result of all this that you only get an interrupt when a buffer | |
449 | * is ready, so the control flow is very easy. | |
450 | */ | |
451 | static void buffer_queue(struct vb2_buffer *vb) | |
e47f30b1 | 452 | { |
2d700715 | 453 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
453afdd9 | 454 | struct cx23885_dev *dev = vb->vb2_queue->drv_priv; |
2d700715 | 455 | struct cx23885_buffer *buf = container_of(vbuf, |
e47f30b1 ST |
456 | struct cx23885_buffer, vb); |
457 | struct cx23885_buffer *prev; | |
e47f30b1 | 458 | struct cx23885_dmaqueue *q = &dev->vidq; |
453afdd9 | 459 | unsigned long flags; |
e47f30b1 | 460 | |
453afdd9 HV |
461 | /* add jump to start */ |
462 | buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 12); | |
463 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC); | |
464 | buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 12); | |
e47f30b1 ST |
465 | buf->risc.jmp[2] = cpu_to_le32(0); /* bits 63-32 */ |
466 | ||
453afdd9 HV |
467 | spin_lock_irqsave(&dev->slock, flags); |
468 | if (list_empty(&q->active)) { | |
469 | list_add_tail(&buf->queue, &q->active); | |
e47f30b1 | 470 | dprintk(2, "[%p/%d] buffer_queue - first active\n", |
2d700715 | 471 | buf, buf->vb.vb2_buf.index); |
e47f30b1 | 472 | } else { |
453afdd9 | 473 | buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1); |
e47f30b1 | 474 | prev = list_entry(q->active.prev, struct cx23885_buffer, |
453afdd9 HV |
475 | queue); |
476 | list_add_tail(&buf->queue, &q->active); | |
477 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
478 | dprintk(2, "[%p/%d] buffer_queue - append to active\n", | |
2d700715 | 479 | buf, buf->vb.vb2_buf.index); |
e47f30b1 | 480 | } |
453afdd9 | 481 | spin_unlock_irqrestore(&dev->slock, flags); |
e47f30b1 ST |
482 | } |
483 | ||
453afdd9 | 484 | static int cx23885_start_streaming(struct vb2_queue *q, unsigned int count) |
e47f30b1 | 485 | { |
453afdd9 HV |
486 | struct cx23885_dev *dev = q->drv_priv; |
487 | struct cx23885_dmaqueue *dmaq = &dev->vidq; | |
488 | struct cx23885_buffer *buf = list_entry(dmaq->active.next, | |
489 | struct cx23885_buffer, queue); | |
e47f30b1 | 490 | |
453afdd9 | 491 | cx23885_start_video_dma(dev, dmaq, buf); |
e47f30b1 ST |
492 | return 0; |
493 | } | |
494 | ||
453afdd9 | 495 | static void cx23885_stop_streaming(struct vb2_queue *q) |
e47f30b1 | 496 | { |
453afdd9 HV |
497 | struct cx23885_dev *dev = q->drv_priv; |
498 | struct cx23885_dmaqueue *dmaq = &dev->vidq; | |
499 | unsigned long flags; | |
e47f30b1 | 500 | |
453afdd9 HV |
501 | cx_clear(VID_A_DMA_CTL, 0x11); |
502 | spin_lock_irqsave(&dev->slock, flags); | |
503 | while (!list_empty(&dmaq->active)) { | |
504 | struct cx23885_buffer *buf = list_entry(dmaq->active.next, | |
505 | struct cx23885_buffer, queue); | |
e47f30b1 | 506 | |
453afdd9 | 507 | list_del(&buf->queue); |
2d700715 | 508 | vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR); |
e47f30b1 | 509 | } |
453afdd9 | 510 | spin_unlock_irqrestore(&dev->slock, flags); |
e47f30b1 ST |
511 | } |
512 | ||
10accd2e | 513 | static const struct vb2_ops cx23885_video_qops = { |
453afdd9 HV |
514 | .queue_setup = queue_setup, |
515 | .buf_prepare = buffer_prepare, | |
516 | .buf_finish = buffer_finish, | |
517 | .buf_queue = buffer_queue, | |
518 | .wait_prepare = vb2_ops_wait_prepare, | |
519 | .wait_finish = vb2_ops_wait_finish, | |
520 | .start_streaming = cx23885_start_streaming, | |
521 | .stop_streaming = cx23885_stop_streaming, | |
522 | }; | |
e47f30b1 | 523 | |
e47f30b1 ST |
524 | /* ------------------------------------------------------------------ */ |
525 | /* VIDEO IOCTLS */ | |
526 | ||
78b526a4 | 527 | static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, |
e47f30b1 ST |
528 | struct v4l2_format *f) |
529 | { | |
568f44a1 | 530 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 | 531 | |
91d2d674 HV |
532 | f->fmt.pix.width = dev->width; |
533 | f->fmt.pix.height = dev->height; | |
453afdd9 | 534 | f->fmt.pix.field = dev->field; |
91d2d674 | 535 | f->fmt.pix.pixelformat = dev->fmt->fourcc; |
e47f30b1 | 536 | f->fmt.pix.bytesperline = |
91d2d674 | 537 | (f->fmt.pix.width * dev->fmt->depth) >> 3; |
e47f30b1 ST |
538 | f->fmt.pix.sizeimage = |
539 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1af2ddd8 | 540 | f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; |
e47f30b1 ST |
541 | |
542 | return 0; | |
543 | } | |
544 | ||
78b526a4 | 545 | static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, |
e47f30b1 ST |
546 | struct v4l2_format *f) |
547 | { | |
568f44a1 | 548 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 ST |
549 | struct cx23885_fmt *fmt; |
550 | enum v4l2_field field; | |
551 | unsigned int maxw, maxh; | |
552 | ||
553 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
554 | if (NULL == fmt) | |
555 | return -EINVAL; | |
556 | ||
557 | field = f->fmt.pix.field; | |
e80bf856 | 558 | maxw = 720; |
e47f30b1 ST |
559 | maxh = norm_maxh(dev->tvnorm); |
560 | ||
561 | if (V4L2_FIELD_ANY == field) { | |
562 | field = (f->fmt.pix.height > maxh/2) | |
563 | ? V4L2_FIELD_INTERLACED | |
564 | : V4L2_FIELD_BOTTOM; | |
565 | } | |
566 | ||
567 | switch (field) { | |
568 | case V4L2_FIELD_TOP: | |
569 | case V4L2_FIELD_BOTTOM: | |
570 | maxh = maxh / 2; | |
571 | break; | |
572 | case V4L2_FIELD_INTERLACED: | |
96f233e9 HV |
573 | case V4L2_FIELD_SEQ_TB: |
574 | case V4L2_FIELD_SEQ_BT: | |
e47f30b1 ST |
575 | break; |
576 | default: | |
200e0841 HV |
577 | field = V4L2_FIELD_INTERLACED; |
578 | break; | |
e47f30b1 ST |
579 | } |
580 | ||
581 | f->fmt.pix.field = field; | |
2449afcb TP |
582 | v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2, |
583 | &f->fmt.pix.height, 32, maxh, 0, 0); | |
e47f30b1 ST |
584 | f->fmt.pix.bytesperline = |
585 | (f->fmt.pix.width * fmt->depth) >> 3; | |
586 | f->fmt.pix.sizeimage = | |
587 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1af2ddd8 | 588 | f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; |
e47f30b1 ST |
589 | |
590 | return 0; | |
591 | } | |
592 | ||
78b526a4 | 593 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, |
e47f30b1 ST |
594 | struct v4l2_format *f) |
595 | { | |
568f44a1 | 596 | struct cx23885_dev *dev = video_drvdata(file); |
ebf984bb HV |
597 | struct v4l2_subdev_format format = { |
598 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | |
599 | }; | |
e47f30b1 ST |
600 | int err; |
601 | ||
22b4e64f | 602 | dprintk(2, "%s()\n", __func__); |
78b526a4 | 603 | err = vidioc_try_fmt_vid_cap(file, priv, f); |
e47f30b1 ST |
604 | |
605 | if (0 != err) | |
606 | return err; | |
f1b6a735 HV |
607 | |
608 | if (vb2_is_busy(&dev->vb2_vidq) || vb2_is_busy(&dev->vb2_vbiq) || | |
609 | vb2_is_busy(&dev->vb2_mpegq)) | |
610 | return -EBUSY; | |
611 | ||
91d2d674 HV |
612 | dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat); |
613 | dev->width = f->fmt.pix.width; | |
614 | dev->height = f->fmt.pix.height; | |
453afdd9 | 615 | dev->field = f->fmt.pix.field; |
22b4e64f | 616 | dprintk(2, "%s() width=%d height=%d field=%d\n", __func__, |
453afdd9 | 617 | dev->width, dev->height, dev->field); |
ebf984bb HV |
618 | v4l2_fill_mbus_format(&format.format, &f->fmt.pix, MEDIA_BUS_FMT_FIXED); |
619 | call_all(dev, pad, set_fmt, NULL, &format); | |
620 | v4l2_fill_pix_format(&f->fmt.pix, &format.format); | |
621 | /* set_fmt overwrites f->fmt.pix.field, restore it */ | |
96f233e9 | 622 | f->fmt.pix.field = dev->field; |
e47f30b1 ST |
623 | return 0; |
624 | } | |
625 | ||
626 | static int vidioc_querycap(struct file *file, void *priv, | |
627 | struct v4l2_capability *cap) | |
628 | { | |
568f44a1 | 629 | struct cx23885_dev *dev = video_drvdata(file); |
a7d3eabd | 630 | struct video_device *vdev = video_devdata(file); |
e47f30b1 | 631 | |
cc1e6315 | 632 | strscpy(cap->driver, "cx23885", sizeof(cap->driver)); |
c0decac1 | 633 | strscpy(cap->card, cx23885_boards[dev->board].name, |
e47f30b1 ST |
634 | sizeof(cap->card)); |
635 | sprintf(cap->bus_info, "PCIe:%s", pci_name(dev->pci)); | |
d43be757 | 636 | cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING | V4L2_CAP_AUDIO; |
0f3bf3dc | 637 | if (dev->tuner_type != TUNER_ABSENT) |
a7d3eabd HV |
638 | cap->device_caps |= V4L2_CAP_TUNER; |
639 | if (vdev->vfl_type == VFL_TYPE_VBI) | |
640 | cap->device_caps |= V4L2_CAP_VBI_CAPTURE; | |
641 | else | |
642 | cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE; | |
643 | cap->capabilities = cap->device_caps | V4L2_CAP_VBI_CAPTURE | | |
644 | V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_DEVICE_CAPS; | |
e47f30b1 ST |
645 | return 0; |
646 | } | |
647 | ||
78b526a4 | 648 | static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, |
e47f30b1 ST |
649 | struct v4l2_fmtdesc *f) |
650 | { | |
651 | if (unlikely(f->index >= ARRAY_SIZE(formats))) | |
652 | return -EINVAL; | |
653 | ||
c0decac1 | 654 | strscpy(f->description, formats[f->index].name, |
e47f30b1 ST |
655 | sizeof(f->description)); |
656 | f->pixelformat = formats[f->index].fourcc; | |
657 | ||
658 | return 0; | |
659 | } | |
660 | ||
5200ab6a HV |
661 | static int vidioc_g_pixelaspect(struct file *file, void *priv, |
662 | int type, struct v4l2_fract *f) | |
e80bf856 HV |
663 | { |
664 | struct cx23885_dev *dev = video_drvdata(file); | |
665 | bool is_50hz = dev->tvnorm & V4L2_STD_625_50; | |
666 | ||
5200ab6a | 667 | if (type != V4L2_BUF_TYPE_VIDEO_CAPTURE) |
e80bf856 HV |
668 | return -EINVAL; |
669 | ||
5200ab6a HV |
670 | f->numerator = is_50hz ? 54 : 11; |
671 | f->denominator = is_50hz ? 59 : 10; | |
e80bf856 HV |
672 | |
673 | return 0; | |
674 | } | |
675 | ||
ee10dc36 HV |
676 | static int vidioc_g_selection(struct file *file, void *fh, |
677 | struct v4l2_selection *sel) | |
678 | { | |
679 | struct cx23885_dev *dev = video_drvdata(file); | |
680 | ||
681 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
682 | return -EINVAL; | |
683 | ||
684 | switch (sel->target) { | |
685 | case V4L2_SEL_TGT_CROP_BOUNDS: | |
686 | case V4L2_SEL_TGT_CROP_DEFAULT: | |
687 | sel->r.top = 0; | |
688 | sel->r.left = 0; | |
689 | sel->r.width = 720; | |
690 | sel->r.height = norm_maxh(dev->tvnorm); | |
691 | break; | |
692 | default: | |
693 | return -EINVAL; | |
694 | } | |
695 | return 0; | |
696 | } | |
697 | ||
35045137 ST |
698 | static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *id) |
699 | { | |
568f44a1 | 700 | struct cx23885_dev *dev = video_drvdata(file); |
35045137 ST |
701 | dprintk(1, "%s()\n", __func__); |
702 | ||
9c1f5df8 | 703 | *id = dev->tvnorm; |
35045137 ST |
704 | return 0; |
705 | } | |
706 | ||
314527ac | 707 | static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id tvnorms) |
e47f30b1 | 708 | { |
568f44a1 | 709 | struct cx23885_dev *dev = video_drvdata(file); |
22b4e64f | 710 | dprintk(1, "%s()\n", __func__); |
e47f30b1 | 711 | |
f1b6a735 | 712 | return cx23885_set_tvnorm(dev, tvnorms); |
e47f30b1 ST |
713 | } |
714 | ||
35045137 | 715 | int cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i) |
e47f30b1 ST |
716 | { |
717 | static const char *iname[] = { | |
718 | [CX23885_VMUX_COMPOSITE1] = "Composite1", | |
719 | [CX23885_VMUX_COMPOSITE2] = "Composite2", | |
720 | [CX23885_VMUX_COMPOSITE3] = "Composite3", | |
721 | [CX23885_VMUX_COMPOSITE4] = "Composite4", | |
722 | [CX23885_VMUX_SVIDEO] = "S-Video", | |
dac65fa1 | 723 | [CX23885_VMUX_COMPONENT] = "Component", |
e47f30b1 ST |
724 | [CX23885_VMUX_TELEVISION] = "Television", |
725 | [CX23885_VMUX_CABLE] = "Cable TV", | |
726 | [CX23885_VMUX_DVB] = "DVB", | |
727 | [CX23885_VMUX_DEBUG] = "for debug only", | |
728 | }; | |
729 | unsigned int n; | |
22b4e64f | 730 | dprintk(1, "%s()\n", __func__); |
e47f30b1 ST |
731 | |
732 | n = i->index; | |
e92bcf8d | 733 | if (n >= MAX_CX23885_INPUT) |
e47f30b1 ST |
734 | return -EINVAL; |
735 | ||
736 | if (0 == INPUT(n)->type) | |
737 | return -EINVAL; | |
738 | ||
e47f30b1 ST |
739 | i->index = n; |
740 | i->type = V4L2_INPUT_TYPE_CAMERA; | |
cc1e6315 | 741 | strscpy(i->name, iname[INPUT(n)->type], sizeof(i->name)); |
d43be757 | 742 | i->std = CX23885_NORMS; |
e47f30b1 | 743 | if ((CX23885_VMUX_TELEVISION == INPUT(n)->type) || |
473d8024 | 744 | (CX23885_VMUX_CABLE == INPUT(n)->type)) { |
e47f30b1 | 745 | i->type = V4L2_INPUT_TYPE_TUNER; |
d43be757 HV |
746 | i->audioset = 4; |
747 | } else { | |
748 | /* Two selectable audio inputs for non-tv inputs */ | |
749 | i->audioset = 3; | |
473d8024 | 750 | } |
6c6f52fd | 751 | |
c147f610 ST |
752 | if (dev->input == n) { |
753 | /* enum'd input matches our configured input. | |
754 | * Ask the video decoder to process the call | |
755 | * and give it an oppertunity to update the | |
756 | * status field. | |
757 | */ | |
758 | call_all(dev, video, g_input_status, &i->status); | |
759 | } | |
760 | ||
e47f30b1 ST |
761 | return 0; |
762 | } | |
e47f30b1 ST |
763 | |
764 | static int vidioc_enum_input(struct file *file, void *priv, | |
765 | struct v4l2_input *i) | |
766 | { | |
568f44a1 | 767 | struct cx23885_dev *dev = video_drvdata(file); |
22b4e64f | 768 | dprintk(1, "%s()\n", __func__); |
e47f30b1 ST |
769 | return cx23885_enum_input(dev, i); |
770 | } | |
771 | ||
35045137 | 772 | int cx23885_get_input(struct file *file, void *priv, unsigned int *i) |
e47f30b1 | 773 | { |
568f44a1 | 774 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 ST |
775 | |
776 | *i = dev->input; | |
22b4e64f | 777 | dprintk(1, "%s() returns %d\n", __func__, *i); |
e47f30b1 ST |
778 | return 0; |
779 | } | |
780 | ||
35045137 ST |
781 | static int vidioc_g_input(struct file *file, void *priv, unsigned int *i) |
782 | { | |
783 | return cx23885_get_input(file, priv, i); | |
784 | } | |
785 | ||
786 | int cx23885_set_input(struct file *file, void *priv, unsigned int i) | |
e47f30b1 | 787 | { |
568f44a1 | 788 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 | 789 | |
22b4e64f | 790 | dprintk(1, "%s(%d)\n", __func__, i); |
e47f30b1 | 791 | |
e92bcf8d | 792 | if (i >= MAX_CX23885_INPUT) { |
22b4e64f | 793 | dprintk(1, "%s() -EINVAL\n", __func__); |
e47f30b1 ST |
794 | return -EINVAL; |
795 | } | |
796 | ||
e92bcf8d ST |
797 | if (INPUT(i)->type == 0) |
798 | return -EINVAL; | |
799 | ||
e47f30b1 | 800 | cx23885_video_mux(dev, i); |
fa1e0fd3 ST |
801 | |
802 | /* By default establish the default audio input for the card also */ | |
803 | /* Caller is free to use VIDIOC_S_AUDIO to override afterwards */ | |
804 | cx23885_audio_mux(dev, i); | |
e47f30b1 ST |
805 | return 0; |
806 | } | |
807 | ||
35045137 ST |
808 | static int vidioc_s_input(struct file *file, void *priv, unsigned int i) |
809 | { | |
810 | return cx23885_set_input(file, priv, i); | |
811 | } | |
812 | ||
e9e5cf47 AW |
813 | static int vidioc_log_status(struct file *file, void *priv) |
814 | { | |
568f44a1 | 815 | struct cx23885_dev *dev = video_drvdata(file); |
e9e5cf47 | 816 | |
e9e5cf47 | 817 | call_all(dev, core, log_status); |
e9e5cf47 AW |
818 | return 0; |
819 | } | |
820 | ||
fc1a889d ST |
821 | static int cx23885_query_audinput(struct file *file, void *priv, |
822 | struct v4l2_audio *i) | |
823 | { | |
fc1a889d ST |
824 | static const char *iname[] = { |
825 | [0] = "Baseband L/R 1", | |
826 | [1] = "Baseband L/R 2", | |
d43be757 | 827 | [2] = "TV", |
fc1a889d ST |
828 | }; |
829 | unsigned int n; | |
830 | dprintk(1, "%s()\n", __func__); | |
831 | ||
832 | n = i->index; | |
d43be757 | 833 | if (n >= 3) |
fc1a889d ST |
834 | return -EINVAL; |
835 | ||
836 | memset(i, 0, sizeof(*i)); | |
837 | i->index = n; | |
cc1e6315 | 838 | strscpy(i->name, iname[n], sizeof(i->name)); |
d43be757 | 839 | i->capability = V4L2_AUDCAP_STEREO; |
fc1a889d ST |
840 | return 0; |
841 | ||
842 | } | |
843 | ||
844 | static int vidioc_enum_audinput(struct file *file, void *priv, | |
845 | struct v4l2_audio *i) | |
846 | { | |
847 | return cx23885_query_audinput(file, priv, i); | |
848 | } | |
849 | ||
850 | static int vidioc_g_audinput(struct file *file, void *priv, | |
851 | struct v4l2_audio *i) | |
852 | { | |
568f44a1 | 853 | struct cx23885_dev *dev = video_drvdata(file); |
fc1a889d | 854 | |
d43be757 HV |
855 | if ((CX23885_VMUX_TELEVISION == INPUT(dev->input)->type) || |
856 | (CX23885_VMUX_CABLE == INPUT(dev->input)->type)) | |
857 | i->index = 2; | |
858 | else | |
859 | i->index = dev->audinput; | |
fc1a889d ST |
860 | dprintk(1, "%s(input=%d)\n", __func__, i->index); |
861 | ||
862 | return cx23885_query_audinput(file, priv, i); | |
863 | } | |
864 | ||
865 | static int vidioc_s_audinput(struct file *file, void *priv, | |
0e8025b9 | 866 | const struct v4l2_audio *i) |
fc1a889d | 867 | { |
568f44a1 | 868 | struct cx23885_dev *dev = video_drvdata(file); |
d43be757 HV |
869 | |
870 | if ((CX23885_VMUX_TELEVISION == INPUT(dev->input)->type) || | |
871 | (CX23885_VMUX_CABLE == INPUT(dev->input)->type)) { | |
872 | return i->index != 2 ? -EINVAL : 0; | |
873 | } | |
874 | if (i->index > 1) | |
fc1a889d ST |
875 | return -EINVAL; |
876 | ||
877 | dprintk(1, "%s(%d)\n", __func__, i->index); | |
878 | ||
fc1a889d | 879 | dev->audinput = i->index; |
fa1e0fd3 ST |
880 | |
881 | /* Skip the audio defaults from the cards struct, caller wants | |
882 | * directly touch the audio mux hardware. */ | |
883 | cx23885_flatiron_mux(dev, dev->audinput + 1); | |
fc1a889d ST |
884 | return 0; |
885 | } | |
886 | ||
e47f30b1 ST |
887 | static int vidioc_g_tuner(struct file *file, void *priv, |
888 | struct v4l2_tuner *t) | |
889 | { | |
568f44a1 | 890 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 | 891 | |
0f3bf3dc | 892 | if (dev->tuner_type == TUNER_ABSENT) |
e47f30b1 ST |
893 | return -EINVAL; |
894 | if (0 != t->index) | |
895 | return -EINVAL; | |
896 | ||
cc1e6315 | 897 | strscpy(t->name, "Television", sizeof(t->name)); |
97ce5670 | 898 | |
80f1e086 | 899 | call_all(dev, tuner, g_tuner, t); |
e47f30b1 ST |
900 | return 0; |
901 | } | |
902 | ||
903 | static int vidioc_s_tuner(struct file *file, void *priv, | |
2f73c7c5 | 904 | const struct v4l2_tuner *t) |
e47f30b1 | 905 | { |
568f44a1 | 906 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 | 907 | |
0f3bf3dc | 908 | if (dev->tuner_type == TUNER_ABSENT) |
e47f30b1 ST |
909 | return -EINVAL; |
910 | if (0 != t->index) | |
911 | return -EINVAL; | |
97ce5670 | 912 | /* Update the A/V core */ |
80f1e086 | 913 | call_all(dev, tuner, s_tuner, t); |
97ce5670 | 914 | |
e47f30b1 ST |
915 | return 0; |
916 | } | |
917 | ||
918 | static int vidioc_g_frequency(struct file *file, void *priv, | |
919 | struct v4l2_frequency *f) | |
920 | { | |
568f44a1 | 921 | struct cx23885_dev *dev = video_drvdata(file); |
e47f30b1 | 922 | |
0f3bf3dc | 923 | if (dev->tuner_type == TUNER_ABSENT) |
e47f30b1 ST |
924 | return -EINVAL; |
925 | ||
86961933 | 926 | f->type = V4L2_TUNER_ANALOG_TV; |
e47f30b1 ST |
927 | f->frequency = dev->freq; |
928 | ||
0d5a19f1 | 929 | call_all(dev, tuner, g_frequency, f); |
e47f30b1 ST |
930 | |
931 | return 0; | |
932 | } | |
933 | ||
b530a447 | 934 | static int cx23885_set_freq(struct cx23885_dev *dev, const struct v4l2_frequency *f) |
e47f30b1 | 935 | { |
da59a4de HV |
936 | struct v4l2_ctrl *mute; |
937 | int old_mute_val = 1; | |
35045137 | 938 | |
0f3bf3dc | 939 | if (dev->tuner_type == TUNER_ABSENT) |
e47f30b1 ST |
940 | return -EINVAL; |
941 | if (unlikely(f->tuner != 0)) | |
942 | return -EINVAL; | |
943 | ||
e47f30b1 ST |
944 | dev->freq = f->frequency; |
945 | ||
35045137 | 946 | /* I need to mute audio here */ |
da59a4de HV |
947 | mute = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_AUDIO_MUTE); |
948 | if (mute) { | |
949 | old_mute_val = v4l2_ctrl_g_ctrl(mute); | |
950 | if (!old_mute_val) | |
951 | v4l2_ctrl_s_ctrl(mute, 1); | |
952 | } | |
35045137 | 953 | |
0d5a19f1 | 954 | call_all(dev, tuner, s_frequency, f); |
e47f30b1 ST |
955 | |
956 | /* When changing channels it is required to reset TVAUDIO */ | |
35045137 ST |
957 | msleep(100); |
958 | ||
959 | /* I need to unmute audio here */ | |
da59a4de HV |
960 | if (old_mute_val == 0) |
961 | v4l2_ctrl_s_ctrl(mute, old_mute_val); | |
e47f30b1 | 962 | |
e47f30b1 ST |
963 | return 0; |
964 | } | |
e47f30b1 | 965 | |
35045137 | 966 | static int cx23885_set_freq_via_ops(struct cx23885_dev *dev, |
b530a447 | 967 | const struct v4l2_frequency *f) |
35045137 | 968 | { |
da59a4de HV |
969 | struct v4l2_ctrl *mute; |
970 | int old_mute_val = 1; | |
453afdd9 | 971 | struct vb2_dvb_frontend *vfe; |
35045137 | 972 | struct dvb_frontend *fe; |
35045137 ST |
973 | |
974 | struct analog_parameters params = { | |
975 | .mode = V4L2_TUNER_ANALOG_TV, | |
976 | .audmode = V4L2_TUNER_MODE_STEREO, | |
977 | .std = dev->tvnorm, | |
978 | .frequency = f->frequency | |
979 | }; | |
980 | ||
35045137 ST |
981 | dev->freq = f->frequency; |
982 | ||
983 | /* I need to mute audio here */ | |
da59a4de HV |
984 | mute = v4l2_ctrl_find(&dev->ctrl_handler, V4L2_CID_AUDIO_MUTE); |
985 | if (mute) { | |
986 | old_mute_val = v4l2_ctrl_g_ctrl(mute); | |
987 | if (!old_mute_val) | |
988 | v4l2_ctrl_s_ctrl(mute, 1); | |
989 | } | |
35045137 ST |
990 | |
991 | /* If HVR1850 */ | |
992 | dprintk(1, "%s() frequency=%d tuner=%d std=0x%llx\n", __func__, | |
993 | params.frequency, f->tuner, params.std); | |
994 | ||
453afdd9 | 995 | vfe = vb2_dvb_get_frontend(&dev->ts2.frontends, 1); |
0cb64f02 | 996 | if (!vfe) { |
0cb64f02 DC |
997 | return -EINVAL; |
998 | } | |
35045137 ST |
999 | |
1000 | fe = vfe->dvb.frontend; | |
1001 | ||
0ac60acb DH |
1002 | if ((dev->board == CX23885_BOARD_HAUPPAUGE_HVR1850) || |
1003 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255) || | |
94f11518 BL |
1004 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1255_22111) || |
1005 | (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1265_K4)) | |
35045137 ST |
1006 | fe = &dev->ts1.analog_fe; |
1007 | ||
1008 | if (fe && fe->ops.tuner_ops.set_analog_params) { | |
8774bed9 | 1009 | call_all(dev, video, s_std, dev->tvnorm); |
35045137 ST |
1010 | fe->ops.tuner_ops.set_analog_params(fe, ¶ms); |
1011 | } | |
1012 | else | |
e39682b5 | 1013 | pr_err("%s() No analog tuner, aborting\n", __func__); |
35045137 ST |
1014 | |
1015 | /* When changing channels it is required to reset TVAUDIO */ | |
1016 | msleep(100); | |
1017 | ||
1018 | /* I need to unmute audio here */ | |
da59a4de HV |
1019 | if (old_mute_val == 0) |
1020 | v4l2_ctrl_s_ctrl(mute, old_mute_val); | |
35045137 | 1021 | |
35045137 ST |
1022 | return 0; |
1023 | } | |
1024 | ||
1025 | int cx23885_set_frequency(struct file *file, void *priv, | |
b530a447 | 1026 | const struct v4l2_frequency *f) |
e47f30b1 | 1027 | { |
568f44a1 | 1028 | struct cx23885_dev *dev = video_drvdata(file); |
35045137 | 1029 | int ret; |
e47f30b1 | 1030 | |
35045137 | 1031 | switch (dev->board) { |
0ac60acb DH |
1032 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
1033 | case CX23885_BOARD_HAUPPAUGE_HVR1255_22111: | |
94f11518 | 1034 | case CX23885_BOARD_HAUPPAUGE_HVR1265_K4: |
35045137 ST |
1035 | case CX23885_BOARD_HAUPPAUGE_HVR1850: |
1036 | ret = cx23885_set_freq_via_ops(dev, f); | |
1037 | break; | |
1038 | default: | |
1039 | ret = cx23885_set_freq(dev, f); | |
1040 | } | |
e47f30b1 | 1041 | |
35045137 ST |
1042 | return ret; |
1043 | } | |
1044 | ||
1045 | static int vidioc_s_frequency(struct file *file, void *priv, | |
b530a447 | 1046 | const struct v4l2_frequency *f) |
35045137 ST |
1047 | { |
1048 | return cx23885_set_frequency(file, priv, f); | |
e47f30b1 ST |
1049 | } |
1050 | ||
e47f30b1 ST |
1051 | /* ----------------------------------------------------------- */ |
1052 | ||
e47f30b1 ST |
1053 | int cx23885_video_irq(struct cx23885_dev *dev, u32 status) |
1054 | { | |
1055 | u32 mask, count; | |
1056 | int handled = 0; | |
1057 | ||
1058 | mask = cx_read(VID_A_INT_MSK); | |
1059 | if (0 == (status & mask)) | |
1060 | return handled; | |
79776c89 | 1061 | |
e47f30b1 ST |
1062 | cx_write(VID_A_INT_STAT, status); |
1063 | ||
19696f09 | 1064 | /* risc op code error, fifo overflow or line sync detection error */ |
79776c89 ST |
1065 | if ((status & VID_BC_MSK_OPC_ERR) || |
1066 | (status & VID_BC_MSK_SYNC) || | |
1067 | (status & VID_BC_MSK_OF)) { | |
1068 | ||
19696f09 | 1069 | if (status & VID_BC_MSK_OPC_ERR) { |
79776c89 ST |
1070 | dprintk(7, " (VID_BC_MSK_OPC_ERR 0x%08x)\n", |
1071 | VID_BC_MSK_OPC_ERR); | |
e39682b5 | 1072 | pr_warn("%s: video risc op code error\n", |
19696f09 ST |
1073 | dev->name); |
1074 | cx23885_sram_channel_dump(dev, | |
1075 | &dev->sram_channels[SRAM_CH01]); | |
1076 | } | |
79776c89 ST |
1077 | |
1078 | if (status & VID_BC_MSK_SYNC) | |
07ab29e1 | 1079 | dprintk(7, " (VID_BC_MSK_SYNC 0x%08x) video lines miss-match\n", |
79776c89 ST |
1080 | VID_BC_MSK_SYNC); |
1081 | ||
1082 | if (status & VID_BC_MSK_OF) | |
19696f09 | 1083 | dprintk(7, " (VID_BC_MSK_OF 0x%08x) fifo overflow\n", |
79776c89 ST |
1084 | VID_BC_MSK_OF); |
1085 | ||
e47f30b1 ST |
1086 | } |
1087 | ||
79776c89 ST |
1088 | /* Video */ |
1089 | if (status & VID_BC_MSK_RISCI1) { | |
e47f30b1 ST |
1090 | spin_lock(&dev->slock); |
1091 | count = cx_read(VID_A_GPCNT); | |
1092 | cx23885_video_wakeup(dev, &dev->vidq, count); | |
1093 | spin_unlock(&dev->slock); | |
1094 | handled++; | |
1095 | } | |
e47f30b1 | 1096 | |
79776c89 ST |
1097 | /* Allow the VBI framework to process it's payload */ |
1098 | handled += cx23885_vbi_irq(dev, status); | |
1099 | ||
e47f30b1 ST |
1100 | return handled; |
1101 | } | |
1102 | ||
e47f30b1 ST |
1103 | /* ----------------------------------------------------------- */ |
1104 | /* exported stuff */ | |
1105 | ||
bec43661 | 1106 | static const struct v4l2_file_operations video_fops = { |
e47f30b1 | 1107 | .owner = THIS_MODULE, |
453afdd9 HV |
1108 | .open = v4l2_fh_open, |
1109 | .release = vb2_fop_release, | |
1110 | .read = vb2_fop_read, | |
1111 | .poll = vb2_fop_poll, | |
24a8f7b5 | 1112 | .unlocked_ioctl = video_ioctl2, |
453afdd9 | 1113 | .mmap = vb2_fop_mmap, |
e47f30b1 ST |
1114 | }; |
1115 | ||
a399810c | 1116 | static const struct v4l2_ioctl_ops video_ioctl_ops = { |
e47f30b1 | 1117 | .vidioc_querycap = vidioc_querycap, |
78b526a4 HV |
1118 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, |
1119 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, | |
1120 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, | |
1121 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, | |
1122 | .vidioc_g_fmt_vbi_cap = cx23885_vbi_fmt, | |
1123 | .vidioc_try_fmt_vbi_cap = cx23885_vbi_fmt, | |
1124 | .vidioc_s_fmt_vbi_cap = cx23885_vbi_fmt, | |
453afdd9 HV |
1125 | .vidioc_reqbufs = vb2_ioctl_reqbufs, |
1126 | .vidioc_prepare_buf = vb2_ioctl_prepare_buf, | |
1127 | .vidioc_querybuf = vb2_ioctl_querybuf, | |
1128 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
1129 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
1130 | .vidioc_streamon = vb2_ioctl_streamon, | |
1131 | .vidioc_streamoff = vb2_ioctl_streamoff, | |
5200ab6a | 1132 | .vidioc_g_pixelaspect = vidioc_g_pixelaspect, |
ee10dc36 | 1133 | .vidioc_g_selection = vidioc_g_selection, |
e47f30b1 | 1134 | .vidioc_s_std = vidioc_s_std, |
35045137 | 1135 | .vidioc_g_std = vidioc_g_std, |
e47f30b1 ST |
1136 | .vidioc_enum_input = vidioc_enum_input, |
1137 | .vidioc_g_input = vidioc_g_input, | |
1138 | .vidioc_s_input = vidioc_s_input, | |
e9e5cf47 | 1139 | .vidioc_log_status = vidioc_log_status, |
e47f30b1 ST |
1140 | .vidioc_g_tuner = vidioc_g_tuner, |
1141 | .vidioc_s_tuner = vidioc_s_tuner, | |
1142 | .vidioc_g_frequency = vidioc_g_frequency, | |
1143 | .vidioc_s_frequency = vidioc_s_frequency, | |
1144 | #ifdef CONFIG_VIDEO_ADV_DEBUG | |
80f8568f | 1145 | .vidioc_g_chip_info = cx23885_g_chip_info, |
74618244 AW |
1146 | .vidioc_g_register = cx23885_g_register, |
1147 | .vidioc_s_register = cx23885_s_register, | |
e47f30b1 | 1148 | #endif |
fc1a889d ST |
1149 | .vidioc_enumaudio = vidioc_enum_audinput, |
1150 | .vidioc_g_audio = vidioc_g_audinput, | |
1151 | .vidioc_s_audio = vidioc_s_audinput, | |
da59a4de HV |
1152 | .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, |
1153 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | |
a399810c HV |
1154 | }; |
1155 | ||
1156 | static struct video_device cx23885_vbi_template; | |
1157 | static struct video_device cx23885_video_template = { | |
1158 | .name = "cx23885-video", | |
a399810c | 1159 | .fops = &video_fops, |
6e6a8b5a | 1160 | .ioctl_ops = &video_ioctl_ops, |
e47f30b1 | 1161 | .tvnorms = CX23885_NORMS, |
e47f30b1 ST |
1162 | }; |
1163 | ||
e47f30b1 ST |
1164 | void cx23885_video_unregister(struct cx23885_dev *dev) |
1165 | { | |
22b4e64f | 1166 | dprintk(1, "%s()\n", __func__); |
dbe83a3b | 1167 | cx23885_irq_remove(dev, 0x01); |
e47f30b1 | 1168 | |
79776c89 ST |
1169 | if (dev->vbi_dev) { |
1170 | if (video_is_registered(dev->vbi_dev)) | |
1171 | video_unregister_device(dev->vbi_dev); | |
1172 | else | |
1173 | video_device_release(dev->vbi_dev); | |
1174 | dev->vbi_dev = NULL; | |
79776c89 | 1175 | } |
e47f30b1 | 1176 | if (dev->video_dev) { |
f0813b4c | 1177 | if (video_is_registered(dev->video_dev)) |
e47f30b1 ST |
1178 | video_unregister_device(dev->video_dev); |
1179 | else | |
1180 | video_device_release(dev->video_dev); | |
1181 | dev->video_dev = NULL; | |
e47f30b1 | 1182 | } |
97ce5670 MM |
1183 | |
1184 | if (dev->audio_dev) | |
efa762f5 | 1185 | cx23885_audio_unregister(dev); |
e47f30b1 ST |
1186 | } |
1187 | ||
1188 | int cx23885_video_register(struct cx23885_dev *dev) | |
1189 | { | |
453afdd9 | 1190 | struct vb2_queue *q; |
e47f30b1 ST |
1191 | int err; |
1192 | ||
22b4e64f | 1193 | dprintk(1, "%s()\n", __func__); |
e47f30b1 ST |
1194 | |
1195 | /* Initialize VBI template */ | |
3618acab | 1196 | cx23885_vbi_template = cx23885_video_template; |
cc1e6315 MCC |
1197 | strscpy(cx23885_vbi_template.name, "cx23885-vbi", |
1198 | sizeof(cx23885_vbi_template.name)); | |
e47f30b1 | 1199 | |
9c1f5df8 | 1200 | dev->tvnorm = V4L2_STD_NTSC_M; |
91d2d674 | 1201 | dev->fmt = format_by_fourcc(V4L2_PIX_FMT_YUYV); |
96f233e9 | 1202 | dev->field = V4L2_FIELD_INTERLACED; |
1c5eaa23 | 1203 | dev->width = 720; |
91d2d674 | 1204 | dev->height = norm_maxh(dev->tvnorm); |
e47f30b1 ST |
1205 | |
1206 | /* init video dma queues */ | |
1207 | INIT_LIST_HEAD(&dev->vidq.active); | |
e47f30b1 | 1208 | |
79776c89 ST |
1209 | /* init vbi dma queues */ |
1210 | INIT_LIST_HEAD(&dev->vbiq.active); | |
dbe83a3b AW |
1211 | |
1212 | cx23885_irq_add_enable(dev, 0x01); | |
e47f30b1 | 1213 | |
557f48d5 IL |
1214 | if ((TUNER_ABSENT != dev->tuner_type) && |
1215 | ((dev->tuner_bus == 0) || (dev->tuner_bus == 1))) { | |
0d5a19f1 HV |
1216 | struct v4l2_subdev *sd = NULL; |
1217 | ||
1218 | if (dev->tuner_addr) | |
e6574f2f | 1219 | sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, |
557f48d5 | 1220 | &dev->i2c_bus[dev->tuner_bus].i2c_adap, |
9a1f8b34 | 1221 | "tuner", dev->tuner_addr, NULL); |
0d5a19f1 | 1222 | else |
53dacb15 | 1223 | sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, |
557f48d5 | 1224 | &dev->i2c_bus[dev->tuner_bus].i2c_adap, |
1532a070 | 1225 | "tuner", 0, v4l2_i2c_tuner_addrs(ADDRS_TV)); |
0d5a19f1 HV |
1226 | if (sd) { |
1227 | struct tuner_setup tun_setup; | |
1228 | ||
fd705e7c | 1229 | memset(&tun_setup, 0, sizeof(tun_setup)); |
0d5a19f1 HV |
1230 | tun_setup.mode_mask = T_ANALOG_TV; |
1231 | tun_setup.type = dev->tuner_type; | |
1232 | tun_setup.addr = v4l2_i2c_subdev_addr(sd); | |
6f0d8c02 | 1233 | tun_setup.tuner_callback = cx23885_tuner_callback; |
0d5a19f1 HV |
1234 | |
1235 | v4l2_subdev_call(sd, tuner, s_type_addr, &tun_setup); | |
0b32d65c | 1236 | |
642ca1a0 AE |
1237 | if ((dev->board == CX23885_BOARD_LEADTEK_WINFAST_PXTV1200) || |
1238 | (dev->board == CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200)) { | |
0b32d65c KK |
1239 | struct xc2028_ctrl ctrl = { |
1240 | .fname = XC2028_DEFAULT_FIRMWARE, | |
1241 | .max_len = 64 | |
1242 | }; | |
1243 | struct v4l2_priv_tun_config cfg = { | |
1244 | .tuner = dev->tuner_type, | |
1245 | .priv = &ctrl | |
1246 | }; | |
1247 | v4l2_subdev_call(sd, tuner, s_config, &cfg); | |
1248 | } | |
e8d42373 OK |
1249 | |
1250 | if (dev->board == CX23885_BOARD_AVERMEDIA_HC81R) { | |
1251 | struct xc2028_ctrl ctrl = { | |
1252 | .fname = "xc3028L-v36.fw", | |
1253 | .max_len = 64 | |
1254 | }; | |
1255 | struct v4l2_priv_tun_config cfg = { | |
1256 | .tuner = dev->tuner_type, | |
1257 | .priv = &ctrl | |
1258 | }; | |
1259 | v4l2_subdev_call(sd, tuner, s_config, &cfg); | |
1260 | } | |
0d5a19f1 HV |
1261 | } |
1262 | } | |
1263 | ||
24a8f7b5 HV |
1264 | /* initial device configuration */ |
1265 | mutex_lock(&dev->lock); | |
1266 | cx23885_set_tvnorm(dev, dev->tvnorm); | |
24a8f7b5 HV |
1267 | cx23885_video_mux(dev, 0); |
1268 | cx23885_audio_mux(dev, 0); | |
1269 | mutex_unlock(&dev->lock); | |
1270 | ||
453afdd9 HV |
1271 | q = &dev->vb2_vidq; |
1272 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
1273 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | |
1274 | q->gfp_flags = GFP_DMA32; | |
1275 | q->min_buffers_needed = 2; | |
1276 | q->drv_priv = dev; | |
1277 | q->buf_struct_size = sizeof(struct cx23885_buffer); | |
1278 | q->ops = &cx23885_video_qops; | |
1279 | q->mem_ops = &vb2_dma_sg_memops; | |
1280 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
1281 | q->lock = &dev->lock; | |
2bc46b3a | 1282 | q->dev = &dev->pci->dev; |
453afdd9 HV |
1283 | |
1284 | err = vb2_queue_init(q); | |
1285 | if (err < 0) | |
1286 | goto fail_unreg; | |
1287 | ||
1288 | q = &dev->vb2_vbiq; | |
1289 | q->type = V4L2_BUF_TYPE_VBI_CAPTURE; | |
1290 | q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ; | |
1291 | q->gfp_flags = GFP_DMA32; | |
1292 | q->min_buffers_needed = 2; | |
1293 | q->drv_priv = dev; | |
1294 | q->buf_struct_size = sizeof(struct cx23885_buffer); | |
1295 | q->ops = &cx23885_vbi_qops; | |
1296 | q->mem_ops = &vb2_dma_sg_memops; | |
1297 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
1298 | q->lock = &dev->lock; | |
2bc46b3a | 1299 | q->dev = &dev->pci->dev; |
453afdd9 HV |
1300 | |
1301 | err = vb2_queue_init(q); | |
1302 | if (err < 0) | |
1303 | goto fail_unreg; | |
1304 | ||
79776c89 | 1305 | /* register Video device */ |
e47f30b1 ST |
1306 | dev->video_dev = cx23885_vdev_init(dev, dev->pci, |
1307 | &cx23885_video_template, "video"); | |
453afdd9 | 1308 | dev->video_dev->queue = &dev->vb2_vidq; |
e47f30b1 ST |
1309 | err = video_register_device(dev->video_dev, VFL_TYPE_GRABBER, |
1310 | video_nr[dev->nr]); | |
1311 | if (err < 0) { | |
e39682b5 | 1312 | pr_info("%s: can't register video device\n", |
e47f30b1 ST |
1313 | dev->name); |
1314 | goto fail_unreg; | |
1315 | } | |
e39682b5 | 1316 | pr_info("%s: registered device %s [v4l2]\n", |
38c7c036 | 1317 | dev->name, video_device_node_name(dev->video_dev)); |
97ce5670 | 1318 | |
f88fb8e9 ST |
1319 | /* register VBI device */ |
1320 | dev->vbi_dev = cx23885_vdev_init(dev, dev->pci, | |
1321 | &cx23885_vbi_template, "vbi"); | |
453afdd9 | 1322 | dev->vbi_dev->queue = &dev->vb2_vbiq; |
f88fb8e9 ST |
1323 | err = video_register_device(dev->vbi_dev, VFL_TYPE_VBI, |
1324 | vbi_nr[dev->nr]); | |
1325 | if (err < 0) { | |
e39682b5 | 1326 | pr_info("%s: can't register vbi device\n", |
f88fb8e9 ST |
1327 | dev->name); |
1328 | goto fail_unreg; | |
1329 | } | |
e39682b5 | 1330 | pr_info("%s: registered device %s\n", |
f88fb8e9 ST |
1331 | dev->name, video_device_node_name(dev->vbi_dev)); |
1332 | ||
97ce5670 | 1333 | /* Register ALSA audio device */ |
efa762f5 | 1334 | dev->audio_dev = cx23885_audio_register(dev); |
97ce5670 | 1335 | |
e47f30b1 ST |
1336 | return 0; |
1337 | ||
1338 | fail_unreg: | |
1339 | cx23885_video_unregister(dev); | |
1340 | return err; | |
1341 | } |