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[thirdparty/kernel/stable.git] / drivers / media / pci / cx88 / cx88-blackbird.c
CommitLineData
c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
1da177e4 2/*
1da177e4
LT
3 * Support for a cx23416 mpeg encoder via cx2388x host port.
4 * "blackbird" reference design.
5 *
f8de18d4 6 * (c) 2004 Jelle Foks <jelle@foks.us>
1da177e4
LT
7 * (c) 2004 Gerd Knorr <kraxel@bytesex.org>
8 *
32590819 9 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@kernel.org>
b3c4ee70
MCC
10 * - video_ioctl2 conversion
11 *
631dd1a8 12 * Includes parts from the ivtv driver <http://sourceforge.net/projects/ivtv/>
1da177e4
LT
13 */
14
65bc2fe8
MCC
15#include "cx88.h"
16
1da177e4 17#include <linux/module.h>
1da177e4 18#include <linux/init.h>
5a0e3ad6 19#include <linux/slab.h>
1da177e4
LT
20#include <linux/fs.h>
21#include <linux/delay.h>
22#include <linux/device.h>
23#include <linux/firmware.h>
855dbada 24#include <media/v4l2-common.h>
35ea11ff 25#include <media/v4l2-ioctl.h>
1a3c60a0 26#include <media/v4l2-event.h>
d647f0b7 27#include <media/drv-intf/cx2341x.h>
1da177e4 28
1da177e4 29MODULE_DESCRIPTION("driver for cx2388x/cx23416 based mpeg encoder cards");
f8de18d4 30MODULE_AUTHOR("Jelle Foks <jelle@foks.us>, Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
1da177e4 31MODULE_LICENSE("GPL");
1990d50b 32MODULE_VERSION(CX88_VERSION);
1da177e4 33
ff699e6b 34static unsigned int debug;
7b61ba8f
MCC
35module_param(debug, int, 0644);
36MODULE_PARM_DESC(debug, "enable debug messages [blackbird]");
1da177e4 37
65bc2fe8
MCC
38#define dprintk(level, fmt, arg...) do { \
39 if (debug + 1 > level) \
40 printk(KERN_DEBUG pr_fmt("%s: blackbird:" fmt), \
41 __func__, ##arg); \
42} while (0)
1da177e4
LT
43
44/* ------------------------------------------------------------------ */
45
25472237 46#define BLACKBIRD_FIRM_IMAGE_SIZE 376836
1da177e4
LT
47
48/* defines below are from ivtv-driver.h */
49
50#define IVTV_CMD_HW_BLOCKS_RST 0xFFFFFFFF
51
b45009b0 52/* Firmware API commands */
b45009b0
MCC
53#define IVTV_API_STD_TIMEOUT 500
54
b45009b0
MCC
55enum blackbird_capture_type {
56 BLACKBIRD_MPEG_CAPTURE,
57 BLACKBIRD_RAW_CAPTURE,
58 BLACKBIRD_RAW_PASSTHRU_CAPTURE
59};
399426ca 60
b45009b0
MCC
61enum blackbird_capture_bits {
62 BLACKBIRD_RAW_BITS_NONE = 0x00,
63 BLACKBIRD_RAW_BITS_YUV_CAPTURE = 0x01,
64 BLACKBIRD_RAW_BITS_PCM_CAPTURE = 0x02,
65 BLACKBIRD_RAW_BITS_VBI_CAPTURE = 0x04,
66 BLACKBIRD_RAW_BITS_PASSTHRU_CAPTURE = 0x08,
67 BLACKBIRD_RAW_BITS_TO_HOST_CAPTURE = 0x10
68};
399426ca 69
b45009b0
MCC
70enum blackbird_capture_end {
71 BLACKBIRD_END_AT_GOP, /* stop at the end of gop, generate irq */
72 BLACKBIRD_END_NOW, /* stop immediately, no irq */
73};
399426ca 74
b45009b0
MCC
75enum blackbird_framerate {
76 BLACKBIRD_FRAMERATE_NTSC_30, /* NTSC: 30fps */
77 BLACKBIRD_FRAMERATE_PAL_25 /* PAL: 25fps */
78};
399426ca 79
b45009b0
MCC
80enum blackbird_stream_port {
81 BLACKBIRD_OUTPUT_PORT_MEMORY,
82 BLACKBIRD_OUTPUT_PORT_STREAMING,
83 BLACKBIRD_OUTPUT_PORT_SERIAL
84};
399426ca 85
b45009b0
MCC
86enum blackbird_data_xfer_status {
87 BLACKBIRD_MORE_BUFFERS_FOLLOW,
88 BLACKBIRD_LAST_BUFFER,
89};
399426ca 90
b45009b0
MCC
91enum blackbird_picture_mask {
92 BLACKBIRD_PICTURE_MASK_NONE,
93 BLACKBIRD_PICTURE_MASK_I_FRAMES,
94 BLACKBIRD_PICTURE_MASK_I_P_FRAMES = 0x3,
95 BLACKBIRD_PICTURE_MASK_ALL_FRAMES = 0x7,
96};
399426ca 97
b45009b0
MCC
98enum blackbird_vbi_mode_bits {
99 BLACKBIRD_VBI_BITS_SLICED,
100 BLACKBIRD_VBI_BITS_RAW,
101};
399426ca 102
b45009b0
MCC
103enum blackbird_vbi_insertion_bits {
104 BLACKBIRD_VBI_BITS_INSERT_IN_XTENSION_USR_DATA,
105 BLACKBIRD_VBI_BITS_INSERT_IN_PRIVATE_PACKETS = 0x1 << 1,
106 BLACKBIRD_VBI_BITS_SEPARATE_STREAM = 0x2 << 1,
107 BLACKBIRD_VBI_BITS_SEPARATE_STREAM_USR_DATA = 0x4 << 1,
108 BLACKBIRD_VBI_BITS_SEPARATE_STREAM_PRV_DATA = 0x5 << 1,
109};
399426ca 110
b45009b0
MCC
111enum blackbird_dma_unit {
112 BLACKBIRD_DMA_BYTES,
113 BLACKBIRD_DMA_FRAMES,
114};
399426ca 115
b45009b0
MCC
116enum blackbird_dma_transfer_status_bits {
117 BLACKBIRD_DMA_TRANSFER_BITS_DONE = 0x01,
118 BLACKBIRD_DMA_TRANSFER_BITS_ERROR = 0x04,
119 BLACKBIRD_DMA_TRANSFER_BITS_LL_ERROR = 0x10,
120};
399426ca 121
b45009b0
MCC
122enum blackbird_pause {
123 BLACKBIRD_PAUSE_ENCODING,
124 BLACKBIRD_RESUME_ENCODING,
125};
399426ca 126
b45009b0
MCC
127enum blackbird_copyright {
128 BLACKBIRD_COPYRIGHT_OFF,
129 BLACKBIRD_COPYRIGHT_ON,
130};
399426ca 131
b45009b0
MCC
132enum blackbird_notification_type {
133 BLACKBIRD_NOTIFICATION_REFRESH,
134};
399426ca 135
b45009b0
MCC
136enum blackbird_notification_status {
137 BLACKBIRD_NOTIFICATION_OFF,
138 BLACKBIRD_NOTIFICATION_ON,
139};
399426ca 140
b45009b0
MCC
141enum blackbird_notification_mailbox {
142 BLACKBIRD_NOTIFICATION_NO_MAILBOX = -1,
143};
399426ca 144
b45009b0
MCC
145enum blackbird_field1_lines {
146 BLACKBIRD_FIELD1_SAA7114 = 0x00EF, /* 239 */
147 BLACKBIRD_FIELD1_SAA7115 = 0x00F0, /* 240 */
148 BLACKBIRD_FIELD1_MICRONAS = 0x0105, /* 261 */
149};
399426ca 150
b45009b0
MCC
151enum blackbird_field2_lines {
152 BLACKBIRD_FIELD2_SAA7114 = 0x00EF, /* 239 */
153 BLACKBIRD_FIELD2_SAA7115 = 0x00F0, /* 240 */
154 BLACKBIRD_FIELD2_MICRONAS = 0x0106, /* 262 */
155};
399426ca 156
b45009b0
MCC
157enum blackbird_custom_data_type {
158 BLACKBIRD_CUSTOM_EXTENSION_USR_DATA,
159 BLACKBIRD_CUSTOM_PRIVATE_PACKET,
160};
399426ca 161
b45009b0
MCC
162enum blackbird_mute {
163 BLACKBIRD_UNMUTE,
164 BLACKBIRD_MUTE,
165};
399426ca 166
b45009b0
MCC
167enum blackbird_mute_video_mask {
168 BLACKBIRD_MUTE_VIDEO_V_MASK = 0x0000FF00,
169 BLACKBIRD_MUTE_VIDEO_U_MASK = 0x00FF0000,
170 BLACKBIRD_MUTE_VIDEO_Y_MASK = 0xFF000000,
171};
399426ca 172
b45009b0
MCC
173enum blackbird_mute_video_shift {
174 BLACKBIRD_MUTE_VIDEO_V_SHIFT = 8,
175 BLACKBIRD_MUTE_VIDEO_U_SHIFT = 16,
176 BLACKBIRD_MUTE_VIDEO_Y_SHIFT = 24,
177};
1da177e4
LT
178
179/* Registers */
180#define IVTV_REG_ENC_SDRAM_REFRESH (0x07F8 /*| IVTV_REG_OFFSET*/)
181#define IVTV_REG_ENC_SDRAM_PRECHARGE (0x07FC /*| IVTV_REG_OFFSET*/)
182#define IVTV_REG_SPU (0x9050 /*| IVTV_REG_OFFSET*/)
183#define IVTV_REG_HW_BLOCKS (0x9054 /*| IVTV_REG_OFFSET*/)
184#define IVTV_REG_VPU (0x9058 /*| IVTV_REG_OFFSET*/)
185#define IVTV_REG_APU (0xA064 /*| IVTV_REG_OFFSET*/)
186
187/* ------------------------------------------------------------------ */
188
189static void host_setup(struct cx88_core *core)
190{
191 /* toggle reset of the host */
192 cx_write(MO_GPHST_SOFT_RST, 1);
193 udelay(100);
194 cx_write(MO_GPHST_SOFT_RST, 0);
195 udelay(100);
196
197 /* host port setup */
198 cx_write(MO_GPHST_WSC, 0x44444444U);
199 cx_write(MO_GPHST_XFR, 0);
200 cx_write(MO_GPHST_WDTH, 15);
201 cx_write(MO_GPHST_HDSHK, 0);
202 cx_write(MO_GPHST_MUX16, 0x44448888U);
203 cx_write(MO_GPHST_MODE, 0);
204}
205
206/* ------------------------------------------------------------------ */
207
208#define P1_MDATA0 0x390000
209#define P1_MDATA1 0x390001
210#define P1_MDATA2 0x390002
211#define P1_MDATA3 0x390003
212#define P1_MADDR2 0x390004
213#define P1_MADDR1 0x390005
214#define P1_MADDR0 0x390006
215#define P1_RDATA0 0x390008
216#define P1_RDATA1 0x390009
217#define P1_RDATA2 0x39000A
218#define P1_RDATA3 0x39000B
219#define P1_RADDR0 0x39000C
220#define P1_RADDR1 0x39000D
221#define P1_RRDWR 0x39000E
222
223static int wait_ready_gpio0_bit1(struct cx88_core *core, u32 state)
224{
225 unsigned long timeout = jiffies + msecs_to_jiffies(1);
7b61ba8f 226 u32 gpio0, need;
1da177e4
LT
227
228 need = state ? 2 : 0;
229 for (;;) {
230 gpio0 = cx_read(MO_GP0_IO) & 2;
231 if (need == gpio0)
232 return 0;
7b61ba8f 233 if (time_after(jiffies, timeout))
1da177e4
LT
234 return -1;
235 udelay(1);
236 }
237}
238
239static int memory_write(struct cx88_core *core, u32 address, u32 value)
240{
241 /* Warning: address is dword address (4 bytes) */
242 cx_writeb(P1_MDATA0, (unsigned int)value);
243 cx_writeb(P1_MDATA1, (unsigned int)(value >> 8));
244 cx_writeb(P1_MDATA2, (unsigned int)(value >> 16));
245 cx_writeb(P1_MDATA3, (unsigned int)(value >> 24));
246 cx_writeb(P1_MADDR2, (unsigned int)(address >> 16) | 0x40);
247 cx_writeb(P1_MADDR1, (unsigned int)(address >> 8));
248 cx_writeb(P1_MADDR0, (unsigned int)address);
249 cx_read(P1_MDATA0);
250 cx_read(P1_MADDR0);
251
7b61ba8f 252 return wait_ready_gpio0_bit1(core, 1);
1da177e4
LT
253}
254
255static int memory_read(struct cx88_core *core, u32 address, u32 *value)
256{
4ac97914 257 int retval;
1da177e4
LT
258 u32 val;
259
260 /* Warning: address is dword address (4 bytes) */
261 cx_writeb(P1_MADDR2, (unsigned int)(address >> 16) & ~0xC0);
262 cx_writeb(P1_MADDR1, (unsigned int)(address >> 8));
263 cx_writeb(P1_MADDR0, (unsigned int)address);
264 cx_read(P1_MADDR0);
265
7b61ba8f 266 retval = wait_ready_gpio0_bit1(core, 1);
1da177e4
LT
267
268 cx_writeb(P1_MDATA3, 0);
269 val = (unsigned char)cx_read(P1_MDATA3) << 24;
270 cx_writeb(P1_MDATA2, 0);
271 val |= (unsigned char)cx_read(P1_MDATA2) << 16;
272 cx_writeb(P1_MDATA1, 0);
273 val |= (unsigned char)cx_read(P1_MDATA1) << 8;
274 cx_writeb(P1_MDATA0, 0);
275 val |= (unsigned char)cx_read(P1_MDATA0);
276
277 *value = val;
278 return retval;
279}
280
281static int register_write(struct cx88_core *core, u32 address, u32 value)
282{
283 cx_writeb(P1_RDATA0, (unsigned int)value);
284 cx_writeb(P1_RDATA1, (unsigned int)(value >> 8));
285 cx_writeb(P1_RDATA2, (unsigned int)(value >> 16));
286 cx_writeb(P1_RDATA3, (unsigned int)(value >> 24));
287 cx_writeb(P1_RADDR0, (unsigned int)address);
288 cx_writeb(P1_RADDR1, (unsigned int)(address >> 8));
289 cx_writeb(P1_RRDWR, 1);
290 cx_read(P1_RDATA0);
291 cx_read(P1_RADDR0);
292
7b61ba8f 293 return wait_ready_gpio0_bit1(core, 1);
1da177e4
LT
294}
295
1da177e4
LT
296static int register_read(struct cx88_core *core, u32 address, u32 *value)
297{
298 int retval;
299 u32 val;
300
301 cx_writeb(P1_RADDR0, (unsigned int)address);
302 cx_writeb(P1_RADDR1, (unsigned int)(address >> 8));
303 cx_writeb(P1_RRDWR, 0);
304 cx_read(P1_RADDR0);
305
7b61ba8f 306 retval = wait_ready_gpio0_bit1(core, 1);
1da177e4
LT
307 val = (unsigned char)cx_read(P1_RDATA0);
308 val |= (unsigned char)cx_read(P1_RDATA1) << 8;
309 val |= (unsigned char)cx_read(P1_RDATA2) << 16;
310 val |= (unsigned char)cx_read(P1_RDATA3) << 24;
311
312 *value = val;
313 return retval;
314}
315
316/* ------------------------------------------------------------------ */
317
399426ca
MCC
318static int blackbird_mbox_func(void *priv, u32 command, int in,
319 int out, u32 data[CX2341X_MBOX_MAX_DATA])
1da177e4 320{
f022156b 321 struct cx8802_dev *dev = priv;
1da177e4
LT
322 unsigned long timeout;
323 u32 value, flag, retval;
324 int i;
1da177e4 325
7b61ba8f 326 dprintk(1, "%s: 0x%X\n", __func__, command);
1da177e4 327
399426ca
MCC
328 /*
329 * this may not be 100% safe if we can't read any memory location
330 * without side effects
331 */
1da177e4
LT
332 memory_read(dev->core, dev->mailbox - 4, &value);
333 if (value != 0x12345678) {
399426ca
MCC
334 dprintk(0,
335 "Firmware and/or mailbox pointer not initialized or corrupted\n");
eddd3263 336 return -EIO;
1da177e4
LT
337 }
338
339 memory_read(dev->core, dev->mailbox, &flag);
340 if (flag) {
341 dprintk(0, "ERROR: Mailbox appears to be in use (%x)\n", flag);
eddd3263 342 return -EIO;
1da177e4
LT
343 }
344
345 flag |= 1; /* tell 'em we're working on it */
346 memory_write(dev->core, dev->mailbox, flag);
347
348 /* write command + args + fill remaining with zeros */
349 memory_write(dev->core, dev->mailbox + 1, command); /* command code */
399426ca
MCC
350 /* timeout */
351 memory_write(dev->core, dev->mailbox + 3, IVTV_API_STD_TIMEOUT);
f022156b
HV
352 for (i = 0; i < in; i++) {
353 memory_write(dev->core, dev->mailbox + 4 + i, data[i]);
354 dprintk(1, "API Input %d = %d\n", i, data[i]);
1da177e4 355 }
f022156b 356 for (; i < CX2341X_MBOX_MAX_DATA; i++)
1da177e4
LT
357 memory_write(dev->core, dev->mailbox + 4 + i, 0);
358
359 flag |= 3; /* tell 'em we're done writing */
360 memory_write(dev->core, dev->mailbox, flag);
361
362 /* wait for firmware to handle the API command */
b8f88416 363 timeout = jiffies + msecs_to_jiffies(1000);
1da177e4
LT
364 for (;;) {
365 memory_read(dev->core, dev->mailbox, &flag);
366 if (0 != (flag & 4))
367 break;
7b61ba8f 368 if (time_after(jiffies, timeout)) {
eddd3263
HV
369 dprintk(0, "ERROR: API Mailbox timeout %x\n", command);
370 return -EIO;
1da177e4
LT
371 }
372 udelay(10);
373 }
374
375 /* read output values */
f022156b
HV
376 for (i = 0; i < out; i++) {
377 memory_read(dev->core, dev->mailbox + 4 + i, data + i);
378 dprintk(1, "API Output %d = %d\n", i, data[i]);
1da177e4 379 }
1da177e4
LT
380
381 memory_read(dev->core, dev->mailbox + 2, &retval);
7b61ba8f 382 dprintk(1, "API result = %d\n", retval);
1da177e4
LT
383
384 flag = 0;
385 memory_write(dev->core, dev->mailbox, flag);
386 return retval;
387}
399426ca 388
f022156b 389/* ------------------------------------------------------------------ */
1da177e4 390
399426ca
MCC
391/*
392 * We don't need to call the API often, so using just one mailbox
393 * will probably suffice
394 */
f022156b
HV
395static int blackbird_api_cmd(struct cx8802_dev *dev, u32 command,
396 u32 inputcnt, u32 outputcnt, ...)
397{
398 u32 data[CX2341X_MBOX_MAX_DATA];
399 va_list vargs;
400 int i, err;
401
402 va_start(vargs, outputcnt);
403
399426ca 404 for (i = 0; i < inputcnt; i++)
f022156b 405 data[i] = va_arg(vargs, int);
399426ca 406
f022156b
HV
407 err = blackbird_mbox_func(dev, command, inputcnt, outputcnt, data);
408 for (i = 0; i < outputcnt; i++) {
409 int *vptr = va_arg(vargs, int *);
410 *vptr = data[i];
411 }
412 va_end(vargs);
413 return err;
414}
1da177e4
LT
415
416static int blackbird_find_mailbox(struct cx8802_dev *dev)
417{
7b61ba8f
MCC
418 u32 signature[4] = {0x12345678, 0x34567812, 0x56781234, 0x78123456};
419 int signaturecnt = 0;
1da177e4
LT
420 u32 value;
421 int i;
422
e0099e9e 423 for (i = 0; i < BLACKBIRD_FIRM_IMAGE_SIZE; i++) {
1da177e4
LT
424 memory_read(dev->core, i, &value);
425 if (value == signature[signaturecnt])
426 signaturecnt++;
427 else
428 signaturecnt = 0;
7b61ba8f 429 if (signaturecnt == 4) {
1da177e4 430 dprintk(1, "Mailbox signature found\n");
399426ca 431 return i + 1;
1da177e4
LT
432 }
433 }
434 dprintk(0, "Mailbox signature values not found!\n");
eddd3263 435 return -EIO;
1da177e4
LT
436}
437
438static int blackbird_load_firmware(struct cx8802_dev *dev)
439{
440 static const unsigned char magic[8] = {
441 0xa7, 0x0d, 0x00, 0x00, 0x66, 0xbb, 0x55, 0xaa
442 };
443 const struct firmware *firmware;
444 int i, retval = 0;
445 u32 value = 0;
446 u32 checksum = 0;
c79a23f3 447 __le32 *dataptr;
1da177e4
LT
448
449 retval = register_write(dev->core, IVTV_REG_VPU, 0xFFFFFFED);
399426ca
MCC
450 retval |= register_write(dev->core, IVTV_REG_HW_BLOCKS,
451 IVTV_CMD_HW_BLOCKS_RST);
452 retval |= register_write(dev->core, IVTV_REG_ENC_SDRAM_REFRESH,
453 0x80000640);
454 retval |= register_write(dev->core, IVTV_REG_ENC_SDRAM_PRECHARGE,
455 0x1A);
456 usleep_range(10000, 20000);
4ac97914 457 retval |= register_write(dev->core, IVTV_REG_APU, 0);
1da177e4
LT
458
459 if (retval < 0)
460 dprintk(0, "Error with register_write\n");
461
48c35756 462 retval = request_firmware(&firmware, CX2341X_FIRM_ENC_FILENAME,
1da177e4 463 &dev->pci->dev);
674434c6 464
1da177e4 465 if (retval != 0) {
eddd3263 466 pr_err("Hotplug firmware request failed (%s).\n",
65bc2fe8 467 CX2341X_FIRM_ENC_FILENAME);
eddd3263
HV
468 pr_err("Please fix your hotplug setup, the board will not work without firmware loaded!\n");
469 return -EIO;
1da177e4
LT
470 }
471
25472237 472 if (firmware->size != BLACKBIRD_FIRM_IMAGE_SIZE) {
eddd3263 473 pr_err("Firmware size mismatch (have %zd, expected %d)\n",
65bc2fe8 474 firmware->size, BLACKBIRD_FIRM_IMAGE_SIZE);
73ca66b9 475 release_firmware(firmware);
eddd3263 476 return -EINVAL;
1da177e4
LT
477 }
478
7b61ba8f 479 if (memcmp(firmware->data, magic, 8) != 0) {
eddd3263 480 pr_err("Firmware magic mismatch, wrong file?\n");
73ca66b9 481 release_firmware(firmware);
eddd3263 482 return -EINVAL;
1da177e4
LT
483 }
484
485 /* transfer to the chip */
7b61ba8f 486 dprintk(1, "Loading firmware ...\n");
c79a23f3 487 dataptr = (__le32 *)firmware->data;
1da177e4 488 for (i = 0; i < (firmware->size >> 2); i++) {
6ba4c432 489 value = le32_to_cpu(*dataptr);
1da177e4
LT
490 checksum += ~value;
491 memory_write(dev->core, i, value);
492 dataptr++;
493 }
494
495 /* read back to verify with the checksum */
496 for (i--; i >= 0; i--) {
497 memory_read(dev->core, i, &value);
498 checksum -= ~value;
499 }
eddd3263 500 release_firmware(firmware);
1da177e4 501 if (checksum) {
eddd3263
HV
502 pr_err("Firmware load might have failed (checksum mismatch).\n");
503 return -EIO;
1da177e4 504 }
1da177e4
LT
505 dprintk(0, "Firmware upload successful.\n");
506
399426ca
MCC
507 retval |= register_write(dev->core, IVTV_REG_HW_BLOCKS,
508 IVTV_CMD_HW_BLOCKS_RST);
4ac97914
MCC
509 retval |= register_read(dev->core, IVTV_REG_SPU, &value);
510 retval |= register_write(dev->core, IVTV_REG_SPU, value & 0xFFFFFFFE);
399426ca 511 usleep_range(10000, 20000);
1da177e4
LT
512
513 retval |= register_read(dev->core, IVTV_REG_VPU, &value);
4ac97914 514 retval |= register_write(dev->core, IVTV_REG_VPU, value & 0xFFFFFFE8);
1da177e4
LT
515
516 if (retval < 0)
517 dprintk(0, "Error with register_write\n");
518 return 0;
519}
520
399426ca
MCC
521/*
522 * Settings used by the windows tv app for PVR2000:
523 * =================================================================================================================
524 * Profile | Codec | Resolution | CBR/VBR | Video Qlty | V. Bitrate | Frmrate | Audio Codec | A. Bitrate | A. Mode
525 * -----------------------------------------------------------------------------------------------------------------
526 * MPEG-1 | MPEG1 | 352x288PAL | (CBR) | 1000:Optimal | 2000 Kbps | 25fps | MPG1 Layer2 | 224kbps | Stereo
527 * MPEG-2 | MPEG2 | 720x576PAL | VBR | 600 :Good | 4000 Kbps | 25fps | MPG1 Layer2 | 224kbps | Stereo
528 * VCD | MPEG1 | 352x288PAL | (CBR) | 1000:Optimal | 1150 Kbps | 25fps | MPG1 Layer2 | 224kbps | Stereo
529 * DVD | MPEG2 | 720x576PAL | VBR | 600 :Good | 6000 Kbps | 25fps | MPG1 Layer2 | 224kbps | Stereo
530 * DB* DVD | MPEG2 | 720x576PAL | CBR | 600 :Good | 6000 Kbps | 25fps | MPG1 Layer2 | 224kbps | Stereo
531 * =================================================================================================================
532 * [*] DB: "DirectBurn"
533 */
31629424 534
f022156b
HV
535static void blackbird_codec_settings(struct cx8802_dev *dev)
536{
ccd6f1d4
HV
537 struct cx88_core *core = dev->core;
538
f022156b
HV
539 /* assign frame size */
540 blackbird_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0,
399426ca 541 core->height, core->width);
f022156b 542
ccd6f1d4
HV
543 dev->cxhdl.width = core->width;
544 dev->cxhdl.height = core->height;
399426ca
MCC
545 cx2341x_handler_set_50hz(&dev->cxhdl,
546 dev->core->tvnorm & V4L2_STD_625_50);
7bb34c8e 547 cx2341x_handler_setup(&dev->cxhdl);
f022156b
HV
548}
549
1da177e4
LT
550static int blackbird_initialize_codec(struct cx8802_dev *dev)
551{
552 struct cx88_core *core = dev->core;
553 int version;
554 int retval;
555
7b61ba8f 556 dprintk(1, "Initialize codec\n");
855dbada 557 retval = blackbird_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0); /* ping */
1da177e4
LT
558 if (retval < 0) {
559 /* ping was not successful, reset and upload firmware */
560 cx_write(MO_SRST_IO, 0); /* SYS_RSTO=0 */
1da177e4 561 cx_write(MO_SRST_IO, 1); /* SYS_RSTO=1 */
1da177e4
LT
562 retval = blackbird_load_firmware(dev);
563 if (retval < 0)
564 return retval;
565
50fa46b2
RK
566 retval = blackbird_find_mailbox(dev);
567 if (retval < 0)
1da177e4
LT
568 return -1;
569
50fa46b2
RK
570 dev->mailbox = retval;
571
399426ca
MCC
572 /* ping */
573 retval = blackbird_api_cmd(dev, CX2341X_ENC_PING_FW, 0, 0);
1da177e4
LT
574 if (retval < 0) {
575 dprintk(0, "ERROR: Firmware ping failed!\n");
576 return -1;
577 }
578
399426ca
MCC
579 retval = blackbird_api_cmd(dev, CX2341X_ENC_GET_VERSION,
580 0, 1, &version);
1da177e4 581 if (retval < 0) {
399426ca
MCC
582 dprintk(0,
583 "ERROR: Firmware get encoder version failed!\n");
1da177e4
LT
584 return -1;
585 }
586 dprintk(0, "Firmware version is 0x%08x\n", version);
587 }
1da177e4
LT
588
589 cx_write(MO_PINMUX_IO, 0x88); /* 656-8bit IO and enable MPEG parallel IO */
590 cx_clear(MO_INPUT_FORMAT, 0x100); /* chroma subcarrier lock to normal? */
591 cx_write(MO_VBOS_CONTROL, 0x84A00); /* no 656 mode, 8-bit pixels, disable VBI */
592 cx_clear(MO_OUTPUT_FORMAT, 0x0008); /* Normal Y-limits to let the mpeg encoder sync */
593
1da177e4 594 blackbird_codec_settings(dev);
1da177e4 595
855dbada 596 blackbird_api_cmd(dev, CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, 0,
399426ca 597 BLACKBIRD_FIELD1_SAA7115, BLACKBIRD_FIELD2_SAA7115);
b45009b0 598
855dbada 599 blackbird_api_cmd(dev, CX2341X_ENC_SET_PLACEHOLDER, 12, 0,
399426ca
MCC
600 BLACKBIRD_CUSTOM_EXTENSION_USR_DATA,
601 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
1da177e4 602
f9e54e0c
JF
603 return 0;
604}
605
0b6b6302 606static int blackbird_start_codec(struct cx8802_dev *dev)
f9e54e0c 607{
f9e54e0c
JF
608 struct cx88_core *core = dev->core;
609 /* start capturing to the host interface */
610 u32 reg;
611
612 int i;
613 int lastchange = -1;
614 int lastval = 0;
615
d8f69971 616 for (i = 0; (i < 10) && (i < (lastchange + 4)); i++) {
f9e54e0c
JF
617 reg = cx_read(AUD_STATUS);
618
d8f69971
MCC
619 dprintk(1, "AUD_STATUS:%dL: 0x%x\n", i, reg);
620 if ((reg & 0x0F) != lastval) {
f9e54e0c
JF
621 lastval = reg & 0x0F;
622 lastchange = i;
623 }
624 msleep(100);
625 }
626
627 /* unmute audio source */
628 cx_clear(AUD_VOL_CTL, (1 << 6));
1da177e4 629
d8f69971 630 blackbird_api_cmd(dev, CX2341X_ENC_REFRESH_INPUT, 0, 0);
f9e54e0c
JF
631
632 /* initialize the video input */
633 blackbird_api_cmd(dev, CX2341X_ENC_INITIALIZE_INPUT, 0, 0);
634
7bb34c8e
HV
635 cx2341x_handler_set_busy(&dev->cxhdl, 1);
636
e52e98a7 637 /* start capturing to the host interface */
855dbada 638 blackbird_api_cmd(dev, CX2341X_ENC_START_CAPTURE, 2, 0,
399426ca 639 BLACKBIRD_MPEG_CAPTURE, BLACKBIRD_RAW_BITS_NONE);
1da177e4 640
f9e54e0c
JF
641 return 0;
642}
643
644static int blackbird_stop_codec(struct cx8802_dev *dev)
645{
f9e54e0c 646 blackbird_api_cmd(dev, CX2341X_ENC_STOP_CAPTURE, 3, 0,
399426ca
MCC
647 BLACKBIRD_END_NOW,
648 BLACKBIRD_MPEG_CAPTURE,
649 BLACKBIRD_RAW_BITS_NONE);
f9e54e0c 650
7bb34c8e
HV
651 cx2341x_handler_set_busy(&dev->cxhdl, 0);
652
1da177e4
LT
653 return 0;
654}
655
656/* ------------------------------------------------------------------ */
657
df9ecb0c 658static int queue_setup(struct vb2_queue *q,
399426ca
MCC
659 unsigned int *num_buffers, unsigned int *num_planes,
660 unsigned int sizes[], struct device *alloc_devs[])
1da177e4 661{
0b6b6302 662 struct cx8802_dev *dev = q->drv_priv;
1da177e4 663
0b6b6302
HV
664 *num_planes = 1;
665 dev->ts_packet_size = 188 * 4;
666 dev->ts_packet_count = 32;
667 sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
1da177e4
LT
668 return 0;
669}
670
0b6b6302 671static int buffer_prepare(struct vb2_buffer *vb)
1da177e4 672{
2d700715 673 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0b6b6302 674 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
2d700715 675 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
0b6b6302 676
ccd6f1d4 677 return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
1da177e4
LT
678}
679
0b6b6302 680static void buffer_finish(struct vb2_buffer *vb)
1da177e4 681{
2d700715 682 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0b6b6302 683 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
2d700715 684 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
5e7045e3 685 struct cx88_riscmem *risc = &buf->risc;
0b6b6302 686
5e7045e3
HV
687 if (risc->cpu)
688 pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
689 memset(risc, 0, sizeof(*risc));
1da177e4
LT
690}
691
0b6b6302 692static void buffer_queue(struct vb2_buffer *vb)
1da177e4 693{
2d700715 694 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
0b6b6302 695 struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
2d700715 696 struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
0b6b6302
HV
697
698 cx8802_buf_queue(dev, buf);
1da177e4
LT
699}
700
0b6b6302
HV
701static int start_streaming(struct vb2_queue *q, unsigned int count)
702{
703 struct cx8802_dev *dev = q->drv_priv;
704 struct cx88_dmaqueue *dmaq = &dev->mpegq;
705 struct cx8802_driver *drv;
706 struct cx88_buffer *buf;
707 unsigned long flags;
708 int err;
709
710 /* Make sure we can acquire the hardware */
711 drv = cx8802_get_driver(dev, CX88_MPEG_BLACKBIRD);
712 if (!drv) {
713 dprintk(1, "%s: blackbird driver is not loaded\n", __func__);
714 err = -ENODEV;
715 goto fail;
716 }
717
718 err = drv->request_acquire(drv);
719 if (err != 0) {
399426ca
MCC
720 dprintk(1, "%s: Unable to acquire hardware, %d\n", __func__,
721 err);
0b6b6302
HV
722 goto fail;
723 }
724
725 if (blackbird_initialize_codec(dev) < 0) {
726 drv->request_release(drv);
727 err = -EINVAL;
728 goto fail;
729 }
730
731 err = blackbird_start_codec(dev);
732 if (err == 0) {
733 buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
734 cx8802_start_dma(dev, dmaq, buf);
735 return 0;
736 }
737
738fail:
739 spin_lock_irqsave(&dev->slock, flags);
740 while (!list_empty(&dmaq->active)) {
741 struct cx88_buffer *buf = list_entry(dmaq->active.next,
742 struct cx88_buffer, list);
743
744 list_del(&buf->list);
2d700715 745 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
0b6b6302
HV
746 }
747 spin_unlock_irqrestore(&dev->slock, flags);
748 return err;
749}
750
751static void stop_streaming(struct vb2_queue *q)
752{
753 struct cx8802_dev *dev = q->drv_priv;
754 struct cx88_dmaqueue *dmaq = &dev->mpegq;
755 struct cx8802_driver *drv = NULL;
756 unsigned long flags;
757
758 cx8802_cancel_buffers(dev);
759 blackbird_stop_codec(dev);
760
761 /* Make sure we release the hardware */
762 drv = cx8802_get_driver(dev, CX88_MPEG_BLACKBIRD);
763 WARN_ON(!drv);
764 if (drv)
765 drv->request_release(drv);
766
767 spin_lock_irqsave(&dev->slock, flags);
768 while (!list_empty(&dmaq->active)) {
769 struct cx88_buffer *buf = list_entry(dmaq->active.next,
770 struct cx88_buffer, list);
771
772 list_del(&buf->list);
2d700715 773 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
0b6b6302
HV
774 }
775 spin_unlock_irqrestore(&dev->slock, flags);
776}
777
10accd2e 778static const struct vb2_ops blackbird_qops = {
0b6b6302
HV
779 .queue_setup = queue_setup,
780 .buf_prepare = buffer_prepare,
781 .buf_finish = buffer_finish,
782 .buf_queue = buffer_queue,
783 .wait_prepare = vb2_ops_wait_prepare,
784 .wait_finish = vb2_ops_wait_finish,
785 .start_streaming = start_streaming,
786 .stop_streaming = stop_streaming,
1da177e4
LT
787};
788
789/* ------------------------------------------------------------------ */
790
902e197d 791static int vidioc_querycap(struct file *file, void *priv,
399426ca 792 struct v4l2_capability *cap)
1da177e4 793{
0b6b6302
HV
794 struct cx8802_dev *dev = video_drvdata(file);
795 struct cx88_core *core = dev->core;
1da177e4 796
cc1e6315 797 strscpy(cap->driver, "cx88_blackbird", sizeof(cap->driver));
902e197d 798 sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
4839c58f 799 return cx88_querycap(file, core, cap);
b3c4ee70
MCC
800}
801
7b61ba8f 802static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
399426ca 803 struct v4l2_fmtdesc *f)
b3c4ee70
MCC
804{
805 if (f->index != 0)
806 return -EINVAL;
1da177e4 807
c0decac1 808 strscpy(f->description, "MPEG", sizeof(f->description));
b3c4ee70 809 f->pixelformat = V4L2_PIX_FMT_MPEG;
f33e9868 810 f->flags = V4L2_FMT_FLAG_COMPRESSED;
b3c4ee70
MCC
811 return 0;
812}
1da177e4 813
ccd6f1d4 814static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
399426ca 815 struct v4l2_format *f)
b3c4ee70 816{
0b6b6302 817 struct cx8802_dev *dev = video_drvdata(file);
ccd6f1d4 818 struct cx88_core *core = dev->core;
b3c4ee70 819
b3c4ee70
MCC
820 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
821 f->fmt.pix.bytesperline = 0;
0b6b6302 822 f->fmt.pix.sizeimage = dev->ts_packet_size * dev->ts_packet_count;
f33e9868 823 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
ccd6f1d4
HV
824 f->fmt.pix.width = core->width;
825 f->fmt.pix.height = core->height;
826 f->fmt.pix.field = core->field;
b3c4ee70
MCC
827 return 0;
828}
e52e98a7 829
ccd6f1d4 830static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
399426ca 831 struct v4l2_format *f)
b3c4ee70 832{
0b6b6302 833 struct cx8802_dev *dev = video_drvdata(file);
ccd6f1d4 834 struct cx88_core *core = dev->core;
7b61ba8f 835 unsigned int maxw, maxh;
ccd6f1d4 836 enum v4l2_field field;
b3c4ee70 837
b3c4ee70
MCC
838 f->fmt.pix.pixelformat = V4L2_PIX_FMT_MPEG;
839 f->fmt.pix.bytesperline = 0;
0b6b6302 840 f->fmt.pix.sizeimage = dev->ts_packet_size * dev->ts_packet_count;
f33e9868 841 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
ccd6f1d4
HV
842
843 maxw = norm_maxw(core->tvnorm);
844 maxh = norm_maxh(core->tvnorm);
845
846 field = f->fmt.pix.field;
847
848 switch (field) {
849 case V4L2_FIELD_TOP:
850 case V4L2_FIELD_BOTTOM:
851 case V4L2_FIELD_INTERLACED:
852 case V4L2_FIELD_SEQ_BT:
853 case V4L2_FIELD_SEQ_TB:
854 break;
855 default:
856 field = (f->fmt.pix.height > maxh / 2)
857 ? V4L2_FIELD_INTERLACED
858 : V4L2_FIELD_BOTTOM;
859 break;
860 }
861 if (V4L2_FIELD_HAS_T_OR_B(field))
862 maxh /= 2;
863
864 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
865 &f->fmt.pix.height, 32, maxh, 0, 0);
866 f->fmt.pix.field = field;
b3c4ee70
MCC
867 return 0;
868}
e52e98a7 869
ccd6f1d4 870static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
399426ca 871 struct v4l2_format *f)
b3c4ee70 872{
0b6b6302 873 struct cx8802_dev *dev = video_drvdata(file);
b3c4ee70 874 struct cx88_core *core = dev->core;
e52e98a7 875
078859a3
HV
876 if (vb2_is_busy(&dev->vb2_mpegq))
877 return -EBUSY;
878 if (core->v4ldev && (vb2_is_busy(&core->v4ldev->vb2_vidq) ||
879 vb2_is_busy(&core->v4ldev->vb2_vbiq)))
880 return -EBUSY;
ccd6f1d4
HV
881 vidioc_try_fmt_vid_cap(file, priv, f);
882 core->width = f->fmt.pix.width;
883 core->height = f->fmt.pix.height;
884 core->field = f->fmt.pix.field;
399426ca
MCC
885 cx88_set_scale(core, f->fmt.pix.width, f->fmt.pix.height,
886 f->fmt.pix.field);
b3c4ee70 887 blackbird_api_cmd(dev, CX2341X_ENC_SET_FRAME_SIZE, 2, 0,
399426ca 888 f->fmt.pix.height, f->fmt.pix.width);
b3c4ee70
MCC
889 return 0;
890}
1da177e4 891
7b61ba8f 892static int vidioc_s_frequency(struct file *file, void *priv,
399426ca 893 const struct v4l2_frequency *f)
b3c4ee70 894{
0b6b6302
HV
895 struct cx8802_dev *dev = video_drvdata(file);
896 struct cx88_core *core = dev->core;
fb37ab3e 897 bool streaming;
23154f2f 898
7b61ba8f 899 if (unlikely(core->board.tuner_type == UNSET))
f33e9868
HV
900 return -EINVAL;
901 if (unlikely(f->tuner != 0))
902 return -EINVAL;
7f56a4a7 903 streaming = vb2_start_streaming_called(&dev->vb2_mpegq);
fb37ab3e 904 if (streaming)
f9e54e0c
JF
905 blackbird_stop_codec(dev);
906
7b61ba8f 907 cx88_set_freq(core, f);
b3c4ee70 908 blackbird_initialize_codec(dev);
399426ca 909 cx88_set_scale(core, core->width, core->height, core->field);
fb37ab3e
HV
910 if (streaming)
911 blackbird_start_codec(dev);
b3c4ee70
MCC
912 return 0;
913}
23154f2f 914
7b61ba8f 915static int vidioc_log_status(struct file *file, void *priv)
b3c4ee70 916{
0b6b6302
HV
917 struct cx8802_dev *dev = video_drvdata(file);
918 struct cx88_core *core = dev->core;
b3c4ee70
MCC
919 char name[32 + 2];
920
921 snprintf(name, sizeof(name), "%s/2", core->name);
b8341e1d 922 call_all(core, core, log_status);
7bb34c8e 923 v4l2_ctrl_handler_log_status(&dev->cxhdl.hdl, name);
b3c4ee70
MCC
924 return 0;
925}
23154f2f 926
7b61ba8f 927static int vidioc_enum_input(struct file *file, void *priv,
399426ca 928 struct v4l2_input *i)
b3c4ee70 929{
0b6b6302
HV
930 struct cx8802_dev *dev = video_drvdata(file);
931 struct cx88_core *core = dev->core;
7b61ba8f
MCC
932
933 return cx88_enum_input(core, i);
b3c4ee70 934}
ed10b06d 935
7b61ba8f 936static int vidioc_g_frequency(struct file *file, void *priv,
399426ca 937 struct v4l2_frequency *f)
b3c4ee70 938{
0b6b6302
HV
939 struct cx8802_dev *dev = video_drvdata(file);
940 struct cx88_core *core = dev->core;
ed10b06d 941
7b61ba8f 942 if (unlikely(core->board.tuner_type == UNSET))
b3c4ee70 943 return -EINVAL;
f33e9868
HV
944 if (unlikely(f->tuner != 0))
945 return -EINVAL;
ed10b06d 946
b3c4ee70 947 f->frequency = core->freq;
b8341e1d 948 call_all(core, tuner, g_frequency, f);
ed10b06d 949
b3c4ee70
MCC
950 return 0;
951}
ed10b06d 952
7b61ba8f 953static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
b3c4ee70 954{
0b6b6302
HV
955 struct cx8802_dev *dev = video_drvdata(file);
956 struct cx88_core *core = dev->core;
23154f2f 957
b3c4ee70
MCC
958 *i = core->input;
959 return 0;
960}
ed10b06d 961
7b61ba8f 962static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
b3c4ee70 963{
0b6b6302
HV
964 struct cx8802_dev *dev = video_drvdata(file);
965 struct cx88_core *core = dev->core;
ed10b06d 966
b3c4ee70
MCC
967 if (i >= 4)
968 return -EINVAL;
399426ca 969 if (!INPUT(i).type)
f33e9868 970 return -EINVAL;
b3c4ee70 971
b3c4ee70 972 cx88_newstation(core);
7b61ba8f 973 cx88_video_mux(core, i);
ed10b06d
MCC
974 return 0;
975}
976
7b61ba8f 977static int vidioc_g_tuner(struct file *file, void *priv,
399426ca 978 struct v4l2_tuner *t)
b3c4ee70 979{
0b6b6302
HV
980 struct cx8802_dev *dev = video_drvdata(file);
981 struct cx88_core *core = dev->core;
b3c4ee70
MCC
982 u32 reg;
983
7b61ba8f 984 if (unlikely(core->board.tuner_type == UNSET))
b3c4ee70 985 return -EINVAL;
7b61ba8f 986 if (t->index != 0)
f057131f 987 return -EINVAL;
b3c4ee70 988
cc1e6315 989 strscpy(t->name, "Television", sizeof(t->name));
b3c4ee70
MCC
990 t->capability = V4L2_TUNER_CAP_NORM;
991 t->rangehigh = 0xffffffffUL;
f33e9868 992 call_all(core, tuner, g_tuner, t);
b3c4ee70 993
7b61ba8f 994 cx88_get_stereo(core, t);
b3c4ee70 995 reg = cx_read(MO_DEVICE_STATUS);
399426ca 996 t->signal = (reg & (1 << 5)) ? 0xffff : 0x0000;
b3c4ee70
MCC
997 return 0;
998}
6c5be74c 999
7b61ba8f 1000static int vidioc_s_tuner(struct file *file, void *priv,
399426ca 1001 const struct v4l2_tuner *t)
e52e98a7 1002{
0b6b6302
HV
1003 struct cx8802_dev *dev = video_drvdata(file);
1004 struct cx88_core *core = dev->core;
b3c4ee70 1005
7b61ba8f 1006 if (core->board.tuner_type == UNSET)
b3c4ee70 1007 return -EINVAL;
7b61ba8f 1008 if (t->index != 0)
b3c4ee70
MCC
1009 return -EINVAL;
1010
1011 cx88_set_stereo(core, t->audmode, 1);
1012 return 0;
e52e98a7
MCC
1013}
1014
48d68801
HV
1015static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *tvnorm)
1016{
0b6b6302
HV
1017 struct cx8802_dev *dev = video_drvdata(file);
1018 struct cx88_core *core = dev->core;
48d68801
HV
1019
1020 *tvnorm = core->tvnorm;
1021 return 0;
1022}
1023
314527ac 1024static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id)
1da177e4 1025{
63b0d5ad 1026 struct cx8802_dev *dev = video_drvdata(file);
0b6b6302 1027 struct cx88_core *core = dev->core;
1fe70e96 1028
078859a3 1029 return cx88_set_tvnorm(core, id);
1da177e4
LT
1030}
1031
7b61ba8f 1032static const struct v4l2_file_operations mpeg_fops = {
1da177e4 1033 .owner = THIS_MODULE,
0b6b6302
HV
1034 .open = v4l2_fh_open,
1035 .release = vb2_fop_release,
1036 .read = vb2_fop_read,
1037 .poll = vb2_fop_poll,
1038 .mmap = vb2_fop_mmap,
fcbd5049 1039 .unlocked_ioctl = video_ioctl2,
1da177e4
LT
1040};
1041
a399810c 1042static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
b3c4ee70 1043 .vidioc_querycap = vidioc_querycap,
78b526a4
HV
1044 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1045 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1046 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1047 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
0b6b6302
HV
1048 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1049 .vidioc_querybuf = vb2_ioctl_querybuf,
1050 .vidioc_qbuf = vb2_ioctl_qbuf,
1051 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1052 .vidioc_streamon = vb2_ioctl_streamon,
1053 .vidioc_streamoff = vb2_ioctl_streamoff,
b3c4ee70
MCC
1054 .vidioc_s_frequency = vidioc_s_frequency,
1055 .vidioc_log_status = vidioc_log_status,
b3c4ee70 1056 .vidioc_enum_input = vidioc_enum_input,
b3c4ee70
MCC
1057 .vidioc_g_frequency = vidioc_g_frequency,
1058 .vidioc_g_input = vidioc_g_input,
1059 .vidioc_s_input = vidioc_s_input,
1060 .vidioc_g_tuner = vidioc_g_tuner,
1061 .vidioc_s_tuner = vidioc_s_tuner,
48d68801 1062 .vidioc_g_std = vidioc_g_std,
b3c4ee70 1063 .vidioc_s_std = vidioc_s_std,
1a3c60a0
HV
1064 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1065 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
a399810c
HV
1066};
1067
507e1909 1068static const struct video_device cx8802_mpeg_template = {
a399810c 1069 .name = "cx8802",
a399810c 1070 .fops = &mpeg_fops,
7b61ba8f 1071 .ioctl_ops = &mpeg_ioctl_ops,
b3c4ee70 1072 .tvnorms = CX88_NORMS,
1da177e4
LT
1073};
1074
1075/* ------------------------------------------------------------------ */
1076
6c5be74c
ST
1077/* The CX8802 MPEG API will call this when we can use the hardware */
1078static int cx8802_blackbird_advise_acquire(struct cx8802_driver *drv)
1079{
1080 struct cx88_core *core = drv->core;
1081 int err = 0;
1082
6a59d64c 1083 switch (core->boardnr) {
6c5be74c 1084 case CX88_BOARD_HAUPPAUGE_HVR1300:
399426ca
MCC
1085 /*
1086 * By default, core setup will leave the cx22702 out of reset,
1087 * on the bus.
6c5be74c
ST
1088 * We left the hardware on power up with the cx22702 active.
1089 * We're being given access to re-arrange the GPIOs.
1090 * Take the bus off the cx22702 and put the cx23416 on it.
1091 */
79392737
DB
1092 /* Toggle reset on cx22702 leaving i2c active */
1093 cx_set(MO_GP0_IO, 0x00000080);
1094 udelay(1000);
1095 cx_clear(MO_GP0_IO, 0x00000080);
1096 udelay(50);
1097 cx_set(MO_GP0_IO, 0x00000080);
1098 udelay(1000);
1099 /* tri-state the cx22702 pins */
1100 cx_set(MO_GP0_IO, 0x00000004);
1101 udelay(1000);
6c5be74c
ST
1102 break;
1103 default:
1104 err = -ENODEV;
1105 }
1106 return err;
1107}
1108
1109/* The CX8802 MPEG API will call this when we need to release the hardware */
1110static int cx8802_blackbird_advise_release(struct cx8802_driver *drv)
1111{
1112 struct cx88_core *core = drv->core;
1113 int err = 0;
1114
6a59d64c 1115 switch (core->boardnr) {
6c5be74c
ST
1116 case CX88_BOARD_HAUPPAUGE_HVR1300:
1117 /* Exit leaving the cx23416 on the bus */
1118 break;
1119 default:
1120 err = -ENODEV;
1121 }
1122 return err;
1123}
1124
1da177e4
LT
1125static void blackbird_unregister_video(struct cx8802_dev *dev)
1126{
34080bc2 1127 video_unregister_device(&dev->mpeg_dev);
1da177e4
LT
1128}
1129
1130static int blackbird_register_video(struct cx8802_dev *dev)
1131{
1132 int err;
1133
34080bc2
HV
1134 cx88_vdev_init(dev->core, dev->pci, &dev->mpeg_dev,
1135 &cx8802_mpeg_template, "mpeg");
1136 dev->mpeg_dev.ctrl_handler = &dev->cxhdl.hdl;
1137 video_set_drvdata(&dev->mpeg_dev, dev);
1138 dev->mpeg_dev.queue = &dev->vb2_mpegq;
1139 err = video_register_device(&dev->mpeg_dev, VFL_TYPE_GRABBER, -1);
1da177e4 1140 if (err < 0) {
65bc2fe8 1141 pr_info("can't register mpeg device\n");
1da177e4
LT
1142 return err;
1143 }
65bc2fe8
MCC
1144 pr_info("registered device %s [mpeg]\n",
1145 video_device_node_name(&dev->mpeg_dev));
1da177e4
LT
1146 return 0;
1147}
1148
1149/* ----------------------------------------------------------- */
1150
6c5be74c 1151static int cx8802_blackbird_probe(struct cx8802_driver *drv)
1da177e4 1152{
6c5be74c
ST
1153 struct cx88_core *core = drv->core;
1154 struct cx8802_dev *dev = core->dvbdev;
0b6b6302 1155 struct vb2_queue *q;
1da177e4
LT
1156 int err;
1157
7b61ba8f
MCC
1158 dprintk(1, "%s\n", __func__);
1159 dprintk(1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
6a59d64c 1160 core->boardnr,
6c5be74c
ST
1161 core->name,
1162 core->pci_bus,
1163 core->pci_slot);
1da177e4
LT
1164
1165 err = -ENODEV;
6a59d64c 1166 if (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))
1da177e4
LT
1167 goto fail_core;
1168
7bb34c8e 1169 dev->cxhdl.port = CX2341X_PORT_STREAMING;
ccd6f1d4
HV
1170 dev->cxhdl.width = core->width;
1171 dev->cxhdl.height = core->height;
7bb34c8e
HV
1172 dev->cxhdl.func = blackbird_mbox_func;
1173 dev->cxhdl.priv = dev;
1174 err = cx2341x_handler_init(&dev->cxhdl, 36);
1175 if (err)
1176 goto fail_core;
da1b1aea 1177 v4l2_ctrl_add_handler(&dev->cxhdl.hdl, &core->video_hdl, NULL, false);
0345c387 1178
1da177e4 1179 /* blackbird stuff */
65bc2fe8 1180 pr_info("cx23416 based mpeg encoder (blackbird reference design)\n");
1da177e4
LT
1181 host_setup(dev->core);
1182
f9e54e0c 1183 blackbird_initialize_codec(dev);
e52e98a7
MCC
1184
1185 /* initial device configuration: needed ? */
b3c4ee70 1186// init_controls(core);
7b61ba8f
MCC
1187 cx88_set_tvnorm(core, core->tvnorm);
1188 cx88_video_mux(core, 0);
ccd6f1d4 1189 cx2341x_handler_set_50hz(&dev->cxhdl, core->height == 576);
7bb34c8e 1190 cx2341x_handler_setup(&dev->cxhdl);
0b6b6302
HV
1191
1192 q = &dev->vb2_mpegq;
1193 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1194 q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
1195 q->gfp_flags = GFP_DMA32;
1196 q->min_buffers_needed = 2;
1197 q->drv_priv = dev;
1198 q->buf_struct_size = sizeof(struct cx88_buffer);
1199 q->ops = &blackbird_qops;
1200 q->mem_ops = &vb2_dma_sg_memops;
1201 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1202 q->lock = &core->lock;
2bc46b3a 1203 q->dev = &dev->pci->dev;
0b6b6302
HV
1204
1205 err = vb2_queue_init(q);
1206 if (err < 0)
1207 goto fail_core;
1208
7bb34c8e 1209 blackbird_register_video(dev);
e52e98a7 1210
1da177e4
LT
1211 return 0;
1212
0b6b6302 1213fail_core:
1da177e4
LT
1214 return err;
1215}
1216
6c5be74c 1217static int cx8802_blackbird_remove(struct cx8802_driver *drv)
1da177e4 1218{
7bb34c8e
HV
1219 struct cx88_core *core = drv->core;
1220 struct cx8802_dev *dev = core->dvbdev;
1221
1da177e4 1222 /* blackbird */
6c5be74c 1223 blackbird_unregister_video(drv->core->dvbdev);
7bb34c8e 1224 v4l2_ctrl_handler_free(&dev->cxhdl.hdl);
1da177e4 1225
6c5be74c 1226 return 0;
1da177e4
LT
1227}
1228
6c5be74c
ST
1229static struct cx8802_driver cx8802_blackbird_driver = {
1230 .type_id = CX88_MPEG_BLACKBIRD,
1231 .hw_access = CX8802_DRVCTL_SHARED,
1232 .probe = cx8802_blackbird_probe,
1233 .remove = cx8802_blackbird_remove,
1234 .advise_acquire = cx8802_blackbird_advise_acquire,
1235 .advise_release = cx8802_blackbird_advise_release,
1da177e4
LT
1236};
1237
31d0f845 1238static int __init blackbird_init(void)
1da177e4 1239{
65bc2fe8
MCC
1240 pr_info("cx2388x blackbird driver version %s loaded\n",
1241 CX88_VERSION);
6c5be74c 1242 return cx8802_register_driver(&cx8802_blackbird_driver);
1da177e4
LT
1243}
1244
31d0f845 1245static void __exit blackbird_fini(void)
1da177e4 1246{
6c5be74c 1247 cx8802_unregister_driver(&cx8802_blackbird_driver);
1da177e4
LT
1248}
1249
1250module_init(blackbird_init);
1251module_exit(blackbird_fini);