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[media] v4l: subdev: Extend default link validation to cover field order
[thirdparty/kernel/stable.git] / drivers / media / platform / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
9b28ee3c 58#include <linux/clkdev.h>
448de7e7
SA		 59#include <linux/delay.h>
60#include <linux/device.h>
61#include <linux/dma-mapping.h>
62#include <linux/i2c.h>
63#include <linux/interrupt.h>
64#include <linux/module.h>
c8d35c84 65#include <linux/omap-iommu.h>
448de7e7
SA		 66#include <linux/platform_device.h>
67#include <linux/regulator/consumer.h>
68#include <linux/slab.h>
69#include <linux/sched.h>
70#include <linux/vmalloc.h>
71
2a0a5472
LP		 72#include <asm/dma-iommu.h>
73
448de7e7
SA		 74#include <media/v4l2-common.h>
75#include <media/v4l2-device.h>
76
77#include "isp.h"
78#include "ispreg.h"
79#include "ispccdc.h"
80#include "isppreview.h"
81#include "ispresizer.h"
82#include "ispcsi2.h"
83#include "ispccp2.h"
84#include "isph3a.h"
85#include "isphist.h"
86
87static unsigned int autoidle;
88module_param(autoidle, int, 0444);
89MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
90
91static void isp_save_ctx(struct isp_device *isp);
92
93static void isp_restore_ctx(struct isp_device *isp);
94
95static const struct isp_res_mapping isp_res_maps[] = {
96 {
97 .isp_rev = ISP_REVISION_2_0,
98 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
99 1 << OMAP3_ISP_IOMEM_CCP2 |
100 1 << OMAP3_ISP_IOMEM_CCDC |
101 1 << OMAP3_ISP_IOMEM_HIST |
102 1 << OMAP3_ISP_IOMEM_H3A |
103 1 << OMAP3_ISP_IOMEM_PREV |
104 1 << OMAP3_ISP_IOMEM_RESZ |
105 1 << OMAP3_ISP_IOMEM_SBL |
106 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
c19d19eb
SA		 107 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
108 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
448de7e7
SA		 109 },
110 {
111 .isp_rev = ISP_REVISION_15_0,
112 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
113 1 << OMAP3_ISP_IOMEM_CCP2 |
114 1 << OMAP3_ISP_IOMEM_CCDC |
115 1 << OMAP3_ISP_IOMEM_HIST |
116 1 << OMAP3_ISP_IOMEM_H3A |
117 1 << OMAP3_ISP_IOMEM_PREV |
118 1 << OMAP3_ISP_IOMEM_RESZ |
119 1 << OMAP3_ISP_IOMEM_SBL |
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
121 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
122 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
124 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
c19d19eb
SA		 125 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
126 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
448de7e7
SA		 127 },
128};
129
130/* Structure for saving/restoring ISP module registers */
131static struct isp_reg isp_reg_list[] = {
132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
135 {0, ISP_TOK_TERM, 0}
136};
137
138/*
139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
140 * @isp: OMAP3 ISP device
141 *
142 * In order to force posting of pending writes, we need to write and
143 * readback the same register, in this case the revision register.
144 *
145 * See this link for reference:
146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
147 */
148void omap3isp_flush(struct isp_device *isp)
149{
150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152}
153
9b28ee3c
LP		 154/* -----------------------------------------------------------------------------
155 * XCLK
156 */
157
158#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
159
160static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
161{
162 switch (xclk->id) {
163 case ISP_XCLK_A:
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
165 ISPTCTRL_CTRL_DIVA_MASK,
166 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
167 break;
168 case ISP_XCLK_B:
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
170 ISPTCTRL_CTRL_DIVB_MASK,
171 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
172 break;
173 }
174}
175
176static int isp_xclk_prepare(struct clk_hw *hw)
177{
178 struct isp_xclk *xclk = to_isp_xclk(hw);
179
180 omap3isp_get(xclk->isp);
181
182 return 0;
183}
184
185static void isp_xclk_unprepare(struct clk_hw *hw)
186{
187 struct isp_xclk *xclk = to_isp_xclk(hw);
188
189 omap3isp_put(xclk->isp);
190}
191
192static int isp_xclk_enable(struct clk_hw *hw)
193{
194 struct isp_xclk *xclk = to_isp_xclk(hw);
195 unsigned long flags;
196
197 spin_lock_irqsave(&xclk->lock, flags);
198 isp_xclk_update(xclk, xclk->divider);
199 xclk->enabled = true;
200 spin_unlock_irqrestore(&xclk->lock, flags);
201
202 return 0;
203}
204
205static void isp_xclk_disable(struct clk_hw *hw)
206{
207 struct isp_xclk *xclk = to_isp_xclk(hw);
208 unsigned long flags;
209
210 spin_lock_irqsave(&xclk->lock, flags);
211 isp_xclk_update(xclk, 0);
212 xclk->enabled = false;
213 spin_unlock_irqrestore(&xclk->lock, flags);
214}
215
216static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
218{
219 struct isp_xclk *xclk = to_isp_xclk(hw);
220
221 return parent_rate / xclk->divider;
222}
223
224static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
225{
226 u32 divider;
227
228 if (*rate >= parent_rate) {
229 *rate = parent_rate;
230 return ISPTCTRL_CTRL_DIV_BYPASS;
231 }
232
233 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
234 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
235 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
236
237 *rate = parent_rate / divider;
238 return divider;
239}
240
241static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
242 unsigned long *parent_rate)
243{
244 isp_xclk_calc_divider(&rate, *parent_rate);
245 return rate;
246}
247
248static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
249 unsigned long parent_rate)
250{
251 struct isp_xclk *xclk = to_isp_xclk(hw);
252 unsigned long flags;
253 u32 divider;
254
255 divider = isp_xclk_calc_divider(&rate, parent_rate);
256
257 spin_lock_irqsave(&xclk->lock, flags);
258
259 xclk->divider = divider;
260 if (xclk->enabled)
261 isp_xclk_update(xclk, divider);
262
263 spin_unlock_irqrestore(&xclk->lock, flags);
264
265 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
266 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
267 return 0;
268}
269
270static const struct clk_ops isp_xclk_ops = {
271 .prepare = isp_xclk_prepare,
272 .unprepare = isp_xclk_unprepare,
273 .enable = isp_xclk_enable,
274 .disable = isp_xclk_disable,
275 .recalc_rate = isp_xclk_recalc_rate,
276 .round_rate = isp_xclk_round_rate,
277 .set_rate = isp_xclk_set_rate,
278};
279
280static const char *isp_xclk_parent_name = "cam_mclk";
281
282static const struct clk_init_data isp_xclk_init_data = {
283 .name = "cam_xclk",
284 .ops = &isp_xclk_ops,
285 .parent_names = &isp_xclk_parent_name,
286 .num_parents = 1,
287};
288
289static int isp_xclk_init(struct isp_device *isp)
290{
291 struct isp_platform_data *pdata = isp->pdata;
292 struct clk_init_data init;
293 unsigned int i;
294
f8e2ff26
SN		 295 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
296 isp->xclks[i].clk = ERR_PTR(-EINVAL);
297
9b28ee3c
LP		 298 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
299 struct isp_xclk *xclk = &isp->xclks[i];
9b28ee3c
LP		 300
301 xclk->isp = isp;
302 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
303 xclk->divider = 1;
304 spin_lock_init(&xclk->lock);
305
306 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
307 init.ops = &isp_xclk_ops;
308 init.parent_names = &isp_xclk_parent_name;
309 init.num_parents = 1;
310
311 xclk->hw.init = &init;
f8e2ff26
SN		 312 /*
313 * The first argument is NULL in order to avoid circular
314 * reference, as this driver takes reference on the
315 * sensor subdevice modules and the sensors would take
316 * reference on this module through clk_get().
317 */
318 xclk->clk = clk_register(NULL, &xclk->hw);
319 if (IS_ERR(xclk->clk))
320 return PTR_ERR(xclk->clk);
9b28ee3c
LP		 321
322 if (pdata->xclks[i].con_id == NULL &&
323 pdata->xclks[i].dev_id == NULL)
324 continue;
325
326 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
327 if (xclk->lookup == NULL)
328 return -ENOMEM;
329
330 xclk->lookup->con_id = pdata->xclks[i].con_id;
331 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
f8e2ff26 332 xclk->lookup->clk = xclk->clk;
9b28ee3c
LP		 333
334 clkdev_add(xclk->lookup);
335 }
336
337 return 0;
338}
339
340static void isp_xclk_cleanup(struct isp_device *isp)
341{
342 unsigned int i;
343
344 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
345 struct isp_xclk *xclk = &isp->xclks[i];
346
f8e2ff26
SN		 347 if (!IS_ERR(xclk->clk))
348 clk_unregister(xclk->clk);
349
9b28ee3c
LP		 350 if (xclk->lookup)
351 clkdev_drop(xclk->lookup);
352 }
353}
354
355/* -----------------------------------------------------------------------------
356 * Interrupts
357 */
358
448de7e7
SA		 359/*
360 * isp_enable_interrupts - Enable ISP interrupts.
361 * @isp: OMAP3 ISP device
362 */
363static void isp_enable_interrupts(struct isp_device *isp)
364{
365 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
366 | IRQ0ENABLE_CSIB_IRQ
367 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
368 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
369 | IRQ0ENABLE_CCDC_VD0_IRQ
370 | IRQ0ENABLE_CCDC_VD1_IRQ
371 | IRQ0ENABLE_HS_VS_IRQ
372 | IRQ0ENABLE_HIST_DONE_IRQ
373 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
374 | IRQ0ENABLE_H3A_AF_DONE_IRQ
375 | IRQ0ENABLE_PRV_DONE_IRQ
376 | IRQ0ENABLE_RSZ_DONE_IRQ;
377
378 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
379 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
380}
381
382/*
383 * isp_disable_interrupts - Disable ISP interrupts.
384 * @isp: OMAP3 ISP device
385 */
386static void isp_disable_interrupts(struct isp_device *isp)
387{
388 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
389}
390
448de7e7 391/*
96d62ae2 392 * isp_core_init - ISP core settings
448de7e7
SA		 393 * @isp: OMAP3 ISP device
394 * @idle: Consider idle state.
395 *
25aeb418 396 * Set the power settings for the ISP and SBL bus and configure the HS/VS
96d62ae2
LP		 397 * interrupt source.
398 *
399 * We need to configure the HS/VS interrupt source before interrupts get
400 * enabled, as the sensor might be free-running and the ISP default setting
401 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 402 */
96d62ae2 403static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 404{
405 isp_reg_writel(isp,
406 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
407 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
408 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
409 ((isp->revision == ISP_REVISION_15_0) ?
410 ISP_SYSCONFIG_AUTOIDLE : 0),
411 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
412
96d62ae2
LP		 413 isp_reg_writel(isp,
414 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
415 ISPCTRL_SYNC_DETECT_VSRISE,
416 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 417}
418
419/*
420 * Configure the bridge and lane shifter. Valid inputs are
421 *
422 * CCDC_INPUT_PARALLEL: Parallel interface
423 * CCDC_INPUT_CSI2A: CSI2a receiver
424 * CCDC_INPUT_CCP2B: CCP2b receiver
425 * CCDC_INPUT_CSI2C: CSI2c receiver
426 *
427 * The bridge and lane shifter are configured according to the selected input
428 * and the ISP platform data.
429 */
430void omap3isp_configure_bridge(struct isp_device *isp,
431 enum ccdc_input_entity input,
c09af044 432 const struct isp_parallel_platform_data *pdata,
c51364ca 433 unsigned int shift, unsigned int bridge)
448de7e7
SA		 434{
435 u32 ispctrl_val;
436
437 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
438 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
439 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
440 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
441 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 442 ispctrl_val |= bridge;
448de7e7
SA		 443
444 switch (input) {
445 case CCDC_INPUT_PARALLEL:
446 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7 447 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
c09af044 448 shift += pdata->data_lane_shift * 2;
448de7e7
SA		 449 break;
450
451 case CCDC_INPUT_CSI2A:
452 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
453 break;
454
455 case CCDC_INPUT_CCP2B:
456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
457 break;
458
459 case CCDC_INPUT_CSI2C:
460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
461 break;
462
463 default:
464 return;
465 }
466
c09af044
MJ		 467 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
468
448de7e7
SA		 469 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
470}
471
448de7e7
SA		 472void omap3isp_hist_dma_done(struct isp_device *isp)
473{
474 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
475 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
476 /* Histogram cannot be enabled in this frame anymore */
477 atomic_set(&isp->isp_hist.buf_err, 1);
478 dev_dbg(isp->dev, "hist: Out of synchronization with "
479 "CCDC. Ignoring next buffer.\n");
480 }
481}
482
483static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
484{
485 static const char *name[] = {
486 "CSIA_IRQ",
487 "res1",
488 "res2",
489 "CSIB_LCM_IRQ",
490 "CSIB_IRQ",
491 "res5",
492 "res6",
493 "res7",
494 "CCDC_VD0_IRQ",
495 "CCDC_VD1_IRQ",
496 "CCDC_VD2_IRQ",
497 "CCDC_ERR_IRQ",
498 "H3A_AF_DONE_IRQ",
499 "H3A_AWB_DONE_IRQ",
500 "res14",
501 "res15",
502 "HIST_DONE_IRQ",
503 "CCDC_LSC_DONE",
504 "CCDC_LSC_PREFETCH_COMPLETED",
505 "CCDC_LSC_PREFETCH_ERROR",
506 "PRV_DONE_IRQ",
507 "CBUFF_IRQ",
508 "res22",
509 "res23",
510 "RSZ_DONE_IRQ",
511 "OVF_IRQ",
512 "res26",
513 "res27",
514 "MMU_ERR_IRQ",
515 "OCP_ERR_IRQ",
516 "SEC_ERR_IRQ",
517 "HS_VS_IRQ",
518 };
519 int i;
520
6c20c635 521 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 522
523 for (i = 0; i < ARRAY_SIZE(name); i++) {
524 if ((1 << i) & irqstatus)
525 printk(KERN_CONT "%s ", name[i]);
526 }
527 printk(KERN_CONT "\n");
528}
529
530static void isp_isr_sbl(struct isp_device *isp)
531{
532 struct device *dev = isp->dev;
875e2e3e 533 struct isp_pipeline *pipe;
448de7e7
SA		 534 u32 sbl_pcr;
535
536 /*
537 * Handle shared buffer logic overflows for video buffers.
538 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
539 */
540 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
541 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
542 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
543
544 if (sbl_pcr)
545 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
546
875e2e3e
LP		 547 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
548 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
549 if (pipe != NULL)
550 pipe->error = true;
551 }
552
553 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
554 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
555 if (pipe != NULL)
556 pipe->error = true;
557 }
558
559 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
560 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
561 if (pipe != NULL)
562 pipe->error = true;
448de7e7
SA		 563 }
564
565 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 566 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
567 if (pipe != NULL)
568 pipe->error = true;
448de7e7
SA		 569 }
570
571 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
572 | ISPSBL_PCR_RSZ2_WBL_OVF
573 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 574 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
575 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
576 if (pipe != NULL)
577 pipe->error = true;
578 }
448de7e7
SA		 579
580 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
581 omap3isp_stat_sbl_overflow(&isp->isp_af);
582
583 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
584 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
585}
586
587/*
588 * isp_isr - Interrupt Service Routine for Camera ISP module.
589 * @irq: Not used currently.
590 * @_isp: Pointer to the OMAP3 ISP device
591 *
592 * Handles the corresponding callback if plugged in.
448de7e7
SA		 593 */
594static irqreturn_t isp_isr(int irq, void *_isp)
595{
596 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
597 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
598 IRQ0STATUS_CCDC_VD0_IRQ |
599 IRQ0STATUS_CCDC_VD1_IRQ |
600 IRQ0STATUS_HS_VS_IRQ;
601 struct isp_device *isp = _isp;
602 u32 irqstatus;
448de7e7
SA		 603
604 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
605 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
606
607 isp_isr_sbl(isp);
608
875e2e3e
LP		 609 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
610 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 611
875e2e3e
LP		 612 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
613 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 614
615 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
616 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
617 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
618 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
619 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
620 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
621 omap3isp_stat_isr_frame_sync(&isp->isp_af);
622 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
623 }
624
625 if (irqstatus & ccdc_events)
626 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
627
628 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
629 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
630 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
631 omap3isp_preview_isr(&isp->isp_prev);
632 }
633
634 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
635 omap3isp_resizer_isr(&isp->isp_res);
636
637 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
638 omap3isp_stat_isr(&isp->isp_aewb);
639
640 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
641 omap3isp_stat_isr(&isp->isp_af);
642
643 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
644 omap3isp_stat_isr(&isp->isp_hist);
645
646 omap3isp_flush(isp);
647
648#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
649 isp_isr_dbg(isp, irqstatus);
650#endif
651
652 return IRQ_HANDLED;
653}
654
655/* -----------------------------------------------------------------------------
656 * Pipeline power management
657 *
658 * Entities must be powered up when part of a pipeline that contains at least
659 * one open video device node.
660 *
661 * To achieve this use the entity use_count field to track the number of users.
662 * For entities corresponding to video device nodes the use_count field stores
663 * the users count of the node. For entities corresponding to subdevs the
664 * use_count field stores the total number of users of all video device nodes
665 * in the pipeline.
666 *
667 * The omap3isp_pipeline_pm_use() function must be called in the open() and
668 * close() handlers of video device nodes. It increments or decrements the use
669 * count of all subdev entities in the pipeline.
670 *
671 * To react to link management on powered pipelines, the link setup notification
672 * callback updates the use count of all entities in the source and sink sides
673 * of the link.
674 */
675
676/*
677 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
678 * @entity: The entity
679 *
680 * Return the total number of users of all video device nodes in the pipeline.
681 */
682static int isp_pipeline_pm_use_count(struct media_entity *entity)
683{
684 struct media_entity_graph graph;
685 int use = 0;
686
687 media_entity_graph_walk_start(&graph, entity);
688
689 while ((entity = media_entity_graph_walk_next(&graph))) {
690 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
691 use += entity->use_count;
692 }
693
694 return use;
695}
696
697/*
698 * isp_pipeline_pm_power_one - Apply power change to an entity
699 * @entity: The entity
700 * @change: Use count change
701 *
702 * Change the entity use count by @change. If the entity is a subdev update its
703 * power state by calling the core::s_power operation when the use count goes
704 * from 0 to != 0 or from != 0 to 0.
705 *
706 * Return 0 on success or a negative error code on failure.
707 */
708static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
709{
710 struct v4l2_subdev *subdev;
711 int ret;
712
713 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
714 ? media_entity_to_v4l2_subdev(entity) : NULL;
715
716 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
717 ret = v4l2_subdev_call(subdev, core, s_power, 1);
718 if (ret < 0 && ret != -ENOIOCTLCMD)
719 return ret;
720 }
721
722 entity->use_count += change;
723 WARN_ON(entity->use_count < 0);
724
725 if (entity->use_count == 0 && change < 0 && subdev != NULL)
726 v4l2_subdev_call(subdev, core, s_power, 0);
727
728 return 0;
729}
730
731/*
732 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
733 * @entity: The entity
734 * @change: Use count change
735 *
736 * Walk the pipeline to update the use count and the power state of all non-node
737 * entities.
738 *
739 * Return 0 on success or a negative error code on failure.
740 */
741static int isp_pipeline_pm_power(struct media_entity *entity, int change)
742{
743 struct media_entity_graph graph;
744 struct media_entity *first = entity;
745 int ret = 0;
746
747 if (!change)
748 return 0;
749
750 media_entity_graph_walk_start(&graph, entity);
751
752 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
753 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
754 ret = isp_pipeline_pm_power_one(entity, change);
755
756 if (!ret)
757 return 0;
758
759 media_entity_graph_walk_start(&graph, first);
760
761 while ((first = media_entity_graph_walk_next(&graph))
762 && first != entity)
763 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
764 isp_pipeline_pm_power_one(first, -change);
765
766 return ret;
767}
768
769/*
770 * omap3isp_pipeline_pm_use - Update the use count of an entity
771 * @entity: The entity
772 * @use: Use (1) or stop using (0) the entity
773 *
774 * Update the use count of all entities in the pipeline and power entities on or
775 * off accordingly.
776 *
777 * Return 0 on success or a negative error code on failure. Powering entities
778 * off is assumed to never fail. No failure can occur when the use parameter is
779 * set to 0.
780 */
781int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
782{
783 int change = use ? 1 : -1;
784 int ret;
785
786 mutex_lock(&entity->parent->graph_mutex);
787
788 /* Apply use count to node. */
789 entity->use_count += change;
790 WARN_ON(entity->use_count < 0);
791
792 /* Apply power change to connected non-nodes. */
793 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 794 if (ret < 0)
795 entity->use_count -= change;
448de7e7
SA		 796
797 mutex_unlock(&entity->parent->graph_mutex);
798
799 return ret;
800}
801
802/*
803 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 804 * @link: The link
448de7e7 805 * @flags: New link flags that will be applied
813f5c0a 806 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA		 807 *
808 * React to link management on powered pipelines by updating the use count of
809 * all entities in the source and sink sides of the link. Entities are powered
810 * on or off accordingly.
811 *
812 * Return 0 on success or a negative error code on failure. Powering entities
813 * off is assumed to never fail. This function will not fail for disconnection
814 * events.
815 */
813f5c0a
SN		 816static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
817 unsigned int notification)
448de7e7 818{
813f5c0a
SN		 819 struct media_entity *source = link->source->entity;
820 struct media_entity *sink = link->sink->entity;
821 int source_use = isp_pipeline_pm_use_count(source);
822 int sink_use = isp_pipeline_pm_use_count(sink);
448de7e7
SA		 823 int ret;
824
813f5c0a
SN		 825 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
826 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 827 /* Powering off entities is assumed to never fail. */
813f5c0a
SN		 828 isp_pipeline_pm_power(source, -sink_use);
829 isp_pipeline_pm_power(sink, -source_use);
448de7e7
SA		 830 return 0;
831 }
832
813f5c0a
SN		 833 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
834 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 835
813f5c0a
SN		 836 ret = isp_pipeline_pm_power(source, sink_use);
837 if (ret < 0)
838 return ret;
448de7e7 839
813f5c0a
SN		 840 ret = isp_pipeline_pm_power(sink, source_use);
841 if (ret < 0)
842 isp_pipeline_pm_power(source, -sink_use);
843
844 return ret;
845 }
846
847 return 0;
448de7e7
SA		 848}
849
850/* -----------------------------------------------------------------------------
851 * Pipeline stream management
852 */
853
854/*
855 * isp_pipeline_enable - Enable streaming on a pipeline
856 * @pipe: ISP pipeline
857 * @mode: Stream mode (single shot or continuous)
858 *
859 * Walk the entities chain starting at the pipeline output video node and start
860 * all modules in the chain in the given mode.
861 *
25985edc 862 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 863 * operation otherwise.
864 */
865static int isp_pipeline_enable(struct isp_pipeline *pipe,
866 enum isp_pipeline_stream_state mode)
867{
868 struct isp_device *isp = pipe->output->isp;
869 struct media_entity *entity;
870 struct media_pad *pad;
871 struct v4l2_subdev *subdev;
872 unsigned long flags;
c62e2a19 873 int ret;
448de7e7 874
112eee0c
LP		 875 /* Refuse to start streaming if an entity included in the pipeline has
876 * crashed. This check must be performed before the loop below to avoid
877 * starting entities if the pipeline won't start anyway (those entities
878 * would then likely fail to stop, making the problem worse).
1567bb7d 879 */
112eee0c 880 if (pipe->entities & isp->crashed)
1567bb7d
LP		 881 return -EIO;
882
448de7e7
SA		 883 spin_lock_irqsave(&pipe->lock, flags);
884 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
885 spin_unlock_irqrestore(&pipe->lock, flags);
886
887 pipe->do_propagation = false;
888
889 entity = &pipe->output->video.entity;
890 while (1) {
891 pad = &entity->pads[0];
892 if (!(pad->flags & MEDIA_PAD_FL_SINK))
893 break;
894
1bddf1b3 895 pad = media_entity_remote_pad(pad);
448de7e7
SA		 896 if (pad == NULL ||
897 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
898 break;
899
900 entity = pad->entity;
901 subdev = media_entity_to_v4l2_subdev(entity);
902
903 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
904 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 905 return ret;
448de7e7
SA		 906
907 if (subdev == &isp->isp_ccdc.subdev) {
908 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
909 s_stream, mode);
910 v4l2_subdev_call(&isp->isp_af.subdev, video,
911 s_stream, mode);
912 v4l2_subdev_call(&isp->isp_hist.subdev, video,
913 s_stream, mode);
914 pipe->do_propagation = true;
915 }
916 }
917
c62e2a19 918 return 0;
448de7e7
SA		 919}
920
921static int isp_pipeline_wait_resizer(struct isp_device *isp)
922{
923 return omap3isp_resizer_busy(&isp->isp_res);
924}
925
926static int isp_pipeline_wait_preview(struct isp_device *isp)
927{
928 return omap3isp_preview_busy(&isp->isp_prev);
929}
930
931static int isp_pipeline_wait_ccdc(struct isp_device *isp)
932{
933 return omap3isp_stat_busy(&isp->isp_af)
934 || omap3isp_stat_busy(&isp->isp_aewb)
935 || omap3isp_stat_busy(&isp->isp_hist)
936 || omap3isp_ccdc_busy(&isp->isp_ccdc);
937}
938
939#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
940
941static int isp_pipeline_wait(struct isp_device *isp,
942 int(*busy)(struct isp_device *isp))
943{
944 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
945
946 while (!time_after(jiffies, timeout)) {
947 if (!busy(isp))
948 return 0;
949 }
950
951 return 1;
952}
953
954/*
955 * isp_pipeline_disable - Disable streaming on a pipeline
956 * @pipe: ISP pipeline
957 *
958 * Walk the entities chain starting at the pipeline output video node and stop
959 * all modules in the chain. Wait synchronously for the modules to be stopped if
960 * necessary.
961 *
962 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
963 * can't be stopped (in which case a software reset of the ISP is probably
964 * necessary).
965 */
966static int isp_pipeline_disable(struct isp_pipeline *pipe)
967{
968 struct isp_device *isp = pipe->output->isp;
969 struct media_entity *entity;
970 struct media_pad *pad;
971 struct v4l2_subdev *subdev;
972 int failure = 0;
973 int ret;
974
975 /*
976 * We need to stop all the modules after CCDC first or they'll
977 * never stop since they may not get a full frame from CCDC.
978 */
979 entity = &pipe->output->video.entity;
980 while (1) {
981 pad = &entity->pads[0];
982 if (!(pad->flags & MEDIA_PAD_FL_SINK))
983 break;
984
1bddf1b3 985 pad = media_entity_remote_pad(pad);
448de7e7
SA		 986 if (pad == NULL ||
987 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
988 break;
989
990 entity = pad->entity;
991 subdev = media_entity_to_v4l2_subdev(entity);
992
993 if (subdev == &isp->isp_ccdc.subdev) {
994 v4l2_subdev_call(&isp->isp_aewb.subdev,
995 video, s_stream, 0);
996 v4l2_subdev_call(&isp->isp_af.subdev,
997 video, s_stream, 0);
998 v4l2_subdev_call(&isp->isp_hist.subdev,
999 video, s_stream, 0);
1000 }
1001
1002 v4l2_subdev_call(subdev, video, s_stream, 0);
1003
1004 if (subdev == &isp->isp_res.subdev)
1005 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1006 else if (subdev == &isp->isp_prev.subdev)
1007 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1008 else if (subdev == &isp->isp_ccdc.subdev)
1009 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1010 else
1011 ret = 0;
1012
112eee0c
LP		 1013 /* Handle stop failures. An entity that fails to stop can
1014 * usually just be restarted. Flag the stop failure nonetheless
1015 * to trigger an ISP reset the next time the device is released,
1016 * just in case.
1017 *
1018 * The preview engine is a special case. A failure to stop can
1019 * mean a hardware crash. When that happens the preview engine
1020 * won't respond to read/write operations on the L4 bus anymore,
1021 * resulting in a bus fault and a kernel oops next time it gets
1022 * accessed. Mark it as crashed to prevent pipelines including
1023 * it from being started.
1024 */
448de7e7
SA		 1025 if (ret) {
1026 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
112eee0c
LP		 1027 isp->stop_failure = true;
1028 if (subdev == &isp->isp_prev.subdev)
1029 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA		 1030 failure = -ETIMEDOUT;
1031 }
1032 }
1033
1034 return failure;
1035}
1036
1037/*
1038 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1039 * @pipe: ISP pipeline
1040 * @state: Stream state (stopped, single shot or continuous)
1041 *
1042 * Set the pipeline to the given stream state. Pipelines can be started in
1043 * single-shot or continuous mode.
1044 *
25985edc 1045 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 1046 * operation otherwise. The pipeline state is not updated when the operation
1047 * fails, except when stopping the pipeline.
448de7e7
SA		 1048 */
1049int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1050 enum isp_pipeline_stream_state state)
1051{
1052 int ret;
1053
1054 if (state == ISP_PIPELINE_STREAM_STOPPED)
1055 ret = isp_pipeline_disable(pipe);
1056 else
1057 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 1058
1059 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1060 pipe->stream_state = state;
448de7e7
SA		 1061
1062 return ret;
1063}
1064
661112cb
LP		 1065/*
1066 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1067 * @pipe: ISP pipeline
1068 *
1069 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1070 * erroneous and makes sure no new buffer can be queued. This function is called
1071 * when a fatal error that prevents any further operation on the pipeline
1072 * occurs.
1073 */
1074void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1075{
1076 if (pipe->input)
1077 omap3isp_video_cancel_stream(pipe->input);
1078 if (pipe->output)
1079 omap3isp_video_cancel_stream(pipe->output);
1080}
1081
448de7e7
SA		 1082/*
1083 * isp_pipeline_resume - Resume streaming on a pipeline
1084 * @pipe: ISP pipeline
1085 *
1086 * Resume video output and input and re-enable pipeline.
1087 */
1088static void isp_pipeline_resume(struct isp_pipeline *pipe)
1089{
1090 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1091
1092 omap3isp_video_resume(pipe->output, !singleshot);
1093 if (singleshot)
1094 omap3isp_video_resume(pipe->input, 0);
1095 isp_pipeline_enable(pipe, pipe->stream_state);
1096}
1097
1098/*
1099 * isp_pipeline_suspend - Suspend streaming on a pipeline
1100 * @pipe: ISP pipeline
1101 *
1102 * Suspend pipeline.
1103 */
1104static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1105{
1106 isp_pipeline_disable(pipe);
1107}
1108
1109/*
1110 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1111 * video node
1112 * @me: ISP module's media entity
1113 *
1114 * Returns 1 if the entity has an enabled link to the output video node or 0
1115 * otherwise. It's true only while pipeline can have no more than one output
1116 * node.
1117 */
1118static int isp_pipeline_is_last(struct media_entity *me)
1119{
1120 struct isp_pipeline *pipe;
1121 struct media_pad *pad;
1122
1123 if (!me->pipe)
1124 return 0;
1125 pipe = to_isp_pipeline(me);
1126 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1127 return 0;
1bddf1b3 1128 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA		 1129 return pad->entity == me;
1130}
1131
1132/*
1133 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1134 * @me: ISP module's media entity
1135 *
1136 * Suspend the whole pipeline if module's entity has an enabled link to the
1137 * output video node. It works only while pipeline can have no more than one
1138 * output node.
1139 */
1140static void isp_suspend_module_pipeline(struct media_entity *me)
1141{
1142 if (isp_pipeline_is_last(me))
1143 isp_pipeline_suspend(to_isp_pipeline(me));
1144}
1145
1146/*
1147 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1148 * @me: ISP module's media entity
1149 *
1150 * Resume the whole pipeline if module's entity has an enabled link to the
1151 * output video node. It works only while pipeline can have no more than one
1152 * output node.
1153 */
1154static void isp_resume_module_pipeline(struct media_entity *me)
1155{
1156 if (isp_pipeline_is_last(me))
1157 isp_pipeline_resume(to_isp_pipeline(me));
1158}
1159
1160/*
1161 * isp_suspend_modules - Suspend ISP submodules.
1162 * @isp: OMAP3 ISP device
1163 *
1164 * Returns 0 if suspend left in idle state all the submodules properly,
1165 * or returns 1 if a general Reset is required to suspend the submodules.
1166 */
1167static int isp_suspend_modules(struct isp_device *isp)
1168{
1169 unsigned long timeout;
1170
1171 omap3isp_stat_suspend(&isp->isp_aewb);
1172 omap3isp_stat_suspend(&isp->isp_af);
1173 omap3isp_stat_suspend(&isp->isp_hist);
1174 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1175 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1176 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1177 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1178 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1179
1180 timeout = jiffies + ISP_STOP_TIMEOUT;
1181 while (omap3isp_stat_busy(&isp->isp_af)
1182 || omap3isp_stat_busy(&isp->isp_aewb)
1183 || omap3isp_stat_busy(&isp->isp_hist)
1184 || omap3isp_preview_busy(&isp->isp_prev)
1185 || omap3isp_resizer_busy(&isp->isp_res)
1186 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1187 if (time_after(jiffies, timeout)) {
1188 dev_info(isp->dev, "can't stop modules.\n");
1189 return 1;
1190 }
1191 msleep(1);
1192 }
1193
1194 return 0;
1195}
1196
1197/*
1198 * isp_resume_modules - Resume ISP submodules.
1199 * @isp: OMAP3 ISP device
1200 */
1201static void isp_resume_modules(struct isp_device *isp)
1202{
1203 omap3isp_stat_resume(&isp->isp_aewb);
1204 omap3isp_stat_resume(&isp->isp_af);
1205 omap3isp_stat_resume(&isp->isp_hist);
1206 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1207 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1208 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1209 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1210 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1211}
1212
1213/*
1214 * isp_reset - Reset ISP with a timeout wait for idle.
1215 * @isp: OMAP3 ISP device
1216 */
1217static int isp_reset(struct isp_device *isp)
1218{
1219 unsigned long timeout = 0;
1220
1221 isp_reg_writel(isp,
1222 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1223 | ISP_SYSCONFIG_SOFTRESET,
1224 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1225 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1226 ISP_SYSSTATUS) & 0x1)) {
1227 if (timeout++ > 10000) {
1228 dev_alert(isp->dev, "cannot reset ISP\n");
1229 return -ETIMEDOUT;
1230 }
1231 udelay(1);
1232 }
1233
112eee0c 1234 isp->stop_failure = false;
1567bb7d 1235 isp->crashed = 0;
448de7e7
SA		 1236 return 0;
1237}
1238
1239/*
1240 * isp_save_context - Saves the values of the ISP module registers.
1241 * @isp: OMAP3 ISP device
1242 * @reg_list: Structure containing pairs of register address and value to
1243 * modify on OMAP.
1244 */
1245static void
1246isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1247{
1248 struct isp_reg *next = reg_list;
1249
1250 for (; next->reg != ISP_TOK_TERM; next++)
1251 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1252}
1253
1254/*
1255 * isp_restore_context - Restores the values of the ISP module registers.
1256 * @isp: OMAP3 ISP device
1257 * @reg_list: Structure containing pairs of register address and value to
1258 * modify on OMAP.
1259 */
1260static void
1261isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1262{
1263 struct isp_reg *next = reg_list;
1264
1265 for (; next->reg != ISP_TOK_TERM; next++)
1266 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1267}
1268
1269/*
1270 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1271 * @isp: OMAP3 ISP device
1272 *
1273 * Routine for saving the context of each module in the ISP.
1274 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1275 */
1276static void isp_save_ctx(struct isp_device *isp)
1277{
1278 isp_save_context(isp, isp_reg_list);
fabdbca8 1279 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1280}
1281
1282/*
1283 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1284 * @isp: OMAP3 ISP device
1285 *
1286 * Routine for restoring the context of each module in the ISP.
1287 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1288 */
1289static void isp_restore_ctx(struct isp_device *isp)
1290{
1291 isp_restore_context(isp, isp_reg_list);
fabdbca8 1292 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1293 omap3isp_ccdc_restore_context(isp);
1294 omap3isp_preview_restore_context(isp);
1295}
1296
1297/* -----------------------------------------------------------------------------
1298 * SBL resources management
1299 */
1300#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1301 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1302 OMAP3_ISP_SBL_PREVIEW_READ | \
1303 OMAP3_ISP_SBL_RESIZER_READ)
1304#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1305 OMAP3_ISP_SBL_CSI2A_WRITE | \
1306 OMAP3_ISP_SBL_CSI2C_WRITE | \
1307 OMAP3_ISP_SBL_CCDC_WRITE | \
1308 OMAP3_ISP_SBL_PREVIEW_WRITE)
1309
1310void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1311{
1312 u32 sbl = 0;
1313
1314 isp->sbl_resources |= res;
1315
1316 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1317 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1318
1319 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1320 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1321
1322 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1323 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1324
1325 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1326 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1327
1328 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1329 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1330
1331 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1332 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1333
1334 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1335}
1336
1337void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1338{
1339 u32 sbl = 0;
1340
1341 isp->sbl_resources &= ~res;
1342
1343 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1344 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1345
1346 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1347 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1348
1349 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1350 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1351
1352 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1353 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1354
1355 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1356 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1357
1358 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1359 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1360
1361 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1362}
1363
1364/*
1365 * isp_module_sync_idle - Helper to sync module with its idle state
1366 * @me: ISP submodule's media entity
1367 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1368 * @stopping: flag which tells module wants to stop
1369 *
1370 * This function checks if ISP submodule needs to wait for next interrupt. If
1371 * yes, makes the caller to sleep while waiting for such event.
1372 */
1373int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1374 atomic_t *stopping)
1375{
1376 struct isp_pipeline *pipe = to_isp_pipeline(me);
1377
1378 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1379 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1380 !isp_pipeline_ready(pipe)))
1381 return 0;
1382
1383 /*
1384 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1385 * scenario. We'll call it here to avoid race conditions.
1386 */
1387 atomic_set(stopping, 1);
1388 smp_mb();
1389
1390 /*
1391 * If module is the last one, it's writing to memory. In this case,
1392 * it's necessary to check if the module is already paused due to
1393 * DMA queue underrun or if it has to wait for next interrupt to be
1394 * idle.
1395 * If it isn't the last one, the function won't sleep but *stopping
1396 * will still be set to warn next submodule caller's interrupt the
1397 * module wants to be idle.
1398 */
1399 if (isp_pipeline_is_last(me)) {
1400 struct isp_video *video = pipe->output;
1401 unsigned long flags;
e8feb876 1402 spin_lock_irqsave(&video->irqlock, flags);
448de7e7 1403 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
e8feb876 1404 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1405 atomic_set(stopping, 0);
1406 smp_mb();
1407 return 0;
1408 }
e8feb876 1409 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1410 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1411 msecs_to_jiffies(1000))) {
1412 atomic_set(stopping, 0);
1413 smp_mb();
1414 return -ETIMEDOUT;
1415 }
1416 }
1417
1418 return 0;
1419}
1420
1421/*
1e9c4d49 1422 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
448de7e7
SA		 1423 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1424 * @stopping: flag which tells module wants to stop
1425 *
1426 * This function checks if ISP submodule was stopping. In case of yes, it
1427 * notices the caller by setting stopping to 0 and waking up the wait queue.
1428 * Returns 1 if it was stopping or 0 otherwise.
1429 */
1430int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1431 atomic_t *stopping)
1432{
1433 if (atomic_cmpxchg(stopping, 1, 0)) {
1434 wake_up(wait);
1435 return 1;
1436 }
1437
1438 return 0;
1439}
1440
1441/* --------------------------------------------------------------------------
1442 * Clock management
1443 */
1444
1445#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1446 ISPCTRL_HIST_CLK_EN | \
1447 ISPCTRL_RSZ_CLK_EN | \
1448 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1449 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1450
1451static void __isp_subclk_update(struct isp_device *isp)
1452{
1453 u32 clk = 0;
1454
be9a1b98
LP		 1455 /* AEWB and AF share the same clock. */
1456 if (isp->subclk_resources &
1457 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1458 clk |= ISPCTRL_H3A_CLK_EN;
1459
1460 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1461 clk |= ISPCTRL_HIST_CLK_EN;
1462
1463 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1464 clk |= ISPCTRL_RSZ_CLK_EN;
1465
1466 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1467 * RAM as well.
448de7e7
SA		 1468 */
1469 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1470 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1471
1472 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1473 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1474
1475 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1476 ISPCTRL_CLKS_MASK, clk);
1477}
1478
1479void omap3isp_subclk_enable(struct isp_device *isp,
1480 enum isp_subclk_resource res)
1481{
1482 isp->subclk_resources |= res;
1483
1484 __isp_subclk_update(isp);
1485}
1486
1487void omap3isp_subclk_disable(struct isp_device *isp,
1488 enum isp_subclk_resource res)
1489{
1490 isp->subclk_resources &= ~res;
1491
1492 __isp_subclk_update(isp);
1493}
1494
1495/*
1496 * isp_enable_clocks - Enable ISP clocks
1497 * @isp: OMAP3 ISP device
1498 *
b057c3c3
LP		 1499 * Return 0 if successful, or clk_prepare_enable return value if any of them
1500 * fails.
448de7e7
SA		 1501 */
1502static int isp_enable_clocks(struct isp_device *isp)
1503{
1504 int r;
1505 unsigned long rate;
448de7e7 1506
b057c3c3 1507 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1508 if (r) {
b057c3c3 1509 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA		 1510 goto out_clk_enable_ick;
1511 }
6d1aa02f 1512 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1513 if (r) {
6d1aa02f 1514 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA		 1515 goto out_clk_enable_mclk;
1516 }
b057c3c3 1517 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1518 if (r) {
b057c3c3 1519 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA		 1520 goto out_clk_enable_mclk;
1521 }
1522 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1523 if (rate != CM_CAM_MCLK_HZ)
1524 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1525 " expected : %d\n"
1526 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1527 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1528 if (r) {
b057c3c3 1529 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA		 1530 goto out_clk_enable_csi2_fclk;
1531 }
1532 return 0;
1533
1534out_clk_enable_csi2_fclk:
b057c3c3 1535 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1536out_clk_enable_mclk:
b057c3c3 1537 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA		 1538out_clk_enable_ick:
1539 return r;
1540}
1541
1542/*
1543 * isp_disable_clocks - Disable ISP clocks
1544 * @isp: OMAP3 ISP device
1545 */
1546static void isp_disable_clocks(struct isp_device *isp)
1547{
b057c3c3
LP		 1548 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1549 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1550 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA		 1551}
1552
1553static const char *isp_clocks[] = {
1554 "cam_ick",
1555 "cam_mclk",
448de7e7
SA		 1556 "csi2_96m_fck",
1557 "l3_ick",
1558};
1559
448de7e7
SA		 1560static int isp_get_clocks(struct isp_device *isp)
1561{
1562 struct clk *clk;
1563 unsigned int i;
1564
1565 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1566 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA		 1567 if (IS_ERR(clk)) {
1568 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA		 1569 return PTR_ERR(clk);
1570 }
1571
1572 isp->clock[i] = clk;
1573 }
1574
1575 return 0;
1576}
1577
1578/*
1579 * omap3isp_get - Acquire the ISP resource.
1580 *
1581 * Initializes the clocks for the first acquire.
1582 *
1583 * Increment the reference count on the ISP. If the first reference is taken,
1584 * enable clocks and power-up all submodules.
1585 *
25985edc 1586 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1587 */
96d62ae2 1588static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1589{
1590 struct isp_device *__isp = isp;
1591
1592 if (isp == NULL)
1593 return NULL;
1594
1595 mutex_lock(&isp->isp_mutex);
1596 if (isp->ref_count > 0)
1597 goto out;
1598
1599 if (isp_enable_clocks(isp) < 0) {
1600 __isp = NULL;
1601 goto out;
1602 }
1603
1604 /* We don't want to restore context before saving it! */
1605 if (isp->has_context)
1606 isp_restore_ctx(isp);
448de7e7 1607
96d62ae2
LP		 1608 if (irq)
1609 isp_enable_interrupts(isp);
448de7e7
SA		 1610
1611out:
1612 if (__isp != NULL)
1613 isp->ref_count++;
1614 mutex_unlock(&isp->isp_mutex);
1615
1616 return __isp;
1617}
1618
96d62ae2
LP		 1619struct isp_device *omap3isp_get(struct isp_device *isp)
1620{
1621 return __omap3isp_get(isp, true);
1622}
1623
448de7e7
SA		 1624/*
1625 * omap3isp_put - Release the ISP
1626 *
1627 * Decrement the reference count on the ISP. If the last reference is released,
1628 * power-down all submodules, disable clocks and free temporary buffers.
1629 */
2a0a5472 1630static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
448de7e7
SA		 1631{
1632 if (isp == NULL)
1633 return;
1634
1635 mutex_lock(&isp->isp_mutex);
1636 BUG_ON(isp->ref_count == 0);
1637 if (--isp->ref_count == 0) {
1638 isp_disable_interrupts(isp);
2a0a5472 1639 if (save_ctx) {
a32f2f90 1640 isp_save_ctx(isp);
96d62ae2
LP		 1641 isp->has_context = 1;
1642 }
1567bb7d
LP		 1643 /* Reset the ISP if an entity has failed to stop. This is the
1644 * only way to recover from such conditions.
1645 */
112eee0c 1646 if (isp->crashed || isp->stop_failure)
994d5375 1647 isp_reset(isp);
448de7e7
SA		 1648 isp_disable_clocks(isp);
1649 }
1650 mutex_unlock(&isp->isp_mutex);
1651}
1652
2a0a5472
LP		 1653void omap3isp_put(struct isp_device *isp)
1654{
1655 __omap3isp_put(isp, true);
1656}
1657
448de7e7
SA		 1658/* --------------------------------------------------------------------------
1659 * Platform device driver
1660 */
1661
1662/*
1663 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1664 * @isp: OMAP3 ISP device
1665 */
1666#define ISP_PRINT_REGISTER(isp, name)\
1667 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1668 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1669#define SBL_PRINT_REGISTER(isp, name)\
1670 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1671 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1672
1673void omap3isp_print_status(struct isp_device *isp)
1674{
1675 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1676
1677 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1678 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1679 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1680 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1681 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1682 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1683 ISP_PRINT_REGISTER(isp, CTRL);
1684 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1685 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1686 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1687 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1688 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1689 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1690 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1691 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1692
1693 SBL_PRINT_REGISTER(isp, PCR);
1694 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1695
1696 dev_dbg(isp->dev, "--------------------------------------------\n");
1697}
1698
1699#ifdef CONFIG_PM
1700
1701/*
1702 * Power management support.
1703 *
1704 * As the ISP can't properly handle an input video stream interruption on a non
1705 * frame boundary, the ISP pipelines need to be stopped before sensors get
1706 * suspended. However, as suspending the sensors can require a running clock,
1707 * which can be provided by the ISP, the ISP can't be completely suspended
1708 * before the sensor.
1709 *
1710 * To solve this problem power management support is split into prepare/complete
1711 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1712 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1713 * resume(), and the the pipelines are restarted in complete().
1714 *
39c1cb2b 1715 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
448de7e7
SA		 1716 * yet.
1717 */
1718static int isp_pm_prepare(struct device *dev)
1719{
1720 struct isp_device *isp = dev_get_drvdata(dev);
1721 int reset;
1722
1723 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1724
1725 if (isp->ref_count == 0)
1726 return 0;
1727
1728 reset = isp_suspend_modules(isp);
1729 isp_disable_interrupts(isp);
1730 isp_save_ctx(isp);
1731 if (reset)
1732 isp_reset(isp);
1733
1734 return 0;
1735}
1736
1737static int isp_pm_suspend(struct device *dev)
1738{
1739 struct isp_device *isp = dev_get_drvdata(dev);
1740
1741 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1742
1743 if (isp->ref_count)
1744 isp_disable_clocks(isp);
1745
1746 return 0;
1747}
1748
1749static int isp_pm_resume(struct device *dev)
1750{
1751 struct isp_device *isp = dev_get_drvdata(dev);
1752
1753 if (isp->ref_count == 0)
1754 return 0;
1755
1756 return isp_enable_clocks(isp);
1757}
1758
1759static void isp_pm_complete(struct device *dev)
1760{
1761 struct isp_device *isp = dev_get_drvdata(dev);
1762
1763 if (isp->ref_count == 0)
1764 return;
1765
1766 isp_restore_ctx(isp);
1767 isp_enable_interrupts(isp);
1768 isp_resume_modules(isp);
1769}
1770
1771#else
1772
1773#define isp_pm_prepare NULL
1774#define isp_pm_suspend NULL
1775#define isp_pm_resume NULL
1776#define isp_pm_complete NULL
1777
1778#endif /* CONFIG_PM */
1779
1780static void isp_unregister_entities(struct isp_device *isp)
1781{
1782 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1783 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1784 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1785 omap3isp_preview_unregister_entities(&isp->isp_prev);
1786 omap3isp_resizer_unregister_entities(&isp->isp_res);
1787 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1788 omap3isp_stat_unregister_entities(&isp->isp_af);
1789 omap3isp_stat_unregister_entities(&isp->isp_hist);
1790
1791 v4l2_device_unregister(&isp->v4l2_dev);
1792 media_device_unregister(&isp->media_dev);
1793}
1794
1795/*
1796 * isp_register_subdev_group - Register a group of subdevices
1797 * @isp: OMAP3 ISP device
1798 * @board_info: I2C subdevs board information array
1799 *
1800 * Register all I2C subdevices in the board_info array. The array must be
1801 * terminated by a NULL entry, and the first entry must be the sensor.
1802 *
1803 * Return a pointer to the sensor media entity if it has been successfully
1804 * registered, or NULL otherwise.
1805 */
1806static struct v4l2_subdev *
1807isp_register_subdev_group(struct isp_device *isp,
1808 struct isp_subdev_i2c_board_info *board_info)
1809{
1810 struct v4l2_subdev *sensor = NULL;
1811 unsigned int first;
1812
1813 if (board_info->board_info == NULL)
1814 return NULL;
1815
1816 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1817 struct v4l2_subdev *subdev;
1818 struct i2c_adapter *adapter;
1819
1820 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1821 if (adapter == NULL) {
4feca39b 1822 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
448de7e7
SA		 1823 "device %s\n", __func__,
1824 board_info->i2c_adapter_id,
1825 board_info->board_info->type);
1826 continue;
1827 }
1828
1829 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1830 board_info->board_info, NULL);
1831 if (subdev == NULL) {
4feca39b 1832 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
448de7e7
SA		 1833 __func__, board_info->board_info->type);
1834 continue;
1835 }
1836
1837 if (first)
1838 sensor = subdev;
1839 }
1840
1841 return sensor;
1842}
1843
1844static int isp_register_entities(struct isp_device *isp)
1845{
1846 struct isp_platform_data *pdata = isp->pdata;
1847 struct isp_v4l2_subdevs_group *subdevs;
1848 int ret;
1849
1850 isp->media_dev.dev = isp->dev;
1851 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1852 sizeof(isp->media_dev.model));
083eb078 1853 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1854 isp->media_dev.link_notify = isp_pipeline_link_notify;
1855 ret = media_device_register(&isp->media_dev);
1856 if (ret < 0) {
4feca39b 1857 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
448de7e7
SA		 1858 __func__, ret);
1859 return ret;
1860 }
1861
1862 isp->v4l2_dev.mdev = &isp->media_dev;
1863 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1864 if (ret < 0) {
4feca39b 1865 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA		 1866 __func__, ret);
1867 goto done;
1868 }
1869
1870 /* Register internal entities */
1871 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1872 if (ret < 0)
1873 goto done;
1874
1875 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1876 if (ret < 0)
1877 goto done;
1878
1879 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1880 if (ret < 0)
1881 goto done;
1882
1883 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1884 &isp->v4l2_dev);
1885 if (ret < 0)
1886 goto done;
1887
1888 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1889 if (ret < 0)
1890 goto done;
1891
1892 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1893 if (ret < 0)
1894 goto done;
1895
1896 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1897 if (ret < 0)
1898 goto done;
1899
1900 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1901 if (ret < 0)
1902 goto done;
1903
1904 /* Register external entities */
ca4186f0 1905 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA		 1906 struct v4l2_subdev *sensor;
1907 struct media_entity *input;
1908 unsigned int flags;
1909 unsigned int pad;
aab84f55 1910 unsigned int i;
448de7e7
SA		 1911
1912 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1913 if (sensor == NULL)
1914 continue;
1915
1916 sensor->host_priv = subdevs;
1917
1918 /* Connect the sensor to the correct interface module. Parallel
1919 * sensors are connected directly to the CCDC, while serial
1920 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1921 * through CSIPHY1 or CSIPHY2.
1922 */
1923 switch (subdevs->interface) {
1924 case ISP_INTERFACE_PARALLEL:
1925 input = &isp->isp_ccdc.subdev.entity;
1926 pad = CCDC_PAD_SINK;
1927 flags = 0;
1928 break;
1929
1930 case ISP_INTERFACE_CSI2A_PHY2:
1931 input = &isp->isp_csi2a.subdev.entity;
1932 pad = CSI2_PAD_SINK;
1933 flags = MEDIA_LNK_FL_IMMUTABLE
1934 | MEDIA_LNK_FL_ENABLED;
1935 break;
1936
1937 case ISP_INTERFACE_CCP2B_PHY1:
1938 case ISP_INTERFACE_CCP2B_PHY2:
1939 input = &isp->isp_ccp2.subdev.entity;
1940 pad = CCP2_PAD_SINK;
1941 flags = 0;
1942 break;
1943
1944 case ISP_INTERFACE_CSI2C_PHY1:
1945 input = &isp->isp_csi2c.subdev.entity;
1946 pad = CSI2_PAD_SINK;
1947 flags = MEDIA_LNK_FL_IMMUTABLE
1948 | MEDIA_LNK_FL_ENABLED;
1949 break;
1950
1951 default:
4feca39b
LP		 1952 dev_err(isp->dev, "%s: invalid interface type %u\n",
1953 __func__, subdevs->interface);
448de7e7
SA		 1954 ret = -EINVAL;
1955 goto done;
1956 }
1957
aab84f55
SA		 1958 for (i = 0; i < sensor->entity.num_pads; i++) {
1959 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1960 break;
1961 }
1962 if (i == sensor->entity.num_pads) {
1963 dev_err(isp->dev,
1964 "%s: no source pad in external entity\n",
1965 __func__);
448de7e7
SA		 1966 ret = -EINVAL;
1967 goto done;
1968 }
1969
aab84f55 1970 ret = media_entity_create_link(&sensor->entity, i, input, pad,
448de7e7
SA		 1971 flags);
1972 if (ret < 0)
1973 goto done;
1974 }
1975
1976 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1977
1978done:
1979 if (ret < 0)
1980 isp_unregister_entities(isp);
1981
1982 return ret;
1983}
1984
1985static void isp_cleanup_modules(struct isp_device *isp)
1986{
1987 omap3isp_h3a_aewb_cleanup(isp);
1988 omap3isp_h3a_af_cleanup(isp);
1989 omap3isp_hist_cleanup(isp);
1990 omap3isp_resizer_cleanup(isp);
1991 omap3isp_preview_cleanup(isp);
1992 omap3isp_ccdc_cleanup(isp);
1993 omap3isp_ccp2_cleanup(isp);
1994 omap3isp_csi2_cleanup(isp);
1995}
1996
1997static int isp_initialize_modules(struct isp_device *isp)
1998{
1999 int ret;
2000
2001 ret = omap3isp_csiphy_init(isp);
2002 if (ret < 0) {
2003 dev_err(isp->dev, "CSI PHY initialization failed\n");
2004 goto error_csiphy;
2005 }
2006
2007 ret = omap3isp_csi2_init(isp);
2008 if (ret < 0) {
2009 dev_err(isp->dev, "CSI2 initialization failed\n");
2010 goto error_csi2;
2011 }
2012
2013 ret = omap3isp_ccp2_init(isp);
2014 if (ret < 0) {
2015 dev_err(isp->dev, "CCP2 initialization failed\n");
2016 goto error_ccp2;
2017 }
2018
2019 ret = omap3isp_ccdc_init(isp);
2020 if (ret < 0) {
2021 dev_err(isp->dev, "CCDC initialization failed\n");
2022 goto error_ccdc;
2023 }
2024
2025 ret = omap3isp_preview_init(isp);
2026 if (ret < 0) {
2027 dev_err(isp->dev, "Preview initialization failed\n");
2028 goto error_preview;
2029 }
2030
2031 ret = omap3isp_resizer_init(isp);
2032 if (ret < 0) {
2033 dev_err(isp->dev, "Resizer initialization failed\n");
2034 goto error_resizer;
2035 }
2036
2037 ret = omap3isp_hist_init(isp);
2038 if (ret < 0) {
2039 dev_err(isp->dev, "Histogram initialization failed\n");
2040 goto error_hist;
2041 }
2042
2043 ret = omap3isp_h3a_aewb_init(isp);
2044 if (ret < 0) {
2045 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2046 goto error_h3a_aewb;
2047 }
2048
2049 ret = omap3isp_h3a_af_init(isp);
2050 if (ret < 0) {
2051 dev_err(isp->dev, "H3A AF initialization failed\n");
2052 goto error_h3a_af;
2053 }
2054
2055 /* Connect the submodules. */
2056 ret = media_entity_create_link(
2057 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2058 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2059 if (ret < 0)
2060 goto error_link;
2061
2062 ret = media_entity_create_link(
2063 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2064 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2065 if (ret < 0)
2066 goto error_link;
2067
2068 ret = media_entity_create_link(
2069 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2070 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2071 if (ret < 0)
2072 goto error_link;
2073
2074 ret = media_entity_create_link(
2075 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2076 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2077 if (ret < 0)
2078 goto error_link;
2079
2080 ret = media_entity_create_link(
2081 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2082 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2083 if (ret < 0)
2084 goto error_link;
2085
2086 ret = media_entity_create_link(
2087 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2088 &isp->isp_aewb.subdev.entity, 0,
2089 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2090 if (ret < 0)
2091 goto error_link;
2092
2093 ret = media_entity_create_link(
2094 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2095 &isp->isp_af.subdev.entity, 0,
2096 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2097 if (ret < 0)
2098 goto error_link;
2099
2100 ret = media_entity_create_link(
2101 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2102 &isp->isp_hist.subdev.entity, 0,
2103 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2104 if (ret < 0)
2105 goto error_link;
2106
2107 return 0;
2108
2109error_link:
2110 omap3isp_h3a_af_cleanup(isp);
2111error_h3a_af:
2112 omap3isp_h3a_aewb_cleanup(isp);
2113error_h3a_aewb:
2114 omap3isp_hist_cleanup(isp);
2115error_hist:
2116 omap3isp_resizer_cleanup(isp);
2117error_resizer:
2118 omap3isp_preview_cleanup(isp);
2119error_preview:
2120 omap3isp_ccdc_cleanup(isp);
2121error_ccdc:
2122 omap3isp_ccp2_cleanup(isp);
2123error_ccp2:
2124 omap3isp_csi2_cleanup(isp);
2125error_csi2:
2126error_csiphy:
2127 return ret;
2128}
2129
2a0a5472
LP		 2130static void isp_detach_iommu(struct isp_device *isp)
2131{
2132 arm_iommu_release_mapping(isp->mapping);
2133 isp->mapping = NULL;
2134 iommu_group_remove_device(isp->dev);
2135}
2136
2137static int isp_attach_iommu(struct isp_device *isp)
2138{
2139 struct dma_iommu_mapping *mapping;
2140 struct iommu_group *group;
2141 int ret;
2142
2143 /* Create a device group and add the device to it. */
2144 group = iommu_group_alloc();
2145 if (IS_ERR(group)) {
2146 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2147 return PTR_ERR(group);
2148 }
2149
2150 ret = iommu_group_add_device(group, isp->dev);
2151 iommu_group_put(group);
2152
2153 if (ret < 0) {
2154 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2155 return ret;
2156 }
2157
2158 /*
2159 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2160 * VAs. This will allocate a corresponding IOMMU domain.
2161 */
2162 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2163 if (IS_ERR(mapping)) {
2164 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2165 ret = PTR_ERR(mapping);
2166 goto error;
2167 }
2168
2169 isp->mapping = mapping;
2170
2171 /* Attach the ARM VA mapping to the device. */
2172 ret = arm_iommu_attach_device(isp->dev, mapping);
2173 if (ret < 0) {
2174 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2175 goto error;
2176 }
2177
2178 return 0;
2179
2180error:
2181 isp_detach_iommu(isp);
2182 return ret;
2183}
2184
448de7e7
SA		 2185/*
2186 * isp_remove - Remove ISP platform device
2187 * @pdev: Pointer to ISP platform device
2188 *
2189 * Always returns 0.
2190 */
4c62e976 2191static int isp_remove(struct platform_device *pdev)
448de7e7
SA		 2192{
2193 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7
SA		 2194
2195 isp_unregister_entities(isp);
2196 isp_cleanup_modules(isp);
9b28ee3c 2197 isp_xclk_cleanup(isp);
448de7e7 2198
96d62ae2 2199 __omap3isp_get(isp, false);
2a0a5472
LP		 2200 isp_detach_iommu(isp);
2201 __omap3isp_put(isp, false);
448de7e7 2202
448de7e7
SA		 2203 return 0;
2204}
2205
2206static int isp_map_mem_resource(struct platform_device *pdev,
2207 struct isp_device *isp,
2208 enum isp_mem_resources res)
2209{
2210 struct resource *mem;
2211
2212 /* request the mem region for the camera registers */
2213
2214 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
448de7e7
SA		 2215
2216 /* map the region */
fd8308b4
LP		 2217 isp->mmio_base[res] = devm_ioremap_resource(isp->dev, mem);
2218 if (IS_ERR(isp->mmio_base[res]))
2219 return PTR_ERR(isp->mmio_base[res]);
2220
2221 isp->mmio_base_phys[res] = mem->start;
448de7e7
SA		 2222
2223 return 0;
2224}
2225
2226/*
2227 * isp_probe - Probe ISP platform device
2228 * @pdev: Pointer to ISP platform device
2229 *
2230 * Returns 0 if successful,
2231 * -ENOMEM if no memory available,
2232 * -ENODEV if no platform device resources found
2233 * or no space for remapping registers,
2234 * -EINVAL if couldn't install ISR,
2235 * or clk_get return error value.
2236 */
4c62e976 2237static int isp_probe(struct platform_device *pdev)
448de7e7
SA		 2238{
2239 struct isp_platform_data *pdata = pdev->dev.platform_data;
2240 struct isp_device *isp;
2241 int ret;
2242 int i, m;
2243
2244 if (pdata == NULL)
2245 return -EINVAL;
2246
cf2b4cf6 2247 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA		 2248 if (!isp) {
2249 dev_err(&pdev->dev, "could not allocate memory\n");
2250 return -ENOMEM;
2251 }
2252
2253 isp->autoidle = autoidle;
448de7e7
SA		 2254
2255 mutex_init(&isp->isp_mutex);
2256 spin_lock_init(&isp->stat_lock);
2257
2258 isp->dev = &pdev->dev;
2259 isp->pdata = pdata;
2260 isp->ref_count = 0;
2261
224ddca0
RK		 2262 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2263 if (ret)
2264 return ret;
448de7e7
SA		 2265
2266 platform_set_drvdata(pdev, isp);
2267
2268 /* Regulators */
cf2b4cf6
LP		 2269 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2270 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
448de7e7 2271
d8658bca
LP		 2272 /* Clocks
2273 *
2274 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2275 * manually to read the revision before calling __omap3isp_get().
2276 */
448de7e7
SA		 2277 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2278 if (ret < 0)
2279 goto error;
2280
2281 ret = isp_get_clocks(isp);
2282 if (ret < 0)
2283 goto error;
2284
d8658bca
LP		 2285 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2286 if (ret < 0)
2287 goto error;
2288
2289 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2290 dev_info(isp->dev, "Revision %d.%d found\n",
2291 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2292
2293 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2294
0bd0dbee
PST		 2295 if (__omap3isp_get(isp, false) == NULL) {
2296 ret = -ENODEV;
448de7e7 2297 goto error;
0bd0dbee 2298 }
448de7e7
SA		 2299
2300 ret = isp_reset(isp);
2301 if (ret < 0)
2302 goto error_isp;
2303
9b28ee3c
LP		 2304 ret = isp_xclk_init(isp);
2305 if (ret < 0)
2306 goto error_isp;
2307
448de7e7 2308 /* Memory resources */
448de7e7
SA		 2309 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2310 if (isp->revision == isp_res_maps[m].isp_rev)
2311 break;
2312
2313 if (m == ARRAY_SIZE(isp_res_maps)) {
2314 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2315 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2316 ret = -ENODEV;
2317 goto error_isp;
2318 }
2319
2320 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2321 if (isp_res_maps[m].map & 1 << i) {
2322 ret = isp_map_mem_resource(pdev, isp, i);
2323 if (ret)
2324 goto error_isp;
2325 }
2326 }
2327
2a0a5472
LP		 2328 /* IOMMU */
2329 ret = isp_attach_iommu(isp);
2330 if (ret < 0) {
2331 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
f626b52d
OBC		 2332 goto error_isp;
2333 }
2334
448de7e7
SA		 2335 /* Interrupt */
2336 isp->irq_num = platform_get_irq(pdev, 0);
2337 if (isp->irq_num <= 0) {
2338 dev_err(isp->dev, "No IRQ resource\n");
2339 ret = -ENODEV;
2a0a5472 2340 goto error_iommu;
448de7e7
SA		 2341 }
2342
cf2b4cf6
LP		 2343 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2344 "OMAP3 ISP", isp)) {
448de7e7
SA		 2345 dev_err(isp->dev, "Unable to request IRQ\n");
2346 ret = -EINVAL;
2a0a5472 2347 goto error_iommu;
448de7e7
SA		 2348 }
2349
2350 /* Entities */
2351 ret = isp_initialize_modules(isp);
2352 if (ret < 0)
2a0a5472 2353 goto error_iommu;
448de7e7
SA		 2354
2355 ret = isp_register_entities(isp);
2356 if (ret < 0)
2357 goto error_modules;
2358
96d62ae2 2359 isp_core_init(isp, 1);
448de7e7
SA		 2360 omap3isp_put(isp);
2361
2362 return 0;
2363
2364error_modules:
2365 isp_cleanup_modules(isp);
2a0a5472
LP		 2366error_iommu:
2367 isp_detach_iommu(isp);
448de7e7 2368error_isp:
9b28ee3c 2369 isp_xclk_cleanup(isp);
2a0a5472 2370 __omap3isp_put(isp, false);
448de7e7 2371error:
ed33ac8e 2372 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2373
2374 return ret;
2375}
2376
2377static const struct dev_pm_ops omap3isp_pm_ops = {
2378 .prepare = isp_pm_prepare,
2379 .suspend = isp_pm_suspend,
2380 .resume = isp_pm_resume,
2381 .complete = isp_pm_complete,
2382};
2383
2384static struct platform_device_id omap3isp_id_table[] = {
2385 { "omap3isp", 0 },
2386 { },
2387};
2388MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2389
2390static struct platform_driver omap3isp_driver = {
2391 .probe = isp_probe,
4c62e976 2392 .remove = isp_remove,
448de7e7
SA		 2393 .id_table = omap3isp_id_table,
2394 .driver = {
2395 .owner = THIS_MODULE,
2396 .name = "omap3isp",
2397 .pm = &omap3isp_pm_ops,
2398 },
2399};
2400
1d6629b1 2401module_platform_driver(omap3isp_driver);
448de7e7
SA		 2402
2403MODULE_AUTHOR("Nokia Corporation");
2404MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2405MODULE_LICENSE("GPL");
64dc3c1a 2406MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git