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[media] media: add functions to allow creating interfaces
[thirdparty/kernel/stable.git] / drivers / media / platform / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
448de7e7
SA		 43 */
44
45#include <asm/cacheflush.h>
46
47#include <linux/clk.h>
9b28ee3c 48#include <linux/clkdev.h>
448de7e7
SA		 49#include <linux/delay.h>
50#include <linux/device.h>
51#include <linux/dma-mapping.h>
52#include <linux/i2c.h>
53#include <linux/interrupt.h>
503596a1 54#include <linux/mfd/syscon.h>
448de7e7 55#include <linux/module.h>
c8d35c84 56#include <linux/omap-iommu.h>
448de7e7
SA		 57#include <linux/platform_device.h>
58#include <linux/regulator/consumer.h>
59#include <linux/slab.h>
60#include <linux/sched.h>
61#include <linux/vmalloc.h>
62
2a0a5472
LP		 63#include <asm/dma-iommu.h>
64
448de7e7
SA		 65#include <media/v4l2-common.h>
66#include <media/v4l2-device.h>
da7f3843 67#include <media/v4l2-of.h>
448de7e7
SA		 68
69#include "isp.h"
70#include "ispreg.h"
71#include "ispccdc.h"
72#include "isppreview.h"
73#include "ispresizer.h"
74#include "ispcsi2.h"
75#include "ispccp2.h"
76#include "isph3a.h"
77#include "isphist.h"
78
79static unsigned int autoidle;
80module_param(autoidle, int, 0444);
81MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
82
83static void isp_save_ctx(struct isp_device *isp);
84
85static void isp_restore_ctx(struct isp_device *isp);
86
87static const struct isp_res_mapping isp_res_maps[] = {
88 {
89 .isp_rev = ISP_REVISION_2_0,
8644cdf9
SA		 90 .offset = {
91 /* first MMIO area */
92 0x0000, /* base, len 0x0070 */
93 0x0400, /* ccp2, len 0x01f0 */
94 0x0600, /* ccdc, len 0x00a8 */
95 0x0a00, /* hist, len 0x0048 */
96 0x0c00, /* h3a, len 0x0060 */
97 0x0e00, /* preview, len 0x00a0 */
98 0x1000, /* resizer, len 0x00ac */
99 0x1200, /* sbl, len 0x00fc */
100 /* second MMIO area */
101 0x0000, /* csi2a, len 0x0170 */
102 0x0170, /* csiphy2, len 0x000c */
103 },
503596a1 104 .phy_type = ISP_PHY_TYPE_3430,
448de7e7
SA		 105 },
106 {
107 .isp_rev = ISP_REVISION_15_0,
8644cdf9
SA		 108 .offset = {
109 /* first MMIO area */
110 0x0000, /* base, len 0x0070 */
111 0x0400, /* ccp2, len 0x01f0 */
112 0x0600, /* ccdc, len 0x00a8 */
113 0x0a00, /* hist, len 0x0048 */
114 0x0c00, /* h3a, len 0x0060 */
115 0x0e00, /* preview, len 0x00a0 */
116 0x1000, /* resizer, len 0x00ac */
117 0x1200, /* sbl, len 0x00fc */
118 /* second MMIO area */
119 0x0000, /* csi2a, len 0x0170 (1st area) */
120 0x0170, /* csiphy2, len 0x000c */
121 0x01c0, /* csi2a, len 0x0040 (2nd area) */
122 0x0400, /* csi2c, len 0x0170 (1st area) */
123 0x0570, /* csiphy1, len 0x000c */
124 0x05c0, /* csi2c, len 0x0040 (2nd area) */
125 },
503596a1 126 .phy_type = ISP_PHY_TYPE_3630,
448de7e7
SA		 127 },
128};
129
130/* Structure for saving/restoring ISP module registers */
131static struct isp_reg isp_reg_list[] = {
132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
135 {0, ISP_TOK_TERM, 0}
136};
137
138/*
139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
140 * @isp: OMAP3 ISP device
141 *
142 * In order to force posting of pending writes, we need to write and
143 * readback the same register, in this case the revision register.
144 *
145 * See this link for reference:
146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
147 */
148void omap3isp_flush(struct isp_device *isp)
149{
150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152}
153
9b28ee3c
LP		 154/* -----------------------------------------------------------------------------
155 * XCLK
156 */
157
158#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
159
160static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
161{
162 switch (xclk->id) {
163 case ISP_XCLK_A:
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
165 ISPTCTRL_CTRL_DIVA_MASK,
166 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
167 break;
168 case ISP_XCLK_B:
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
170 ISPTCTRL_CTRL_DIVB_MASK,
171 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
172 break;
173 }
174}
175
176static int isp_xclk_prepare(struct clk_hw *hw)
177{
178 struct isp_xclk *xclk = to_isp_xclk(hw);
179
180 omap3isp_get(xclk->isp);
181
182 return 0;
183}
184
185static void isp_xclk_unprepare(struct clk_hw *hw)
186{
187 struct isp_xclk *xclk = to_isp_xclk(hw);
188
189 omap3isp_put(xclk->isp);
190}
191
192static int isp_xclk_enable(struct clk_hw *hw)
193{
194 struct isp_xclk *xclk = to_isp_xclk(hw);
195 unsigned long flags;
196
197 spin_lock_irqsave(&xclk->lock, flags);
198 isp_xclk_update(xclk, xclk->divider);
199 xclk->enabled = true;
200 spin_unlock_irqrestore(&xclk->lock, flags);
201
202 return 0;
203}
204
205static void isp_xclk_disable(struct clk_hw *hw)
206{
207 struct isp_xclk *xclk = to_isp_xclk(hw);
208 unsigned long flags;
209
210 spin_lock_irqsave(&xclk->lock, flags);
211 isp_xclk_update(xclk, 0);
212 xclk->enabled = false;
213 spin_unlock_irqrestore(&xclk->lock, flags);
214}
215
216static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
218{
219 struct isp_xclk *xclk = to_isp_xclk(hw);
220
221 return parent_rate / xclk->divider;
222}
223
224static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
225{
226 u32 divider;
227
228 if (*rate >= parent_rate) {
229 *rate = parent_rate;
230 return ISPTCTRL_CTRL_DIV_BYPASS;
231 }
232
aadec012
LP		 233 if (*rate == 0)
234 *rate = 1;
235
9b28ee3c
LP		 236 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
237 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
238 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
239
240 *rate = parent_rate / divider;
241 return divider;
242}
243
244static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
245 unsigned long *parent_rate)
246{
247 isp_xclk_calc_divider(&rate, *parent_rate);
248 return rate;
249}
250
251static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
252 unsigned long parent_rate)
253{
254 struct isp_xclk *xclk = to_isp_xclk(hw);
255 unsigned long flags;
256 u32 divider;
257
258 divider = isp_xclk_calc_divider(&rate, parent_rate);
259
260 spin_lock_irqsave(&xclk->lock, flags);
261
262 xclk->divider = divider;
263 if (xclk->enabled)
264 isp_xclk_update(xclk, divider);
265
266 spin_unlock_irqrestore(&xclk->lock, flags);
267
268 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
269 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
270 return 0;
271}
272
273static const struct clk_ops isp_xclk_ops = {
274 .prepare = isp_xclk_prepare,
275 .unprepare = isp_xclk_unprepare,
276 .enable = isp_xclk_enable,
277 .disable = isp_xclk_disable,
278 .recalc_rate = isp_xclk_recalc_rate,
279 .round_rate = isp_xclk_round_rate,
280 .set_rate = isp_xclk_set_rate,
281};
282
283static const char *isp_xclk_parent_name = "cam_mclk";
284
285static const struct clk_init_data isp_xclk_init_data = {
286 .name = "cam_xclk",
287 .ops = &isp_xclk_ops,
288 .parent_names = &isp_xclk_parent_name,
289 .num_parents = 1,
290};
291
64904b57
LP		 292static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
293{
294 unsigned int idx = clkspec->args[0];
295 struct isp_device *isp = data;
296
297 if (idx >= ARRAY_SIZE(isp->xclks))
298 return ERR_PTR(-ENOENT);
299
300 return isp->xclks[idx].clk;
301}
302
9b28ee3c
LP		 303static int isp_xclk_init(struct isp_device *isp)
304{
64904b57 305 struct device_node *np = isp->dev->of_node;
9b28ee3c
LP		 306 struct clk_init_data init;
307 unsigned int i;
308
f8e2ff26
SN		 309 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
310 isp->xclks[i].clk = ERR_PTR(-EINVAL);
311
9b28ee3c
LP		 312 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
313 struct isp_xclk *xclk = &isp->xclks[i];
9b28ee3c
LP		 314
315 xclk->isp = isp;
316 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
317 xclk->divider = 1;
318 spin_lock_init(&xclk->lock);
319
320 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
321 init.ops = &isp_xclk_ops;
322 init.parent_names = &isp_xclk_parent_name;
323 init.num_parents = 1;
324
325 xclk->hw.init = &init;
f8e2ff26
SN		 326 /*
327 * The first argument is NULL in order to avoid circular
328 * reference, as this driver takes reference on the
329 * sensor subdevice modules and the sensors would take
330 * reference on this module through clk_get().
331 */
332 xclk->clk = clk_register(NULL, &xclk->hw);
333 if (IS_ERR(xclk->clk))
334 return PTR_ERR(xclk->clk);
9b28ee3c
LP		 335 }
336
64904b57
LP		 337 if (np)
338 of_clk_add_provider(np, isp_xclk_src_get, isp);
339
9b28ee3c
LP		 340 return 0;
341}
342
343static void isp_xclk_cleanup(struct isp_device *isp)
344{
64904b57 345 struct device_node *np = isp->dev->of_node;
9b28ee3c
LP		 346 unsigned int i;
347
64904b57
LP		 348 if (np)
349 of_clk_del_provider(np);
350
9b28ee3c
LP		 351 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
352 struct isp_xclk *xclk = &isp->xclks[i];
353
f8e2ff26
SN		 354 if (!IS_ERR(xclk->clk))
355 clk_unregister(xclk->clk);
9b28ee3c
LP		 356 }
357}
358
359/* -----------------------------------------------------------------------------
360 * Interrupts
361 */
362
448de7e7
SA		 363/*
364 * isp_enable_interrupts - Enable ISP interrupts.
365 * @isp: OMAP3 ISP device
366 */
367static void isp_enable_interrupts(struct isp_device *isp)
368{
369 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
370 | IRQ0ENABLE_CSIB_IRQ
371 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
372 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
373 | IRQ0ENABLE_CCDC_VD0_IRQ
374 | IRQ0ENABLE_CCDC_VD1_IRQ
375 | IRQ0ENABLE_HS_VS_IRQ
376 | IRQ0ENABLE_HIST_DONE_IRQ
377 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
378 | IRQ0ENABLE_H3A_AF_DONE_IRQ
379 | IRQ0ENABLE_PRV_DONE_IRQ
380 | IRQ0ENABLE_RSZ_DONE_IRQ;
381
382 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
383 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
384}
385
386/*
387 * isp_disable_interrupts - Disable ISP interrupts.
388 * @isp: OMAP3 ISP device
389 */
390static void isp_disable_interrupts(struct isp_device *isp)
391{
392 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
393}
394
448de7e7 395/*
96d62ae2 396 * isp_core_init - ISP core settings
448de7e7
SA		 397 * @isp: OMAP3 ISP device
398 * @idle: Consider idle state.
399 *
25aeb418 400 * Set the power settings for the ISP and SBL bus and configure the HS/VS
96d62ae2
LP		 401 * interrupt source.
402 *
403 * We need to configure the HS/VS interrupt source before interrupts get
404 * enabled, as the sensor might be free-running and the ISP default setting
405 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 406 */
96d62ae2 407static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 408{
409 isp_reg_writel(isp,
410 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
411 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
412 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
413 ((isp->revision == ISP_REVISION_15_0) ?
414 ISP_SYSCONFIG_AUTOIDLE : 0),
415 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
416
96d62ae2
LP		 417 isp_reg_writel(isp,
418 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
419 ISPCTRL_SYNC_DETECT_VSRISE,
420 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 421}
422
423/*
424 * Configure the bridge and lane shifter. Valid inputs are
425 *
426 * CCDC_INPUT_PARALLEL: Parallel interface
427 * CCDC_INPUT_CSI2A: CSI2a receiver
428 * CCDC_INPUT_CCP2B: CCP2b receiver
429 * CCDC_INPUT_CSI2C: CSI2c receiver
430 *
431 * The bridge and lane shifter are configured according to the selected input
432 * and the ISP platform data.
433 */
434void omap3isp_configure_bridge(struct isp_device *isp,
435 enum ccdc_input_entity input,
68908747 436 const struct isp_parallel_cfg *parcfg,
c51364ca 437 unsigned int shift, unsigned int bridge)
448de7e7
SA		 438{
439 u32 ispctrl_val;
440
441 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
442 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
443 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
444 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
445 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 446 ispctrl_val |= bridge;
448de7e7
SA		 447
448 switch (input) {
449 case CCDC_INPUT_PARALLEL:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
68908747
SA		 451 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
452 shift += parcfg->data_lane_shift * 2;
448de7e7
SA		 453 break;
454
455 case CCDC_INPUT_CSI2A:
456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
457 break;
458
459 case CCDC_INPUT_CCP2B:
460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
461 break;
462
463 case CCDC_INPUT_CSI2C:
464 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
465 break;
466
467 default:
468 return;
469 }
470
c09af044
MJ		 471 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
472
448de7e7
SA		 473 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
474}
475
448de7e7
SA		 476void omap3isp_hist_dma_done(struct isp_device *isp)
477{
478 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
479 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
480 /* Histogram cannot be enabled in this frame anymore */
481 atomic_set(&isp->isp_hist.buf_err, 1);
482 dev_dbg(isp->dev, "hist: Out of synchronization with "
483 "CCDC. Ignoring next buffer.\n");
484 }
485}
486
487static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
488{
489 static const char *name[] = {
490 "CSIA_IRQ",
491 "res1",
492 "res2",
493 "CSIB_LCM_IRQ",
494 "CSIB_IRQ",
495 "res5",
496 "res6",
497 "res7",
498 "CCDC_VD0_IRQ",
499 "CCDC_VD1_IRQ",
500 "CCDC_VD2_IRQ",
501 "CCDC_ERR_IRQ",
502 "H3A_AF_DONE_IRQ",
503 "H3A_AWB_DONE_IRQ",
504 "res14",
505 "res15",
506 "HIST_DONE_IRQ",
507 "CCDC_LSC_DONE",
508 "CCDC_LSC_PREFETCH_COMPLETED",
509 "CCDC_LSC_PREFETCH_ERROR",
510 "PRV_DONE_IRQ",
511 "CBUFF_IRQ",
512 "res22",
513 "res23",
514 "RSZ_DONE_IRQ",
515 "OVF_IRQ",
516 "res26",
517 "res27",
518 "MMU_ERR_IRQ",
519 "OCP_ERR_IRQ",
520 "SEC_ERR_IRQ",
521 "HS_VS_IRQ",
522 };
523 int i;
524
6c20c635 525 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 526
527 for (i = 0; i < ARRAY_SIZE(name); i++) {
528 if ((1 << i) & irqstatus)
529 printk(KERN_CONT "%s ", name[i]);
530 }
531 printk(KERN_CONT "\n");
532}
533
534static void isp_isr_sbl(struct isp_device *isp)
535{
536 struct device *dev = isp->dev;
875e2e3e 537 struct isp_pipeline *pipe;
448de7e7
SA		 538 u32 sbl_pcr;
539
540 /*
541 * Handle shared buffer logic overflows for video buffers.
542 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
543 */
544 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
545 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
546 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
547
548 if (sbl_pcr)
549 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
550
875e2e3e
LP		 551 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
552 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
553 if (pipe != NULL)
554 pipe->error = true;
555 }
556
557 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
558 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
559 if (pipe != NULL)
560 pipe->error = true;
561 }
562
563 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
564 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
565 if (pipe != NULL)
566 pipe->error = true;
448de7e7
SA		 567 }
568
569 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 570 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
571 if (pipe != NULL)
572 pipe->error = true;
448de7e7
SA		 573 }
574
575 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
576 | ISPSBL_PCR_RSZ2_WBL_OVF
577 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 578 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
579 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
580 if (pipe != NULL)
581 pipe->error = true;
582 }
448de7e7
SA		 583
584 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
585 omap3isp_stat_sbl_overflow(&isp->isp_af);
586
587 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
588 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
589}
590
591/*
592 * isp_isr - Interrupt Service Routine for Camera ISP module.
593 * @irq: Not used currently.
594 * @_isp: Pointer to the OMAP3 ISP device
595 *
596 * Handles the corresponding callback if plugged in.
448de7e7
SA		 597 */
598static irqreturn_t isp_isr(int irq, void *_isp)
599{
600 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
601 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
602 IRQ0STATUS_CCDC_VD0_IRQ |
603 IRQ0STATUS_CCDC_VD1_IRQ |
604 IRQ0STATUS_HS_VS_IRQ;
605 struct isp_device *isp = _isp;
606 u32 irqstatus;
448de7e7
SA		 607
608 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
609 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
610
611 isp_isr_sbl(isp);
612
875e2e3e
LP		 613 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
614 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 615
875e2e3e
LP		 616 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
617 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 618
619 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
620 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
621 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
622 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
623 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
624 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
625 omap3isp_stat_isr_frame_sync(&isp->isp_af);
626 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
627 }
628
629 if (irqstatus & ccdc_events)
630 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
631
632 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
633 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
634 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
635 omap3isp_preview_isr(&isp->isp_prev);
636 }
637
638 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
639 omap3isp_resizer_isr(&isp->isp_res);
640
641 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_aewb);
643
644 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
645 omap3isp_stat_isr(&isp->isp_af);
646
647 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
648 omap3isp_stat_isr(&isp->isp_hist);
649
650 omap3isp_flush(isp);
651
652#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
653 isp_isr_dbg(isp, irqstatus);
654#endif
655
656 return IRQ_HANDLED;
657}
658
659/* -----------------------------------------------------------------------------
660 * Pipeline power management
661 *
662 * Entities must be powered up when part of a pipeline that contains at least
663 * one open video device node.
664 *
665 * To achieve this use the entity use_count field to track the number of users.
666 * For entities corresponding to video device nodes the use_count field stores
667 * the users count of the node. For entities corresponding to subdevs the
668 * use_count field stores the total number of users of all video device nodes
669 * in the pipeline.
670 *
671 * The omap3isp_pipeline_pm_use() function must be called in the open() and
672 * close() handlers of video device nodes. It increments or decrements the use
673 * count of all subdev entities in the pipeline.
674 *
675 * To react to link management on powered pipelines, the link setup notification
676 * callback updates the use count of all entities in the source and sink sides
677 * of the link.
678 */
679
680/*
681 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
682 * @entity: The entity
683 *
684 * Return the total number of users of all video device nodes in the pipeline.
685 */
686static int isp_pipeline_pm_use_count(struct media_entity *entity)
687{
688 struct media_entity_graph graph;
689 int use = 0;
690
691 media_entity_graph_walk_start(&graph, entity);
692
693 while ((entity = media_entity_graph_walk_next(&graph))) {
694 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
695 use += entity->use_count;
696 }
697
698 return use;
699}
700
701/*
702 * isp_pipeline_pm_power_one - Apply power change to an entity
703 * @entity: The entity
704 * @change: Use count change
705 *
706 * Change the entity use count by @change. If the entity is a subdev update its
707 * power state by calling the core::s_power operation when the use count goes
708 * from 0 to != 0 or from != 0 to 0.
709 *
710 * Return 0 on success or a negative error code on failure.
711 */
712static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
713{
714 struct v4l2_subdev *subdev;
715 int ret;
716
717 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
718 ? media_entity_to_v4l2_subdev(entity) : NULL;
719
720 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
721 ret = v4l2_subdev_call(subdev, core, s_power, 1);
722 if (ret < 0 && ret != -ENOIOCTLCMD)
723 return ret;
724 }
725
726 entity->use_count += change;
727 WARN_ON(entity->use_count < 0);
728
729 if (entity->use_count == 0 && change < 0 && subdev != NULL)
730 v4l2_subdev_call(subdev, core, s_power, 0);
731
732 return 0;
733}
734
735/*
736 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
737 * @entity: The entity
738 * @change: Use count change
739 *
740 * Walk the pipeline to update the use count and the power state of all non-node
741 * entities.
742 *
743 * Return 0 on success or a negative error code on failure.
744 */
745static int isp_pipeline_pm_power(struct media_entity *entity, int change)
746{
747 struct media_entity_graph graph;
748 struct media_entity *first = entity;
749 int ret = 0;
750
751 if (!change)
752 return 0;
753
754 media_entity_graph_walk_start(&graph, entity);
755
756 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
757 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
758 ret = isp_pipeline_pm_power_one(entity, change);
759
760 if (!ret)
761 return 0;
762
763 media_entity_graph_walk_start(&graph, first);
764
765 while ((first = media_entity_graph_walk_next(&graph))
766 && first != entity)
767 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
768 isp_pipeline_pm_power_one(first, -change);
769
770 return ret;
771}
772
773/*
774 * omap3isp_pipeline_pm_use - Update the use count of an entity
775 * @entity: The entity
776 * @use: Use (1) or stop using (0) the entity
777 *
778 * Update the use count of all entities in the pipeline and power entities on or
779 * off accordingly.
780 *
781 * Return 0 on success or a negative error code on failure. Powering entities
782 * off is assumed to never fail. No failure can occur when the use parameter is
783 * set to 0.
784 */
785int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
786{
787 int change = use ? 1 : -1;
788 int ret;
789
d10c9894 790 mutex_lock(&entity->graph_obj.mdev->graph_mutex);
448de7e7
SA		 791
792 /* Apply use count to node. */
793 entity->use_count += change;
794 WARN_ON(entity->use_count < 0);
795
796 /* Apply power change to connected non-nodes. */
797 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 798 if (ret < 0)
799 entity->use_count -= change;
448de7e7 800
d10c9894 801 mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
448de7e7
SA		 802
803 return ret;
804}
805
806/*
807 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 808 * @link: The link
448de7e7 809 * @flags: New link flags that will be applied
813f5c0a 810 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA		 811 *
812 * React to link management on powered pipelines by updating the use count of
813 * all entities in the source and sink sides of the link. Entities are powered
814 * on or off accordingly.
815 *
816 * Return 0 on success or a negative error code on failure. Powering entities
817 * off is assumed to never fail. This function will not fail for disconnection
818 * events.
819 */
813f5c0a
SN		 820static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
821 unsigned int notification)
448de7e7 822{
813f5c0a
SN		 823 struct media_entity *source = link->source->entity;
824 struct media_entity *sink = link->sink->entity;
825 int source_use = isp_pipeline_pm_use_count(source);
826 int sink_use = isp_pipeline_pm_use_count(sink);
448de7e7
SA		 827 int ret;
828
813f5c0a 829 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
9d39f054 830 !(flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 831 /* Powering off entities is assumed to never fail. */
813f5c0a
SN		 832 isp_pipeline_pm_power(source, -sink_use);
833 isp_pipeline_pm_power(sink, -source_use);
448de7e7
SA		 834 return 0;
835 }
836
9d39f054 837 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH &&
813f5c0a 838 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 839
813f5c0a
SN		 840 ret = isp_pipeline_pm_power(source, sink_use);
841 if (ret < 0)
842 return ret;
448de7e7 843
813f5c0a
SN		 844 ret = isp_pipeline_pm_power(sink, source_use);
845 if (ret < 0)
846 isp_pipeline_pm_power(source, -sink_use);
847
848 return ret;
849 }
850
851 return 0;
448de7e7
SA		 852}
853
854/* -----------------------------------------------------------------------------
855 * Pipeline stream management
856 */
857
858/*
859 * isp_pipeline_enable - Enable streaming on a pipeline
860 * @pipe: ISP pipeline
861 * @mode: Stream mode (single shot or continuous)
862 *
863 * Walk the entities chain starting at the pipeline output video node and start
864 * all modules in the chain in the given mode.
865 *
25985edc 866 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 867 * operation otherwise.
868 */
869static int isp_pipeline_enable(struct isp_pipeline *pipe,
870 enum isp_pipeline_stream_state mode)
871{
872 struct isp_device *isp = pipe->output->isp;
873 struct media_entity *entity;
874 struct media_pad *pad;
875 struct v4l2_subdev *subdev;
876 unsigned long flags;
c62e2a19 877 int ret;
448de7e7 878
112eee0c
LP		 879 /* Refuse to start streaming if an entity included in the pipeline has
880 * crashed. This check must be performed before the loop below to avoid
881 * starting entities if the pipeline won't start anyway (those entities
882 * would then likely fail to stop, making the problem worse).
1567bb7d 883 */
112eee0c 884 if (pipe->entities & isp->crashed)
1567bb7d
LP		 885 return -EIO;
886
448de7e7
SA		 887 spin_lock_irqsave(&pipe->lock, flags);
888 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
889 spin_unlock_irqrestore(&pipe->lock, flags);
890
891 pipe->do_propagation = false;
892
893 entity = &pipe->output->video.entity;
894 while (1) {
895 pad = &entity->pads[0];
896 if (!(pad->flags & MEDIA_PAD_FL_SINK))
897 break;
898
1bddf1b3 899 pad = media_entity_remote_pad(pad);
448de7e7
SA		 900 if (pad == NULL ||
901 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
902 break;
903
904 entity = pad->entity;
905 subdev = media_entity_to_v4l2_subdev(entity);
906
907 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
908 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 909 return ret;
448de7e7
SA		 910
911 if (subdev == &isp->isp_ccdc.subdev) {
912 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
913 s_stream, mode);
914 v4l2_subdev_call(&isp->isp_af.subdev, video,
915 s_stream, mode);
916 v4l2_subdev_call(&isp->isp_hist.subdev, video,
917 s_stream, mode);
918 pipe->do_propagation = true;
919 }
920 }
921
c62e2a19 922 return 0;
448de7e7
SA		 923}
924
925static int isp_pipeline_wait_resizer(struct isp_device *isp)
926{
927 return omap3isp_resizer_busy(&isp->isp_res);
928}
929
930static int isp_pipeline_wait_preview(struct isp_device *isp)
931{
932 return omap3isp_preview_busy(&isp->isp_prev);
933}
934
935static int isp_pipeline_wait_ccdc(struct isp_device *isp)
936{
937 return omap3isp_stat_busy(&isp->isp_af)
938 || omap3isp_stat_busy(&isp->isp_aewb)
939 || omap3isp_stat_busy(&isp->isp_hist)
940 || omap3isp_ccdc_busy(&isp->isp_ccdc);
941}
942
943#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
944
945static int isp_pipeline_wait(struct isp_device *isp,
946 int(*busy)(struct isp_device *isp))
947{
948 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
949
950 while (!time_after(jiffies, timeout)) {
951 if (!busy(isp))
952 return 0;
953 }
954
955 return 1;
956}
957
958/*
959 * isp_pipeline_disable - Disable streaming on a pipeline
960 * @pipe: ISP pipeline
961 *
962 * Walk the entities chain starting at the pipeline output video node and stop
963 * all modules in the chain. Wait synchronously for the modules to be stopped if
964 * necessary.
965 *
966 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
967 * can't be stopped (in which case a software reset of the ISP is probably
968 * necessary).
969 */
970static int isp_pipeline_disable(struct isp_pipeline *pipe)
971{
972 struct isp_device *isp = pipe->output->isp;
973 struct media_entity *entity;
974 struct media_pad *pad;
975 struct v4l2_subdev *subdev;
976 int failure = 0;
977 int ret;
e0077cfd 978 u32 id;
448de7e7
SA		 979
980 /*
981 * We need to stop all the modules after CCDC first or they'll
982 * never stop since they may not get a full frame from CCDC.
983 */
984 entity = &pipe->output->video.entity;
985 while (1) {
986 pad = &entity->pads[0];
987 if (!(pad->flags & MEDIA_PAD_FL_SINK))
988 break;
989
1bddf1b3 990 pad = media_entity_remote_pad(pad);
448de7e7
SA		 991 if (pad == NULL ||
992 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
993 break;
994
995 entity = pad->entity;
996 subdev = media_entity_to_v4l2_subdev(entity);
997
998 if (subdev == &isp->isp_ccdc.subdev) {
999 v4l2_subdev_call(&isp->isp_aewb.subdev,
1000 video, s_stream, 0);
1001 v4l2_subdev_call(&isp->isp_af.subdev,
1002 video, s_stream, 0);
1003 v4l2_subdev_call(&isp->isp_hist.subdev,
1004 video, s_stream, 0);
1005 }
1006
eb228e89 1007 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
448de7e7
SA		 1008
1009 if (subdev == &isp->isp_res.subdev)
eb228e89 1010 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
448de7e7 1011 else if (subdev == &isp->isp_prev.subdev)
eb228e89 1012 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
448de7e7 1013 else if (subdev == &isp->isp_ccdc.subdev)
eb228e89 1014 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
448de7e7 1015
112eee0c
LP		 1016 /* Handle stop failures. An entity that fails to stop can
1017 * usually just be restarted. Flag the stop failure nonetheless
1018 * to trigger an ISP reset the next time the device is released,
1019 * just in case.
1020 *
1021 * The preview engine is a special case. A failure to stop can
1022 * mean a hardware crash. When that happens the preview engine
1023 * won't respond to read/write operations on the L4 bus anymore,
1024 * resulting in a bus fault and a kernel oops next time it gets
1025 * accessed. Mark it as crashed to prevent pipelines including
1026 * it from being started.
1027 */
448de7e7
SA		 1028 if (ret) {
1029 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
112eee0c 1030 isp->stop_failure = true;
e0077cfd
JMC		 1031 if (subdev == &isp->isp_prev.subdev) {
1032 id = media_entity_id(&subdev->entity);
1033 isp->crashed |= 1U << id;
1034 }
448de7e7
SA		 1035 failure = -ETIMEDOUT;
1036 }
1037 }
1038
1039 return failure;
1040}
1041
1042/*
1043 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1044 * @pipe: ISP pipeline
1045 * @state: Stream state (stopped, single shot or continuous)
1046 *
1047 * Set the pipeline to the given stream state. Pipelines can be started in
1048 * single-shot or continuous mode.
1049 *
25985edc 1050 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 1051 * operation otherwise. The pipeline state is not updated when the operation
1052 * fails, except when stopping the pipeline.
448de7e7
SA		 1053 */
1054int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1055 enum isp_pipeline_stream_state state)
1056{
1057 int ret;
1058
1059 if (state == ISP_PIPELINE_STREAM_STOPPED)
1060 ret = isp_pipeline_disable(pipe);
1061 else
1062 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 1063
1064 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1065 pipe->stream_state = state;
448de7e7
SA		 1066
1067 return ret;
1068}
1069
661112cb
LP		 1070/*
1071 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1072 * @pipe: ISP pipeline
1073 *
1074 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1075 * erroneous and makes sure no new buffer can be queued. This function is called
1076 * when a fatal error that prevents any further operation on the pipeline
1077 * occurs.
1078 */
1079void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1080{
1081 if (pipe->input)
1082 omap3isp_video_cancel_stream(pipe->input);
1083 if (pipe->output)
1084 omap3isp_video_cancel_stream(pipe->output);
1085}
1086
448de7e7
SA		 1087/*
1088 * isp_pipeline_resume - Resume streaming on a pipeline
1089 * @pipe: ISP pipeline
1090 *
1091 * Resume video output and input and re-enable pipeline.
1092 */
1093static void isp_pipeline_resume(struct isp_pipeline *pipe)
1094{
1095 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1096
1097 omap3isp_video_resume(pipe->output, !singleshot);
1098 if (singleshot)
1099 omap3isp_video_resume(pipe->input, 0);
1100 isp_pipeline_enable(pipe, pipe->stream_state);
1101}
1102
1103/*
1104 * isp_pipeline_suspend - Suspend streaming on a pipeline
1105 * @pipe: ISP pipeline
1106 *
1107 * Suspend pipeline.
1108 */
1109static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1110{
1111 isp_pipeline_disable(pipe);
1112}
1113
1114/*
1115 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1116 * video node
1117 * @me: ISP module's media entity
1118 *
1119 * Returns 1 if the entity has an enabled link to the output video node or 0
1120 * otherwise. It's true only while pipeline can have no more than one output
1121 * node.
1122 */
1123static int isp_pipeline_is_last(struct media_entity *me)
1124{
1125 struct isp_pipeline *pipe;
1126 struct media_pad *pad;
1127
1128 if (!me->pipe)
1129 return 0;
1130 pipe = to_isp_pipeline(me);
1131 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1132 return 0;
1bddf1b3 1133 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA		 1134 return pad->entity == me;
1135}
1136
1137/*
1138 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1139 * @me: ISP module's media entity
1140 *
1141 * Suspend the whole pipeline if module's entity has an enabled link to the
1142 * output video node. It works only while pipeline can have no more than one
1143 * output node.
1144 */
1145static void isp_suspend_module_pipeline(struct media_entity *me)
1146{
1147 if (isp_pipeline_is_last(me))
1148 isp_pipeline_suspend(to_isp_pipeline(me));
1149}
1150
1151/*
1152 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1153 * @me: ISP module's media entity
1154 *
1155 * Resume the whole pipeline if module's entity has an enabled link to the
1156 * output video node. It works only while pipeline can have no more than one
1157 * output node.
1158 */
1159static void isp_resume_module_pipeline(struct media_entity *me)
1160{
1161 if (isp_pipeline_is_last(me))
1162 isp_pipeline_resume(to_isp_pipeline(me));
1163}
1164
1165/*
1166 * isp_suspend_modules - Suspend ISP submodules.
1167 * @isp: OMAP3 ISP device
1168 *
1169 * Returns 0 if suspend left in idle state all the submodules properly,
1170 * or returns 1 if a general Reset is required to suspend the submodules.
1171 */
1172static int isp_suspend_modules(struct isp_device *isp)
1173{
1174 unsigned long timeout;
1175
1176 omap3isp_stat_suspend(&isp->isp_aewb);
1177 omap3isp_stat_suspend(&isp->isp_af);
1178 omap3isp_stat_suspend(&isp->isp_hist);
1179 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1180 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1181 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1182 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1183 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1184
1185 timeout = jiffies + ISP_STOP_TIMEOUT;
1186 while (omap3isp_stat_busy(&isp->isp_af)
1187 || omap3isp_stat_busy(&isp->isp_aewb)
1188 || omap3isp_stat_busy(&isp->isp_hist)
1189 || omap3isp_preview_busy(&isp->isp_prev)
1190 || omap3isp_resizer_busy(&isp->isp_res)
1191 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1192 if (time_after(jiffies, timeout)) {
1193 dev_info(isp->dev, "can't stop modules.\n");
1194 return 1;
1195 }
1196 msleep(1);
1197 }
1198
1199 return 0;
1200}
1201
1202/*
1203 * isp_resume_modules - Resume ISP submodules.
1204 * @isp: OMAP3 ISP device
1205 */
1206static void isp_resume_modules(struct isp_device *isp)
1207{
1208 omap3isp_stat_resume(&isp->isp_aewb);
1209 omap3isp_stat_resume(&isp->isp_af);
1210 omap3isp_stat_resume(&isp->isp_hist);
1211 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1212 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1213 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1214 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1215 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1216}
1217
1218/*
1219 * isp_reset - Reset ISP with a timeout wait for idle.
1220 * @isp: OMAP3 ISP device
1221 */
1222static int isp_reset(struct isp_device *isp)
1223{
1224 unsigned long timeout = 0;
1225
1226 isp_reg_writel(isp,
1227 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1228 | ISP_SYSCONFIG_SOFTRESET,
1229 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1230 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1231 ISP_SYSSTATUS) & 0x1)) {
1232 if (timeout++ > 10000) {
1233 dev_alert(isp->dev, "cannot reset ISP\n");
1234 return -ETIMEDOUT;
1235 }
1236 udelay(1);
1237 }
1238
112eee0c 1239 isp->stop_failure = false;
1567bb7d 1240 isp->crashed = 0;
448de7e7
SA		 1241 return 0;
1242}
1243
1244/*
1245 * isp_save_context - Saves the values of the ISP module registers.
1246 * @isp: OMAP3 ISP device
1247 * @reg_list: Structure containing pairs of register address and value to
1248 * modify on OMAP.
1249 */
1250static void
1251isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1252{
1253 struct isp_reg *next = reg_list;
1254
1255 for (; next->reg != ISP_TOK_TERM; next++)
1256 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1257}
1258
1259/*
1260 * isp_restore_context - Restores the values of the ISP module registers.
1261 * @isp: OMAP3 ISP device
1262 * @reg_list: Structure containing pairs of register address and value to
1263 * modify on OMAP.
1264 */
1265static void
1266isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1267{
1268 struct isp_reg *next = reg_list;
1269
1270 for (; next->reg != ISP_TOK_TERM; next++)
1271 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1272}
1273
1274/*
1275 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1276 * @isp: OMAP3 ISP device
1277 *
1278 * Routine for saving the context of each module in the ISP.
1279 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1280 */
1281static void isp_save_ctx(struct isp_device *isp)
1282{
1283 isp_save_context(isp, isp_reg_list);
fabdbca8 1284 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1285}
1286
1287/*
1288 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1289 * @isp: OMAP3 ISP device
1290 *
1291 * Routine for restoring the context of each module in the ISP.
1292 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1293 */
1294static void isp_restore_ctx(struct isp_device *isp)
1295{
1296 isp_restore_context(isp, isp_reg_list);
fabdbca8 1297 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1298 omap3isp_ccdc_restore_context(isp);
1299 omap3isp_preview_restore_context(isp);
1300}
1301
1302/* -----------------------------------------------------------------------------
1303 * SBL resources management
1304 */
1305#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1306 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1307 OMAP3_ISP_SBL_PREVIEW_READ | \
1308 OMAP3_ISP_SBL_RESIZER_READ)
1309#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1310 OMAP3_ISP_SBL_CSI2A_WRITE | \
1311 OMAP3_ISP_SBL_CSI2C_WRITE | \
1312 OMAP3_ISP_SBL_CCDC_WRITE | \
1313 OMAP3_ISP_SBL_PREVIEW_WRITE)
1314
1315void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1316{
1317 u32 sbl = 0;
1318
1319 isp->sbl_resources |= res;
1320
1321 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1322 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1323
1324 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1325 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1326
1327 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1328 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1329
1330 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1331 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1332
1333 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1334 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1335
1336 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1337 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1338
1339 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1340}
1341
1342void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1343{
1344 u32 sbl = 0;
1345
1346 isp->sbl_resources &= ~res;
1347
1348 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1349 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1350
1351 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1352 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1353
1354 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1355 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1356
1357 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1358 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1359
1360 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1361 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1362
1363 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1364 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1365
1366 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1367}
1368
1369/*
1370 * isp_module_sync_idle - Helper to sync module with its idle state
1371 * @me: ISP submodule's media entity
1372 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1373 * @stopping: flag which tells module wants to stop
1374 *
1375 * This function checks if ISP submodule needs to wait for next interrupt. If
1376 * yes, makes the caller to sleep while waiting for such event.
1377 */
1378int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1379 atomic_t *stopping)
1380{
1381 struct isp_pipeline *pipe = to_isp_pipeline(me);
1382
1383 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1384 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1385 !isp_pipeline_ready(pipe)))
1386 return 0;
1387
1388 /*
1389 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1390 * scenario. We'll call it here to avoid race conditions.
1391 */
1392 atomic_set(stopping, 1);
1393 smp_mb();
1394
1395 /*
1396 * If module is the last one, it's writing to memory. In this case,
1397 * it's necessary to check if the module is already paused due to
1398 * DMA queue underrun or if it has to wait for next interrupt to be
1399 * idle.
1400 * If it isn't the last one, the function won't sleep but *stopping
1401 * will still be set to warn next submodule caller's interrupt the
1402 * module wants to be idle.
1403 */
1404 if (isp_pipeline_is_last(me)) {
1405 struct isp_video *video = pipe->output;
1406 unsigned long flags;
e8feb876 1407 spin_lock_irqsave(&video->irqlock, flags);
448de7e7 1408 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
e8feb876 1409 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1410 atomic_set(stopping, 0);
1411 smp_mb();
1412 return 0;
1413 }
e8feb876 1414 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1415 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1416 msecs_to_jiffies(1000))) {
1417 atomic_set(stopping, 0);
1418 smp_mb();
1419 return -ETIMEDOUT;
1420 }
1421 }
1422
1423 return 0;
1424}
1425
1426/*
1e9c4d49 1427 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
448de7e7
SA		 1428 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1429 * @stopping: flag which tells module wants to stop
1430 *
1431 * This function checks if ISP submodule was stopping. In case of yes, it
1432 * notices the caller by setting stopping to 0 and waking up the wait queue.
1433 * Returns 1 if it was stopping or 0 otherwise.
1434 */
1435int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1436 atomic_t *stopping)
1437{
1438 if (atomic_cmpxchg(stopping, 1, 0)) {
1439 wake_up(wait);
1440 return 1;
1441 }
1442
1443 return 0;
1444}
1445
1446/* --------------------------------------------------------------------------
1447 * Clock management
1448 */
1449
1450#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1451 ISPCTRL_HIST_CLK_EN | \
1452 ISPCTRL_RSZ_CLK_EN | \
1453 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1454 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1455
1456static void __isp_subclk_update(struct isp_device *isp)
1457{
1458 u32 clk = 0;
1459
be9a1b98
LP		 1460 /* AEWB and AF share the same clock. */
1461 if (isp->subclk_resources &
1462 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1463 clk |= ISPCTRL_H3A_CLK_EN;
1464
1465 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1466 clk |= ISPCTRL_HIST_CLK_EN;
1467
1468 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1469 clk |= ISPCTRL_RSZ_CLK_EN;
1470
1471 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1472 * RAM as well.
448de7e7
SA		 1473 */
1474 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1475 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1476
1477 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1478 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1479
1480 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1481 ISPCTRL_CLKS_MASK, clk);
1482}
1483
1484void omap3isp_subclk_enable(struct isp_device *isp,
1485 enum isp_subclk_resource res)
1486{
1487 isp->subclk_resources |= res;
1488
1489 __isp_subclk_update(isp);
1490}
1491
1492void omap3isp_subclk_disable(struct isp_device *isp,
1493 enum isp_subclk_resource res)
1494{
1495 isp->subclk_resources &= ~res;
1496
1497 __isp_subclk_update(isp);
1498}
1499
1500/*
1501 * isp_enable_clocks - Enable ISP clocks
1502 * @isp: OMAP3 ISP device
1503 *
b057c3c3
LP		 1504 * Return 0 if successful, or clk_prepare_enable return value if any of them
1505 * fails.
448de7e7
SA		 1506 */
1507static int isp_enable_clocks(struct isp_device *isp)
1508{
1509 int r;
1510 unsigned long rate;
448de7e7 1511
b057c3c3 1512 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1513 if (r) {
b057c3c3 1514 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA		 1515 goto out_clk_enable_ick;
1516 }
6d1aa02f 1517 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1518 if (r) {
6d1aa02f 1519 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA		 1520 goto out_clk_enable_mclk;
1521 }
b057c3c3 1522 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1523 if (r) {
b057c3c3 1524 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA		 1525 goto out_clk_enable_mclk;
1526 }
1527 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1528 if (rate != CM_CAM_MCLK_HZ)
1529 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1530 " expected : %d\n"
1531 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1532 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1533 if (r) {
b057c3c3 1534 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA		 1535 goto out_clk_enable_csi2_fclk;
1536 }
1537 return 0;
1538
1539out_clk_enable_csi2_fclk:
b057c3c3 1540 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1541out_clk_enable_mclk:
b057c3c3 1542 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA		 1543out_clk_enable_ick:
1544 return r;
1545}
1546
1547/*
1548 * isp_disable_clocks - Disable ISP clocks
1549 * @isp: OMAP3 ISP device
1550 */
1551static void isp_disable_clocks(struct isp_device *isp)
1552{
b057c3c3
LP		 1553 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1554 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1555 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA		 1556}
1557
1558static const char *isp_clocks[] = {
1559 "cam_ick",
1560 "cam_mclk",
448de7e7
SA		 1561 "csi2_96m_fck",
1562 "l3_ick",
1563};
1564
448de7e7
SA		 1565static int isp_get_clocks(struct isp_device *isp)
1566{
1567 struct clk *clk;
1568 unsigned int i;
1569
1570 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1571 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA		 1572 if (IS_ERR(clk)) {
1573 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA		 1574 return PTR_ERR(clk);
1575 }
1576
1577 isp->clock[i] = clk;
1578 }
1579
1580 return 0;
1581}
1582
1583/*
1584 * omap3isp_get - Acquire the ISP resource.
1585 *
1586 * Initializes the clocks for the first acquire.
1587 *
1588 * Increment the reference count on the ISP. If the first reference is taken,
1589 * enable clocks and power-up all submodules.
1590 *
25985edc 1591 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1592 */
96d62ae2 1593static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1594{
1595 struct isp_device *__isp = isp;
1596
1597 if (isp == NULL)
1598 return NULL;
1599
1600 mutex_lock(&isp->isp_mutex);
1601 if (isp->ref_count > 0)
1602 goto out;
1603
1604 if (isp_enable_clocks(isp) < 0) {
1605 __isp = NULL;
1606 goto out;
1607 }
1608
1609 /* We don't want to restore context before saving it! */
1610 if (isp->has_context)
1611 isp_restore_ctx(isp);
448de7e7 1612
96d62ae2
LP		 1613 if (irq)
1614 isp_enable_interrupts(isp);
448de7e7
SA		 1615
1616out:
1617 if (__isp != NULL)
1618 isp->ref_count++;
1619 mutex_unlock(&isp->isp_mutex);
1620
1621 return __isp;
1622}
1623
96d62ae2
LP		 1624struct isp_device *omap3isp_get(struct isp_device *isp)
1625{
1626 return __omap3isp_get(isp, true);
1627}
1628
448de7e7
SA		 1629/*
1630 * omap3isp_put - Release the ISP
1631 *
1632 * Decrement the reference count on the ISP. If the last reference is released,
1633 * power-down all submodules, disable clocks and free temporary buffers.
1634 */
2a0a5472 1635static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
448de7e7
SA		 1636{
1637 if (isp == NULL)
1638 return;
1639
1640 mutex_lock(&isp->isp_mutex);
1641 BUG_ON(isp->ref_count == 0);
1642 if (--isp->ref_count == 0) {
1643 isp_disable_interrupts(isp);
2a0a5472 1644 if (save_ctx) {
a32f2f90 1645 isp_save_ctx(isp);
96d62ae2
LP		 1646 isp->has_context = 1;
1647 }
1567bb7d
LP		 1648 /* Reset the ISP if an entity has failed to stop. This is the
1649 * only way to recover from such conditions.
1650 */
112eee0c 1651 if (isp->crashed || isp->stop_failure)
994d5375 1652 isp_reset(isp);
448de7e7
SA		 1653 isp_disable_clocks(isp);
1654 }
1655 mutex_unlock(&isp->isp_mutex);
1656}
1657
2a0a5472
LP		 1658void omap3isp_put(struct isp_device *isp)
1659{
1660 __omap3isp_put(isp, true);
1661}
1662
448de7e7
SA		 1663/* --------------------------------------------------------------------------
1664 * Platform device driver
1665 */
1666
1667/*
1668 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1669 * @isp: OMAP3 ISP device
1670 */
1671#define ISP_PRINT_REGISTER(isp, name)\
1672 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1673 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1674#define SBL_PRINT_REGISTER(isp, name)\
1675 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1676 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1677
1678void omap3isp_print_status(struct isp_device *isp)
1679{
1680 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1681
1682 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1683 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1684 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1685 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1686 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1687 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1688 ISP_PRINT_REGISTER(isp, CTRL);
1689 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1690 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1691 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1692 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1693 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1694 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1695 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1696 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1697
1698 SBL_PRINT_REGISTER(isp, PCR);
1699 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1700
1701 dev_dbg(isp->dev, "--------------------------------------------\n");
1702}
1703
1704#ifdef CONFIG_PM
1705
1706/*
1707 * Power management support.
1708 *
1709 * As the ISP can't properly handle an input video stream interruption on a non
1710 * frame boundary, the ISP pipelines need to be stopped before sensors get
1711 * suspended. However, as suspending the sensors can require a running clock,
1712 * which can be provided by the ISP, the ISP can't be completely suspended
1713 * before the sensor.
1714 *
1715 * To solve this problem power management support is split into prepare/complete
1716 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1717 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1718 * resume(), and the the pipelines are restarted in complete().
1719 *
39c1cb2b 1720 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
448de7e7
SA		 1721 * yet.
1722 */
1723static int isp_pm_prepare(struct device *dev)
1724{
1725 struct isp_device *isp = dev_get_drvdata(dev);
1726 int reset;
1727
1728 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1729
1730 if (isp->ref_count == 0)
1731 return 0;
1732
1733 reset = isp_suspend_modules(isp);
1734 isp_disable_interrupts(isp);
1735 isp_save_ctx(isp);
1736 if (reset)
1737 isp_reset(isp);
1738
1739 return 0;
1740}
1741
1742static int isp_pm_suspend(struct device *dev)
1743{
1744 struct isp_device *isp = dev_get_drvdata(dev);
1745
1746 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1747
1748 if (isp->ref_count)
1749 isp_disable_clocks(isp);
1750
1751 return 0;
1752}
1753
1754static int isp_pm_resume(struct device *dev)
1755{
1756 struct isp_device *isp = dev_get_drvdata(dev);
1757
1758 if (isp->ref_count == 0)
1759 return 0;
1760
1761 return isp_enable_clocks(isp);
1762}
1763
1764static void isp_pm_complete(struct device *dev)
1765{
1766 struct isp_device *isp = dev_get_drvdata(dev);
1767
1768 if (isp->ref_count == 0)
1769 return;
1770
1771 isp_restore_ctx(isp);
1772 isp_enable_interrupts(isp);
1773 isp_resume_modules(isp);
1774}
1775
1776#else
1777
1778#define isp_pm_prepare NULL
1779#define isp_pm_suspend NULL
1780#define isp_pm_resume NULL
1781#define isp_pm_complete NULL
1782
1783#endif /* CONFIG_PM */
1784
1785static void isp_unregister_entities(struct isp_device *isp)
1786{
1787 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1788 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1789 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1790 omap3isp_preview_unregister_entities(&isp->isp_prev);
1791 omap3isp_resizer_unregister_entities(&isp->isp_res);
1792 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1793 omap3isp_stat_unregister_entities(&isp->isp_af);
1794 omap3isp_stat_unregister_entities(&isp->isp_hist);
1795
1796 v4l2_device_unregister(&isp->v4l2_dev);
1797 media_device_unregister(&isp->media_dev);
1798}
1799
703e6f62
SA		 1800static int isp_link_entity(
1801 struct isp_device *isp, struct media_entity *entity,
1802 enum isp_interface_type interface)
1803{
1804 struct media_entity *input;
1805 unsigned int flags;
1806 unsigned int pad;
1807 unsigned int i;
1808
1809 /* Connect the sensor to the correct interface module.
1810 * Parallel sensors are connected directly to the CCDC, while
1811 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1812 * receiver through CSIPHY1 or CSIPHY2.
1813 */
1814 switch (interface) {
1815 case ISP_INTERFACE_PARALLEL:
1816 input = &isp->isp_ccdc.subdev.entity;
1817 pad = CCDC_PAD_SINK;
1818 flags = 0;
1819 break;
1820
1821 case ISP_INTERFACE_CSI2A_PHY2:
1822 input = &isp->isp_csi2a.subdev.entity;
1823 pad = CSI2_PAD_SINK;
1824 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1825 break;
1826
1827 case ISP_INTERFACE_CCP2B_PHY1:
1828 case ISP_INTERFACE_CCP2B_PHY2:
1829 input = &isp->isp_ccp2.subdev.entity;
1830 pad = CCP2_PAD_SINK;
1831 flags = 0;
1832 break;
1833
1834 case ISP_INTERFACE_CSI2C_PHY1:
1835 input = &isp->isp_csi2c.subdev.entity;
1836 pad = CSI2_PAD_SINK;
1837 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1838 break;
1839
1840 default:
1841 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1842 interface);
1843 return -EINVAL;
1844 }
1845
1846 /*
1847 * Not all interfaces are available on all revisions of the
1848 * ISP. The sub-devices of those interfaces aren't initialised
1849 * in such a case. Check this by ensuring the num_pads is
1850 * non-zero.
1851 */
1852 if (!input->num_pads) {
1853 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1854 interface);
1855 return -EINVAL;
1856 }
1857
1858 for (i = 0; i < entity->num_pads; i++) {
1859 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1860 break;
1861 }
1862 if (i == entity->num_pads) {
1863 dev_err(isp->dev, "%s: no source pad in external entity\n",
1864 __func__);
1865 return -EINVAL;
1866 }
1867
8df00a15 1868 return media_create_pad_link(entity, i, input, pad, flags);
703e6f62
SA		 1869}
1870
448de7e7
SA		 1871static int isp_register_entities(struct isp_device *isp)
1872{
448de7e7
SA		 1873 int ret;
1874
1875 isp->media_dev.dev = isp->dev;
1876 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1877 sizeof(isp->media_dev.model));
083eb078 1878 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1879 isp->media_dev.link_notify = isp_pipeline_link_notify;
1880 ret = media_device_register(&isp->media_dev);
1881 if (ret < 0) {
4feca39b 1882 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
448de7e7
SA		 1883 __func__, ret);
1884 return ret;
1885 }
1886
1887 isp->v4l2_dev.mdev = &isp->media_dev;
1888 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1889 if (ret < 0) {
4feca39b 1890 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA		 1891 __func__, ret);
1892 goto done;
1893 }
1894
1895 /* Register internal entities */
1896 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1897 if (ret < 0)
1898 goto done;
1899
1900 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1901 if (ret < 0)
1902 goto done;
1903
1904 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1905 if (ret < 0)
1906 goto done;
1907
1908 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1909 &isp->v4l2_dev);
1910 if (ret < 0)
1911 goto done;
1912
1913 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1914 if (ret < 0)
1915 goto done;
1916
1917 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1918 if (ret < 0)
1919 goto done;
1920
1921 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1922 if (ret < 0)
1923 goto done;
1924
1925 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1926 if (ret < 0)
1927 goto done;
1928
448de7e7 1929done:
5d479386 1930 if (ret < 0)
448de7e7
SA		 1931 isp_unregister_entities(isp);
1932
1933 return ret;
1934}
1935
1936static void isp_cleanup_modules(struct isp_device *isp)
1937{
1938 omap3isp_h3a_aewb_cleanup(isp);
1939 omap3isp_h3a_af_cleanup(isp);
1940 omap3isp_hist_cleanup(isp);
1941 omap3isp_resizer_cleanup(isp);
1942 omap3isp_preview_cleanup(isp);
1943 omap3isp_ccdc_cleanup(isp);
1944 omap3isp_ccp2_cleanup(isp);
1945 omap3isp_csi2_cleanup(isp);
1946}
1947
1948static int isp_initialize_modules(struct isp_device *isp)
1949{
1950 int ret;
1951
1952 ret = omap3isp_csiphy_init(isp);
1953 if (ret < 0) {
1954 dev_err(isp->dev, "CSI PHY initialization failed\n");
1955 goto error_csiphy;
1956 }
1957
1958 ret = omap3isp_csi2_init(isp);
1959 if (ret < 0) {
1960 dev_err(isp->dev, "CSI2 initialization failed\n");
1961 goto error_csi2;
1962 }
1963
1964 ret = omap3isp_ccp2_init(isp);
1965 if (ret < 0) {
1966 dev_err(isp->dev, "CCP2 initialization failed\n");
1967 goto error_ccp2;
1968 }
1969
1970 ret = omap3isp_ccdc_init(isp);
1971 if (ret < 0) {
1972 dev_err(isp->dev, "CCDC initialization failed\n");
1973 goto error_ccdc;
1974 }
1975
1976 ret = omap3isp_preview_init(isp);
1977 if (ret < 0) {
1978 dev_err(isp->dev, "Preview initialization failed\n");
1979 goto error_preview;
1980 }
1981
1982 ret = omap3isp_resizer_init(isp);
1983 if (ret < 0) {
1984 dev_err(isp->dev, "Resizer initialization failed\n");
1985 goto error_resizer;
1986 }
1987
1988 ret = omap3isp_hist_init(isp);
1989 if (ret < 0) {
1990 dev_err(isp->dev, "Histogram initialization failed\n");
1991 goto error_hist;
1992 }
1993
1994 ret = omap3isp_h3a_aewb_init(isp);
1995 if (ret < 0) {
1996 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1997 goto error_h3a_aewb;
1998 }
1999
2000 ret = omap3isp_h3a_af_init(isp);
2001 if (ret < 0) {
2002 dev_err(isp->dev, "H3A AF initialization failed\n");
2003 goto error_h3a_af;
2004 }
2005
2006 /* Connect the submodules. */
8df00a15 2007 ret = media_create_pad_link(
448de7e7
SA		 2008 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2009 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2010 if (ret < 0)
2011 goto error_link;
2012
8df00a15 2013 ret = media_create_pad_link(
448de7e7
SA		 2014 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2015 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2016 if (ret < 0)
2017 goto error_link;
2018
8df00a15 2019 ret = media_create_pad_link(
448de7e7
SA		 2020 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2021 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2022 if (ret < 0)
2023 goto error_link;
2024
8df00a15 2025 ret = media_create_pad_link(
448de7e7
SA		 2026 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2027 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2028 if (ret < 0)
2029 goto error_link;
2030
8df00a15 2031 ret = media_create_pad_link(
448de7e7
SA		 2032 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2033 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2034 if (ret < 0)
2035 goto error_link;
2036
8df00a15 2037 ret = media_create_pad_link(
448de7e7
SA		 2038 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2039 &isp->isp_aewb.subdev.entity, 0,
2040 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2041 if (ret < 0)
2042 goto error_link;
2043
8df00a15 2044 ret = media_create_pad_link(
448de7e7
SA		 2045 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2046 &isp->isp_af.subdev.entity, 0,
2047 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2048 if (ret < 0)
2049 goto error_link;
2050
8df00a15 2051 ret = media_create_pad_link(
448de7e7
SA		 2052 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2053 &isp->isp_hist.subdev.entity, 0,
2054 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2055 if (ret < 0)
2056 goto error_link;
2057
2058 return 0;
2059
2060error_link:
2061 omap3isp_h3a_af_cleanup(isp);
2062error_h3a_af:
2063 omap3isp_h3a_aewb_cleanup(isp);
2064error_h3a_aewb:
2065 omap3isp_hist_cleanup(isp);
2066error_hist:
2067 omap3isp_resizer_cleanup(isp);
2068error_resizer:
2069 omap3isp_preview_cleanup(isp);
2070error_preview:
2071 omap3isp_ccdc_cleanup(isp);
2072error_ccdc:
2073 omap3isp_ccp2_cleanup(isp);
2074error_ccp2:
2075 omap3isp_csi2_cleanup(isp);
2076error_csi2:
2077error_csiphy:
2078 return ret;
2079}
2080
2a0a5472
LP		 2081static void isp_detach_iommu(struct isp_device *isp)
2082{
2083 arm_iommu_release_mapping(isp->mapping);
2084 isp->mapping = NULL;
2085 iommu_group_remove_device(isp->dev);
2086}
2087
2088static int isp_attach_iommu(struct isp_device *isp)
2089{
2090 struct dma_iommu_mapping *mapping;
2091 struct iommu_group *group;
2092 int ret;
2093
2094 /* Create a device group and add the device to it. */
2095 group = iommu_group_alloc();
2096 if (IS_ERR(group)) {
2097 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2098 return PTR_ERR(group);
2099 }
2100
2101 ret = iommu_group_add_device(group, isp->dev);
2102 iommu_group_put(group);
2103
2104 if (ret < 0) {
2105 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2106 return ret;
2107 }
2108
2109 /*
2110 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2111 * VAs. This will allocate a corresponding IOMMU domain.
2112 */
2113 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2114 if (IS_ERR(mapping)) {
2115 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2116 ret = PTR_ERR(mapping);
2117 goto error;
2118 }
2119
2120 isp->mapping = mapping;
2121
2122 /* Attach the ARM VA mapping to the device. */
2123 ret = arm_iommu_attach_device(isp->dev, mapping);
2124 if (ret < 0) {
2125 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2126 goto error;
2127 }
2128
2129 return 0;
2130
2131error:
2132 isp_detach_iommu(isp);
2133 return ret;
2134}
2135
448de7e7
SA		 2136/*
2137 * isp_remove - Remove ISP platform device
2138 * @pdev: Pointer to ISP platform device
2139 *
2140 * Always returns 0.
2141 */
4c62e976 2142static int isp_remove(struct platform_device *pdev)
448de7e7
SA		 2143{
2144 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7 2145
da7f3843 2146 v4l2_async_notifier_unregister(&isp->notifier);
448de7e7
SA		 2147 isp_unregister_entities(isp);
2148 isp_cleanup_modules(isp);
9b28ee3c 2149 isp_xclk_cleanup(isp);
448de7e7 2150
96d62ae2 2151 __omap3isp_get(isp, false);
2a0a5472
LP		 2152 isp_detach_iommu(isp);
2153 __omap3isp_put(isp, false);
448de7e7 2154
448de7e7
SA		 2155 return 0;
2156}
2157
da7f3843
SA		 2158enum isp_of_phy {
2159 ISP_OF_PHY_PARALLEL = 0,
2160 ISP_OF_PHY_CSIPHY1,
2161 ISP_OF_PHY_CSIPHY2,
2162};
2163
2164static int isp_of_parse_node(struct device *dev, struct device_node *node,
2165 struct isp_async_subdev *isd)
2166{
2167 struct isp_bus_cfg *buscfg = &isd->bus;
2168 struct v4l2_of_endpoint vep;
2169 unsigned int i;
2170
2171 v4l2_of_parse_endpoint(node, &vep);
2172
2173 dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
2174 vep.base.port);
2175
2176 switch (vep.base.port) {
2177 case ISP_OF_PHY_PARALLEL:
2178 buscfg->interface = ISP_INTERFACE_PARALLEL;
2179 buscfg->bus.parallel.data_lane_shift =
2180 vep.bus.parallel.data_shift;
2181 buscfg->bus.parallel.clk_pol =
2182 !!(vep.bus.parallel.flags
2183 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2184 buscfg->bus.parallel.hs_pol =
2185 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2186 buscfg->bus.parallel.vs_pol =
2187 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2188 buscfg->bus.parallel.fld_pol =
2189 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2190 buscfg->bus.parallel.data_pol =
2191 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2192 break;
2193
2194 case ISP_OF_PHY_CSIPHY1:
2195 case ISP_OF_PHY_CSIPHY2:
2196 /* FIXME: always assume CSI-2 for now. */
2197 switch (vep.base.port) {
2198 case ISP_OF_PHY_CSIPHY1:
2199 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2200 break;
2201 case ISP_OF_PHY_CSIPHY2:
2202 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2203 break;
2204 }
2205 buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
2206 buscfg->bus.csi2.lanecfg.clk.pol =
2207 vep.bus.mipi_csi2.lane_polarities[0];
2208 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2209 buscfg->bus.csi2.lanecfg.clk.pol,
2210 buscfg->bus.csi2.lanecfg.clk.pos);
2211
2212 for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
2213 buscfg->bus.csi2.lanecfg.data[i].pos =
2214 vep.bus.mipi_csi2.data_lanes[i];
2215 buscfg->bus.csi2.lanecfg.data[i].pol =
2216 vep.bus.mipi_csi2.lane_polarities[i + 1];
2217 dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
2218 buscfg->bus.csi2.lanecfg.data[i].pol,
2219 buscfg->bus.csi2.lanecfg.data[i].pos);
2220 }
2221
2222 /*
2223 * FIXME: now we assume the CRC is always there.
2224 * Implement a way to obtain this information from the
2225 * sensor. Frame descriptors, perhaps?
2226 */
2227 buscfg->bus.csi2.crc = 1;
2228 break;
2229
2230 default:
2231 dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
2232 vep.base.port);
2233 break;
2234 }
2235
2236 return 0;
2237}
2238
2239static int isp_of_parse_nodes(struct device *dev,
2240 struct v4l2_async_notifier *notifier)
2241{
2242 struct device_node *node = NULL;
2243
2244 notifier->subdevs = devm_kcalloc(
2245 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2246 if (!notifier->subdevs)
2247 return -ENOMEM;
2248
2249 while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2250 (node = of_graph_get_next_endpoint(dev->of_node, node))) {
2251 struct isp_async_subdev *isd;
2252
2253 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2254 if (!isd) {
2255 of_node_put(node);
2256 return -ENOMEM;
2257 }
2258
2259 notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2260
2261 if (isp_of_parse_node(dev, node, isd)) {
2262 of_node_put(node);
2263 return -EINVAL;
2264 }
2265
2266 isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
2267 of_node_put(node);
2268 if (!isd->asd.match.of.node) {
2269 dev_warn(dev, "bad remote port parent\n");
2270 return -EINVAL;
2271 }
2272
2273 isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
2274 notifier->num_subdevs++;
2275 }
2276
2277 return notifier->num_subdevs;
2278}
2279
2280static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
2281 struct v4l2_subdev *subdev,
2282 struct v4l2_async_subdev *asd)
2283{
2284 struct isp_device *isp = container_of(async, struct isp_device,
2285 notifier);
2286 struct isp_async_subdev *isd =
2287 container_of(asd, struct isp_async_subdev, asd);
2288 int ret;
2289
2290 ret = isp_link_entity(isp, &subdev->entity, isd->bus.interface);
2291 if (ret < 0)
2292 return ret;
2293
2294 isd->sd = subdev;
2295 isd->sd->host_priv = &isd->bus;
2296
2297 return ret;
2298}
2299
2300static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2301{
2302 struct isp_device *isp = container_of(async, struct isp_device,
2303 notifier);
2304
2305 return v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2306}
2307
448de7e7
SA		 2308/*
2309 * isp_probe - Probe ISP platform device
2310 * @pdev: Pointer to ISP platform device
2311 *
2312 * Returns 0 if successful,
2313 * -ENOMEM if no memory available,
2314 * -ENODEV if no platform device resources found
2315 * or no space for remapping registers,
2316 * -EINVAL if couldn't install ISR,
2317 * or clk_get return error value.
2318 */
4c62e976 2319static int isp_probe(struct platform_device *pdev)
448de7e7 2320{
448de7e7 2321 struct isp_device *isp;
8644cdf9 2322 struct resource *mem;
448de7e7
SA		 2323 int ret;
2324 int i, m;
2325
cf2b4cf6 2326 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA		 2327 if (!isp) {
2328 dev_err(&pdev->dev, "could not allocate memory\n");
2329 return -ENOMEM;
2330 }
2331
78c66fbc
LP		 2332 ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
2333 &isp->phy_type);
2334 if (ret)
2335 return ret;
da7f3843 2336
78c66fbc
LP		 2337 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2338 "syscon");
2339 if (IS_ERR(isp->syscon))
2340 return PTR_ERR(isp->syscon);
da7f3843 2341
78c66fbc
LP		 2342 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
2343 &isp->syscon_offset);
2344 if (ret)
2345 return ret;
da7f3843 2346
78c66fbc
LP		 2347 ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
2348 if (ret < 0)
2349 return ret;
da7f3843 2350
448de7e7 2351 isp->autoidle = autoidle;
448de7e7
SA		 2352
2353 mutex_init(&isp->isp_mutex);
2354 spin_lock_init(&isp->stat_lock);
2355
2356 isp->dev = &pdev->dev;
448de7e7
SA		 2357 isp->ref_count = 0;
2358
224ddca0
RK		 2359 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2360 if (ret)
697cca21 2361 goto error;
448de7e7
SA		 2362
2363 platform_set_drvdata(pdev, isp);
2364
2365 /* Regulators */
3494bb05
SA		 2366 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2367 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
448de7e7 2368
d8658bca
LP		 2369 /* Clocks
2370 *
2371 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2372 * manually to read the revision before calling __omap3isp_get().
8644cdf9
SA		 2373 *
2374 * Start by mapping the ISP MMIO area, which is in two pieces.
2375 * The ISP IOMMU is in between. Map both now, and fill in the
2376 * ISP revision specific portions a little later in the
2377 * function.
d8658bca 2378 */
8644cdf9
SA		 2379 for (i = 0; i < 2; i++) {
2380 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2381
2382 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2383 isp->mmio_base[map_idx] =
2384 devm_ioremap_resource(isp->dev, mem);
2385 if (IS_ERR(isp->mmio_base[map_idx]))
2386 return PTR_ERR(isp->mmio_base[map_idx]);
2387 }
448de7e7
SA		 2388
2389 ret = isp_get_clocks(isp);
2390 if (ret < 0)
2391 goto error;
2392
d8658bca
LP		 2393 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2394 if (ret < 0)
2395 goto error;
2396
2397 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2398 dev_info(isp->dev, "Revision %d.%d found\n",
2399 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2400
2401 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2402
0bd0dbee
PST		 2403 if (__omap3isp_get(isp, false) == NULL) {
2404 ret = -ENODEV;
448de7e7 2405 goto error;
0bd0dbee 2406 }
448de7e7
SA		 2407
2408 ret = isp_reset(isp);
2409 if (ret < 0)
2410 goto error_isp;
2411
9b28ee3c
LP		 2412 ret = isp_xclk_init(isp);
2413 if (ret < 0)
2414 goto error_isp;
2415
448de7e7 2416 /* Memory resources */
448de7e7
SA		 2417 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2418 if (isp->revision == isp_res_maps[m].isp_rev)
2419 break;
2420
2421 if (m == ARRAY_SIZE(isp_res_maps)) {
2422 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2423 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2424 ret = -ENODEV;
2425 goto error_isp;
2426 }
2427
8644cdf9
SA		 2428 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2429 isp->mmio_base[i] =
2430 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2431
2432 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2433 isp->mmio_base[i] =
2434 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2435 + isp_res_maps[m].offset[i];
2436
2437 isp->mmio_hist_base_phys =
2438 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
448de7e7 2439
2a0a5472
LP		 2440 /* IOMMU */
2441 ret = isp_attach_iommu(isp);
2442 if (ret < 0) {
2443 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
f626b52d
OBC		 2444 goto error_isp;
2445 }
2446
448de7e7
SA		 2447 /* Interrupt */
2448 isp->irq_num = platform_get_irq(pdev, 0);
2449 if (isp->irq_num <= 0) {
2450 dev_err(isp->dev, "No IRQ resource\n");
2451 ret = -ENODEV;
2a0a5472 2452 goto error_iommu;
448de7e7
SA		 2453 }
2454
cf2b4cf6
LP		 2455 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2456 "OMAP3 ISP", isp)) {
448de7e7
SA		 2457 dev_err(isp->dev, "Unable to request IRQ\n");
2458 ret = -EINVAL;
2a0a5472 2459 goto error_iommu;
448de7e7
SA		 2460 }
2461
2462 /* Entities */
2463 ret = isp_initialize_modules(isp);
2464 if (ret < 0)
2a0a5472 2465 goto error_iommu;
448de7e7
SA		 2466
2467 ret = isp_register_entities(isp);
2468 if (ret < 0)
2469 goto error_modules;
2470
78c66fbc
LP		 2471 isp->notifier.bound = isp_subdev_notifier_bound;
2472 isp->notifier.complete = isp_subdev_notifier_complete;
5d479386 2473
78c66fbc
LP		 2474 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2475 if (ret)
2476 goto error_register_entities;
5d479386 2477
96d62ae2 2478 isp_core_init(isp, 1);
448de7e7
SA		 2479 omap3isp_put(isp);
2480
2481 return 0;
2482
5d479386
SA		 2483error_register_entities:
2484 isp_unregister_entities(isp);
448de7e7
SA		 2485error_modules:
2486 isp_cleanup_modules(isp);
2a0a5472
LP		 2487error_iommu:
2488 isp_detach_iommu(isp);
448de7e7 2489error_isp:
9b28ee3c 2490 isp_xclk_cleanup(isp);
2a0a5472 2491 __omap3isp_put(isp, false);
448de7e7 2492error:
ed33ac8e 2493 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2494
2495 return ret;
2496}
2497
2498static const struct dev_pm_ops omap3isp_pm_ops = {
2499 .prepare = isp_pm_prepare,
2500 .suspend = isp_pm_suspend,
2501 .resume = isp_pm_resume,
2502 .complete = isp_pm_complete,
2503};
2504
2505static struct platform_device_id omap3isp_id_table[] = {
2506 { "omap3isp", 0 },
2507 { },
2508};
2509MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2510
da7f3843
SA		 2511static const struct of_device_id omap3isp_of_table[] = {
2512 { .compatible = "ti,omap3-isp" },
2513 { },
2514};
2515
448de7e7
SA		 2516static struct platform_driver omap3isp_driver = {
2517 .probe = isp_probe,
4c62e976 2518 .remove = isp_remove,
448de7e7
SA		 2519 .id_table = omap3isp_id_table,
2520 .driver = {
448de7e7
SA		 2521 .name = "omap3isp",
2522 .pm = &omap3isp_pm_ops,
da7f3843 2523 .of_match_table = omap3isp_of_table,
448de7e7
SA		 2524 },
2525};
2526
1d6629b1 2527module_platform_driver(omap3isp_driver);
448de7e7
SA		 2528
2529MODULE_AUTHOR("Nokia Corporation");
2530MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2531MODULE_LICENSE("GPL");
64dc3c1a 2532MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git