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[thirdparty/kernel/stable.git] / drivers / media / platform / omap3isp / isp.c
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1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
448de7e7
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43 */
44
45#include <asm/cacheflush.h>
46
47#include <linux/clk.h>
9b28ee3c 48#include <linux/clkdev.h>
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49#include <linux/delay.h>
50#include <linux/device.h>
51#include <linux/dma-mapping.h>
52#include <linux/i2c.h>
53#include <linux/interrupt.h>
54#include <linux/module.h>
c8d35c84 55#include <linux/omap-iommu.h>
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56#include <linux/platform_device.h>
57#include <linux/regulator/consumer.h>
58#include <linux/slab.h>
59#include <linux/sched.h>
60#include <linux/vmalloc.h>
61
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62#include <asm/dma-iommu.h>
63
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64#include <media/v4l2-common.h>
65#include <media/v4l2-device.h>
66
67#include "isp.h"
68#include "ispreg.h"
69#include "ispccdc.h"
70#include "isppreview.h"
71#include "ispresizer.h"
72#include "ispcsi2.h"
73#include "ispccp2.h"
74#include "isph3a.h"
75#include "isphist.h"
76
77static unsigned int autoidle;
78module_param(autoidle, int, 0444);
79MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
80
81static void isp_save_ctx(struct isp_device *isp);
82
83static void isp_restore_ctx(struct isp_device *isp);
84
85static const struct isp_res_mapping isp_res_maps[] = {
86 {
87 .isp_rev = ISP_REVISION_2_0,
88 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
89 1 << OMAP3_ISP_IOMEM_CCP2 |
90 1 << OMAP3_ISP_IOMEM_CCDC |
91 1 << OMAP3_ISP_IOMEM_HIST |
92 1 << OMAP3_ISP_IOMEM_H3A |
93 1 << OMAP3_ISP_IOMEM_PREV |
94 1 << OMAP3_ISP_IOMEM_RESZ |
95 1 << OMAP3_ISP_IOMEM_SBL |
96 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
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97 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
98 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
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99 },
100 {
101 .isp_rev = ISP_REVISION_15_0,
102 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
103 1 << OMAP3_ISP_IOMEM_CCP2 |
104 1 << OMAP3_ISP_IOMEM_CCDC |
105 1 << OMAP3_ISP_IOMEM_HIST |
106 1 << OMAP3_ISP_IOMEM_H3A |
107 1 << OMAP3_ISP_IOMEM_PREV |
108 1 << OMAP3_ISP_IOMEM_RESZ |
109 1 << OMAP3_ISP_IOMEM_SBL |
110 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
111 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
112 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
113 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
114 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
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115 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
116 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
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117 },
118};
119
120/* Structure for saving/restoring ISP module registers */
121static struct isp_reg isp_reg_list[] = {
122 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
123 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
124 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
125 {0, ISP_TOK_TERM, 0}
126};
127
128/*
129 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
130 * @isp: OMAP3 ISP device
131 *
132 * In order to force posting of pending writes, we need to write and
133 * readback the same register, in this case the revision register.
134 *
135 * See this link for reference:
136 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
137 */
138void omap3isp_flush(struct isp_device *isp)
139{
140 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
141 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
142}
143
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144/* -----------------------------------------------------------------------------
145 * XCLK
146 */
147
148#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
149
150static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
151{
152 switch (xclk->id) {
153 case ISP_XCLK_A:
154 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
155 ISPTCTRL_CTRL_DIVA_MASK,
156 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
157 break;
158 case ISP_XCLK_B:
159 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
160 ISPTCTRL_CTRL_DIVB_MASK,
161 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
162 break;
163 }
164}
165
166static int isp_xclk_prepare(struct clk_hw *hw)
167{
168 struct isp_xclk *xclk = to_isp_xclk(hw);
169
170 omap3isp_get(xclk->isp);
171
172 return 0;
173}
174
175static void isp_xclk_unprepare(struct clk_hw *hw)
176{
177 struct isp_xclk *xclk = to_isp_xclk(hw);
178
179 omap3isp_put(xclk->isp);
180}
181
182static int isp_xclk_enable(struct clk_hw *hw)
183{
184 struct isp_xclk *xclk = to_isp_xclk(hw);
185 unsigned long flags;
186
187 spin_lock_irqsave(&xclk->lock, flags);
188 isp_xclk_update(xclk, xclk->divider);
189 xclk->enabled = true;
190 spin_unlock_irqrestore(&xclk->lock, flags);
191
192 return 0;
193}
194
195static void isp_xclk_disable(struct clk_hw *hw)
196{
197 struct isp_xclk *xclk = to_isp_xclk(hw);
198 unsigned long flags;
199
200 spin_lock_irqsave(&xclk->lock, flags);
201 isp_xclk_update(xclk, 0);
202 xclk->enabled = false;
203 spin_unlock_irqrestore(&xclk->lock, flags);
204}
205
206static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
207 unsigned long parent_rate)
208{
209 struct isp_xclk *xclk = to_isp_xclk(hw);
210
211 return parent_rate / xclk->divider;
212}
213
214static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
215{
216 u32 divider;
217
218 if (*rate >= parent_rate) {
219 *rate = parent_rate;
220 return ISPTCTRL_CTRL_DIV_BYPASS;
221 }
222
223 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
224 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
225 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
226
227 *rate = parent_rate / divider;
228 return divider;
229}
230
231static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
232 unsigned long *parent_rate)
233{
234 isp_xclk_calc_divider(&rate, *parent_rate);
235 return rate;
236}
237
238static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
239 unsigned long parent_rate)
240{
241 struct isp_xclk *xclk = to_isp_xclk(hw);
242 unsigned long flags;
243 u32 divider;
244
245 divider = isp_xclk_calc_divider(&rate, parent_rate);
246
247 spin_lock_irqsave(&xclk->lock, flags);
248
249 xclk->divider = divider;
250 if (xclk->enabled)
251 isp_xclk_update(xclk, divider);
252
253 spin_unlock_irqrestore(&xclk->lock, flags);
254
255 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
256 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
257 return 0;
258}
259
260static const struct clk_ops isp_xclk_ops = {
261 .prepare = isp_xclk_prepare,
262 .unprepare = isp_xclk_unprepare,
263 .enable = isp_xclk_enable,
264 .disable = isp_xclk_disable,
265 .recalc_rate = isp_xclk_recalc_rate,
266 .round_rate = isp_xclk_round_rate,
267 .set_rate = isp_xclk_set_rate,
268};
269
270static const char *isp_xclk_parent_name = "cam_mclk";
271
272static const struct clk_init_data isp_xclk_init_data = {
273 .name = "cam_xclk",
274 .ops = &isp_xclk_ops,
275 .parent_names = &isp_xclk_parent_name,
276 .num_parents = 1,
277};
278
279static int isp_xclk_init(struct isp_device *isp)
280{
281 struct isp_platform_data *pdata = isp->pdata;
282 struct clk_init_data init;
283 unsigned int i;
284
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285 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
286 isp->xclks[i].clk = ERR_PTR(-EINVAL);
287
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288 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
289 struct isp_xclk *xclk = &isp->xclks[i];
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290
291 xclk->isp = isp;
292 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
293 xclk->divider = 1;
294 spin_lock_init(&xclk->lock);
295
296 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
297 init.ops = &isp_xclk_ops;
298 init.parent_names = &isp_xclk_parent_name;
299 init.num_parents = 1;
300
301 xclk->hw.init = &init;
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302 /*
303 * The first argument is NULL in order to avoid circular
304 * reference, as this driver takes reference on the
305 * sensor subdevice modules and the sensors would take
306 * reference on this module through clk_get().
307 */
308 xclk->clk = clk_register(NULL, &xclk->hw);
309 if (IS_ERR(xclk->clk))
310 return PTR_ERR(xclk->clk);
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311
312 if (pdata->xclks[i].con_id == NULL &&
313 pdata->xclks[i].dev_id == NULL)
314 continue;
315
316 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
317 if (xclk->lookup == NULL)
318 return -ENOMEM;
319
320 xclk->lookup->con_id = pdata->xclks[i].con_id;
321 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
f8e2ff26 322 xclk->lookup->clk = xclk->clk;
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323
324 clkdev_add(xclk->lookup);
325 }
326
327 return 0;
328}
329
330static void isp_xclk_cleanup(struct isp_device *isp)
331{
332 unsigned int i;
333
334 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
335 struct isp_xclk *xclk = &isp->xclks[i];
336
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337 if (!IS_ERR(xclk->clk))
338 clk_unregister(xclk->clk);
339
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340 if (xclk->lookup)
341 clkdev_drop(xclk->lookup);
342 }
343}
344
345/* -----------------------------------------------------------------------------
346 * Interrupts
347 */
348
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349/*
350 * isp_enable_interrupts - Enable ISP interrupts.
351 * @isp: OMAP3 ISP device
352 */
353static void isp_enable_interrupts(struct isp_device *isp)
354{
355 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
356 | IRQ0ENABLE_CSIB_IRQ
357 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
358 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
359 | IRQ0ENABLE_CCDC_VD0_IRQ
360 | IRQ0ENABLE_CCDC_VD1_IRQ
361 | IRQ0ENABLE_HS_VS_IRQ
362 | IRQ0ENABLE_HIST_DONE_IRQ
363 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
364 | IRQ0ENABLE_H3A_AF_DONE_IRQ
365 | IRQ0ENABLE_PRV_DONE_IRQ
366 | IRQ0ENABLE_RSZ_DONE_IRQ;
367
368 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
369 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
370}
371
372/*
373 * isp_disable_interrupts - Disable ISP interrupts.
374 * @isp: OMAP3 ISP device
375 */
376static void isp_disable_interrupts(struct isp_device *isp)
377{
378 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
379}
380
448de7e7 381/*
96d62ae2 382 * isp_core_init - ISP core settings
448de7e7
SA
383 * @isp: OMAP3 ISP device
384 * @idle: Consider idle state.
385 *
25aeb418 386 * Set the power settings for the ISP and SBL bus and configure the HS/VS
96d62ae2
LP
387 * interrupt source.
388 *
389 * We need to configure the HS/VS interrupt source before interrupts get
390 * enabled, as the sensor might be free-running and the ISP default setting
391 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 392 */
96d62ae2 393static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA
394{
395 isp_reg_writel(isp,
396 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
397 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
398 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
399 ((isp->revision == ISP_REVISION_15_0) ?
400 ISP_SYSCONFIG_AUTOIDLE : 0),
401 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
402
96d62ae2
LP
403 isp_reg_writel(isp,
404 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
405 ISPCTRL_SYNC_DETECT_VSRISE,
406 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA
407}
408
409/*
410 * Configure the bridge and lane shifter. Valid inputs are
411 *
412 * CCDC_INPUT_PARALLEL: Parallel interface
413 * CCDC_INPUT_CSI2A: CSI2a receiver
414 * CCDC_INPUT_CCP2B: CCP2b receiver
415 * CCDC_INPUT_CSI2C: CSI2c receiver
416 *
417 * The bridge and lane shifter are configured according to the selected input
418 * and the ISP platform data.
419 */
420void omap3isp_configure_bridge(struct isp_device *isp,
421 enum ccdc_input_entity input,
c09af044 422 const struct isp_parallel_platform_data *pdata,
c51364ca 423 unsigned int shift, unsigned int bridge)
448de7e7
SA
424{
425 u32 ispctrl_val;
426
427 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
428 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
429 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
430 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
431 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 432 ispctrl_val |= bridge;
448de7e7
SA
433
434 switch (input) {
435 case CCDC_INPUT_PARALLEL:
436 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7 437 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
c09af044 438 shift += pdata->data_lane_shift * 2;
448de7e7
SA
439 break;
440
441 case CCDC_INPUT_CSI2A:
442 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
443 break;
444
445 case CCDC_INPUT_CCP2B:
446 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
447 break;
448
449 case CCDC_INPUT_CSI2C:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
451 break;
452
453 default:
454 return;
455 }
456
c09af044
MJ
457 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
458
448de7e7
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459 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
460}
461
448de7e7
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462void omap3isp_hist_dma_done(struct isp_device *isp)
463{
464 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
465 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
466 /* Histogram cannot be enabled in this frame anymore */
467 atomic_set(&isp->isp_hist.buf_err, 1);
468 dev_dbg(isp->dev, "hist: Out of synchronization with "
469 "CCDC. Ignoring next buffer.\n");
470 }
471}
472
473static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
474{
475 static const char *name[] = {
476 "CSIA_IRQ",
477 "res1",
478 "res2",
479 "CSIB_LCM_IRQ",
480 "CSIB_IRQ",
481 "res5",
482 "res6",
483 "res7",
484 "CCDC_VD0_IRQ",
485 "CCDC_VD1_IRQ",
486 "CCDC_VD2_IRQ",
487 "CCDC_ERR_IRQ",
488 "H3A_AF_DONE_IRQ",
489 "H3A_AWB_DONE_IRQ",
490 "res14",
491 "res15",
492 "HIST_DONE_IRQ",
493 "CCDC_LSC_DONE",
494 "CCDC_LSC_PREFETCH_COMPLETED",
495 "CCDC_LSC_PREFETCH_ERROR",
496 "PRV_DONE_IRQ",
497 "CBUFF_IRQ",
498 "res22",
499 "res23",
500 "RSZ_DONE_IRQ",
501 "OVF_IRQ",
502 "res26",
503 "res27",
504 "MMU_ERR_IRQ",
505 "OCP_ERR_IRQ",
506 "SEC_ERR_IRQ",
507 "HS_VS_IRQ",
508 };
509 int i;
510
6c20c635 511 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA
512
513 for (i = 0; i < ARRAY_SIZE(name); i++) {
514 if ((1 << i) & irqstatus)
515 printk(KERN_CONT "%s ", name[i]);
516 }
517 printk(KERN_CONT "\n");
518}
519
520static void isp_isr_sbl(struct isp_device *isp)
521{
522 struct device *dev = isp->dev;
875e2e3e 523 struct isp_pipeline *pipe;
448de7e7
SA
524 u32 sbl_pcr;
525
526 /*
527 * Handle shared buffer logic overflows for video buffers.
528 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
529 */
530 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
531 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
532 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
533
534 if (sbl_pcr)
535 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
536
875e2e3e
LP
537 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
538 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
539 if (pipe != NULL)
540 pipe->error = true;
541 }
542
543 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
544 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
545 if (pipe != NULL)
546 pipe->error = true;
547 }
548
549 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
550 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
551 if (pipe != NULL)
552 pipe->error = true;
448de7e7
SA
553 }
554
555 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP
556 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
557 if (pipe != NULL)
558 pipe->error = true;
448de7e7
SA
559 }
560
561 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
562 | ISPSBL_PCR_RSZ2_WBL_OVF
563 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP
564 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
565 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
566 if (pipe != NULL)
567 pipe->error = true;
568 }
448de7e7
SA
569
570 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
571 omap3isp_stat_sbl_overflow(&isp->isp_af);
572
573 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
574 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
575}
576
577/*
578 * isp_isr - Interrupt Service Routine for Camera ISP module.
579 * @irq: Not used currently.
580 * @_isp: Pointer to the OMAP3 ISP device
581 *
582 * Handles the corresponding callback if plugged in.
448de7e7
SA
583 */
584static irqreturn_t isp_isr(int irq, void *_isp)
585{
586 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
587 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
588 IRQ0STATUS_CCDC_VD0_IRQ |
589 IRQ0STATUS_CCDC_VD1_IRQ |
590 IRQ0STATUS_HS_VS_IRQ;
591 struct isp_device *isp = _isp;
592 u32 irqstatus;
448de7e7
SA
593
594 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
595 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
596
597 isp_isr_sbl(isp);
598
875e2e3e
LP
599 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
600 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 601
875e2e3e
LP
602 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
603 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA
604
605 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
606 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
607 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
608 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
609 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
610 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
611 omap3isp_stat_isr_frame_sync(&isp->isp_af);
612 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
613 }
614
615 if (irqstatus & ccdc_events)
616 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
617
618 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
619 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
620 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
621 omap3isp_preview_isr(&isp->isp_prev);
622 }
623
624 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
625 omap3isp_resizer_isr(&isp->isp_res);
626
627 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
628 omap3isp_stat_isr(&isp->isp_aewb);
629
630 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
631 omap3isp_stat_isr(&isp->isp_af);
632
633 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
634 omap3isp_stat_isr(&isp->isp_hist);
635
636 omap3isp_flush(isp);
637
638#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
639 isp_isr_dbg(isp, irqstatus);
640#endif
641
642 return IRQ_HANDLED;
643}
644
645/* -----------------------------------------------------------------------------
646 * Pipeline power management
647 *
648 * Entities must be powered up when part of a pipeline that contains at least
649 * one open video device node.
650 *
651 * To achieve this use the entity use_count field to track the number of users.
652 * For entities corresponding to video device nodes the use_count field stores
653 * the users count of the node. For entities corresponding to subdevs the
654 * use_count field stores the total number of users of all video device nodes
655 * in the pipeline.
656 *
657 * The omap3isp_pipeline_pm_use() function must be called in the open() and
658 * close() handlers of video device nodes. It increments or decrements the use
659 * count of all subdev entities in the pipeline.
660 *
661 * To react to link management on powered pipelines, the link setup notification
662 * callback updates the use count of all entities in the source and sink sides
663 * of the link.
664 */
665
666/*
667 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
668 * @entity: The entity
669 *
670 * Return the total number of users of all video device nodes in the pipeline.
671 */
672static int isp_pipeline_pm_use_count(struct media_entity *entity)
673{
674 struct media_entity_graph graph;
675 int use = 0;
676
677 media_entity_graph_walk_start(&graph, entity);
678
679 while ((entity = media_entity_graph_walk_next(&graph))) {
680 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
681 use += entity->use_count;
682 }
683
684 return use;
685}
686
687/*
688 * isp_pipeline_pm_power_one - Apply power change to an entity
689 * @entity: The entity
690 * @change: Use count change
691 *
692 * Change the entity use count by @change. If the entity is a subdev update its
693 * power state by calling the core::s_power operation when the use count goes
694 * from 0 to != 0 or from != 0 to 0.
695 *
696 * Return 0 on success or a negative error code on failure.
697 */
698static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
699{
700 struct v4l2_subdev *subdev;
701 int ret;
702
703 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
704 ? media_entity_to_v4l2_subdev(entity) : NULL;
705
706 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
707 ret = v4l2_subdev_call(subdev, core, s_power, 1);
708 if (ret < 0 && ret != -ENOIOCTLCMD)
709 return ret;
710 }
711
712 entity->use_count += change;
713 WARN_ON(entity->use_count < 0);
714
715 if (entity->use_count == 0 && change < 0 && subdev != NULL)
716 v4l2_subdev_call(subdev, core, s_power, 0);
717
718 return 0;
719}
720
721/*
722 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
723 * @entity: The entity
724 * @change: Use count change
725 *
726 * Walk the pipeline to update the use count and the power state of all non-node
727 * entities.
728 *
729 * Return 0 on success or a negative error code on failure.
730 */
731static int isp_pipeline_pm_power(struct media_entity *entity, int change)
732{
733 struct media_entity_graph graph;
734 struct media_entity *first = entity;
735 int ret = 0;
736
737 if (!change)
738 return 0;
739
740 media_entity_graph_walk_start(&graph, entity);
741
742 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
743 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
744 ret = isp_pipeline_pm_power_one(entity, change);
745
746 if (!ret)
747 return 0;
748
749 media_entity_graph_walk_start(&graph, first);
750
751 while ((first = media_entity_graph_walk_next(&graph))
752 && first != entity)
753 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
754 isp_pipeline_pm_power_one(first, -change);
755
756 return ret;
757}
758
759/*
760 * omap3isp_pipeline_pm_use - Update the use count of an entity
761 * @entity: The entity
762 * @use: Use (1) or stop using (0) the entity
763 *
764 * Update the use count of all entities in the pipeline and power entities on or
765 * off accordingly.
766 *
767 * Return 0 on success or a negative error code on failure. Powering entities
768 * off is assumed to never fail. No failure can occur when the use parameter is
769 * set to 0.
770 */
771int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
772{
773 int change = use ? 1 : -1;
774 int ret;
775
776 mutex_lock(&entity->parent->graph_mutex);
777
778 /* Apply use count to node. */
779 entity->use_count += change;
780 WARN_ON(entity->use_count < 0);
781
782 /* Apply power change to connected non-nodes. */
783 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP
784 if (ret < 0)
785 entity->use_count -= change;
448de7e7
SA
786
787 mutex_unlock(&entity->parent->graph_mutex);
788
789 return ret;
790}
791
792/*
793 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 794 * @link: The link
448de7e7 795 * @flags: New link flags that will be applied
813f5c0a 796 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA
797 *
798 * React to link management on powered pipelines by updating the use count of
799 * all entities in the source and sink sides of the link. Entities are powered
800 * on or off accordingly.
801 *
802 * Return 0 on success or a negative error code on failure. Powering entities
803 * off is assumed to never fail. This function will not fail for disconnection
804 * events.
805 */
813f5c0a
SN
806static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
807 unsigned int notification)
448de7e7 808{
813f5c0a
SN
809 struct media_entity *source = link->source->entity;
810 struct media_entity *sink = link->sink->entity;
811 int source_use = isp_pipeline_pm_use_count(source);
812 int sink_use = isp_pipeline_pm_use_count(sink);
448de7e7
SA
813 int ret;
814
813f5c0a
SN
815 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
816 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 817 /* Powering off entities is assumed to never fail. */
813f5c0a
SN
818 isp_pipeline_pm_power(source, -sink_use);
819 isp_pipeline_pm_power(sink, -source_use);
448de7e7
SA
820 return 0;
821 }
822
813f5c0a
SN
823 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
824 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 825
813f5c0a
SN
826 ret = isp_pipeline_pm_power(source, sink_use);
827 if (ret < 0)
828 return ret;
448de7e7 829
813f5c0a
SN
830 ret = isp_pipeline_pm_power(sink, source_use);
831 if (ret < 0)
832 isp_pipeline_pm_power(source, -sink_use);
833
834 return ret;
835 }
836
837 return 0;
448de7e7
SA
838}
839
840/* -----------------------------------------------------------------------------
841 * Pipeline stream management
842 */
843
844/*
845 * isp_pipeline_enable - Enable streaming on a pipeline
846 * @pipe: ISP pipeline
847 * @mode: Stream mode (single shot or continuous)
848 *
849 * Walk the entities chain starting at the pipeline output video node and start
850 * all modules in the chain in the given mode.
851 *
25985edc 852 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA
853 * operation otherwise.
854 */
855static int isp_pipeline_enable(struct isp_pipeline *pipe,
856 enum isp_pipeline_stream_state mode)
857{
858 struct isp_device *isp = pipe->output->isp;
859 struct media_entity *entity;
860 struct media_pad *pad;
861 struct v4l2_subdev *subdev;
862 unsigned long flags;
c62e2a19 863 int ret;
448de7e7 864
112eee0c
LP
865 /* Refuse to start streaming if an entity included in the pipeline has
866 * crashed. This check must be performed before the loop below to avoid
867 * starting entities if the pipeline won't start anyway (those entities
868 * would then likely fail to stop, making the problem worse).
1567bb7d 869 */
112eee0c 870 if (pipe->entities & isp->crashed)
1567bb7d
LP
871 return -EIO;
872
448de7e7
SA
873 spin_lock_irqsave(&pipe->lock, flags);
874 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
875 spin_unlock_irqrestore(&pipe->lock, flags);
876
877 pipe->do_propagation = false;
878
879 entity = &pipe->output->video.entity;
880 while (1) {
881 pad = &entity->pads[0];
882 if (!(pad->flags & MEDIA_PAD_FL_SINK))
883 break;
884
1bddf1b3 885 pad = media_entity_remote_pad(pad);
448de7e7
SA
886 if (pad == NULL ||
887 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
888 break;
889
890 entity = pad->entity;
891 subdev = media_entity_to_v4l2_subdev(entity);
892
893 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
894 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 895 return ret;
448de7e7
SA
896
897 if (subdev == &isp->isp_ccdc.subdev) {
898 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
899 s_stream, mode);
900 v4l2_subdev_call(&isp->isp_af.subdev, video,
901 s_stream, mode);
902 v4l2_subdev_call(&isp->isp_hist.subdev, video,
903 s_stream, mode);
904 pipe->do_propagation = true;
905 }
906 }
907
c62e2a19 908 return 0;
448de7e7
SA
909}
910
911static int isp_pipeline_wait_resizer(struct isp_device *isp)
912{
913 return omap3isp_resizer_busy(&isp->isp_res);
914}
915
916static int isp_pipeline_wait_preview(struct isp_device *isp)
917{
918 return omap3isp_preview_busy(&isp->isp_prev);
919}
920
921static int isp_pipeline_wait_ccdc(struct isp_device *isp)
922{
923 return omap3isp_stat_busy(&isp->isp_af)
924 || omap3isp_stat_busy(&isp->isp_aewb)
925 || omap3isp_stat_busy(&isp->isp_hist)
926 || omap3isp_ccdc_busy(&isp->isp_ccdc);
927}
928
929#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
930
931static int isp_pipeline_wait(struct isp_device *isp,
932 int(*busy)(struct isp_device *isp))
933{
934 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
935
936 while (!time_after(jiffies, timeout)) {
937 if (!busy(isp))
938 return 0;
939 }
940
941 return 1;
942}
943
944/*
945 * isp_pipeline_disable - Disable streaming on a pipeline
946 * @pipe: ISP pipeline
947 *
948 * Walk the entities chain starting at the pipeline output video node and stop
949 * all modules in the chain. Wait synchronously for the modules to be stopped if
950 * necessary.
951 *
952 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
953 * can't be stopped (in which case a software reset of the ISP is probably
954 * necessary).
955 */
956static int isp_pipeline_disable(struct isp_pipeline *pipe)
957{
958 struct isp_device *isp = pipe->output->isp;
959 struct media_entity *entity;
960 struct media_pad *pad;
961 struct v4l2_subdev *subdev;
962 int failure = 0;
963 int ret;
964
965 /*
966 * We need to stop all the modules after CCDC first or they'll
967 * never stop since they may not get a full frame from CCDC.
968 */
969 entity = &pipe->output->video.entity;
970 while (1) {
971 pad = &entity->pads[0];
972 if (!(pad->flags & MEDIA_PAD_FL_SINK))
973 break;
974
1bddf1b3 975 pad = media_entity_remote_pad(pad);
448de7e7
SA
976 if (pad == NULL ||
977 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
978 break;
979
980 entity = pad->entity;
981 subdev = media_entity_to_v4l2_subdev(entity);
982
983 if (subdev == &isp->isp_ccdc.subdev) {
984 v4l2_subdev_call(&isp->isp_aewb.subdev,
985 video, s_stream, 0);
986 v4l2_subdev_call(&isp->isp_af.subdev,
987 video, s_stream, 0);
988 v4l2_subdev_call(&isp->isp_hist.subdev,
989 video, s_stream, 0);
990 }
991
eb228e89 992 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
448de7e7
SA
993
994 if (subdev == &isp->isp_res.subdev)
eb228e89 995 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
448de7e7 996 else if (subdev == &isp->isp_prev.subdev)
eb228e89 997 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
448de7e7 998 else if (subdev == &isp->isp_ccdc.subdev)
eb228e89 999 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
448de7e7 1000
112eee0c
LP
1001 /* Handle stop failures. An entity that fails to stop can
1002 * usually just be restarted. Flag the stop failure nonetheless
1003 * to trigger an ISP reset the next time the device is released,
1004 * just in case.
1005 *
1006 * The preview engine is a special case. A failure to stop can
1007 * mean a hardware crash. When that happens the preview engine
1008 * won't respond to read/write operations on the L4 bus anymore,
1009 * resulting in a bus fault and a kernel oops next time it gets
1010 * accessed. Mark it as crashed to prevent pipelines including
1011 * it from being started.
1012 */
448de7e7
SA
1013 if (ret) {
1014 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
112eee0c
LP
1015 isp->stop_failure = true;
1016 if (subdev == &isp->isp_prev.subdev)
1017 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA
1018 failure = -ETIMEDOUT;
1019 }
1020 }
1021
1022 return failure;
1023}
1024
1025/*
1026 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1027 * @pipe: ISP pipeline
1028 * @state: Stream state (stopped, single shot or continuous)
1029 *
1030 * Set the pipeline to the given stream state. Pipelines can be started in
1031 * single-shot or continuous mode.
1032 *
25985edc 1033 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP
1034 * operation otherwise. The pipeline state is not updated when the operation
1035 * fails, except when stopping the pipeline.
448de7e7
SA
1036 */
1037int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1038 enum isp_pipeline_stream_state state)
1039{
1040 int ret;
1041
1042 if (state == ISP_PIPELINE_STREAM_STOPPED)
1043 ret = isp_pipeline_disable(pipe);
1044 else
1045 ret = isp_pipeline_enable(pipe, state);
994d5375
LP
1046
1047 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1048 pipe->stream_state = state;
448de7e7
SA
1049
1050 return ret;
1051}
1052
661112cb
LP
1053/*
1054 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1055 * @pipe: ISP pipeline
1056 *
1057 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1058 * erroneous and makes sure no new buffer can be queued. This function is called
1059 * when a fatal error that prevents any further operation on the pipeline
1060 * occurs.
1061 */
1062void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1063{
1064 if (pipe->input)
1065 omap3isp_video_cancel_stream(pipe->input);
1066 if (pipe->output)
1067 omap3isp_video_cancel_stream(pipe->output);
1068}
1069
448de7e7
SA
1070/*
1071 * isp_pipeline_resume - Resume streaming on a pipeline
1072 * @pipe: ISP pipeline
1073 *
1074 * Resume video output and input and re-enable pipeline.
1075 */
1076static void isp_pipeline_resume(struct isp_pipeline *pipe)
1077{
1078 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1079
1080 omap3isp_video_resume(pipe->output, !singleshot);
1081 if (singleshot)
1082 omap3isp_video_resume(pipe->input, 0);
1083 isp_pipeline_enable(pipe, pipe->stream_state);
1084}
1085
1086/*
1087 * isp_pipeline_suspend - Suspend streaming on a pipeline
1088 * @pipe: ISP pipeline
1089 *
1090 * Suspend pipeline.
1091 */
1092static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1093{
1094 isp_pipeline_disable(pipe);
1095}
1096
1097/*
1098 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1099 * video node
1100 * @me: ISP module's media entity
1101 *
1102 * Returns 1 if the entity has an enabled link to the output video node or 0
1103 * otherwise. It's true only while pipeline can have no more than one output
1104 * node.
1105 */
1106static int isp_pipeline_is_last(struct media_entity *me)
1107{
1108 struct isp_pipeline *pipe;
1109 struct media_pad *pad;
1110
1111 if (!me->pipe)
1112 return 0;
1113 pipe = to_isp_pipeline(me);
1114 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1115 return 0;
1bddf1b3 1116 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA
1117 return pad->entity == me;
1118}
1119
1120/*
1121 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1122 * @me: ISP module's media entity
1123 *
1124 * Suspend the whole pipeline if module's entity has an enabled link to the
1125 * output video node. It works only while pipeline can have no more than one
1126 * output node.
1127 */
1128static void isp_suspend_module_pipeline(struct media_entity *me)
1129{
1130 if (isp_pipeline_is_last(me))
1131 isp_pipeline_suspend(to_isp_pipeline(me));
1132}
1133
1134/*
1135 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1136 * @me: ISP module's media entity
1137 *
1138 * Resume the whole pipeline if module's entity has an enabled link to the
1139 * output video node. It works only while pipeline can have no more than one
1140 * output node.
1141 */
1142static void isp_resume_module_pipeline(struct media_entity *me)
1143{
1144 if (isp_pipeline_is_last(me))
1145 isp_pipeline_resume(to_isp_pipeline(me));
1146}
1147
1148/*
1149 * isp_suspend_modules - Suspend ISP submodules.
1150 * @isp: OMAP3 ISP device
1151 *
1152 * Returns 0 if suspend left in idle state all the submodules properly,
1153 * or returns 1 if a general Reset is required to suspend the submodules.
1154 */
1155static int isp_suspend_modules(struct isp_device *isp)
1156{
1157 unsigned long timeout;
1158
1159 omap3isp_stat_suspend(&isp->isp_aewb);
1160 omap3isp_stat_suspend(&isp->isp_af);
1161 omap3isp_stat_suspend(&isp->isp_hist);
1162 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1163 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1164 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1165 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1166 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1167
1168 timeout = jiffies + ISP_STOP_TIMEOUT;
1169 while (omap3isp_stat_busy(&isp->isp_af)
1170 || omap3isp_stat_busy(&isp->isp_aewb)
1171 || omap3isp_stat_busy(&isp->isp_hist)
1172 || omap3isp_preview_busy(&isp->isp_prev)
1173 || omap3isp_resizer_busy(&isp->isp_res)
1174 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1175 if (time_after(jiffies, timeout)) {
1176 dev_info(isp->dev, "can't stop modules.\n");
1177 return 1;
1178 }
1179 msleep(1);
1180 }
1181
1182 return 0;
1183}
1184
1185/*
1186 * isp_resume_modules - Resume ISP submodules.
1187 * @isp: OMAP3 ISP device
1188 */
1189static void isp_resume_modules(struct isp_device *isp)
1190{
1191 omap3isp_stat_resume(&isp->isp_aewb);
1192 omap3isp_stat_resume(&isp->isp_af);
1193 omap3isp_stat_resume(&isp->isp_hist);
1194 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1195 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1196 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1197 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1198 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1199}
1200
1201/*
1202 * isp_reset - Reset ISP with a timeout wait for idle.
1203 * @isp: OMAP3 ISP device
1204 */
1205static int isp_reset(struct isp_device *isp)
1206{
1207 unsigned long timeout = 0;
1208
1209 isp_reg_writel(isp,
1210 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1211 | ISP_SYSCONFIG_SOFTRESET,
1212 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1213 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1214 ISP_SYSSTATUS) & 0x1)) {
1215 if (timeout++ > 10000) {
1216 dev_alert(isp->dev, "cannot reset ISP\n");
1217 return -ETIMEDOUT;
1218 }
1219 udelay(1);
1220 }
1221
112eee0c 1222 isp->stop_failure = false;
1567bb7d 1223 isp->crashed = 0;
448de7e7
SA
1224 return 0;
1225}
1226
1227/*
1228 * isp_save_context - Saves the values of the ISP module registers.
1229 * @isp: OMAP3 ISP device
1230 * @reg_list: Structure containing pairs of register address and value to
1231 * modify on OMAP.
1232 */
1233static void
1234isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1235{
1236 struct isp_reg *next = reg_list;
1237
1238 for (; next->reg != ISP_TOK_TERM; next++)
1239 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1240}
1241
1242/*
1243 * isp_restore_context - Restores the values of the ISP module registers.
1244 * @isp: OMAP3 ISP device
1245 * @reg_list: Structure containing pairs of register address and value to
1246 * modify on OMAP.
1247 */
1248static void
1249isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1250{
1251 struct isp_reg *next = reg_list;
1252
1253 for (; next->reg != ISP_TOK_TERM; next++)
1254 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1255}
1256
1257/*
1258 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1259 * @isp: OMAP3 ISP device
1260 *
1261 * Routine for saving the context of each module in the ISP.
1262 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1263 */
1264static void isp_save_ctx(struct isp_device *isp)
1265{
1266 isp_save_context(isp, isp_reg_list);
fabdbca8 1267 omap_iommu_save_ctx(isp->dev);
448de7e7
SA
1268}
1269
1270/*
1271 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1272 * @isp: OMAP3 ISP device
1273 *
1274 * Routine for restoring the context of each module in the ISP.
1275 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1276 */
1277static void isp_restore_ctx(struct isp_device *isp)
1278{
1279 isp_restore_context(isp, isp_reg_list);
fabdbca8 1280 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA
1281 omap3isp_ccdc_restore_context(isp);
1282 omap3isp_preview_restore_context(isp);
1283}
1284
1285/* -----------------------------------------------------------------------------
1286 * SBL resources management
1287 */
1288#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1289 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1290 OMAP3_ISP_SBL_PREVIEW_READ | \
1291 OMAP3_ISP_SBL_RESIZER_READ)
1292#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1293 OMAP3_ISP_SBL_CSI2A_WRITE | \
1294 OMAP3_ISP_SBL_CSI2C_WRITE | \
1295 OMAP3_ISP_SBL_CCDC_WRITE | \
1296 OMAP3_ISP_SBL_PREVIEW_WRITE)
1297
1298void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1299{
1300 u32 sbl = 0;
1301
1302 isp->sbl_resources |= res;
1303
1304 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1305 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1306
1307 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1308 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1309
1310 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1311 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1312
1313 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1314 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1315
1316 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1317 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1318
1319 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1320 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1321
1322 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1323}
1324
1325void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1326{
1327 u32 sbl = 0;
1328
1329 isp->sbl_resources &= ~res;
1330
1331 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1332 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1333
1334 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1335 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1336
1337 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1338 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1339
1340 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1341 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1342
1343 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1344 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1345
1346 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1347 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1348
1349 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1350}
1351
1352/*
1353 * isp_module_sync_idle - Helper to sync module with its idle state
1354 * @me: ISP submodule's media entity
1355 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1356 * @stopping: flag which tells module wants to stop
1357 *
1358 * This function checks if ISP submodule needs to wait for next interrupt. If
1359 * yes, makes the caller to sleep while waiting for such event.
1360 */
1361int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1362 atomic_t *stopping)
1363{
1364 struct isp_pipeline *pipe = to_isp_pipeline(me);
1365
1366 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1367 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1368 !isp_pipeline_ready(pipe)))
1369 return 0;
1370
1371 /*
1372 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1373 * scenario. We'll call it here to avoid race conditions.
1374 */
1375 atomic_set(stopping, 1);
1376 smp_mb();
1377
1378 /*
1379 * If module is the last one, it's writing to memory. In this case,
1380 * it's necessary to check if the module is already paused due to
1381 * DMA queue underrun or if it has to wait for next interrupt to be
1382 * idle.
1383 * If it isn't the last one, the function won't sleep but *stopping
1384 * will still be set to warn next submodule caller's interrupt the
1385 * module wants to be idle.
1386 */
1387 if (isp_pipeline_is_last(me)) {
1388 struct isp_video *video = pipe->output;
1389 unsigned long flags;
e8feb876 1390 spin_lock_irqsave(&video->irqlock, flags);
448de7e7 1391 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
e8feb876 1392 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA
1393 atomic_set(stopping, 0);
1394 smp_mb();
1395 return 0;
1396 }
e8feb876 1397 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA
1398 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1399 msecs_to_jiffies(1000))) {
1400 atomic_set(stopping, 0);
1401 smp_mb();
1402 return -ETIMEDOUT;
1403 }
1404 }
1405
1406 return 0;
1407}
1408
1409/*
1e9c4d49 1410 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
448de7e7
SA
1411 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1412 * @stopping: flag which tells module wants to stop
1413 *
1414 * This function checks if ISP submodule was stopping. In case of yes, it
1415 * notices the caller by setting stopping to 0 and waking up the wait queue.
1416 * Returns 1 if it was stopping or 0 otherwise.
1417 */
1418int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1419 atomic_t *stopping)
1420{
1421 if (atomic_cmpxchg(stopping, 1, 0)) {
1422 wake_up(wait);
1423 return 1;
1424 }
1425
1426 return 0;
1427}
1428
1429/* --------------------------------------------------------------------------
1430 * Clock management
1431 */
1432
1433#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1434 ISPCTRL_HIST_CLK_EN | \
1435 ISPCTRL_RSZ_CLK_EN | \
1436 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1437 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1438
1439static void __isp_subclk_update(struct isp_device *isp)
1440{
1441 u32 clk = 0;
1442
be9a1b98
LP
1443 /* AEWB and AF share the same clock. */
1444 if (isp->subclk_resources &
1445 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA
1446 clk |= ISPCTRL_H3A_CLK_EN;
1447
1448 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1449 clk |= ISPCTRL_HIST_CLK_EN;
1450
1451 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1452 clk |= ISPCTRL_RSZ_CLK_EN;
1453
1454 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1455 * RAM as well.
448de7e7
SA
1456 */
1457 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1458 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1459
1460 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1461 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1462
1463 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1464 ISPCTRL_CLKS_MASK, clk);
1465}
1466
1467void omap3isp_subclk_enable(struct isp_device *isp,
1468 enum isp_subclk_resource res)
1469{
1470 isp->subclk_resources |= res;
1471
1472 __isp_subclk_update(isp);
1473}
1474
1475void omap3isp_subclk_disable(struct isp_device *isp,
1476 enum isp_subclk_resource res)
1477{
1478 isp->subclk_resources &= ~res;
1479
1480 __isp_subclk_update(isp);
1481}
1482
1483/*
1484 * isp_enable_clocks - Enable ISP clocks
1485 * @isp: OMAP3 ISP device
1486 *
b057c3c3
LP
1487 * Return 0 if successful, or clk_prepare_enable return value if any of them
1488 * fails.
448de7e7
SA
1489 */
1490static int isp_enable_clocks(struct isp_device *isp)
1491{
1492 int r;
1493 unsigned long rate;
448de7e7 1494
b057c3c3 1495 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1496 if (r) {
b057c3c3 1497 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA
1498 goto out_clk_enable_ick;
1499 }
6d1aa02f 1500 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1501 if (r) {
6d1aa02f 1502 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA
1503 goto out_clk_enable_mclk;
1504 }
b057c3c3 1505 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1506 if (r) {
b057c3c3 1507 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA
1508 goto out_clk_enable_mclk;
1509 }
1510 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1511 if (rate != CM_CAM_MCLK_HZ)
1512 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1513 " expected : %d\n"
1514 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1515 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1516 if (r) {
b057c3c3 1517 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA
1518 goto out_clk_enable_csi2_fclk;
1519 }
1520 return 0;
1521
1522out_clk_enable_csi2_fclk:
b057c3c3 1523 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1524out_clk_enable_mclk:
b057c3c3 1525 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA
1526out_clk_enable_ick:
1527 return r;
1528}
1529
1530/*
1531 * isp_disable_clocks - Disable ISP clocks
1532 * @isp: OMAP3 ISP device
1533 */
1534static void isp_disable_clocks(struct isp_device *isp)
1535{
b057c3c3
LP
1536 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1537 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1538 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA
1539}
1540
1541static const char *isp_clocks[] = {
1542 "cam_ick",
1543 "cam_mclk",
448de7e7
SA
1544 "csi2_96m_fck",
1545 "l3_ick",
1546};
1547
448de7e7
SA
1548static int isp_get_clocks(struct isp_device *isp)
1549{
1550 struct clk *clk;
1551 unsigned int i;
1552
1553 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1554 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA
1555 if (IS_ERR(clk)) {
1556 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA
1557 return PTR_ERR(clk);
1558 }
1559
1560 isp->clock[i] = clk;
1561 }
1562
1563 return 0;
1564}
1565
1566/*
1567 * omap3isp_get - Acquire the ISP resource.
1568 *
1569 * Initializes the clocks for the first acquire.
1570 *
1571 * Increment the reference count on the ISP. If the first reference is taken,
1572 * enable clocks and power-up all submodules.
1573 *
25985edc 1574 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1575 */
96d62ae2 1576static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA
1577{
1578 struct isp_device *__isp = isp;
1579
1580 if (isp == NULL)
1581 return NULL;
1582
1583 mutex_lock(&isp->isp_mutex);
1584 if (isp->ref_count > 0)
1585 goto out;
1586
1587 if (isp_enable_clocks(isp) < 0) {
1588 __isp = NULL;
1589 goto out;
1590 }
1591
1592 /* We don't want to restore context before saving it! */
1593 if (isp->has_context)
1594 isp_restore_ctx(isp);
448de7e7 1595
96d62ae2
LP
1596 if (irq)
1597 isp_enable_interrupts(isp);
448de7e7
SA
1598
1599out:
1600 if (__isp != NULL)
1601 isp->ref_count++;
1602 mutex_unlock(&isp->isp_mutex);
1603
1604 return __isp;
1605}
1606
96d62ae2
LP
1607struct isp_device *omap3isp_get(struct isp_device *isp)
1608{
1609 return __omap3isp_get(isp, true);
1610}
1611
448de7e7
SA
1612/*
1613 * omap3isp_put - Release the ISP
1614 *
1615 * Decrement the reference count on the ISP. If the last reference is released,
1616 * power-down all submodules, disable clocks and free temporary buffers.
1617 */
2a0a5472 1618static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
448de7e7
SA
1619{
1620 if (isp == NULL)
1621 return;
1622
1623 mutex_lock(&isp->isp_mutex);
1624 BUG_ON(isp->ref_count == 0);
1625 if (--isp->ref_count == 0) {
1626 isp_disable_interrupts(isp);
2a0a5472 1627 if (save_ctx) {
a32f2f90 1628 isp_save_ctx(isp);
96d62ae2
LP
1629 isp->has_context = 1;
1630 }
1567bb7d
LP
1631 /* Reset the ISP if an entity has failed to stop. This is the
1632 * only way to recover from such conditions.
1633 */
112eee0c 1634 if (isp->crashed || isp->stop_failure)
994d5375 1635 isp_reset(isp);
448de7e7
SA
1636 isp_disable_clocks(isp);
1637 }
1638 mutex_unlock(&isp->isp_mutex);
1639}
1640
2a0a5472
LP
1641void omap3isp_put(struct isp_device *isp)
1642{
1643 __omap3isp_put(isp, true);
1644}
1645
448de7e7
SA
1646/* --------------------------------------------------------------------------
1647 * Platform device driver
1648 */
1649
1650/*
1651 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1652 * @isp: OMAP3 ISP device
1653 */
1654#define ISP_PRINT_REGISTER(isp, name)\
1655 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1656 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1657#define SBL_PRINT_REGISTER(isp, name)\
1658 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1659 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1660
1661void omap3isp_print_status(struct isp_device *isp)
1662{
1663 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1664
1665 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1666 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1667 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1668 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1669 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1670 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1671 ISP_PRINT_REGISTER(isp, CTRL);
1672 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1673 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1674 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1675 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1676 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1677 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1678 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1679 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1680
1681 SBL_PRINT_REGISTER(isp, PCR);
1682 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1683
1684 dev_dbg(isp->dev, "--------------------------------------------\n");
1685}
1686
1687#ifdef CONFIG_PM
1688
1689/*
1690 * Power management support.
1691 *
1692 * As the ISP can't properly handle an input video stream interruption on a non
1693 * frame boundary, the ISP pipelines need to be stopped before sensors get
1694 * suspended. However, as suspending the sensors can require a running clock,
1695 * which can be provided by the ISP, the ISP can't be completely suspended
1696 * before the sensor.
1697 *
1698 * To solve this problem power management support is split into prepare/complete
1699 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1700 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1701 * resume(), and the the pipelines are restarted in complete().
1702 *
39c1cb2b 1703 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
448de7e7
SA
1704 * yet.
1705 */
1706static int isp_pm_prepare(struct device *dev)
1707{
1708 struct isp_device *isp = dev_get_drvdata(dev);
1709 int reset;
1710
1711 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1712
1713 if (isp->ref_count == 0)
1714 return 0;
1715
1716 reset = isp_suspend_modules(isp);
1717 isp_disable_interrupts(isp);
1718 isp_save_ctx(isp);
1719 if (reset)
1720 isp_reset(isp);
1721
1722 return 0;
1723}
1724
1725static int isp_pm_suspend(struct device *dev)
1726{
1727 struct isp_device *isp = dev_get_drvdata(dev);
1728
1729 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1730
1731 if (isp->ref_count)
1732 isp_disable_clocks(isp);
1733
1734 return 0;
1735}
1736
1737static int isp_pm_resume(struct device *dev)
1738{
1739 struct isp_device *isp = dev_get_drvdata(dev);
1740
1741 if (isp->ref_count == 0)
1742 return 0;
1743
1744 return isp_enable_clocks(isp);
1745}
1746
1747static void isp_pm_complete(struct device *dev)
1748{
1749 struct isp_device *isp = dev_get_drvdata(dev);
1750
1751 if (isp->ref_count == 0)
1752 return;
1753
1754 isp_restore_ctx(isp);
1755 isp_enable_interrupts(isp);
1756 isp_resume_modules(isp);
1757}
1758
1759#else
1760
1761#define isp_pm_prepare NULL
1762#define isp_pm_suspend NULL
1763#define isp_pm_resume NULL
1764#define isp_pm_complete NULL
1765
1766#endif /* CONFIG_PM */
1767
1768static void isp_unregister_entities(struct isp_device *isp)
1769{
1770 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1771 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1772 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1773 omap3isp_preview_unregister_entities(&isp->isp_prev);
1774 omap3isp_resizer_unregister_entities(&isp->isp_res);
1775 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1776 omap3isp_stat_unregister_entities(&isp->isp_af);
1777 omap3isp_stat_unregister_entities(&isp->isp_hist);
1778
1779 v4l2_device_unregister(&isp->v4l2_dev);
1780 media_device_unregister(&isp->media_dev);
1781}
1782
1783/*
1784 * isp_register_subdev_group - Register a group of subdevices
1785 * @isp: OMAP3 ISP device
1786 * @board_info: I2C subdevs board information array
1787 *
1788 * Register all I2C subdevices in the board_info array. The array must be
1789 * terminated by a NULL entry, and the first entry must be the sensor.
1790 *
1791 * Return a pointer to the sensor media entity if it has been successfully
1792 * registered, or NULL otherwise.
1793 */
1794static struct v4l2_subdev *
1795isp_register_subdev_group(struct isp_device *isp,
1796 struct isp_subdev_i2c_board_info *board_info)
1797{
1798 struct v4l2_subdev *sensor = NULL;
1799 unsigned int first;
1800
1801 if (board_info->board_info == NULL)
1802 return NULL;
1803
1804 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1805 struct v4l2_subdev *subdev;
1806 struct i2c_adapter *adapter;
1807
1808 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1809 if (adapter == NULL) {
4feca39b 1810 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
448de7e7
SA
1811 "device %s\n", __func__,
1812 board_info->i2c_adapter_id,
1813 board_info->board_info->type);
1814 continue;
1815 }
1816
1817 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1818 board_info->board_info, NULL);
1819 if (subdev == NULL) {
4feca39b 1820 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
448de7e7
SA
1821 __func__, board_info->board_info->type);
1822 continue;
1823 }
1824
1825 if (first)
1826 sensor = subdev;
1827 }
1828
1829 return sensor;
1830}
1831
1832static int isp_register_entities(struct isp_device *isp)
1833{
1834 struct isp_platform_data *pdata = isp->pdata;
1835 struct isp_v4l2_subdevs_group *subdevs;
1836 int ret;
1837
1838 isp->media_dev.dev = isp->dev;
1839 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1840 sizeof(isp->media_dev.model));
083eb078 1841 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA
1842 isp->media_dev.link_notify = isp_pipeline_link_notify;
1843 ret = media_device_register(&isp->media_dev);
1844 if (ret < 0) {
4feca39b 1845 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
448de7e7
SA
1846 __func__, ret);
1847 return ret;
1848 }
1849
1850 isp->v4l2_dev.mdev = &isp->media_dev;
1851 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1852 if (ret < 0) {
4feca39b 1853 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA
1854 __func__, ret);
1855 goto done;
1856 }
1857
1858 /* Register internal entities */
1859 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1860 if (ret < 0)
1861 goto done;
1862
1863 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1864 if (ret < 0)
1865 goto done;
1866
1867 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1868 if (ret < 0)
1869 goto done;
1870
1871 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1872 &isp->v4l2_dev);
1873 if (ret < 0)
1874 goto done;
1875
1876 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1877 if (ret < 0)
1878 goto done;
1879
1880 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1881 if (ret < 0)
1882 goto done;
1883
1884 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1885 if (ret < 0)
1886 goto done;
1887
1888 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1889 if (ret < 0)
1890 goto done;
1891
1892 /* Register external entities */
ca4186f0 1893 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA
1894 struct v4l2_subdev *sensor;
1895 struct media_entity *input;
1896 unsigned int flags;
1897 unsigned int pad;
aab84f55 1898 unsigned int i;
448de7e7
SA
1899
1900 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1901 if (sensor == NULL)
1902 continue;
1903
1904 sensor->host_priv = subdevs;
1905
1906 /* Connect the sensor to the correct interface module. Parallel
1907 * sensors are connected directly to the CCDC, while serial
1908 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1909 * through CSIPHY1 or CSIPHY2.
1910 */
1911 switch (subdevs->interface) {
1912 case ISP_INTERFACE_PARALLEL:
1913 input = &isp->isp_ccdc.subdev.entity;
1914 pad = CCDC_PAD_SINK;
1915 flags = 0;
1916 break;
1917
1918 case ISP_INTERFACE_CSI2A_PHY2:
1919 input = &isp->isp_csi2a.subdev.entity;
1920 pad = CSI2_PAD_SINK;
1921 flags = MEDIA_LNK_FL_IMMUTABLE
1922 | MEDIA_LNK_FL_ENABLED;
1923 break;
1924
1925 case ISP_INTERFACE_CCP2B_PHY1:
1926 case ISP_INTERFACE_CCP2B_PHY2:
1927 input = &isp->isp_ccp2.subdev.entity;
1928 pad = CCP2_PAD_SINK;
1929 flags = 0;
1930 break;
1931
1932 case ISP_INTERFACE_CSI2C_PHY1:
1933 input = &isp->isp_csi2c.subdev.entity;
1934 pad = CSI2_PAD_SINK;
1935 flags = MEDIA_LNK_FL_IMMUTABLE
1936 | MEDIA_LNK_FL_ENABLED;
1937 break;
1938
1939 default:
4feca39b
LP
1940 dev_err(isp->dev, "%s: invalid interface type %u\n",
1941 __func__, subdevs->interface);
448de7e7
SA
1942 ret = -EINVAL;
1943 goto done;
1944 }
1945
aab84f55
SA
1946 for (i = 0; i < sensor->entity.num_pads; i++) {
1947 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1948 break;
1949 }
1950 if (i == sensor->entity.num_pads) {
1951 dev_err(isp->dev,
1952 "%s: no source pad in external entity\n",
1953 __func__);
448de7e7
SA
1954 ret = -EINVAL;
1955 goto done;
1956 }
1957
aab84f55 1958 ret = media_entity_create_link(&sensor->entity, i, input, pad,
448de7e7
SA
1959 flags);
1960 if (ret < 0)
1961 goto done;
1962 }
1963
1964 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1965
1966done:
1967 if (ret < 0)
1968 isp_unregister_entities(isp);
1969
1970 return ret;
1971}
1972
1973static void isp_cleanup_modules(struct isp_device *isp)
1974{
1975 omap3isp_h3a_aewb_cleanup(isp);
1976 omap3isp_h3a_af_cleanup(isp);
1977 omap3isp_hist_cleanup(isp);
1978 omap3isp_resizer_cleanup(isp);
1979 omap3isp_preview_cleanup(isp);
1980 omap3isp_ccdc_cleanup(isp);
1981 omap3isp_ccp2_cleanup(isp);
1982 omap3isp_csi2_cleanup(isp);
1983}
1984
1985static int isp_initialize_modules(struct isp_device *isp)
1986{
1987 int ret;
1988
1989 ret = omap3isp_csiphy_init(isp);
1990 if (ret < 0) {
1991 dev_err(isp->dev, "CSI PHY initialization failed\n");
1992 goto error_csiphy;
1993 }
1994
1995 ret = omap3isp_csi2_init(isp);
1996 if (ret < 0) {
1997 dev_err(isp->dev, "CSI2 initialization failed\n");
1998 goto error_csi2;
1999 }
2000
2001 ret = omap3isp_ccp2_init(isp);
2002 if (ret < 0) {
2003 dev_err(isp->dev, "CCP2 initialization failed\n");
2004 goto error_ccp2;
2005 }
2006
2007 ret = omap3isp_ccdc_init(isp);
2008 if (ret < 0) {
2009 dev_err(isp->dev, "CCDC initialization failed\n");
2010 goto error_ccdc;
2011 }
2012
2013 ret = omap3isp_preview_init(isp);
2014 if (ret < 0) {
2015 dev_err(isp->dev, "Preview initialization failed\n");
2016 goto error_preview;
2017 }
2018
2019 ret = omap3isp_resizer_init(isp);
2020 if (ret < 0) {
2021 dev_err(isp->dev, "Resizer initialization failed\n");
2022 goto error_resizer;
2023 }
2024
2025 ret = omap3isp_hist_init(isp);
2026 if (ret < 0) {
2027 dev_err(isp->dev, "Histogram initialization failed\n");
2028 goto error_hist;
2029 }
2030
2031 ret = omap3isp_h3a_aewb_init(isp);
2032 if (ret < 0) {
2033 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2034 goto error_h3a_aewb;
2035 }
2036
2037 ret = omap3isp_h3a_af_init(isp);
2038 if (ret < 0) {
2039 dev_err(isp->dev, "H3A AF initialization failed\n");
2040 goto error_h3a_af;
2041 }
2042
2043 /* Connect the submodules. */
2044 ret = media_entity_create_link(
2045 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2046 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2047 if (ret < 0)
2048 goto error_link;
2049
2050 ret = media_entity_create_link(
2051 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2052 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2053 if (ret < 0)
2054 goto error_link;
2055
2056 ret = media_entity_create_link(
2057 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2058 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2059 if (ret < 0)
2060 goto error_link;
2061
2062 ret = media_entity_create_link(
2063 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2064 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2065 if (ret < 0)
2066 goto error_link;
2067
2068 ret = media_entity_create_link(
2069 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2070 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2071 if (ret < 0)
2072 goto error_link;
2073
2074 ret = media_entity_create_link(
2075 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2076 &isp->isp_aewb.subdev.entity, 0,
2077 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2078 if (ret < 0)
2079 goto error_link;
2080
2081 ret = media_entity_create_link(
2082 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2083 &isp->isp_af.subdev.entity, 0,
2084 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2085 if (ret < 0)
2086 goto error_link;
2087
2088 ret = media_entity_create_link(
2089 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2090 &isp->isp_hist.subdev.entity, 0,
2091 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2092 if (ret < 0)
2093 goto error_link;
2094
2095 return 0;
2096
2097error_link:
2098 omap3isp_h3a_af_cleanup(isp);
2099error_h3a_af:
2100 omap3isp_h3a_aewb_cleanup(isp);
2101error_h3a_aewb:
2102 omap3isp_hist_cleanup(isp);
2103error_hist:
2104 omap3isp_resizer_cleanup(isp);
2105error_resizer:
2106 omap3isp_preview_cleanup(isp);
2107error_preview:
2108 omap3isp_ccdc_cleanup(isp);
2109error_ccdc:
2110 omap3isp_ccp2_cleanup(isp);
2111error_ccp2:
2112 omap3isp_csi2_cleanup(isp);
2113error_csi2:
2114error_csiphy:
2115 return ret;
2116}
2117
2a0a5472
LP
2118static void isp_detach_iommu(struct isp_device *isp)
2119{
2120 arm_iommu_release_mapping(isp->mapping);
2121 isp->mapping = NULL;
2122 iommu_group_remove_device(isp->dev);
2123}
2124
2125static int isp_attach_iommu(struct isp_device *isp)
2126{
2127 struct dma_iommu_mapping *mapping;
2128 struct iommu_group *group;
2129 int ret;
2130
2131 /* Create a device group and add the device to it. */
2132 group = iommu_group_alloc();
2133 if (IS_ERR(group)) {
2134 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2135 return PTR_ERR(group);
2136 }
2137
2138 ret = iommu_group_add_device(group, isp->dev);
2139 iommu_group_put(group);
2140
2141 if (ret < 0) {
2142 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2143 return ret;
2144 }
2145
2146 /*
2147 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2148 * VAs. This will allocate a corresponding IOMMU domain.
2149 */
2150 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2151 if (IS_ERR(mapping)) {
2152 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2153 ret = PTR_ERR(mapping);
2154 goto error;
2155 }
2156
2157 isp->mapping = mapping;
2158
2159 /* Attach the ARM VA mapping to the device. */
2160 ret = arm_iommu_attach_device(isp->dev, mapping);
2161 if (ret < 0) {
2162 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2163 goto error;
2164 }
2165
2166 return 0;
2167
2168error:
2169 isp_detach_iommu(isp);
2170 return ret;
2171}
2172
448de7e7
SA
2173/*
2174 * isp_remove - Remove ISP platform device
2175 * @pdev: Pointer to ISP platform device
2176 *
2177 * Always returns 0.
2178 */
4c62e976 2179static int isp_remove(struct platform_device *pdev)
448de7e7
SA
2180{
2181 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7
SA
2182
2183 isp_unregister_entities(isp);
2184 isp_cleanup_modules(isp);
9b28ee3c 2185 isp_xclk_cleanup(isp);
448de7e7 2186
96d62ae2 2187 __omap3isp_get(isp, false);
2a0a5472
LP
2188 isp_detach_iommu(isp);
2189 __omap3isp_put(isp, false);
448de7e7 2190
448de7e7
SA
2191 return 0;
2192}
2193
2194static int isp_map_mem_resource(struct platform_device *pdev,
2195 struct isp_device *isp,
2196 enum isp_mem_resources res)
2197{
2198 struct resource *mem;
2199
2200 /* request the mem region for the camera registers */
2201
2202 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
448de7e7
SA
2203
2204 /* map the region */
fd8308b4
LP
2205 isp->mmio_base[res] = devm_ioremap_resource(isp->dev, mem);
2206 if (IS_ERR(isp->mmio_base[res]))
2207 return PTR_ERR(isp->mmio_base[res]);
2208
2209 isp->mmio_base_phys[res] = mem->start;
448de7e7
SA
2210
2211 return 0;
2212}
2213
2214/*
2215 * isp_probe - Probe ISP platform device
2216 * @pdev: Pointer to ISP platform device
2217 *
2218 * Returns 0 if successful,
2219 * -ENOMEM if no memory available,
2220 * -ENODEV if no platform device resources found
2221 * or no space for remapping registers,
2222 * -EINVAL if couldn't install ISR,
2223 * or clk_get return error value.
2224 */
4c62e976 2225static int isp_probe(struct platform_device *pdev)
448de7e7
SA
2226{
2227 struct isp_platform_data *pdata = pdev->dev.platform_data;
2228 struct isp_device *isp;
2229 int ret;
2230 int i, m;
2231
2232 if (pdata == NULL)
2233 return -EINVAL;
2234
cf2b4cf6 2235 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA
2236 if (!isp) {
2237 dev_err(&pdev->dev, "could not allocate memory\n");
2238 return -ENOMEM;
2239 }
2240
2241 isp->autoidle = autoidle;
448de7e7
SA
2242
2243 mutex_init(&isp->isp_mutex);
2244 spin_lock_init(&isp->stat_lock);
2245
2246 isp->dev = &pdev->dev;
2247 isp->pdata = pdata;
2248 isp->ref_count = 0;
2249
224ddca0
RK
2250 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2251 if (ret)
2252 return ret;
448de7e7
SA
2253
2254 platform_set_drvdata(pdev, isp);
2255
2256 /* Regulators */
cf2b4cf6
LP
2257 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2258 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
448de7e7 2259
d8658bca
LP
2260 /* Clocks
2261 *
2262 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2263 * manually to read the revision before calling __omap3isp_get().
2264 */
448de7e7
SA
2265 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2266 if (ret < 0)
2267 goto error;
2268
2269 ret = isp_get_clocks(isp);
2270 if (ret < 0)
2271 goto error;
2272
d8658bca
LP
2273 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2274 if (ret < 0)
2275 goto error;
2276
2277 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2278 dev_info(isp->dev, "Revision %d.%d found\n",
2279 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2280
2281 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2282
0bd0dbee
PST
2283 if (__omap3isp_get(isp, false) == NULL) {
2284 ret = -ENODEV;
448de7e7 2285 goto error;
0bd0dbee 2286 }
448de7e7
SA
2287
2288 ret = isp_reset(isp);
2289 if (ret < 0)
2290 goto error_isp;
2291
9b28ee3c
LP
2292 ret = isp_xclk_init(isp);
2293 if (ret < 0)
2294 goto error_isp;
2295
448de7e7 2296 /* Memory resources */
448de7e7
SA
2297 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2298 if (isp->revision == isp_res_maps[m].isp_rev)
2299 break;
2300
2301 if (m == ARRAY_SIZE(isp_res_maps)) {
2302 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2303 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2304 ret = -ENODEV;
2305 goto error_isp;
2306 }
2307
2308 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2309 if (isp_res_maps[m].map & 1 << i) {
2310 ret = isp_map_mem_resource(pdev, isp, i);
2311 if (ret)
2312 goto error_isp;
2313 }
2314 }
2315
2a0a5472
LP
2316 /* IOMMU */
2317 ret = isp_attach_iommu(isp);
2318 if (ret < 0) {
2319 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
f626b52d
OBC
2320 goto error_isp;
2321 }
2322
448de7e7
SA
2323 /* Interrupt */
2324 isp->irq_num = platform_get_irq(pdev, 0);
2325 if (isp->irq_num <= 0) {
2326 dev_err(isp->dev, "No IRQ resource\n");
2327 ret = -ENODEV;
2a0a5472 2328 goto error_iommu;
448de7e7
SA
2329 }
2330
cf2b4cf6
LP
2331 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2332 "OMAP3 ISP", isp)) {
448de7e7
SA
2333 dev_err(isp->dev, "Unable to request IRQ\n");
2334 ret = -EINVAL;
2a0a5472 2335 goto error_iommu;
448de7e7
SA
2336 }
2337
2338 /* Entities */
2339 ret = isp_initialize_modules(isp);
2340 if (ret < 0)
2a0a5472 2341 goto error_iommu;
448de7e7
SA
2342
2343 ret = isp_register_entities(isp);
2344 if (ret < 0)
2345 goto error_modules;
2346
96d62ae2 2347 isp_core_init(isp, 1);
448de7e7
SA
2348 omap3isp_put(isp);
2349
2350 return 0;
2351
2352error_modules:
2353 isp_cleanup_modules(isp);
2a0a5472
LP
2354error_iommu:
2355 isp_detach_iommu(isp);
448de7e7 2356error_isp:
9b28ee3c 2357 isp_xclk_cleanup(isp);
2a0a5472 2358 __omap3isp_put(isp, false);
448de7e7 2359error:
ed33ac8e 2360 mutex_destroy(&isp->isp_mutex);
448de7e7
SA
2361
2362 return ret;
2363}
2364
2365static const struct dev_pm_ops omap3isp_pm_ops = {
2366 .prepare = isp_pm_prepare,
2367 .suspend = isp_pm_suspend,
2368 .resume = isp_pm_resume,
2369 .complete = isp_pm_complete,
2370};
2371
2372static struct platform_device_id omap3isp_id_table[] = {
2373 { "omap3isp", 0 },
2374 { },
2375};
2376MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2377
2378static struct platform_driver omap3isp_driver = {
2379 .probe = isp_probe,
4c62e976 2380 .remove = isp_remove,
448de7e7
SA
2381 .id_table = omap3isp_id_table,
2382 .driver = {
448de7e7
SA
2383 .name = "omap3isp",
2384 .pm = &omap3isp_pm_ops,
2385 },
2386};
2387
1d6629b1 2388module_platform_driver(omap3isp_driver);
448de7e7
SA
2389
2390MODULE_AUTHOR("Nokia Corporation");
2391MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2392MODULE_LICENSE("GPL");
64dc3c1a 2393MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);