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[thirdparty/kernel/stable.git] / drivers / media / platform / omap3isp / isp.c
CommitLineData
448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
448de7e7
SA		 43 */
44
45#include <asm/cacheflush.h>
46
47#include <linux/clk.h>
9b28ee3c 48#include <linux/clkdev.h>
448de7e7
SA		 49#include <linux/delay.h>
50#include <linux/device.h>
51#include <linux/dma-mapping.h>
52#include <linux/i2c.h>
53#include <linux/interrupt.h>
503596a1 54#include <linux/mfd/syscon.h>
448de7e7 55#include <linux/module.h>
c8d35c84 56#include <linux/omap-iommu.h>
448de7e7
SA		 57#include <linux/platform_device.h>
58#include <linux/regulator/consumer.h>
59#include <linux/slab.h>
60#include <linux/sched.h>
61#include <linux/vmalloc.h>
62
2a0a5472
LP		 63#include <asm/dma-iommu.h>
64
448de7e7
SA		 65#include <media/v4l2-common.h>
66#include <media/v4l2-device.h>
da7f3843 67#include <media/v4l2-of.h>
448de7e7
SA		 68
69#include "isp.h"
70#include "ispreg.h"
71#include "ispccdc.h"
72#include "isppreview.h"
73#include "ispresizer.h"
74#include "ispcsi2.h"
75#include "ispccp2.h"
76#include "isph3a.h"
77#include "isphist.h"
78
79static unsigned int autoidle;
80module_param(autoidle, int, 0444);
81MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
82
83static void isp_save_ctx(struct isp_device *isp);
84
85static void isp_restore_ctx(struct isp_device *isp);
86
87static const struct isp_res_mapping isp_res_maps[] = {
88 {
89 .isp_rev = ISP_REVISION_2_0,
8644cdf9
SA		 90 .offset = {
91 /* first MMIO area */
92 0x0000, /* base, len 0x0070 */
93 0x0400, /* ccp2, len 0x01f0 */
94 0x0600, /* ccdc, len 0x00a8 */
95 0x0a00, /* hist, len 0x0048 */
96 0x0c00, /* h3a, len 0x0060 */
97 0x0e00, /* preview, len 0x00a0 */
98 0x1000, /* resizer, len 0x00ac */
99 0x1200, /* sbl, len 0x00fc */
100 /* second MMIO area */
101 0x0000, /* csi2a, len 0x0170 */
102 0x0170, /* csiphy2, len 0x000c */
103 },
503596a1 104 .phy_type = ISP_PHY_TYPE_3430,
448de7e7
SA		 105 },
106 {
107 .isp_rev = ISP_REVISION_15_0,
8644cdf9
SA		 108 .offset = {
109 /* first MMIO area */
110 0x0000, /* base, len 0x0070 */
111 0x0400, /* ccp2, len 0x01f0 */
112 0x0600, /* ccdc, len 0x00a8 */
113 0x0a00, /* hist, len 0x0048 */
114 0x0c00, /* h3a, len 0x0060 */
115 0x0e00, /* preview, len 0x00a0 */
116 0x1000, /* resizer, len 0x00ac */
117 0x1200, /* sbl, len 0x00fc */
118 /* second MMIO area */
119 0x0000, /* csi2a, len 0x0170 (1st area) */
120 0x0170, /* csiphy2, len 0x000c */
121 0x01c0, /* csi2a, len 0x0040 (2nd area) */
122 0x0400, /* csi2c, len 0x0170 (1st area) */
123 0x0570, /* csiphy1, len 0x000c */
124 0x05c0, /* csi2c, len 0x0040 (2nd area) */
125 },
503596a1 126 .phy_type = ISP_PHY_TYPE_3630,
448de7e7
SA		 127 },
128};
129
130/* Structure for saving/restoring ISP module registers */
131static struct isp_reg isp_reg_list[] = {
132 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
133 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
135 {0, ISP_TOK_TERM, 0}
136};
137
138/*
139 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
140 * @isp: OMAP3 ISP device
141 *
142 * In order to force posting of pending writes, we need to write and
143 * readback the same register, in this case the revision register.
144 *
145 * See this link for reference:
146 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
147 */
148void omap3isp_flush(struct isp_device *isp)
149{
150 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
151 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152}
153
9b28ee3c
LP		 154/* -----------------------------------------------------------------------------
155 * XCLK
156 */
157
158#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
159
160static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
161{
162 switch (xclk->id) {
163 case ISP_XCLK_A:
164 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
165 ISPTCTRL_CTRL_DIVA_MASK,
166 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
167 break;
168 case ISP_XCLK_B:
169 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
170 ISPTCTRL_CTRL_DIVB_MASK,
171 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
172 break;
173 }
174}
175
176static int isp_xclk_prepare(struct clk_hw *hw)
177{
178 struct isp_xclk *xclk = to_isp_xclk(hw);
179
180 omap3isp_get(xclk->isp);
181
182 return 0;
183}
184
185static void isp_xclk_unprepare(struct clk_hw *hw)
186{
187 struct isp_xclk *xclk = to_isp_xclk(hw);
188
189 omap3isp_put(xclk->isp);
190}
191
192static int isp_xclk_enable(struct clk_hw *hw)
193{
194 struct isp_xclk *xclk = to_isp_xclk(hw);
195 unsigned long flags;
196
197 spin_lock_irqsave(&xclk->lock, flags);
198 isp_xclk_update(xclk, xclk->divider);
199 xclk->enabled = true;
200 spin_unlock_irqrestore(&xclk->lock, flags);
201
202 return 0;
203}
204
205static void isp_xclk_disable(struct clk_hw *hw)
206{
207 struct isp_xclk *xclk = to_isp_xclk(hw);
208 unsigned long flags;
209
210 spin_lock_irqsave(&xclk->lock, flags);
211 isp_xclk_update(xclk, 0);
212 xclk->enabled = false;
213 spin_unlock_irqrestore(&xclk->lock, flags);
214}
215
216static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
218{
219 struct isp_xclk *xclk = to_isp_xclk(hw);
220
221 return parent_rate / xclk->divider;
222}
223
224static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
225{
226 u32 divider;
227
228 if (*rate >= parent_rate) {
229 *rate = parent_rate;
230 return ISPTCTRL_CTRL_DIV_BYPASS;
231 }
232
aadec012
LP		 233 if (*rate == 0)
234 *rate = 1;
235
9b28ee3c
LP		 236 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
237 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
238 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
239
240 *rate = parent_rate / divider;
241 return divider;
242}
243
244static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
245 unsigned long *parent_rate)
246{
247 isp_xclk_calc_divider(&rate, *parent_rate);
248 return rate;
249}
250
251static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
252 unsigned long parent_rate)
253{
254 struct isp_xclk *xclk = to_isp_xclk(hw);
255 unsigned long flags;
256 u32 divider;
257
258 divider = isp_xclk_calc_divider(&rate, parent_rate);
259
260 spin_lock_irqsave(&xclk->lock, flags);
261
262 xclk->divider = divider;
263 if (xclk->enabled)
264 isp_xclk_update(xclk, divider);
265
266 spin_unlock_irqrestore(&xclk->lock, flags);
267
268 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
269 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
270 return 0;
271}
272
273static const struct clk_ops isp_xclk_ops = {
274 .prepare = isp_xclk_prepare,
275 .unprepare = isp_xclk_unprepare,
276 .enable = isp_xclk_enable,
277 .disable = isp_xclk_disable,
278 .recalc_rate = isp_xclk_recalc_rate,
279 .round_rate = isp_xclk_round_rate,
280 .set_rate = isp_xclk_set_rate,
281};
282
283static const char *isp_xclk_parent_name = "cam_mclk";
284
285static const struct clk_init_data isp_xclk_init_data = {
286 .name = "cam_xclk",
287 .ops = &isp_xclk_ops,
288 .parent_names = &isp_xclk_parent_name,
289 .num_parents = 1,
290};
291
64904b57
LP		 292static struct clk *isp_xclk_src_get(struct of_phandle_args *clkspec, void *data)
293{
294 unsigned int idx = clkspec->args[0];
295 struct isp_device *isp = data;
296
297 if (idx >= ARRAY_SIZE(isp->xclks))
298 return ERR_PTR(-ENOENT);
299
300 return isp->xclks[idx].clk;
301}
302
9b28ee3c
LP		 303static int isp_xclk_init(struct isp_device *isp)
304{
64904b57 305 struct device_node *np = isp->dev->of_node;
9b28ee3c
LP		 306 struct clk_init_data init;
307 unsigned int i;
308
f8e2ff26
SN		 309 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i)
310 isp->xclks[i].clk = ERR_PTR(-EINVAL);
311
9b28ee3c
LP		 312 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
313 struct isp_xclk *xclk = &isp->xclks[i];
9b28ee3c
LP		 314
315 xclk->isp = isp;
316 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
317 xclk->divider = 1;
318 spin_lock_init(&xclk->lock);
319
320 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
321 init.ops = &isp_xclk_ops;
322 init.parent_names = &isp_xclk_parent_name;
323 init.num_parents = 1;
324
325 xclk->hw.init = &init;
f8e2ff26
SN		 326 /*
327 * The first argument is NULL in order to avoid circular
328 * reference, as this driver takes reference on the
329 * sensor subdevice modules and the sensors would take
330 * reference on this module through clk_get().
331 */
332 xclk->clk = clk_register(NULL, &xclk->hw);
333 if (IS_ERR(xclk->clk))
334 return PTR_ERR(xclk->clk);
9b28ee3c
LP		 335 }
336
64904b57
LP		 337 if (np)
338 of_clk_add_provider(np, isp_xclk_src_get, isp);
339
9b28ee3c
LP		 340 return 0;
341}
342
343static void isp_xclk_cleanup(struct isp_device *isp)
344{
64904b57 345 struct device_node *np = isp->dev->of_node;
9b28ee3c
LP		 346 unsigned int i;
347
64904b57
LP		 348 if (np)
349 of_clk_del_provider(np);
350
9b28ee3c
LP		 351 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
352 struct isp_xclk *xclk = &isp->xclks[i];
353
f8e2ff26
SN		 354 if (!IS_ERR(xclk->clk))
355 clk_unregister(xclk->clk);
9b28ee3c
LP		 356 }
357}
358
359/* -----------------------------------------------------------------------------
360 * Interrupts
361 */
362
448de7e7
SA		 363/*
364 * isp_enable_interrupts - Enable ISP interrupts.
365 * @isp: OMAP3 ISP device
366 */
367static void isp_enable_interrupts(struct isp_device *isp)
368{
369 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
370 | IRQ0ENABLE_CSIB_IRQ
371 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
372 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
373 | IRQ0ENABLE_CCDC_VD0_IRQ
374 | IRQ0ENABLE_CCDC_VD1_IRQ
375 | IRQ0ENABLE_HS_VS_IRQ
376 | IRQ0ENABLE_HIST_DONE_IRQ
377 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
378 | IRQ0ENABLE_H3A_AF_DONE_IRQ
379 | IRQ0ENABLE_PRV_DONE_IRQ
380 | IRQ0ENABLE_RSZ_DONE_IRQ;
381
382 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
383 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
384}
385
386/*
387 * isp_disable_interrupts - Disable ISP interrupts.
388 * @isp: OMAP3 ISP device
389 */
390static void isp_disable_interrupts(struct isp_device *isp)
391{
392 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
393}
394
448de7e7 395/*
96d62ae2 396 * isp_core_init - ISP core settings
448de7e7
SA		 397 * @isp: OMAP3 ISP device
398 * @idle: Consider idle state.
399 *
25aeb418 400 * Set the power settings for the ISP and SBL bus and configure the HS/VS
96d62ae2
LP		 401 * interrupt source.
402 *
403 * We need to configure the HS/VS interrupt source before interrupts get
404 * enabled, as the sensor might be free-running and the ISP default setting
405 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 406 */
96d62ae2 407static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 408{
409 isp_reg_writel(isp,
410 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
411 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
412 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
413 ((isp->revision == ISP_REVISION_15_0) ?
414 ISP_SYSCONFIG_AUTOIDLE : 0),
415 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
416
96d62ae2
LP		 417 isp_reg_writel(isp,
418 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
419 ISPCTRL_SYNC_DETECT_VSRISE,
420 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 421}
422
423/*
424 * Configure the bridge and lane shifter. Valid inputs are
425 *
426 * CCDC_INPUT_PARALLEL: Parallel interface
427 * CCDC_INPUT_CSI2A: CSI2a receiver
428 * CCDC_INPUT_CCP2B: CCP2b receiver
429 * CCDC_INPUT_CSI2C: CSI2c receiver
430 *
431 * The bridge and lane shifter are configured according to the selected input
432 * and the ISP platform data.
433 */
434void omap3isp_configure_bridge(struct isp_device *isp,
435 enum ccdc_input_entity input,
68908747 436 const struct isp_parallel_cfg *parcfg,
c51364ca 437 unsigned int shift, unsigned int bridge)
448de7e7
SA		 438{
439 u32 ispctrl_val;
440
441 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
442 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
443 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
444 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
445 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 446 ispctrl_val |= bridge;
448de7e7
SA		 447
448 switch (input) {
449 case CCDC_INPUT_PARALLEL:
450 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
68908747
SA		 451 ispctrl_val |= parcfg->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
452 shift += parcfg->data_lane_shift * 2;
448de7e7
SA		 453 break;
454
455 case CCDC_INPUT_CSI2A:
456 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
457 break;
458
459 case CCDC_INPUT_CCP2B:
460 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
461 break;
462
463 case CCDC_INPUT_CSI2C:
464 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
465 break;
466
467 default:
468 return;
469 }
470
c09af044
MJ		 471 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
472
448de7e7
SA		 473 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
474}
475
448de7e7
SA		 476void omap3isp_hist_dma_done(struct isp_device *isp)
477{
478 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
479 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
480 /* Histogram cannot be enabled in this frame anymore */
481 atomic_set(&isp->isp_hist.buf_err, 1);
482 dev_dbg(isp->dev, "hist: Out of synchronization with "
483 "CCDC. Ignoring next buffer.\n");
484 }
485}
486
487static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
488{
489 static const char *name[] = {
490 "CSIA_IRQ",
491 "res1",
492 "res2",
493 "CSIB_LCM_IRQ",
494 "CSIB_IRQ",
495 "res5",
496 "res6",
497 "res7",
498 "CCDC_VD0_IRQ",
499 "CCDC_VD1_IRQ",
500 "CCDC_VD2_IRQ",
501 "CCDC_ERR_IRQ",
502 "H3A_AF_DONE_IRQ",
503 "H3A_AWB_DONE_IRQ",
504 "res14",
505 "res15",
506 "HIST_DONE_IRQ",
507 "CCDC_LSC_DONE",
508 "CCDC_LSC_PREFETCH_COMPLETED",
509 "CCDC_LSC_PREFETCH_ERROR",
510 "PRV_DONE_IRQ",
511 "CBUFF_IRQ",
512 "res22",
513 "res23",
514 "RSZ_DONE_IRQ",
515 "OVF_IRQ",
516 "res26",
517 "res27",
518 "MMU_ERR_IRQ",
519 "OCP_ERR_IRQ",
520 "SEC_ERR_IRQ",
521 "HS_VS_IRQ",
522 };
523 int i;
524
6c20c635 525 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 526
527 for (i = 0; i < ARRAY_SIZE(name); i++) {
528 if ((1 << i) & irqstatus)
529 printk(KERN_CONT "%s ", name[i]);
530 }
531 printk(KERN_CONT "\n");
532}
533
534static void isp_isr_sbl(struct isp_device *isp)
535{
536 struct device *dev = isp->dev;
875e2e3e 537 struct isp_pipeline *pipe;
448de7e7
SA		 538 u32 sbl_pcr;
539
540 /*
541 * Handle shared buffer logic overflows for video buffers.
542 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
543 */
544 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
545 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
546 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
547
548 if (sbl_pcr)
549 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
550
875e2e3e
LP		 551 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
552 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
553 if (pipe != NULL)
554 pipe->error = true;
555 }
556
557 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
558 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
559 if (pipe != NULL)
560 pipe->error = true;
561 }
562
563 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
564 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
565 if (pipe != NULL)
566 pipe->error = true;
448de7e7
SA		 567 }
568
569 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 570 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
571 if (pipe != NULL)
572 pipe->error = true;
448de7e7
SA		 573 }
574
575 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
576 | ISPSBL_PCR_RSZ2_WBL_OVF
577 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 578 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
579 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
580 if (pipe != NULL)
581 pipe->error = true;
582 }
448de7e7
SA		 583
584 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
585 omap3isp_stat_sbl_overflow(&isp->isp_af);
586
587 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
588 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
589}
590
591/*
592 * isp_isr - Interrupt Service Routine for Camera ISP module.
593 * @irq: Not used currently.
594 * @_isp: Pointer to the OMAP3 ISP device
595 *
596 * Handles the corresponding callback if plugged in.
448de7e7
SA		 597 */
598static irqreturn_t isp_isr(int irq, void *_isp)
599{
600 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
601 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
602 IRQ0STATUS_CCDC_VD0_IRQ |
603 IRQ0STATUS_CCDC_VD1_IRQ |
604 IRQ0STATUS_HS_VS_IRQ;
605 struct isp_device *isp = _isp;
606 u32 irqstatus;
448de7e7
SA		 607
608 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
609 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
610
611 isp_isr_sbl(isp);
612
875e2e3e
LP		 613 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
614 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 615
875e2e3e
LP		 616 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
617 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 618
619 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
620 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
621 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
622 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
623 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
624 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
625 omap3isp_stat_isr_frame_sync(&isp->isp_af);
626 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
627 }
628
629 if (irqstatus & ccdc_events)
630 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
631
632 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
633 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
634 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
635 omap3isp_preview_isr(&isp->isp_prev);
636 }
637
638 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
639 omap3isp_resizer_isr(&isp->isp_res);
640
641 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
642 omap3isp_stat_isr(&isp->isp_aewb);
643
644 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
645 omap3isp_stat_isr(&isp->isp_af);
646
647 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
648 omap3isp_stat_isr(&isp->isp_hist);
649
650 omap3isp_flush(isp);
651
652#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
653 isp_isr_dbg(isp, irqstatus);
654#endif
655
656 return IRQ_HANDLED;
657}
658
659/* -----------------------------------------------------------------------------
660 * Pipeline power management
661 *
662 * Entities must be powered up when part of a pipeline that contains at least
663 * one open video device node.
664 *
665 * To achieve this use the entity use_count field to track the number of users.
666 * For entities corresponding to video device nodes the use_count field stores
667 * the users count of the node. For entities corresponding to subdevs the
668 * use_count field stores the total number of users of all video device nodes
669 * in the pipeline.
670 *
671 * The omap3isp_pipeline_pm_use() function must be called in the open() and
672 * close() handlers of video device nodes. It increments or decrements the use
673 * count of all subdev entities in the pipeline.
674 *
675 * To react to link management on powered pipelines, the link setup notification
676 * callback updates the use count of all entities in the source and sink sides
677 * of the link.
678 */
679
680/*
681 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
682 * @entity: The entity
683 *
684 * Return the total number of users of all video device nodes in the pipeline.
685 */
686static int isp_pipeline_pm_use_count(struct media_entity *entity)
687{
688 struct media_entity_graph graph;
689 int use = 0;
690
691 media_entity_graph_walk_start(&graph, entity);
692
693 while ((entity = media_entity_graph_walk_next(&graph))) {
3efdf62c 694 if (is_media_entity_v4l2_io(entity))
448de7e7
SA		 695 use += entity->use_count;
696 }
697
698 return use;
699}
700
701/*
702 * isp_pipeline_pm_power_one - Apply power change to an entity
703 * @entity: The entity
704 * @change: Use count change
705 *
706 * Change the entity use count by @change. If the entity is a subdev update its
707 * power state by calling the core::s_power operation when the use count goes
708 * from 0 to != 0 or from != 0 to 0.
709 *
710 * Return 0 on success or a negative error code on failure.
711 */
712static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
713{
714 struct v4l2_subdev *subdev;
715 int ret;
716
3efdf62c 717 subdev = is_media_entity_v4l2_subdev(entity)
448de7e7
SA		 718 ? media_entity_to_v4l2_subdev(entity) : NULL;
719
720 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
721 ret = v4l2_subdev_call(subdev, core, s_power, 1);
722 if (ret < 0 && ret != -ENOIOCTLCMD)
723 return ret;
724 }
725
726 entity->use_count += change;
727 WARN_ON(entity->use_count < 0);
728
729 if (entity->use_count == 0 && change < 0 && subdev != NULL)
730 v4l2_subdev_call(subdev, core, s_power, 0);
731
732 return 0;
733}
734
735/*
736 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
737 * @entity: The entity
738 * @change: Use count change
739 *
740 * Walk the pipeline to update the use count and the power state of all non-node
741 * entities.
742 *
743 * Return 0 on success or a negative error code on failure.
744 */
745static int isp_pipeline_pm_power(struct media_entity *entity, int change)
746{
747 struct media_entity_graph graph;
748 struct media_entity *first = entity;
749 int ret = 0;
750
751 if (!change)
752 return 0;
753
754 media_entity_graph_walk_start(&graph, entity);
755
756 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
3efdf62c 757 if (is_media_entity_v4l2_subdev(entity))
448de7e7
SA		 758 ret = isp_pipeline_pm_power_one(entity, change);
759
760 if (!ret)
761 return 0;
762
763 media_entity_graph_walk_start(&graph, first);
764
765 while ((first = media_entity_graph_walk_next(&graph))
766 && first != entity)
3efdf62c 767 if (is_media_entity_v4l2_subdev(first))
448de7e7
SA		 768 isp_pipeline_pm_power_one(first, -change);
769
770 return ret;
771}
772
773/*
774 * omap3isp_pipeline_pm_use - Update the use count of an entity
775 * @entity: The entity
776 * @use: Use (1) or stop using (0) the entity
777 *
778 * Update the use count of all entities in the pipeline and power entities on or
779 * off accordingly.
780 *
781 * Return 0 on success or a negative error code on failure. Powering entities
782 * off is assumed to never fail. No failure can occur when the use parameter is
783 * set to 0.
784 */
785int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
786{
787 int change = use ? 1 : -1;
788 int ret;
789
d10c9894 790 mutex_lock(&entity->graph_obj.mdev->graph_mutex);
448de7e7
SA		 791
792 /* Apply use count to node. */
793 entity->use_count += change;
794 WARN_ON(entity->use_count < 0);
795
796 /* Apply power change to connected non-nodes. */
797 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 798 if (ret < 0)
799 entity->use_count -= change;
448de7e7 800
d10c9894 801 mutex_unlock(&entity->graph_obj.mdev->graph_mutex);
448de7e7
SA		 802
803 return ret;
804}
805
806/*
807 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 808 * @link: The link
448de7e7 809 * @flags: New link flags that will be applied
813f5c0a 810 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA		 811 *
812 * React to link management on powered pipelines by updating the use count of
813 * all entities in the source and sink sides of the link. Entities are powered
814 * on or off accordingly.
815 *
816 * Return 0 on success or a negative error code on failure. Powering entities
817 * off is assumed to never fail. This function will not fail for disconnection
818 * events.
819 */
813f5c0a
SN		 820static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
821 unsigned int notification)
448de7e7 822{
813f5c0a
SN		 823 struct media_entity *source = link->source->entity;
824 struct media_entity *sink = link->sink->entity;
825 int source_use = isp_pipeline_pm_use_count(source);
826 int sink_use = isp_pipeline_pm_use_count(sink);
448de7e7
SA		 827 int ret;
828
813f5c0a 829 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
9d39f054 830 !(flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 831 /* Powering off entities is assumed to never fail. */
813f5c0a
SN		 832 isp_pipeline_pm_power(source, -sink_use);
833 isp_pipeline_pm_power(sink, -source_use);
448de7e7
SA		 834 return 0;
835 }
836
9d39f054 837 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH &&
813f5c0a 838 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 839
813f5c0a
SN		 840 ret = isp_pipeline_pm_power(source, sink_use);
841 if (ret < 0)
842 return ret;
448de7e7 843
813f5c0a
SN		 844 ret = isp_pipeline_pm_power(sink, source_use);
845 if (ret < 0)
846 isp_pipeline_pm_power(source, -sink_use);
847
848 return ret;
849 }
850
851 return 0;
448de7e7
SA		 852}
853
854/* -----------------------------------------------------------------------------
855 * Pipeline stream management
856 */
857
858/*
859 * isp_pipeline_enable - Enable streaming on a pipeline
860 * @pipe: ISP pipeline
861 * @mode: Stream mode (single shot or continuous)
862 *
863 * Walk the entities chain starting at the pipeline output video node and start
864 * all modules in the chain in the given mode.
865 *
25985edc 866 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 867 * operation otherwise.
868 */
869static int isp_pipeline_enable(struct isp_pipeline *pipe,
870 enum isp_pipeline_stream_state mode)
871{
872 struct isp_device *isp = pipe->output->isp;
873 struct media_entity *entity;
874 struct media_pad *pad;
875 struct v4l2_subdev *subdev;
876 unsigned long flags;
c62e2a19 877 int ret;
448de7e7 878
112eee0c
LP		 879 /* Refuse to start streaming if an entity included in the pipeline has
880 * crashed. This check must be performed before the loop below to avoid
881 * starting entities if the pipeline won't start anyway (those entities
882 * would then likely fail to stop, making the problem worse).
1567bb7d 883 */
112eee0c 884 if (pipe->entities & isp->crashed)
1567bb7d
LP		 885 return -EIO;
886
448de7e7
SA		 887 spin_lock_irqsave(&pipe->lock, flags);
888 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
889 spin_unlock_irqrestore(&pipe->lock, flags);
890
891 pipe->do_propagation = false;
892
893 entity = &pipe->output->video.entity;
894 while (1) {
895 pad = &entity->pads[0];
896 if (!(pad->flags & MEDIA_PAD_FL_SINK))
897 break;
898
1bddf1b3 899 pad = media_entity_remote_pad(pad);
3efdf62c 900 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
448de7e7
SA		 901 break;
902
903 entity = pad->entity;
904 subdev = media_entity_to_v4l2_subdev(entity);
905
906 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
907 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 908 return ret;
448de7e7
SA		 909
910 if (subdev == &isp->isp_ccdc.subdev) {
911 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
912 s_stream, mode);
913 v4l2_subdev_call(&isp->isp_af.subdev, video,
914 s_stream, mode);
915 v4l2_subdev_call(&isp->isp_hist.subdev, video,
916 s_stream, mode);
917 pipe->do_propagation = true;
918 }
919 }
920
c62e2a19 921 return 0;
448de7e7
SA		 922}
923
924static int isp_pipeline_wait_resizer(struct isp_device *isp)
925{
926 return omap3isp_resizer_busy(&isp->isp_res);
927}
928
929static int isp_pipeline_wait_preview(struct isp_device *isp)
930{
931 return omap3isp_preview_busy(&isp->isp_prev);
932}
933
934static int isp_pipeline_wait_ccdc(struct isp_device *isp)
935{
936 return omap3isp_stat_busy(&isp->isp_af)
937 || omap3isp_stat_busy(&isp->isp_aewb)
938 || omap3isp_stat_busy(&isp->isp_hist)
939 || omap3isp_ccdc_busy(&isp->isp_ccdc);
940}
941
942#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
943
944static int isp_pipeline_wait(struct isp_device *isp,
945 int(*busy)(struct isp_device *isp))
946{
947 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
948
949 while (!time_after(jiffies, timeout)) {
950 if (!busy(isp))
951 return 0;
952 }
953
954 return 1;
955}
956
957/*
958 * isp_pipeline_disable - Disable streaming on a pipeline
959 * @pipe: ISP pipeline
960 *
961 * Walk the entities chain starting at the pipeline output video node and stop
962 * all modules in the chain. Wait synchronously for the modules to be stopped if
963 * necessary.
964 *
965 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
966 * can't be stopped (in which case a software reset of the ISP is probably
967 * necessary).
968 */
969static int isp_pipeline_disable(struct isp_pipeline *pipe)
970{
971 struct isp_device *isp = pipe->output->isp;
972 struct media_entity *entity;
973 struct media_pad *pad;
974 struct v4l2_subdev *subdev;
975 int failure = 0;
976 int ret;
e0077cfd 977 u32 id;
448de7e7
SA		 978
979 /*
980 * We need to stop all the modules after CCDC first or they'll
981 * never stop since they may not get a full frame from CCDC.
982 */
983 entity = &pipe->output->video.entity;
984 while (1) {
985 pad = &entity->pads[0];
986 if (!(pad->flags & MEDIA_PAD_FL_SINK))
987 break;
988
1bddf1b3 989 pad = media_entity_remote_pad(pad);
3efdf62c 990 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
448de7e7
SA		 991 break;
992
993 entity = pad->entity;
994 subdev = media_entity_to_v4l2_subdev(entity);
995
996 if (subdev == &isp->isp_ccdc.subdev) {
997 v4l2_subdev_call(&isp->isp_aewb.subdev,
998 video, s_stream, 0);
999 v4l2_subdev_call(&isp->isp_af.subdev,
1000 video, s_stream, 0);
1001 v4l2_subdev_call(&isp->isp_hist.subdev,
1002 video, s_stream, 0);
1003 }
1004
eb228e89 1005 ret = v4l2_subdev_call(subdev, video, s_stream, 0);
448de7e7
SA		 1006
1007 if (subdev == &isp->isp_res.subdev)
eb228e89 1008 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
448de7e7 1009 else if (subdev == &isp->isp_prev.subdev)
eb228e89 1010 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_preview);
448de7e7 1011 else if (subdev == &isp->isp_ccdc.subdev)
eb228e89 1012 ret |= isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
448de7e7 1013
112eee0c
LP		 1014 /* Handle stop failures. An entity that fails to stop can
1015 * usually just be restarted. Flag the stop failure nonetheless
1016 * to trigger an ISP reset the next time the device is released,
1017 * just in case.
1018 *
1019 * The preview engine is a special case. A failure to stop can
1020 * mean a hardware crash. When that happens the preview engine
1021 * won't respond to read/write operations on the L4 bus anymore,
1022 * resulting in a bus fault and a kernel oops next time it gets
1023 * accessed. Mark it as crashed to prevent pipelines including
1024 * it from being started.
1025 */
448de7e7
SA		 1026 if (ret) {
1027 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
112eee0c 1028 isp->stop_failure = true;
e0077cfd
JMC		 1029 if (subdev == &isp->isp_prev.subdev) {
1030 id = media_entity_id(&subdev->entity);
1031 isp->crashed |= 1U << id;
1032 }
448de7e7
SA		 1033 failure = -ETIMEDOUT;
1034 }
1035 }
1036
1037 return failure;
1038}
1039
1040/*
1041 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1042 * @pipe: ISP pipeline
1043 * @state: Stream state (stopped, single shot or continuous)
1044 *
1045 * Set the pipeline to the given stream state. Pipelines can be started in
1046 * single-shot or continuous mode.
1047 *
25985edc 1048 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 1049 * operation otherwise. The pipeline state is not updated when the operation
1050 * fails, except when stopping the pipeline.
448de7e7
SA		 1051 */
1052int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1053 enum isp_pipeline_stream_state state)
1054{
1055 int ret;
1056
1057 if (state == ISP_PIPELINE_STREAM_STOPPED)
1058 ret = isp_pipeline_disable(pipe);
1059 else
1060 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 1061
1062 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1063 pipe->stream_state = state;
448de7e7
SA		 1064
1065 return ret;
1066}
1067
661112cb
LP		 1068/*
1069 * omap3isp_pipeline_cancel_stream - Cancel stream on a pipeline
1070 * @pipe: ISP pipeline
1071 *
1072 * Cancelling a stream mark all buffers on all video nodes in the pipeline as
1073 * erroneous and makes sure no new buffer can be queued. This function is called
1074 * when a fatal error that prevents any further operation on the pipeline
1075 * occurs.
1076 */
1077void omap3isp_pipeline_cancel_stream(struct isp_pipeline *pipe)
1078{
1079 if (pipe->input)
1080 omap3isp_video_cancel_stream(pipe->input);
1081 if (pipe->output)
1082 omap3isp_video_cancel_stream(pipe->output);
1083}
1084
448de7e7
SA		 1085/*
1086 * isp_pipeline_resume - Resume streaming on a pipeline
1087 * @pipe: ISP pipeline
1088 *
1089 * Resume video output and input and re-enable pipeline.
1090 */
1091static void isp_pipeline_resume(struct isp_pipeline *pipe)
1092{
1093 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1094
1095 omap3isp_video_resume(pipe->output, !singleshot);
1096 if (singleshot)
1097 omap3isp_video_resume(pipe->input, 0);
1098 isp_pipeline_enable(pipe, pipe->stream_state);
1099}
1100
1101/*
1102 * isp_pipeline_suspend - Suspend streaming on a pipeline
1103 * @pipe: ISP pipeline
1104 *
1105 * Suspend pipeline.
1106 */
1107static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1108{
1109 isp_pipeline_disable(pipe);
1110}
1111
1112/*
1113 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1114 * video node
1115 * @me: ISP module's media entity
1116 *
1117 * Returns 1 if the entity has an enabled link to the output video node or 0
1118 * otherwise. It's true only while pipeline can have no more than one output
1119 * node.
1120 */
1121static int isp_pipeline_is_last(struct media_entity *me)
1122{
1123 struct isp_pipeline *pipe;
1124 struct media_pad *pad;
1125
1126 if (!me->pipe)
1127 return 0;
1128 pipe = to_isp_pipeline(me);
1129 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1130 return 0;
1bddf1b3 1131 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA		 1132 return pad->entity == me;
1133}
1134
1135/*
1136 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1137 * @me: ISP module's media entity
1138 *
1139 * Suspend the whole pipeline if module's entity has an enabled link to the
1140 * output video node. It works only while pipeline can have no more than one
1141 * output node.
1142 */
1143static void isp_suspend_module_pipeline(struct media_entity *me)
1144{
1145 if (isp_pipeline_is_last(me))
1146 isp_pipeline_suspend(to_isp_pipeline(me));
1147}
1148
1149/*
1150 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1151 * @me: ISP module's media entity
1152 *
1153 * Resume the whole pipeline if module's entity has an enabled link to the
1154 * output video node. It works only while pipeline can have no more than one
1155 * output node.
1156 */
1157static void isp_resume_module_pipeline(struct media_entity *me)
1158{
1159 if (isp_pipeline_is_last(me))
1160 isp_pipeline_resume(to_isp_pipeline(me));
1161}
1162
1163/*
1164 * isp_suspend_modules - Suspend ISP submodules.
1165 * @isp: OMAP3 ISP device
1166 *
1167 * Returns 0 if suspend left in idle state all the submodules properly,
1168 * or returns 1 if a general Reset is required to suspend the submodules.
1169 */
1170static int isp_suspend_modules(struct isp_device *isp)
1171{
1172 unsigned long timeout;
1173
1174 omap3isp_stat_suspend(&isp->isp_aewb);
1175 omap3isp_stat_suspend(&isp->isp_af);
1176 omap3isp_stat_suspend(&isp->isp_hist);
1177 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1178 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1179 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1180 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1181 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1182
1183 timeout = jiffies + ISP_STOP_TIMEOUT;
1184 while (omap3isp_stat_busy(&isp->isp_af)
1185 || omap3isp_stat_busy(&isp->isp_aewb)
1186 || omap3isp_stat_busy(&isp->isp_hist)
1187 || omap3isp_preview_busy(&isp->isp_prev)
1188 || omap3isp_resizer_busy(&isp->isp_res)
1189 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1190 if (time_after(jiffies, timeout)) {
1191 dev_info(isp->dev, "can't stop modules.\n");
1192 return 1;
1193 }
1194 msleep(1);
1195 }
1196
1197 return 0;
1198}
1199
1200/*
1201 * isp_resume_modules - Resume ISP submodules.
1202 * @isp: OMAP3 ISP device
1203 */
1204static void isp_resume_modules(struct isp_device *isp)
1205{
1206 omap3isp_stat_resume(&isp->isp_aewb);
1207 omap3isp_stat_resume(&isp->isp_af);
1208 omap3isp_stat_resume(&isp->isp_hist);
1209 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1210 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1211 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1212 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1213 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1214}
1215
1216/*
1217 * isp_reset - Reset ISP with a timeout wait for idle.
1218 * @isp: OMAP3 ISP device
1219 */
1220static int isp_reset(struct isp_device *isp)
1221{
1222 unsigned long timeout = 0;
1223
1224 isp_reg_writel(isp,
1225 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1226 | ISP_SYSCONFIG_SOFTRESET,
1227 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1228 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1229 ISP_SYSSTATUS) & 0x1)) {
1230 if (timeout++ > 10000) {
1231 dev_alert(isp->dev, "cannot reset ISP\n");
1232 return -ETIMEDOUT;
1233 }
1234 udelay(1);
1235 }
1236
112eee0c 1237 isp->stop_failure = false;
1567bb7d 1238 isp->crashed = 0;
448de7e7
SA		 1239 return 0;
1240}
1241
1242/*
1243 * isp_save_context - Saves the values of the ISP module registers.
1244 * @isp: OMAP3 ISP device
1245 * @reg_list: Structure containing pairs of register address and value to
1246 * modify on OMAP.
1247 */
1248static void
1249isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1250{
1251 struct isp_reg *next = reg_list;
1252
1253 for (; next->reg != ISP_TOK_TERM; next++)
1254 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1255}
1256
1257/*
1258 * isp_restore_context - Restores the values of the ISP module registers.
1259 * @isp: OMAP3 ISP device
1260 * @reg_list: Structure containing pairs of register address and value to
1261 * modify on OMAP.
1262 */
1263static void
1264isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1265{
1266 struct isp_reg *next = reg_list;
1267
1268 for (; next->reg != ISP_TOK_TERM; next++)
1269 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1270}
1271
1272/*
1273 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1274 * @isp: OMAP3 ISP device
1275 *
1276 * Routine for saving the context of each module in the ISP.
1277 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1278 */
1279static void isp_save_ctx(struct isp_device *isp)
1280{
1281 isp_save_context(isp, isp_reg_list);
fabdbca8 1282 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1283}
1284
1285/*
1286 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1287 * @isp: OMAP3 ISP device
1288 *
1289 * Routine for restoring the context of each module in the ISP.
1290 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1291 */
1292static void isp_restore_ctx(struct isp_device *isp)
1293{
1294 isp_restore_context(isp, isp_reg_list);
fabdbca8 1295 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1296 omap3isp_ccdc_restore_context(isp);
1297 omap3isp_preview_restore_context(isp);
1298}
1299
1300/* -----------------------------------------------------------------------------
1301 * SBL resources management
1302 */
1303#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1304 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1305 OMAP3_ISP_SBL_PREVIEW_READ | \
1306 OMAP3_ISP_SBL_RESIZER_READ)
1307#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1308 OMAP3_ISP_SBL_CSI2A_WRITE | \
1309 OMAP3_ISP_SBL_CSI2C_WRITE | \
1310 OMAP3_ISP_SBL_CCDC_WRITE | \
1311 OMAP3_ISP_SBL_PREVIEW_WRITE)
1312
1313void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1314{
1315 u32 sbl = 0;
1316
1317 isp->sbl_resources |= res;
1318
1319 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1320 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1321
1322 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1323 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1324
1325 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1326 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1327
1328 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1329 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1330
1331 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1332 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1333
1334 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1335 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1336
1337 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1338}
1339
1340void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1341{
1342 u32 sbl = 0;
1343
1344 isp->sbl_resources &= ~res;
1345
1346 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1347 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1348
1349 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1350 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1351
1352 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1353 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1354
1355 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1356 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1357
1358 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1359 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1360
1361 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1362 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1363
1364 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1365}
1366
1367/*
1368 * isp_module_sync_idle - Helper to sync module with its idle state
1369 * @me: ISP submodule's media entity
1370 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1371 * @stopping: flag which tells module wants to stop
1372 *
1373 * This function checks if ISP submodule needs to wait for next interrupt. If
1374 * yes, makes the caller to sleep while waiting for such event.
1375 */
1376int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1377 atomic_t *stopping)
1378{
1379 struct isp_pipeline *pipe = to_isp_pipeline(me);
1380
1381 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1382 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1383 !isp_pipeline_ready(pipe)))
1384 return 0;
1385
1386 /*
1387 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1388 * scenario. We'll call it here to avoid race conditions.
1389 */
1390 atomic_set(stopping, 1);
1391 smp_mb();
1392
1393 /*
1394 * If module is the last one, it's writing to memory. In this case,
1395 * it's necessary to check if the module is already paused due to
1396 * DMA queue underrun or if it has to wait for next interrupt to be
1397 * idle.
1398 * If it isn't the last one, the function won't sleep but *stopping
1399 * will still be set to warn next submodule caller's interrupt the
1400 * module wants to be idle.
1401 */
1402 if (isp_pipeline_is_last(me)) {
1403 struct isp_video *video = pipe->output;
1404 unsigned long flags;
e8feb876 1405 spin_lock_irqsave(&video->irqlock, flags);
448de7e7 1406 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
e8feb876 1407 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1408 atomic_set(stopping, 0);
1409 smp_mb();
1410 return 0;
1411 }
e8feb876 1412 spin_unlock_irqrestore(&video->irqlock, flags);
448de7e7
SA		 1413 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1414 msecs_to_jiffies(1000))) {
1415 atomic_set(stopping, 0);
1416 smp_mb();
1417 return -ETIMEDOUT;
1418 }
1419 }
1420
1421 return 0;
1422}
1423
1424/*
1e9c4d49 1425 * omap3isp_module_sync_is_stopping - Helper to verify if module was stopping
448de7e7
SA		 1426 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1427 * @stopping: flag which tells module wants to stop
1428 *
1429 * This function checks if ISP submodule was stopping. In case of yes, it
1430 * notices the caller by setting stopping to 0 and waking up the wait queue.
1431 * Returns 1 if it was stopping or 0 otherwise.
1432 */
1433int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1434 atomic_t *stopping)
1435{
1436 if (atomic_cmpxchg(stopping, 1, 0)) {
1437 wake_up(wait);
1438 return 1;
1439 }
1440
1441 return 0;
1442}
1443
1444/* --------------------------------------------------------------------------
1445 * Clock management
1446 */
1447
1448#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1449 ISPCTRL_HIST_CLK_EN | \
1450 ISPCTRL_RSZ_CLK_EN | \
1451 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1452 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1453
1454static void __isp_subclk_update(struct isp_device *isp)
1455{
1456 u32 clk = 0;
1457
be9a1b98
LP		 1458 /* AEWB and AF share the same clock. */
1459 if (isp->subclk_resources &
1460 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1461 clk |= ISPCTRL_H3A_CLK_EN;
1462
1463 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1464 clk |= ISPCTRL_HIST_CLK_EN;
1465
1466 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1467 clk |= ISPCTRL_RSZ_CLK_EN;
1468
1469 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1470 * RAM as well.
448de7e7
SA		 1471 */
1472 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1473 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1474
1475 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1476 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1477
1478 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1479 ISPCTRL_CLKS_MASK, clk);
1480}
1481
1482void omap3isp_subclk_enable(struct isp_device *isp,
1483 enum isp_subclk_resource res)
1484{
1485 isp->subclk_resources |= res;
1486
1487 __isp_subclk_update(isp);
1488}
1489
1490void omap3isp_subclk_disable(struct isp_device *isp,
1491 enum isp_subclk_resource res)
1492{
1493 isp->subclk_resources &= ~res;
1494
1495 __isp_subclk_update(isp);
1496}
1497
1498/*
1499 * isp_enable_clocks - Enable ISP clocks
1500 * @isp: OMAP3 ISP device
1501 *
b057c3c3
LP		 1502 * Return 0 if successful, or clk_prepare_enable return value if any of them
1503 * fails.
448de7e7
SA		 1504 */
1505static int isp_enable_clocks(struct isp_device *isp)
1506{
1507 int r;
1508 unsigned long rate;
448de7e7 1509
b057c3c3 1510 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1511 if (r) {
b057c3c3 1512 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA		 1513 goto out_clk_enable_ick;
1514 }
6d1aa02f 1515 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1516 if (r) {
6d1aa02f 1517 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA		 1518 goto out_clk_enable_mclk;
1519 }
b057c3c3 1520 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1521 if (r) {
b057c3c3 1522 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA		 1523 goto out_clk_enable_mclk;
1524 }
1525 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1526 if (rate != CM_CAM_MCLK_HZ)
1527 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1528 " expected : %d\n"
1529 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1530 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1531 if (r) {
b057c3c3 1532 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA		 1533 goto out_clk_enable_csi2_fclk;
1534 }
1535 return 0;
1536
1537out_clk_enable_csi2_fclk:
b057c3c3 1538 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1539out_clk_enable_mclk:
b057c3c3 1540 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA		 1541out_clk_enable_ick:
1542 return r;
1543}
1544
1545/*
1546 * isp_disable_clocks - Disable ISP clocks
1547 * @isp: OMAP3 ISP device
1548 */
1549static void isp_disable_clocks(struct isp_device *isp)
1550{
b057c3c3
LP		 1551 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1552 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1553 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA		 1554}
1555
1556static const char *isp_clocks[] = {
1557 "cam_ick",
1558 "cam_mclk",
448de7e7
SA		 1559 "csi2_96m_fck",
1560 "l3_ick",
1561};
1562
448de7e7
SA		 1563static int isp_get_clocks(struct isp_device *isp)
1564{
1565 struct clk *clk;
1566 unsigned int i;
1567
1568 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1569 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA		 1570 if (IS_ERR(clk)) {
1571 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA		 1572 return PTR_ERR(clk);
1573 }
1574
1575 isp->clock[i] = clk;
1576 }
1577
1578 return 0;
1579}
1580
1581/*
1582 * omap3isp_get - Acquire the ISP resource.
1583 *
1584 * Initializes the clocks for the first acquire.
1585 *
1586 * Increment the reference count on the ISP. If the first reference is taken,
1587 * enable clocks and power-up all submodules.
1588 *
25985edc 1589 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1590 */
96d62ae2 1591static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1592{
1593 struct isp_device *__isp = isp;
1594
1595 if (isp == NULL)
1596 return NULL;
1597
1598 mutex_lock(&isp->isp_mutex);
1599 if (isp->ref_count > 0)
1600 goto out;
1601
1602 if (isp_enable_clocks(isp) < 0) {
1603 __isp = NULL;
1604 goto out;
1605 }
1606
1607 /* We don't want to restore context before saving it! */
1608 if (isp->has_context)
1609 isp_restore_ctx(isp);
448de7e7 1610
96d62ae2
LP		 1611 if (irq)
1612 isp_enable_interrupts(isp);
448de7e7
SA		 1613
1614out:
1615 if (__isp != NULL)
1616 isp->ref_count++;
1617 mutex_unlock(&isp->isp_mutex);
1618
1619 return __isp;
1620}
1621
96d62ae2
LP		 1622struct isp_device *omap3isp_get(struct isp_device *isp)
1623{
1624 return __omap3isp_get(isp, true);
1625}
1626
448de7e7
SA		 1627/*
1628 * omap3isp_put - Release the ISP
1629 *
1630 * Decrement the reference count on the ISP. If the last reference is released,
1631 * power-down all submodules, disable clocks and free temporary buffers.
1632 */
2a0a5472 1633static void __omap3isp_put(struct isp_device *isp, bool save_ctx)
448de7e7
SA		 1634{
1635 if (isp == NULL)
1636 return;
1637
1638 mutex_lock(&isp->isp_mutex);
1639 BUG_ON(isp->ref_count == 0);
1640 if (--isp->ref_count == 0) {
1641 isp_disable_interrupts(isp);
2a0a5472 1642 if (save_ctx) {
a32f2f90 1643 isp_save_ctx(isp);
96d62ae2
LP		 1644 isp->has_context = 1;
1645 }
1567bb7d
LP		 1646 /* Reset the ISP if an entity has failed to stop. This is the
1647 * only way to recover from such conditions.
1648 */
112eee0c 1649 if (isp->crashed || isp->stop_failure)
994d5375 1650 isp_reset(isp);
448de7e7
SA		 1651 isp_disable_clocks(isp);
1652 }
1653 mutex_unlock(&isp->isp_mutex);
1654}
1655
2a0a5472
LP		 1656void omap3isp_put(struct isp_device *isp)
1657{
1658 __omap3isp_put(isp, true);
1659}
1660
448de7e7
SA		 1661/* --------------------------------------------------------------------------
1662 * Platform device driver
1663 */
1664
1665/*
1666 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1667 * @isp: OMAP3 ISP device
1668 */
1669#define ISP_PRINT_REGISTER(isp, name)\
1670 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1671 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1672#define SBL_PRINT_REGISTER(isp, name)\
1673 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1674 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1675
1676void omap3isp_print_status(struct isp_device *isp)
1677{
1678 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1679
1680 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1681 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1682 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1683 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1684 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1685 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1686 ISP_PRINT_REGISTER(isp, CTRL);
1687 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1688 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1689 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1690 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1691 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1692 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1693 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1694 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1695
1696 SBL_PRINT_REGISTER(isp, PCR);
1697 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1698
1699 dev_dbg(isp->dev, "--------------------------------------------\n");
1700}
1701
1702#ifdef CONFIG_PM
1703
1704/*
1705 * Power management support.
1706 *
1707 * As the ISP can't properly handle an input video stream interruption on a non
1708 * frame boundary, the ISP pipelines need to be stopped before sensors get
1709 * suspended. However, as suspending the sensors can require a running clock,
1710 * which can be provided by the ISP, the ISP can't be completely suspended
1711 * before the sensor.
1712 *
1713 * To solve this problem power management support is split into prepare/complete
1714 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1715 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1716 * resume(), and the the pipelines are restarted in complete().
1717 *
39c1cb2b 1718 * TODO: PM dependencies between the ISP and sensors are not modelled explicitly
448de7e7
SA		 1719 * yet.
1720 */
1721static int isp_pm_prepare(struct device *dev)
1722{
1723 struct isp_device *isp = dev_get_drvdata(dev);
1724 int reset;
1725
1726 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1727
1728 if (isp->ref_count == 0)
1729 return 0;
1730
1731 reset = isp_suspend_modules(isp);
1732 isp_disable_interrupts(isp);
1733 isp_save_ctx(isp);
1734 if (reset)
1735 isp_reset(isp);
1736
1737 return 0;
1738}
1739
1740static int isp_pm_suspend(struct device *dev)
1741{
1742 struct isp_device *isp = dev_get_drvdata(dev);
1743
1744 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1745
1746 if (isp->ref_count)
1747 isp_disable_clocks(isp);
1748
1749 return 0;
1750}
1751
1752static int isp_pm_resume(struct device *dev)
1753{
1754 struct isp_device *isp = dev_get_drvdata(dev);
1755
1756 if (isp->ref_count == 0)
1757 return 0;
1758
1759 return isp_enable_clocks(isp);
1760}
1761
1762static void isp_pm_complete(struct device *dev)
1763{
1764 struct isp_device *isp = dev_get_drvdata(dev);
1765
1766 if (isp->ref_count == 0)
1767 return;
1768
1769 isp_restore_ctx(isp);
1770 isp_enable_interrupts(isp);
1771 isp_resume_modules(isp);
1772}
1773
1774#else
1775
1776#define isp_pm_prepare NULL
1777#define isp_pm_suspend NULL
1778#define isp_pm_resume NULL
1779#define isp_pm_complete NULL
1780
1781#endif /* CONFIG_PM */
1782
1783static void isp_unregister_entities(struct isp_device *isp)
1784{
1785 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1786 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1787 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1788 omap3isp_preview_unregister_entities(&isp->isp_prev);
1789 omap3isp_resizer_unregister_entities(&isp->isp_res);
1790 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1791 omap3isp_stat_unregister_entities(&isp->isp_af);
1792 omap3isp_stat_unregister_entities(&isp->isp_hist);
1793
1794 v4l2_device_unregister(&isp->v4l2_dev);
1795 media_device_unregister(&isp->media_dev);
1796}
1797
703e6f62
SA		 1798static int isp_link_entity(
1799 struct isp_device *isp, struct media_entity *entity,
1800 enum isp_interface_type interface)
1801{
1802 struct media_entity *input;
1803 unsigned int flags;
1804 unsigned int pad;
1805 unsigned int i;
1806
1807 /* Connect the sensor to the correct interface module.
1808 * Parallel sensors are connected directly to the CCDC, while
1809 * serial sensors are connected to the CSI2a, CCP2b or CSI2c
1810 * receiver through CSIPHY1 or CSIPHY2.
1811 */
1812 switch (interface) {
1813 case ISP_INTERFACE_PARALLEL:
1814 input = &isp->isp_ccdc.subdev.entity;
1815 pad = CCDC_PAD_SINK;
1816 flags = 0;
1817 break;
1818
1819 case ISP_INTERFACE_CSI2A_PHY2:
1820 input = &isp->isp_csi2a.subdev.entity;
1821 pad = CSI2_PAD_SINK;
1822 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1823 break;
1824
1825 case ISP_INTERFACE_CCP2B_PHY1:
1826 case ISP_INTERFACE_CCP2B_PHY2:
1827 input = &isp->isp_ccp2.subdev.entity;
1828 pad = CCP2_PAD_SINK;
1829 flags = 0;
1830 break;
1831
1832 case ISP_INTERFACE_CSI2C_PHY1:
1833 input = &isp->isp_csi2c.subdev.entity;
1834 pad = CSI2_PAD_SINK;
1835 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1836 break;
1837
1838 default:
1839 dev_err(isp->dev, "%s: invalid interface type %u\n", __func__,
1840 interface);
1841 return -EINVAL;
1842 }
1843
1844 /*
1845 * Not all interfaces are available on all revisions of the
1846 * ISP. The sub-devices of those interfaces aren't initialised
1847 * in such a case. Check this by ensuring the num_pads is
1848 * non-zero.
1849 */
1850 if (!input->num_pads) {
1851 dev_err(isp->dev, "%s: invalid input %u\n", entity->name,
1852 interface);
1853 return -EINVAL;
1854 }
1855
1856 for (i = 0; i < entity->num_pads; i++) {
1857 if (entity->pads[i].flags & MEDIA_PAD_FL_SOURCE)
1858 break;
1859 }
1860 if (i == entity->num_pads) {
1861 dev_err(isp->dev, "%s: no source pad in external entity\n",
1862 __func__);
1863 return -EINVAL;
1864 }
1865
8df00a15 1866 return media_create_pad_link(entity, i, input, pad, flags);
703e6f62
SA		 1867}
1868
448de7e7
SA		 1869static int isp_register_entities(struct isp_device *isp)
1870{
448de7e7
SA		 1871 int ret;
1872
1873 isp->media_dev.dev = isp->dev;
1874 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1875 sizeof(isp->media_dev.model));
083eb078 1876 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1877 isp->media_dev.link_notify = isp_pipeline_link_notify;
1878 ret = media_device_register(&isp->media_dev);
1879 if (ret < 0) {
4feca39b 1880 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
448de7e7
SA		 1881 __func__, ret);
1882 return ret;
1883 }
1884
1885 isp->v4l2_dev.mdev = &isp->media_dev;
1886 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1887 if (ret < 0) {
4feca39b 1888 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA		 1889 __func__, ret);
1890 goto done;
1891 }
1892
1893 /* Register internal entities */
1894 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1895 if (ret < 0)
1896 goto done;
1897
1898 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1899 if (ret < 0)
1900 goto done;
1901
1902 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1903 if (ret < 0)
1904 goto done;
1905
1906 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1907 &isp->v4l2_dev);
1908 if (ret < 0)
1909 goto done;
1910
1911 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1912 if (ret < 0)
1913 goto done;
1914
1915 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1916 if (ret < 0)
1917 goto done;
1918
1919 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1920 if (ret < 0)
1921 goto done;
1922
1923 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1924 if (ret < 0)
1925 goto done;
1926
448de7e7 1927done:
5d479386 1928 if (ret < 0)
448de7e7
SA		 1929 isp_unregister_entities(isp);
1930
1931 return ret;
1932}
1933
f2f6da0d
JMC		 1934/*
1935 * isp_create_pads_links - Pads links creation for the subdevices
1936 * @isp : Pointer to ISP device
1937 * return negative error code or zero on success
1938 */
1939static int isp_create_pads_links(struct isp_device *isp)
1940{
1941 int ret;
1942
1943 ret = omap3isp_csi2_create_pads_links(isp);
1944 if (ret < 0) {
1945 dev_err(isp->dev, "CSI2 pads links creation failed\n");
1946 return ret;
1947 }
1948
1949 ret = omap3isp_ccp2_create_pads_links(isp);
1950 if (ret < 0) {
1951 dev_err(isp->dev, "CCP2 pads links creation failed\n");
1952 return ret;
1953 }
1954
1955 ret = omap3isp_ccdc_create_pads_links(isp);
1956 if (ret < 0) {
1957 dev_err(isp->dev, "CCDC pads links creation failed\n");
1958 return ret;
1959 }
1960
1961 ret = omap3isp_preview_create_pads_links(isp);
1962 if (ret < 0) {
1963 dev_err(isp->dev, "Preview pads links creation failed\n");
1964 return ret;
1965 }
1966
1967 ret = omap3isp_resizer_create_pads_links(isp);
1968 if (ret < 0) {
1969 dev_err(isp->dev, "Resizer pads links creation failed\n");
1970 return ret;
1971 }
1972
1973 /* Connect the submodules. */
1974 ret = media_create_pad_link(
1975 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1976 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1977 if (ret < 0)
1978 return ret;
1979
1980 ret = media_create_pad_link(
1981 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1982 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1983 if (ret < 0)
1984 return ret;
1985
1986 ret = media_create_pad_link(
1987 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1988 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1989 if (ret < 0)
1990 return ret;
1991
1992 ret = media_create_pad_link(
1993 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1994 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1995 if (ret < 0)
1996 return ret;
1997
1998 ret = media_create_pad_link(
1999 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2000 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2001 if (ret < 0)
2002 return ret;
2003
2004 ret = media_create_pad_link(
2005 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2006 &isp->isp_aewb.subdev.entity, 0,
2007 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2008 if (ret < 0)
2009 return ret;
2010
2011 ret = media_create_pad_link(
2012 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2013 &isp->isp_af.subdev.entity, 0,
2014 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2015 if (ret < 0)
2016 return ret;
2017
2018 ret = media_create_pad_link(
2019 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2020 &isp->isp_hist.subdev.entity, 0,
2021 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2022 if (ret < 0)
2023 return ret;
2024
2025 return 0;
2026}
2027
448de7e7
SA		 2028static void isp_cleanup_modules(struct isp_device *isp)
2029{
2030 omap3isp_h3a_aewb_cleanup(isp);
2031 omap3isp_h3a_af_cleanup(isp);
2032 omap3isp_hist_cleanup(isp);
2033 omap3isp_resizer_cleanup(isp);
2034 omap3isp_preview_cleanup(isp);
2035 omap3isp_ccdc_cleanup(isp);
2036 omap3isp_ccp2_cleanup(isp);
2037 omap3isp_csi2_cleanup(isp);
2038}
2039
2040static int isp_initialize_modules(struct isp_device *isp)
2041{
2042 int ret;
2043
2044 ret = omap3isp_csiphy_init(isp);
2045 if (ret < 0) {
2046 dev_err(isp->dev, "CSI PHY initialization failed\n");
2047 goto error_csiphy;
2048 }
2049
2050 ret = omap3isp_csi2_init(isp);
2051 if (ret < 0) {
2052 dev_err(isp->dev, "CSI2 initialization failed\n");
2053 goto error_csi2;
2054 }
2055
2056 ret = omap3isp_ccp2_init(isp);
2057 if (ret < 0) {
2058 dev_err(isp->dev, "CCP2 initialization failed\n");
2059 goto error_ccp2;
2060 }
2061
2062 ret = omap3isp_ccdc_init(isp);
2063 if (ret < 0) {
2064 dev_err(isp->dev, "CCDC initialization failed\n");
2065 goto error_ccdc;
2066 }
2067
2068 ret = omap3isp_preview_init(isp);
2069 if (ret < 0) {
2070 dev_err(isp->dev, "Preview initialization failed\n");
2071 goto error_preview;
2072 }
2073
2074 ret = omap3isp_resizer_init(isp);
2075 if (ret < 0) {
2076 dev_err(isp->dev, "Resizer initialization failed\n");
2077 goto error_resizer;
2078 }
2079
2080 ret = omap3isp_hist_init(isp);
2081 if (ret < 0) {
2082 dev_err(isp->dev, "Histogram initialization failed\n");
2083 goto error_hist;
2084 }
2085
2086 ret = omap3isp_h3a_aewb_init(isp);
2087 if (ret < 0) {
2088 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2089 goto error_h3a_aewb;
2090 }
2091
2092 ret = omap3isp_h3a_af_init(isp);
2093 if (ret < 0) {
2094 dev_err(isp->dev, "H3A AF initialization failed\n");
2095 goto error_h3a_af;
2096 }
2097
448de7e7
SA		 2098 return 0;
2099
448de7e7
SA		 2100error_h3a_af:
2101 omap3isp_h3a_aewb_cleanup(isp);
2102error_h3a_aewb:
2103 omap3isp_hist_cleanup(isp);
2104error_hist:
2105 omap3isp_resizer_cleanup(isp);
2106error_resizer:
2107 omap3isp_preview_cleanup(isp);
2108error_preview:
2109 omap3isp_ccdc_cleanup(isp);
2110error_ccdc:
2111 omap3isp_ccp2_cleanup(isp);
2112error_ccp2:
2113 omap3isp_csi2_cleanup(isp);
2114error_csi2:
2115error_csiphy:
2116 return ret;
2117}
2118
2a0a5472
LP		 2119static void isp_detach_iommu(struct isp_device *isp)
2120{
2121 arm_iommu_release_mapping(isp->mapping);
2122 isp->mapping = NULL;
2123 iommu_group_remove_device(isp->dev);
2124}
2125
2126static int isp_attach_iommu(struct isp_device *isp)
2127{
2128 struct dma_iommu_mapping *mapping;
2129 struct iommu_group *group;
2130 int ret;
2131
2132 /* Create a device group and add the device to it. */
2133 group = iommu_group_alloc();
2134 if (IS_ERR(group)) {
2135 dev_err(isp->dev, "failed to allocate IOMMU group\n");
2136 return PTR_ERR(group);
2137 }
2138
2139 ret = iommu_group_add_device(group, isp->dev);
2140 iommu_group_put(group);
2141
2142 if (ret < 0) {
2143 dev_err(isp->dev, "failed to add device to IPMMU group\n");
2144 return ret;
2145 }
2146
2147 /*
2148 * Create the ARM mapping, used by the ARM DMA mapping core to allocate
2149 * VAs. This will allocate a corresponding IOMMU domain.
2150 */
2151 mapping = arm_iommu_create_mapping(&platform_bus_type, SZ_1G, SZ_2G);
2152 if (IS_ERR(mapping)) {
2153 dev_err(isp->dev, "failed to create ARM IOMMU mapping\n");
2154 ret = PTR_ERR(mapping);
2155 goto error;
2156 }
2157
2158 isp->mapping = mapping;
2159
2160 /* Attach the ARM VA mapping to the device. */
2161 ret = arm_iommu_attach_device(isp->dev, mapping);
2162 if (ret < 0) {
2163 dev_err(isp->dev, "failed to attach device to VA mapping\n");
2164 goto error;
2165 }
2166
2167 return 0;
2168
2169error:
2170 isp_detach_iommu(isp);
2171 return ret;
2172}
2173
448de7e7
SA		 2174/*
2175 * isp_remove - Remove ISP platform device
2176 * @pdev: Pointer to ISP platform device
2177 *
2178 * Always returns 0.
2179 */
4c62e976 2180static int isp_remove(struct platform_device *pdev)
448de7e7
SA		 2181{
2182 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7 2183
da7f3843 2184 v4l2_async_notifier_unregister(&isp->notifier);
448de7e7
SA		 2185 isp_unregister_entities(isp);
2186 isp_cleanup_modules(isp);
9b28ee3c 2187 isp_xclk_cleanup(isp);
448de7e7 2188
96d62ae2 2189 __omap3isp_get(isp, false);
2a0a5472
LP		 2190 isp_detach_iommu(isp);
2191 __omap3isp_put(isp, false);
448de7e7 2192
448de7e7
SA		 2193 return 0;
2194}
2195
da7f3843
SA		 2196enum isp_of_phy {
2197 ISP_OF_PHY_PARALLEL = 0,
2198 ISP_OF_PHY_CSIPHY1,
2199 ISP_OF_PHY_CSIPHY2,
2200};
2201
2202static int isp_of_parse_node(struct device *dev, struct device_node *node,
2203 struct isp_async_subdev *isd)
2204{
2205 struct isp_bus_cfg *buscfg = &isd->bus;
2206 struct v4l2_of_endpoint vep;
2207 unsigned int i;
2208
2209 v4l2_of_parse_endpoint(node, &vep);
2210
2211 dev_dbg(dev, "parsing endpoint %s, interface %u\n", node->full_name,
2212 vep.base.port);
2213
2214 switch (vep.base.port) {
2215 case ISP_OF_PHY_PARALLEL:
2216 buscfg->interface = ISP_INTERFACE_PARALLEL;
2217 buscfg->bus.parallel.data_lane_shift =
2218 vep.bus.parallel.data_shift;
2219 buscfg->bus.parallel.clk_pol =
2220 !!(vep.bus.parallel.flags
2221 & V4L2_MBUS_PCLK_SAMPLE_FALLING);
2222 buscfg->bus.parallel.hs_pol =
2223 !!(vep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW);
2224 buscfg->bus.parallel.vs_pol =
2225 !!(vep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW);
2226 buscfg->bus.parallel.fld_pol =
2227 !!(vep.bus.parallel.flags & V4L2_MBUS_FIELD_EVEN_LOW);
2228 buscfg->bus.parallel.data_pol =
2229 !!(vep.bus.parallel.flags & V4L2_MBUS_DATA_ACTIVE_LOW);
2230 break;
2231
2232 case ISP_OF_PHY_CSIPHY1:
2233 case ISP_OF_PHY_CSIPHY2:
2234 /* FIXME: always assume CSI-2 for now. */
2235 switch (vep.base.port) {
2236 case ISP_OF_PHY_CSIPHY1:
2237 buscfg->interface = ISP_INTERFACE_CSI2C_PHY1;
2238 break;
2239 case ISP_OF_PHY_CSIPHY2:
2240 buscfg->interface = ISP_INTERFACE_CSI2A_PHY2;
2241 break;
2242 }
2243 buscfg->bus.csi2.lanecfg.clk.pos = vep.bus.mipi_csi2.clock_lane;
2244 buscfg->bus.csi2.lanecfg.clk.pol =
2245 vep.bus.mipi_csi2.lane_polarities[0];
2246 dev_dbg(dev, "clock lane polarity %u, pos %u\n",
2247 buscfg->bus.csi2.lanecfg.clk.pol,
2248 buscfg->bus.csi2.lanecfg.clk.pos);
2249
2250 for (i = 0; i < ISP_CSIPHY2_NUM_DATA_LANES; i++) {
2251 buscfg->bus.csi2.lanecfg.data[i].pos =
2252 vep.bus.mipi_csi2.data_lanes[i];
2253 buscfg->bus.csi2.lanecfg.data[i].pol =
2254 vep.bus.mipi_csi2.lane_polarities[i + 1];
2255 dev_dbg(dev, "data lane %u polarity %u, pos %u\n", i,
2256 buscfg->bus.csi2.lanecfg.data[i].pol,
2257 buscfg->bus.csi2.lanecfg.data[i].pos);
2258 }
2259
2260 /*
2261 * FIXME: now we assume the CRC is always there.
2262 * Implement a way to obtain this information from the
2263 * sensor. Frame descriptors, perhaps?
2264 */
2265 buscfg->bus.csi2.crc = 1;
2266 break;
2267
2268 default:
2269 dev_warn(dev, "%s: invalid interface %u\n", node->full_name,
2270 vep.base.port);
2271 break;
2272 }
2273
2274 return 0;
2275}
2276
2277static int isp_of_parse_nodes(struct device *dev,
2278 struct v4l2_async_notifier *notifier)
2279{
2280 struct device_node *node = NULL;
2281
2282 notifier->subdevs = devm_kcalloc(
2283 dev, ISP_MAX_SUBDEVS, sizeof(*notifier->subdevs), GFP_KERNEL);
2284 if (!notifier->subdevs)
2285 return -ENOMEM;
2286
2287 while (notifier->num_subdevs < ISP_MAX_SUBDEVS &&
2288 (node = of_graph_get_next_endpoint(dev->of_node, node))) {
2289 struct isp_async_subdev *isd;
2290
2291 isd = devm_kzalloc(dev, sizeof(*isd), GFP_KERNEL);
2292 if (!isd) {
2293 of_node_put(node);
2294 return -ENOMEM;
2295 }
2296
2297 notifier->subdevs[notifier->num_subdevs] = &isd->asd;
2298
2299 if (isp_of_parse_node(dev, node, isd)) {
2300 of_node_put(node);
2301 return -EINVAL;
2302 }
2303
2304 isd->asd.match.of.node = of_graph_get_remote_port_parent(node);
2305 of_node_put(node);
2306 if (!isd->asd.match.of.node) {
2307 dev_warn(dev, "bad remote port parent\n");
2308 return -EINVAL;
2309 }
2310
2311 isd->asd.match_type = V4L2_ASYNC_MATCH_OF;
2312 notifier->num_subdevs++;
2313 }
2314
2315 return notifier->num_subdevs;
2316}
2317
2318static int isp_subdev_notifier_bound(struct v4l2_async_notifier *async,
2319 struct v4l2_subdev *subdev,
2320 struct v4l2_async_subdev *asd)
2321{
da7f3843
SA		 2322 struct isp_async_subdev *isd =
2323 container_of(asd, struct isp_async_subdev, asd);
da7f3843
SA		 2324
2325 isd->sd = subdev;
2326 isd->sd->host_priv = &isd->bus;
2327
68a57fa9 2328 return 0;
da7f3843
SA		 2329}
2330
2331static int isp_subdev_notifier_complete(struct v4l2_async_notifier *async)
2332{
2333 struct isp_device *isp = container_of(async, struct isp_device,
2334 notifier);
68a57fa9
JMC		 2335 struct v4l2_device *v4l2_dev = &isp->v4l2_dev;
2336 struct v4l2_subdev *sd;
2337 struct isp_bus_cfg *bus;
2338 int ret;
2339
2340 list_for_each_entry(sd, &v4l2_dev->subdevs, list) {
2341 /* Only try to link entities whose interface was set on bound */
2342 if (sd->host_priv) {
2343 bus = (struct isp_bus_cfg *)sd->host_priv;
2344 ret = isp_link_entity(isp, &sd->entity, bus->interface);
2345 if (ret < 0)
2346 return ret;
2347 }
2348 }
da7f3843
SA		 2349
2350 return v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
2351}
2352
448de7e7
SA		 2353/*
2354 * isp_probe - Probe ISP platform device
2355 * @pdev: Pointer to ISP platform device
2356 *
2357 * Returns 0 if successful,
2358 * -ENOMEM if no memory available,
2359 * -ENODEV if no platform device resources found
2360 * or no space for remapping registers,
2361 * -EINVAL if couldn't install ISR,
2362 * or clk_get return error value.
2363 */
4c62e976 2364static int isp_probe(struct platform_device *pdev)
448de7e7 2365{
448de7e7 2366 struct isp_device *isp;
8644cdf9 2367 struct resource *mem;
448de7e7
SA		 2368 int ret;
2369 int i, m;
2370
cf2b4cf6 2371 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA		 2372 if (!isp) {
2373 dev_err(&pdev->dev, "could not allocate memory\n");
2374 return -ENOMEM;
2375 }
2376
78c66fbc
LP		 2377 ret = of_property_read_u32(pdev->dev.of_node, "ti,phy-type",
2378 &isp->phy_type);
2379 if (ret)
2380 return ret;
da7f3843 2381
78c66fbc
LP		 2382 isp->syscon = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
2383 "syscon");
2384 if (IS_ERR(isp->syscon))
2385 return PTR_ERR(isp->syscon);
da7f3843 2386
78c66fbc
LP		 2387 ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1,
2388 &isp->syscon_offset);
2389 if (ret)
2390 return ret;
da7f3843 2391
78c66fbc
LP		 2392 ret = isp_of_parse_nodes(&pdev->dev, &isp->notifier);
2393 if (ret < 0)
2394 return ret;
da7f3843 2395
448de7e7 2396 isp->autoidle = autoidle;
448de7e7
SA		 2397
2398 mutex_init(&isp->isp_mutex);
2399 spin_lock_init(&isp->stat_lock);
2400
2401 isp->dev = &pdev->dev;
448de7e7
SA		 2402 isp->ref_count = 0;
2403
224ddca0
RK		 2404 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2405 if (ret)
697cca21 2406 goto error;
448de7e7
SA		 2407
2408 platform_set_drvdata(pdev, isp);
2409
2410 /* Regulators */
3494bb05
SA		 2411 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy1");
2412 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "vdd-csiphy2");
448de7e7 2413
d8658bca
LP		 2414 /* Clocks
2415 *
2416 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2417 * manually to read the revision before calling __omap3isp_get().
8644cdf9
SA		 2418 *
2419 * Start by mapping the ISP MMIO area, which is in two pieces.
2420 * The ISP IOMMU is in between. Map both now, and fill in the
2421 * ISP revision specific portions a little later in the
2422 * function.
d8658bca 2423 */
8644cdf9
SA		 2424 for (i = 0; i < 2; i++) {
2425 unsigned int map_idx = i ? OMAP3_ISP_IOMEM_CSI2A_REGS1 : 0;
2426
2427 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
2428 isp->mmio_base[map_idx] =
2429 devm_ioremap_resource(isp->dev, mem);
2430 if (IS_ERR(isp->mmio_base[map_idx]))
2431 return PTR_ERR(isp->mmio_base[map_idx]);
2432 }
448de7e7
SA		 2433
2434 ret = isp_get_clocks(isp);
2435 if (ret < 0)
2436 goto error;
2437
d8658bca
LP		 2438 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2439 if (ret < 0)
2440 goto error;
2441
2442 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2443 dev_info(isp->dev, "Revision %d.%d found\n",
2444 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2445
2446 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2447
0bd0dbee
PST		 2448 if (__omap3isp_get(isp, false) == NULL) {
2449 ret = -ENODEV;
448de7e7 2450 goto error;
0bd0dbee 2451 }
448de7e7
SA		 2452
2453 ret = isp_reset(isp);
2454 if (ret < 0)
2455 goto error_isp;
2456
9b28ee3c
LP		 2457 ret = isp_xclk_init(isp);
2458 if (ret < 0)
2459 goto error_isp;
2460
448de7e7 2461 /* Memory resources */
448de7e7
SA		 2462 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2463 if (isp->revision == isp_res_maps[m].isp_rev)
2464 break;
2465
2466 if (m == ARRAY_SIZE(isp_res_maps)) {
2467 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2468 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2469 ret = -ENODEV;
2470 goto error_isp;
2471 }
2472
8644cdf9
SA		 2473 for (i = 1; i < OMAP3_ISP_IOMEM_CSI2A_REGS1; i++)
2474 isp->mmio_base[i] =
2475 isp->mmio_base[0] + isp_res_maps[m].offset[i];
2476
2477 for (i = OMAP3_ISP_IOMEM_CSIPHY2; i < OMAP3_ISP_IOMEM_LAST; i++)
2478 isp->mmio_base[i] =
2479 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1]
2480 + isp_res_maps[m].offset[i];
2481
2482 isp->mmio_hist_base_phys =
2483 mem->start + isp_res_maps[m].offset[OMAP3_ISP_IOMEM_HIST];
448de7e7 2484
2a0a5472
LP		 2485 /* IOMMU */
2486 ret = isp_attach_iommu(isp);
2487 if (ret < 0) {
2488 dev_err(&pdev->dev, "unable to attach to IOMMU\n");
f626b52d
OBC		 2489 goto error_isp;
2490 }
2491
448de7e7
SA		 2492 /* Interrupt */
2493 isp->irq_num = platform_get_irq(pdev, 0);
2494 if (isp->irq_num <= 0) {
2495 dev_err(isp->dev, "No IRQ resource\n");
2496 ret = -ENODEV;
2a0a5472 2497 goto error_iommu;
448de7e7
SA		 2498 }
2499
cf2b4cf6
LP		 2500 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2501 "OMAP3 ISP", isp)) {
448de7e7
SA		 2502 dev_err(isp->dev, "Unable to request IRQ\n");
2503 ret = -EINVAL;
2a0a5472 2504 goto error_iommu;
448de7e7
SA		 2505 }
2506
2507 /* Entities */
2508 ret = isp_initialize_modules(isp);
2509 if (ret < 0)
2a0a5472 2510 goto error_iommu;
448de7e7
SA		 2511
2512 ret = isp_register_entities(isp);
2513 if (ret < 0)
2514 goto error_modules;
2515
f2f6da0d
JMC		 2516 ret = isp_create_pads_links(isp);
2517 if (ret < 0)
2518 goto error_register_entities;
2519
78c66fbc
LP		 2520 isp->notifier.bound = isp_subdev_notifier_bound;
2521 isp->notifier.complete = isp_subdev_notifier_complete;
5d479386 2522
78c66fbc
LP		 2523 ret = v4l2_async_notifier_register(&isp->v4l2_dev, &isp->notifier);
2524 if (ret)
2525 goto error_register_entities;
5d479386 2526
96d62ae2 2527 isp_core_init(isp, 1);
448de7e7
SA		 2528 omap3isp_put(isp);
2529
2530 return 0;
2531
5d479386
SA		 2532error_register_entities:
2533 isp_unregister_entities(isp);
448de7e7
SA		 2534error_modules:
2535 isp_cleanup_modules(isp);
2a0a5472
LP		 2536error_iommu:
2537 isp_detach_iommu(isp);
448de7e7 2538error_isp:
9b28ee3c 2539 isp_xclk_cleanup(isp);
2a0a5472 2540 __omap3isp_put(isp, false);
448de7e7 2541error:
ed33ac8e 2542 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2543
2544 return ret;
2545}
2546
2547static const struct dev_pm_ops omap3isp_pm_ops = {
2548 .prepare = isp_pm_prepare,
2549 .suspend = isp_pm_suspend,
2550 .resume = isp_pm_resume,
2551 .complete = isp_pm_complete,
2552};
2553
2554static struct platform_device_id omap3isp_id_table[] = {
2555 { "omap3isp", 0 },
2556 { },
2557};
2558MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2559
da7f3843
SA		 2560static const struct of_device_id omap3isp_of_table[] = {
2561 { .compatible = "ti,omap3-isp" },
2562 { },
2563};
2564
448de7e7
SA		 2565static struct platform_driver omap3isp_driver = {
2566 .probe = isp_probe,
4c62e976 2567 .remove = isp_remove,
448de7e7
SA		 2568 .id_table = omap3isp_id_table,
2569 .driver = {
448de7e7
SA		 2570 .name = "omap3isp",
2571 .pm = &omap3isp_pm_ops,
da7f3843 2572 .of_match_table = omap3isp_of_table,
448de7e7
SA		 2573 },
2574};
2575
1d6629b1 2576module_platform_driver(omap3isp_driver);
448de7e7
SA		 2577
2578MODULE_AUTHOR("Nokia Corporation");
2579MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2580MODULE_LICENSE("GPL");
64dc3c1a 2581MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git