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[thirdparty/kernel/stable.git] / drivers / media / platform / omap3isp / isp.c
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448de7e7
SA		 1/*
2 * isp.c
3 *
4 * TI OMAP3 ISP - Core
5 *
6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
8 *
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
11 *
12 * Contributors:
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
39 *
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
43 *
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
48 *
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
52 * 02110-1301 USA
53 */
54
55#include <asm/cacheflush.h>
56
57#include <linux/clk.h>
9b28ee3c 58#include <linux/clkdev.h>
448de7e7
SA		 59#include <linux/delay.h>
60#include <linux/device.h>
61#include <linux/dma-mapping.h>
62#include <linux/i2c.h>
63#include <linux/interrupt.h>
64#include <linux/module.h>
c8d35c84 65#include <linux/omap-iommu.h>
448de7e7
SA		 66#include <linux/platform_device.h>
67#include <linux/regulator/consumer.h>
68#include <linux/slab.h>
69#include <linux/sched.h>
70#include <linux/vmalloc.h>
71
72#include <media/v4l2-common.h>
73#include <media/v4l2-device.h>
74
75#include "isp.h"
76#include "ispreg.h"
77#include "ispccdc.h"
78#include "isppreview.h"
79#include "ispresizer.h"
80#include "ispcsi2.h"
81#include "ispccp2.h"
82#include "isph3a.h"
83#include "isphist.h"
84
85static unsigned int autoidle;
86module_param(autoidle, int, 0444);
87MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
88
89static void isp_save_ctx(struct isp_device *isp);
90
91static void isp_restore_ctx(struct isp_device *isp);
92
93static const struct isp_res_mapping isp_res_maps[] = {
94 {
95 .isp_rev = ISP_REVISION_2_0,
96 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
97 1 << OMAP3_ISP_IOMEM_CCP2 |
98 1 << OMAP3_ISP_IOMEM_CCDC |
99 1 << OMAP3_ISP_IOMEM_HIST |
100 1 << OMAP3_ISP_IOMEM_H3A |
101 1 << OMAP3_ISP_IOMEM_PREV |
102 1 << OMAP3_ISP_IOMEM_RESZ |
103 1 << OMAP3_ISP_IOMEM_SBL |
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
c19d19eb
SA		 105 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
106 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE,
448de7e7
SA		 107 },
108 {
109 .isp_rev = ISP_REVISION_15_0,
110 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
111 1 << OMAP3_ISP_IOMEM_CCP2 |
112 1 << OMAP3_ISP_IOMEM_CCDC |
113 1 << OMAP3_ISP_IOMEM_HIST |
114 1 << OMAP3_ISP_IOMEM_H3A |
115 1 << OMAP3_ISP_IOMEM_PREV |
116 1 << OMAP3_ISP_IOMEM_RESZ |
117 1 << OMAP3_ISP_IOMEM_SBL |
118 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
119 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
121 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
122 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
c19d19eb
SA		 123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2 |
124 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL,
448de7e7
SA		 125 },
126};
127
128/* Structure for saving/restoring ISP module registers */
129static struct isp_reg isp_reg_list[] = {
130 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
131 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
132 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
133 {0, ISP_TOK_TERM, 0}
134};
135
136/*
137 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
138 * @isp: OMAP3 ISP device
139 *
140 * In order to force posting of pending writes, we need to write and
141 * readback the same register, in this case the revision register.
142 *
143 * See this link for reference:
144 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
145 */
146void omap3isp_flush(struct isp_device *isp)
147{
148 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
149 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
150}
151
9b28ee3c
LP		 152/* -----------------------------------------------------------------------------
153 * XCLK
154 */
155
156#define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
157
158static void isp_xclk_update(struct isp_xclk *xclk, u32 divider)
159{
160 switch (xclk->id) {
161 case ISP_XCLK_A:
162 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
163 ISPTCTRL_CTRL_DIVA_MASK,
164 divider << ISPTCTRL_CTRL_DIVA_SHIFT);
165 break;
166 case ISP_XCLK_B:
167 isp_reg_clr_set(xclk->isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
168 ISPTCTRL_CTRL_DIVB_MASK,
169 divider << ISPTCTRL_CTRL_DIVB_SHIFT);
170 break;
171 }
172}
173
174static int isp_xclk_prepare(struct clk_hw *hw)
175{
176 struct isp_xclk *xclk = to_isp_xclk(hw);
177
178 omap3isp_get(xclk->isp);
179
180 return 0;
181}
182
183static void isp_xclk_unprepare(struct clk_hw *hw)
184{
185 struct isp_xclk *xclk = to_isp_xclk(hw);
186
187 omap3isp_put(xclk->isp);
188}
189
190static int isp_xclk_enable(struct clk_hw *hw)
191{
192 struct isp_xclk *xclk = to_isp_xclk(hw);
193 unsigned long flags;
194
195 spin_lock_irqsave(&xclk->lock, flags);
196 isp_xclk_update(xclk, xclk->divider);
197 xclk->enabled = true;
198 spin_unlock_irqrestore(&xclk->lock, flags);
199
200 return 0;
201}
202
203static void isp_xclk_disable(struct clk_hw *hw)
204{
205 struct isp_xclk *xclk = to_isp_xclk(hw);
206 unsigned long flags;
207
208 spin_lock_irqsave(&xclk->lock, flags);
209 isp_xclk_update(xclk, 0);
210 xclk->enabled = false;
211 spin_unlock_irqrestore(&xclk->lock, flags);
212}
213
214static unsigned long isp_xclk_recalc_rate(struct clk_hw *hw,
215 unsigned long parent_rate)
216{
217 struct isp_xclk *xclk = to_isp_xclk(hw);
218
219 return parent_rate / xclk->divider;
220}
221
222static u32 isp_xclk_calc_divider(unsigned long *rate, unsigned long parent_rate)
223{
224 u32 divider;
225
226 if (*rate >= parent_rate) {
227 *rate = parent_rate;
228 return ISPTCTRL_CTRL_DIV_BYPASS;
229 }
230
231 divider = DIV_ROUND_CLOSEST(parent_rate, *rate);
232 if (divider >= ISPTCTRL_CTRL_DIV_BYPASS)
233 divider = ISPTCTRL_CTRL_DIV_BYPASS - 1;
234
235 *rate = parent_rate / divider;
236 return divider;
237}
238
239static long isp_xclk_round_rate(struct clk_hw *hw, unsigned long rate,
240 unsigned long *parent_rate)
241{
242 isp_xclk_calc_divider(&rate, *parent_rate);
243 return rate;
244}
245
246static int isp_xclk_set_rate(struct clk_hw *hw, unsigned long rate,
247 unsigned long parent_rate)
248{
249 struct isp_xclk *xclk = to_isp_xclk(hw);
250 unsigned long flags;
251 u32 divider;
252
253 divider = isp_xclk_calc_divider(&rate, parent_rate);
254
255 spin_lock_irqsave(&xclk->lock, flags);
256
257 xclk->divider = divider;
258 if (xclk->enabled)
259 isp_xclk_update(xclk, divider);
260
261 spin_unlock_irqrestore(&xclk->lock, flags);
262
263 dev_dbg(xclk->isp->dev, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
264 __func__, xclk->id == ISP_XCLK_A ? 'a' : 'b', rate, divider);
265 return 0;
266}
267
268static const struct clk_ops isp_xclk_ops = {
269 .prepare = isp_xclk_prepare,
270 .unprepare = isp_xclk_unprepare,
271 .enable = isp_xclk_enable,
272 .disable = isp_xclk_disable,
273 .recalc_rate = isp_xclk_recalc_rate,
274 .round_rate = isp_xclk_round_rate,
275 .set_rate = isp_xclk_set_rate,
276};
277
278static const char *isp_xclk_parent_name = "cam_mclk";
279
280static const struct clk_init_data isp_xclk_init_data = {
281 .name = "cam_xclk",
282 .ops = &isp_xclk_ops,
283 .parent_names = &isp_xclk_parent_name,
284 .num_parents = 1,
285};
286
287static int isp_xclk_init(struct isp_device *isp)
288{
289 struct isp_platform_data *pdata = isp->pdata;
290 struct clk_init_data init;
291 unsigned int i;
292
293 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
294 struct isp_xclk *xclk = &isp->xclks[i];
295 struct clk *clk;
296
297 xclk->isp = isp;
298 xclk->id = i == 0 ? ISP_XCLK_A : ISP_XCLK_B;
299 xclk->divider = 1;
300 spin_lock_init(&xclk->lock);
301
302 init.name = i == 0 ? "cam_xclka" : "cam_xclkb";
303 init.ops = &isp_xclk_ops;
304 init.parent_names = &isp_xclk_parent_name;
305 init.num_parents = 1;
306
307 xclk->hw.init = &init;
308
309 clk = devm_clk_register(isp->dev, &xclk->hw);
310 if (IS_ERR(clk))
311 return PTR_ERR(clk);
312
313 if (pdata->xclks[i].con_id == NULL &&
314 pdata->xclks[i].dev_id == NULL)
315 continue;
316
317 xclk->lookup = kzalloc(sizeof(*xclk->lookup), GFP_KERNEL);
318 if (xclk->lookup == NULL)
319 return -ENOMEM;
320
321 xclk->lookup->con_id = pdata->xclks[i].con_id;
322 xclk->lookup->dev_id = pdata->xclks[i].dev_id;
323 xclk->lookup->clk = clk;
324
325 clkdev_add(xclk->lookup);
326 }
327
328 return 0;
329}
330
331static void isp_xclk_cleanup(struct isp_device *isp)
332{
333 unsigned int i;
334
335 for (i = 0; i < ARRAY_SIZE(isp->xclks); ++i) {
336 struct isp_xclk *xclk = &isp->xclks[i];
337
338 if (xclk->lookup)
339 clkdev_drop(xclk->lookup);
340 }
341}
342
343/* -----------------------------------------------------------------------------
344 * Interrupts
345 */
346
448de7e7
SA		 347/*
348 * isp_enable_interrupts - Enable ISP interrupts.
349 * @isp: OMAP3 ISP device
350 */
351static void isp_enable_interrupts(struct isp_device *isp)
352{
353 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
354 | IRQ0ENABLE_CSIB_IRQ
355 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
356 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
357 | IRQ0ENABLE_CCDC_VD0_IRQ
358 | IRQ0ENABLE_CCDC_VD1_IRQ
359 | IRQ0ENABLE_HS_VS_IRQ
360 | IRQ0ENABLE_HIST_DONE_IRQ
361 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
362 | IRQ0ENABLE_H3A_AF_DONE_IRQ
363 | IRQ0ENABLE_PRV_DONE_IRQ
364 | IRQ0ENABLE_RSZ_DONE_IRQ;
365
366 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
367 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
368}
369
370/*
371 * isp_disable_interrupts - Disable ISP interrupts.
372 * @isp: OMAP3 ISP device
373 */
374static void isp_disable_interrupts(struct isp_device *isp)
375{
376 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
377}
378
448de7e7 379/*
96d62ae2 380 * isp_core_init - ISP core settings
448de7e7
SA		 381 * @isp: OMAP3 ISP device
382 * @idle: Consider idle state.
383 *
96d62ae2
LP		 384 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
385 * interrupt source.
386 *
387 * We need to configure the HS/VS interrupt source before interrupts get
388 * enabled, as the sensor might be free-running and the ISP default setting
389 * (HS edge) would put an unnecessary burden on the CPU.
448de7e7 390 */
96d62ae2 391static void isp_core_init(struct isp_device *isp, int idle)
448de7e7
SA		 392{
393 isp_reg_writel(isp,
394 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
395 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
396 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
397 ((isp->revision == ISP_REVISION_15_0) ?
398 ISP_SYSCONFIG_AUTOIDLE : 0),
399 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
400
96d62ae2
LP		 401 isp_reg_writel(isp,
402 (isp->autoidle ? ISPCTRL_SBL_AUTOIDLE : 0) |
403 ISPCTRL_SYNC_DETECT_VSRISE,
404 OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
448de7e7
SA		 405}
406
407/*
408 * Configure the bridge and lane shifter. Valid inputs are
409 *
410 * CCDC_INPUT_PARALLEL: Parallel interface
411 * CCDC_INPUT_CSI2A: CSI2a receiver
412 * CCDC_INPUT_CCP2B: CCP2b receiver
413 * CCDC_INPUT_CSI2C: CSI2c receiver
414 *
415 * The bridge and lane shifter are configured according to the selected input
416 * and the ISP platform data.
417 */
418void omap3isp_configure_bridge(struct isp_device *isp,
419 enum ccdc_input_entity input,
c09af044 420 const struct isp_parallel_platform_data *pdata,
c51364ca 421 unsigned int shift, unsigned int bridge)
448de7e7
SA		 422{
423 u32 ispctrl_val;
424
425 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
426 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
427 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
428 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
429 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
c51364ca 430 ispctrl_val |= bridge;
448de7e7
SA		 431
432 switch (input) {
433 case CCDC_INPUT_PARALLEL:
434 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
448de7e7 435 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
c09af044 436 shift += pdata->data_lane_shift * 2;
448de7e7
SA		 437 break;
438
439 case CCDC_INPUT_CSI2A:
440 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
441 break;
442
443 case CCDC_INPUT_CCP2B:
444 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
445 break;
446
447 case CCDC_INPUT_CSI2C:
448 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
449 break;
450
451 default:
452 return;
453 }
454
c09af044
MJ		 455 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
456
448de7e7
SA		 457 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
458}
459
448de7e7
SA		 460void omap3isp_hist_dma_done(struct isp_device *isp)
461{
462 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
463 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
464 /* Histogram cannot be enabled in this frame anymore */
465 atomic_set(&isp->isp_hist.buf_err, 1);
466 dev_dbg(isp->dev, "hist: Out of synchronization with "
467 "CCDC. Ignoring next buffer.\n");
468 }
469}
470
471static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
472{
473 static const char *name[] = {
474 "CSIA_IRQ",
475 "res1",
476 "res2",
477 "CSIB_LCM_IRQ",
478 "CSIB_IRQ",
479 "res5",
480 "res6",
481 "res7",
482 "CCDC_VD0_IRQ",
483 "CCDC_VD1_IRQ",
484 "CCDC_VD2_IRQ",
485 "CCDC_ERR_IRQ",
486 "H3A_AF_DONE_IRQ",
487 "H3A_AWB_DONE_IRQ",
488 "res14",
489 "res15",
490 "HIST_DONE_IRQ",
491 "CCDC_LSC_DONE",
492 "CCDC_LSC_PREFETCH_COMPLETED",
493 "CCDC_LSC_PREFETCH_ERROR",
494 "PRV_DONE_IRQ",
495 "CBUFF_IRQ",
496 "res22",
497 "res23",
498 "RSZ_DONE_IRQ",
499 "OVF_IRQ",
500 "res26",
501 "res27",
502 "MMU_ERR_IRQ",
503 "OCP_ERR_IRQ",
504 "SEC_ERR_IRQ",
505 "HS_VS_IRQ",
506 };
507 int i;
508
6c20c635 509 dev_dbg(isp->dev, "ISP IRQ: ");
448de7e7
SA		 510
511 for (i = 0; i < ARRAY_SIZE(name); i++) {
512 if ((1 << i) & irqstatus)
513 printk(KERN_CONT "%s ", name[i]);
514 }
515 printk(KERN_CONT "\n");
516}
517
518static void isp_isr_sbl(struct isp_device *isp)
519{
520 struct device *dev = isp->dev;
875e2e3e 521 struct isp_pipeline *pipe;
448de7e7
SA		 522 u32 sbl_pcr;
523
524 /*
525 * Handle shared buffer logic overflows for video buffers.
526 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
527 */
528 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
529 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
530 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
531
532 if (sbl_pcr)
533 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
534
875e2e3e
LP		 535 if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
536 pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
537 if (pipe != NULL)
538 pipe->error = true;
539 }
540
541 if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
542 pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
543 if (pipe != NULL)
544 pipe->error = true;
545 }
546
547 if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
548 pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
549 if (pipe != NULL)
550 pipe->error = true;
448de7e7
SA		 551 }
552
553 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
875e2e3e
LP		 554 pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
555 if (pipe != NULL)
556 pipe->error = true;
448de7e7
SA		 557 }
558
559 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
560 | ISPSBL_PCR_RSZ2_WBL_OVF
561 | ISPSBL_PCR_RSZ3_WBL_OVF
875e2e3e
LP		 562 | ISPSBL_PCR_RSZ4_WBL_OVF)) {
563 pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
564 if (pipe != NULL)
565 pipe->error = true;
566 }
448de7e7
SA		 567
568 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
569 omap3isp_stat_sbl_overflow(&isp->isp_af);
570
571 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
572 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
573}
574
575/*
576 * isp_isr - Interrupt Service Routine for Camera ISP module.
577 * @irq: Not used currently.
578 * @_isp: Pointer to the OMAP3 ISP device
579 *
580 * Handles the corresponding callback if plugged in.
581 *
582 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
583 * IRQ wasn't handled.
584 */
585static irqreturn_t isp_isr(int irq, void *_isp)
586{
587 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
588 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
589 IRQ0STATUS_CCDC_VD0_IRQ |
590 IRQ0STATUS_CCDC_VD1_IRQ |
591 IRQ0STATUS_HS_VS_IRQ;
592 struct isp_device *isp = _isp;
593 u32 irqstatus;
448de7e7
SA		 594
595 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
596 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
597
598 isp_isr_sbl(isp);
599
875e2e3e
LP		 600 if (irqstatus & IRQ0STATUS_CSIA_IRQ)
601 omap3isp_csi2_isr(&isp->isp_csi2a);
448de7e7 602
875e2e3e
LP		 603 if (irqstatus & IRQ0STATUS_CSIB_IRQ)
604 omap3isp_ccp2_isr(&isp->isp_ccp2);
448de7e7
SA		 605
606 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
607 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
608 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
609 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
610 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
611 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
612 omap3isp_stat_isr_frame_sync(&isp->isp_af);
613 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
614 }
615
616 if (irqstatus & ccdc_events)
617 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
618
619 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
620 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
621 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
622 omap3isp_preview_isr(&isp->isp_prev);
623 }
624
625 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
626 omap3isp_resizer_isr(&isp->isp_res);
627
628 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
629 omap3isp_stat_isr(&isp->isp_aewb);
630
631 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
632 omap3isp_stat_isr(&isp->isp_af);
633
634 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
635 omap3isp_stat_isr(&isp->isp_hist);
636
637 omap3isp_flush(isp);
638
639#if defined(DEBUG) && defined(ISP_ISR_DEBUG)
640 isp_isr_dbg(isp, irqstatus);
641#endif
642
643 return IRQ_HANDLED;
644}
645
646/* -----------------------------------------------------------------------------
647 * Pipeline power management
648 *
649 * Entities must be powered up when part of a pipeline that contains at least
650 * one open video device node.
651 *
652 * To achieve this use the entity use_count field to track the number of users.
653 * For entities corresponding to video device nodes the use_count field stores
654 * the users count of the node. For entities corresponding to subdevs the
655 * use_count field stores the total number of users of all video device nodes
656 * in the pipeline.
657 *
658 * The omap3isp_pipeline_pm_use() function must be called in the open() and
659 * close() handlers of video device nodes. It increments or decrements the use
660 * count of all subdev entities in the pipeline.
661 *
662 * To react to link management on powered pipelines, the link setup notification
663 * callback updates the use count of all entities in the source and sink sides
664 * of the link.
665 */
666
667/*
668 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
669 * @entity: The entity
670 *
671 * Return the total number of users of all video device nodes in the pipeline.
672 */
673static int isp_pipeline_pm_use_count(struct media_entity *entity)
674{
675 struct media_entity_graph graph;
676 int use = 0;
677
678 media_entity_graph_walk_start(&graph, entity);
679
680 while ((entity = media_entity_graph_walk_next(&graph))) {
681 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
682 use += entity->use_count;
683 }
684
685 return use;
686}
687
688/*
689 * isp_pipeline_pm_power_one - Apply power change to an entity
690 * @entity: The entity
691 * @change: Use count change
692 *
693 * Change the entity use count by @change. If the entity is a subdev update its
694 * power state by calling the core::s_power operation when the use count goes
695 * from 0 to != 0 or from != 0 to 0.
696 *
697 * Return 0 on success or a negative error code on failure.
698 */
699static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
700{
701 struct v4l2_subdev *subdev;
702 int ret;
703
704 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
705 ? media_entity_to_v4l2_subdev(entity) : NULL;
706
707 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
708 ret = v4l2_subdev_call(subdev, core, s_power, 1);
709 if (ret < 0 && ret != -ENOIOCTLCMD)
710 return ret;
711 }
712
713 entity->use_count += change;
714 WARN_ON(entity->use_count < 0);
715
716 if (entity->use_count == 0 && change < 0 && subdev != NULL)
717 v4l2_subdev_call(subdev, core, s_power, 0);
718
719 return 0;
720}
721
722/*
723 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
724 * @entity: The entity
725 * @change: Use count change
726 *
727 * Walk the pipeline to update the use count and the power state of all non-node
728 * entities.
729 *
730 * Return 0 on success or a negative error code on failure.
731 */
732static int isp_pipeline_pm_power(struct media_entity *entity, int change)
733{
734 struct media_entity_graph graph;
735 struct media_entity *first = entity;
736 int ret = 0;
737
738 if (!change)
739 return 0;
740
741 media_entity_graph_walk_start(&graph, entity);
742
743 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
744 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
745 ret = isp_pipeline_pm_power_one(entity, change);
746
747 if (!ret)
748 return 0;
749
750 media_entity_graph_walk_start(&graph, first);
751
752 while ((first = media_entity_graph_walk_next(&graph))
753 && first != entity)
754 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
755 isp_pipeline_pm_power_one(first, -change);
756
757 return ret;
758}
759
760/*
761 * omap3isp_pipeline_pm_use - Update the use count of an entity
762 * @entity: The entity
763 * @use: Use (1) or stop using (0) the entity
764 *
765 * Update the use count of all entities in the pipeline and power entities on or
766 * off accordingly.
767 *
768 * Return 0 on success or a negative error code on failure. Powering entities
769 * off is assumed to never fail. No failure can occur when the use parameter is
770 * set to 0.
771 */
772int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
773{
774 int change = use ? 1 : -1;
775 int ret;
776
777 mutex_lock(&entity->parent->graph_mutex);
778
779 /* Apply use count to node. */
780 entity->use_count += change;
781 WARN_ON(entity->use_count < 0);
782
783 /* Apply power change to connected non-nodes. */
784 ret = isp_pipeline_pm_power(entity, change);
e2241531
LP		 785 if (ret < 0)
786 entity->use_count -= change;
448de7e7
SA		 787
788 mutex_unlock(&entity->parent->graph_mutex);
789
790 return ret;
791}
792
793/*
794 * isp_pipeline_link_notify - Link management notification callback
813f5c0a 795 * @link: The link
448de7e7 796 * @flags: New link flags that will be applied
813f5c0a 797 * @notification: The link's state change notification type (MEDIA_DEV_NOTIFY_*)
448de7e7
SA		 798 *
799 * React to link management on powered pipelines by updating the use count of
800 * all entities in the source and sink sides of the link. Entities are powered
801 * on or off accordingly.
802 *
803 * Return 0 on success or a negative error code on failure. Powering entities
804 * off is assumed to never fail. This function will not fail for disconnection
805 * events.
806 */
813f5c0a
SN		 807static int isp_pipeline_link_notify(struct media_link *link, u32 flags,
808 unsigned int notification)
448de7e7 809{
813f5c0a
SN		 810 struct media_entity *source = link->source->entity;
811 struct media_entity *sink = link->sink->entity;
812 int source_use = isp_pipeline_pm_use_count(source);
813 int sink_use = isp_pipeline_pm_use_count(sink);
448de7e7
SA		 814 int ret;
815
813f5c0a
SN		 816 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
817 !(link->flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 818 /* Powering off entities is assumed to never fail. */
813f5c0a
SN		 819 isp_pipeline_pm_power(source, -sink_use);
820 isp_pipeline_pm_power(sink, -source_use);
448de7e7
SA		 821 return 0;
822 }
823
813f5c0a
SN		 824 if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
825 (flags & MEDIA_LNK_FL_ENABLED)) {
448de7e7 826
813f5c0a
SN		 827 ret = isp_pipeline_pm_power(source, sink_use);
828 if (ret < 0)
829 return ret;
448de7e7 830
813f5c0a
SN		 831 ret = isp_pipeline_pm_power(sink, source_use);
832 if (ret < 0)
833 isp_pipeline_pm_power(source, -sink_use);
834
835 return ret;
836 }
837
838 return 0;
448de7e7
SA		 839}
840
841/* -----------------------------------------------------------------------------
842 * Pipeline stream management
843 */
844
845/*
846 * isp_pipeline_enable - Enable streaming on a pipeline
847 * @pipe: ISP pipeline
848 * @mode: Stream mode (single shot or continuous)
849 *
850 * Walk the entities chain starting at the pipeline output video node and start
851 * all modules in the chain in the given mode.
852 *
25985edc 853 * Return 0 if successful, or the return value of the failed video::s_stream
448de7e7
SA		 854 * operation otherwise.
855 */
856static int isp_pipeline_enable(struct isp_pipeline *pipe,
857 enum isp_pipeline_stream_state mode)
858{
859 struct isp_device *isp = pipe->output->isp;
860 struct media_entity *entity;
861 struct media_pad *pad;
862 struct v4l2_subdev *subdev;
863 unsigned long flags;
c62e2a19 864 int ret;
448de7e7 865
1567bb7d
LP		 866 /* If the preview engine crashed it might not respond to read/write
867 * operations on the L4 bus. This would result in a bus fault and a
868 * kernel oops. Refuse to start streaming in that case. This check must
869 * be performed before the loop below to avoid starting entities if the
870 * pipeline won't start anyway (those entities would then likely fail to
871 * stop, making the problem worse).
872 */
873 if ((pipe->entities & isp->crashed) &
874 (1U << isp->isp_prev.subdev.entity.id))
875 return -EIO;
876
448de7e7
SA		 877 spin_lock_irqsave(&pipe->lock, flags);
878 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
879 spin_unlock_irqrestore(&pipe->lock, flags);
880
881 pipe->do_propagation = false;
882
883 entity = &pipe->output->video.entity;
884 while (1) {
885 pad = &entity->pads[0];
886 if (!(pad->flags & MEDIA_PAD_FL_SINK))
887 break;
888
1bddf1b3 889 pad = media_entity_remote_pad(pad);
448de7e7
SA		 890 if (pad == NULL ||
891 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
892 break;
893
894 entity = pad->entity;
895 subdev = media_entity_to_v4l2_subdev(entity);
896
897 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
898 if (ret < 0 && ret != -ENOIOCTLCMD)
c62e2a19 899 return ret;
448de7e7
SA		 900
901 if (subdev == &isp->isp_ccdc.subdev) {
902 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
903 s_stream, mode);
904 v4l2_subdev_call(&isp->isp_af.subdev, video,
905 s_stream, mode);
906 v4l2_subdev_call(&isp->isp_hist.subdev, video,
907 s_stream, mode);
908 pipe->do_propagation = true;
909 }
910 }
911
c62e2a19 912 return 0;
448de7e7
SA		 913}
914
915static int isp_pipeline_wait_resizer(struct isp_device *isp)
916{
917 return omap3isp_resizer_busy(&isp->isp_res);
918}
919
920static int isp_pipeline_wait_preview(struct isp_device *isp)
921{
922 return omap3isp_preview_busy(&isp->isp_prev);
923}
924
925static int isp_pipeline_wait_ccdc(struct isp_device *isp)
926{
927 return omap3isp_stat_busy(&isp->isp_af)
928 || omap3isp_stat_busy(&isp->isp_aewb)
929 || omap3isp_stat_busy(&isp->isp_hist)
930 || omap3isp_ccdc_busy(&isp->isp_ccdc);
931}
932
933#define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
934
935static int isp_pipeline_wait(struct isp_device *isp,
936 int(*busy)(struct isp_device *isp))
937{
938 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
939
940 while (!time_after(jiffies, timeout)) {
941 if (!busy(isp))
942 return 0;
943 }
944
945 return 1;
946}
947
948/*
949 * isp_pipeline_disable - Disable streaming on a pipeline
950 * @pipe: ISP pipeline
951 *
952 * Walk the entities chain starting at the pipeline output video node and stop
953 * all modules in the chain. Wait synchronously for the modules to be stopped if
954 * necessary.
955 *
956 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
957 * can't be stopped (in which case a software reset of the ISP is probably
958 * necessary).
959 */
960static int isp_pipeline_disable(struct isp_pipeline *pipe)
961{
962 struct isp_device *isp = pipe->output->isp;
963 struct media_entity *entity;
964 struct media_pad *pad;
965 struct v4l2_subdev *subdev;
966 int failure = 0;
967 int ret;
968
969 /*
970 * We need to stop all the modules after CCDC first or they'll
971 * never stop since they may not get a full frame from CCDC.
972 */
973 entity = &pipe->output->video.entity;
974 while (1) {
975 pad = &entity->pads[0];
976 if (!(pad->flags & MEDIA_PAD_FL_SINK))
977 break;
978
1bddf1b3 979 pad = media_entity_remote_pad(pad);
448de7e7
SA		 980 if (pad == NULL ||
981 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
982 break;
983
984 entity = pad->entity;
985 subdev = media_entity_to_v4l2_subdev(entity);
986
987 if (subdev == &isp->isp_ccdc.subdev) {
988 v4l2_subdev_call(&isp->isp_aewb.subdev,
989 video, s_stream, 0);
990 v4l2_subdev_call(&isp->isp_af.subdev,
991 video, s_stream, 0);
992 v4l2_subdev_call(&isp->isp_hist.subdev,
993 video, s_stream, 0);
994 }
995
996 v4l2_subdev_call(subdev, video, s_stream, 0);
997
998 if (subdev == &isp->isp_res.subdev)
999 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
1000 else if (subdev == &isp->isp_prev.subdev)
1001 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
1002 else if (subdev == &isp->isp_ccdc.subdev)
1003 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
1004 else
1005 ret = 0;
1006
1007 if (ret) {
1008 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
1567bb7d
LP		 1009 /* If the entity failed to stopped, assume it has
1010 * crashed. Mark it as such, the ISP will be reset when
1011 * applications will release it.
1012 */
1013 isp->crashed |= 1U << subdev->entity.id;
448de7e7
SA		 1014 failure = -ETIMEDOUT;
1015 }
1016 }
1017
1018 return failure;
1019}
1020
1021/*
1022 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1023 * @pipe: ISP pipeline
1024 * @state: Stream state (stopped, single shot or continuous)
1025 *
1026 * Set the pipeline to the given stream state. Pipelines can be started in
1027 * single-shot or continuous mode.
1028 *
25985edc 1029 * Return 0 if successful, or the return value of the failed video::s_stream
994d5375
LP		 1030 * operation otherwise. The pipeline state is not updated when the operation
1031 * fails, except when stopping the pipeline.
448de7e7
SA		 1032 */
1033int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
1034 enum isp_pipeline_stream_state state)
1035{
1036 int ret;
1037
1038 if (state == ISP_PIPELINE_STREAM_STOPPED)
1039 ret = isp_pipeline_disable(pipe);
1040 else
1041 ret = isp_pipeline_enable(pipe, state);
994d5375
LP		 1042
1043 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
1044 pipe->stream_state = state;
448de7e7
SA		 1045
1046 return ret;
1047}
1048
1049/*
1050 * isp_pipeline_resume - Resume streaming on a pipeline
1051 * @pipe: ISP pipeline
1052 *
1053 * Resume video output and input and re-enable pipeline.
1054 */
1055static void isp_pipeline_resume(struct isp_pipeline *pipe)
1056{
1057 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
1058
1059 omap3isp_video_resume(pipe->output, !singleshot);
1060 if (singleshot)
1061 omap3isp_video_resume(pipe->input, 0);
1062 isp_pipeline_enable(pipe, pipe->stream_state);
1063}
1064
1065/*
1066 * isp_pipeline_suspend - Suspend streaming on a pipeline
1067 * @pipe: ISP pipeline
1068 *
1069 * Suspend pipeline.
1070 */
1071static void isp_pipeline_suspend(struct isp_pipeline *pipe)
1072{
1073 isp_pipeline_disable(pipe);
1074}
1075
1076/*
1077 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1078 * video node
1079 * @me: ISP module's media entity
1080 *
1081 * Returns 1 if the entity has an enabled link to the output video node or 0
1082 * otherwise. It's true only while pipeline can have no more than one output
1083 * node.
1084 */
1085static int isp_pipeline_is_last(struct media_entity *me)
1086{
1087 struct isp_pipeline *pipe;
1088 struct media_pad *pad;
1089
1090 if (!me->pipe)
1091 return 0;
1092 pipe = to_isp_pipeline(me);
1093 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
1094 return 0;
1bddf1b3 1095 pad = media_entity_remote_pad(&pipe->output->pad);
448de7e7
SA		 1096 return pad->entity == me;
1097}
1098
1099/*
1100 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1101 * @me: ISP module's media entity
1102 *
1103 * Suspend the whole pipeline if module's entity has an enabled link to the
1104 * output video node. It works only while pipeline can have no more than one
1105 * output node.
1106 */
1107static void isp_suspend_module_pipeline(struct media_entity *me)
1108{
1109 if (isp_pipeline_is_last(me))
1110 isp_pipeline_suspend(to_isp_pipeline(me));
1111}
1112
1113/*
1114 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1115 * @me: ISP module's media entity
1116 *
1117 * Resume the whole pipeline if module's entity has an enabled link to the
1118 * output video node. It works only while pipeline can have no more than one
1119 * output node.
1120 */
1121static void isp_resume_module_pipeline(struct media_entity *me)
1122{
1123 if (isp_pipeline_is_last(me))
1124 isp_pipeline_resume(to_isp_pipeline(me));
1125}
1126
1127/*
1128 * isp_suspend_modules - Suspend ISP submodules.
1129 * @isp: OMAP3 ISP device
1130 *
1131 * Returns 0 if suspend left in idle state all the submodules properly,
1132 * or returns 1 if a general Reset is required to suspend the submodules.
1133 */
1134static int isp_suspend_modules(struct isp_device *isp)
1135{
1136 unsigned long timeout;
1137
1138 omap3isp_stat_suspend(&isp->isp_aewb);
1139 omap3isp_stat_suspend(&isp->isp_af);
1140 omap3isp_stat_suspend(&isp->isp_hist);
1141 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1142 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1143 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1144 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1145 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1146
1147 timeout = jiffies + ISP_STOP_TIMEOUT;
1148 while (omap3isp_stat_busy(&isp->isp_af)
1149 || omap3isp_stat_busy(&isp->isp_aewb)
1150 || omap3isp_stat_busy(&isp->isp_hist)
1151 || omap3isp_preview_busy(&isp->isp_prev)
1152 || omap3isp_resizer_busy(&isp->isp_res)
1153 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1154 if (time_after(jiffies, timeout)) {
1155 dev_info(isp->dev, "can't stop modules.\n");
1156 return 1;
1157 }
1158 msleep(1);
1159 }
1160
1161 return 0;
1162}
1163
1164/*
1165 * isp_resume_modules - Resume ISP submodules.
1166 * @isp: OMAP3 ISP device
1167 */
1168static void isp_resume_modules(struct isp_device *isp)
1169{
1170 omap3isp_stat_resume(&isp->isp_aewb);
1171 omap3isp_stat_resume(&isp->isp_af);
1172 omap3isp_stat_resume(&isp->isp_hist);
1173 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1174 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1175 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1176 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1177 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1178}
1179
1180/*
1181 * isp_reset - Reset ISP with a timeout wait for idle.
1182 * @isp: OMAP3 ISP device
1183 */
1184static int isp_reset(struct isp_device *isp)
1185{
1186 unsigned long timeout = 0;
1187
1188 isp_reg_writel(isp,
1189 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1190 | ISP_SYSCONFIG_SOFTRESET,
1191 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1192 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1193 ISP_SYSSTATUS) & 0x1)) {
1194 if (timeout++ > 10000) {
1195 dev_alert(isp->dev, "cannot reset ISP\n");
1196 return -ETIMEDOUT;
1197 }
1198 udelay(1);
1199 }
1200
1567bb7d 1201 isp->crashed = 0;
448de7e7
SA		 1202 return 0;
1203}
1204
1205/*
1206 * isp_save_context - Saves the values of the ISP module registers.
1207 * @isp: OMAP3 ISP device
1208 * @reg_list: Structure containing pairs of register address and value to
1209 * modify on OMAP.
1210 */
1211static void
1212isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1213{
1214 struct isp_reg *next = reg_list;
1215
1216 for (; next->reg != ISP_TOK_TERM; next++)
1217 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1218}
1219
1220/*
1221 * isp_restore_context - Restores the values of the ISP module registers.
1222 * @isp: OMAP3 ISP device
1223 * @reg_list: Structure containing pairs of register address and value to
1224 * modify on OMAP.
1225 */
1226static void
1227isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1228{
1229 struct isp_reg *next = reg_list;
1230
1231 for (; next->reg != ISP_TOK_TERM; next++)
1232 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1233}
1234
1235/*
1236 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1237 * @isp: OMAP3 ISP device
1238 *
1239 * Routine for saving the context of each module in the ISP.
1240 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1241 */
1242static void isp_save_ctx(struct isp_device *isp)
1243{
1244 isp_save_context(isp, isp_reg_list);
fabdbca8 1245 omap_iommu_save_ctx(isp->dev);
448de7e7
SA		 1246}
1247
1248/*
1249 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1250 * @isp: OMAP3 ISP device
1251 *
1252 * Routine for restoring the context of each module in the ISP.
1253 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1254 */
1255static void isp_restore_ctx(struct isp_device *isp)
1256{
1257 isp_restore_context(isp, isp_reg_list);
fabdbca8 1258 omap_iommu_restore_ctx(isp->dev);
448de7e7
SA		 1259 omap3isp_ccdc_restore_context(isp);
1260 omap3isp_preview_restore_context(isp);
1261}
1262
1263/* -----------------------------------------------------------------------------
1264 * SBL resources management
1265 */
1266#define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1267 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1268 OMAP3_ISP_SBL_PREVIEW_READ | \
1269 OMAP3_ISP_SBL_RESIZER_READ)
1270#define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1271 OMAP3_ISP_SBL_CSI2A_WRITE | \
1272 OMAP3_ISP_SBL_CSI2C_WRITE | \
1273 OMAP3_ISP_SBL_CCDC_WRITE | \
1274 OMAP3_ISP_SBL_PREVIEW_WRITE)
1275
1276void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1277{
1278 u32 sbl = 0;
1279
1280 isp->sbl_resources |= res;
1281
1282 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1283 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1284
1285 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1286 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1287
1288 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1289 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1290
1291 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1292 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1293
1294 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1295 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1296
1297 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1298 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1299
1300 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1301}
1302
1303void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1304{
1305 u32 sbl = 0;
1306
1307 isp->sbl_resources &= ~res;
1308
1309 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1310 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1311
1312 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1313 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1314
1315 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1316 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1317
1318 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1319 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1320
1321 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1322 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1323
1324 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1325 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1326
1327 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1328}
1329
1330/*
1331 * isp_module_sync_idle - Helper to sync module with its idle state
1332 * @me: ISP submodule's media entity
1333 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1334 * @stopping: flag which tells module wants to stop
1335 *
1336 * This function checks if ISP submodule needs to wait for next interrupt. If
1337 * yes, makes the caller to sleep while waiting for such event.
1338 */
1339int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1340 atomic_t *stopping)
1341{
1342 struct isp_pipeline *pipe = to_isp_pipeline(me);
1343
1344 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1345 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1346 !isp_pipeline_ready(pipe)))
1347 return 0;
1348
1349 /*
1350 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1351 * scenario. We'll call it here to avoid race conditions.
1352 */
1353 atomic_set(stopping, 1);
1354 smp_mb();
1355
1356 /*
1357 * If module is the last one, it's writing to memory. In this case,
1358 * it's necessary to check if the module is already paused due to
1359 * DMA queue underrun or if it has to wait for next interrupt to be
1360 * idle.
1361 * If it isn't the last one, the function won't sleep but *stopping
1362 * will still be set to warn next submodule caller's interrupt the
1363 * module wants to be idle.
1364 */
1365 if (isp_pipeline_is_last(me)) {
1366 struct isp_video *video = pipe->output;
1367 unsigned long flags;
1368 spin_lock_irqsave(&video->queue->irqlock, flags);
1369 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1370 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1371 atomic_set(stopping, 0);
1372 smp_mb();
1373 return 0;
1374 }
1375 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1376 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1377 msecs_to_jiffies(1000))) {
1378 atomic_set(stopping, 0);
1379 smp_mb();
1380 return -ETIMEDOUT;
1381 }
1382 }
1383
1384 return 0;
1385}
1386
1387/*
1388 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1389 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1390 * @stopping: flag which tells module wants to stop
1391 *
1392 * This function checks if ISP submodule was stopping. In case of yes, it
1393 * notices the caller by setting stopping to 0 and waking up the wait queue.
1394 * Returns 1 if it was stopping or 0 otherwise.
1395 */
1396int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1397 atomic_t *stopping)
1398{
1399 if (atomic_cmpxchg(stopping, 1, 0)) {
1400 wake_up(wait);
1401 return 1;
1402 }
1403
1404 return 0;
1405}
1406
1407/* --------------------------------------------------------------------------
1408 * Clock management
1409 */
1410
1411#define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1412 ISPCTRL_HIST_CLK_EN | \
1413 ISPCTRL_RSZ_CLK_EN | \
1414 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1415 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1416
1417static void __isp_subclk_update(struct isp_device *isp)
1418{
1419 u32 clk = 0;
1420
be9a1b98
LP		 1421 /* AEWB and AF share the same clock. */
1422 if (isp->subclk_resources &
1423 (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
448de7e7
SA		 1424 clk |= ISPCTRL_H3A_CLK_EN;
1425
1426 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1427 clk |= ISPCTRL_HIST_CLK_EN;
1428
1429 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1430 clk |= ISPCTRL_RSZ_CLK_EN;
1431
1432 /* NOTE: For CCDC & Preview submodules, we need to affect internal
25985edc 1433 * RAM as well.
448de7e7
SA		 1434 */
1435 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1436 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1437
1438 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1439 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1440
1441 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1442 ISPCTRL_CLKS_MASK, clk);
1443}
1444
1445void omap3isp_subclk_enable(struct isp_device *isp,
1446 enum isp_subclk_resource res)
1447{
1448 isp->subclk_resources |= res;
1449
1450 __isp_subclk_update(isp);
1451}
1452
1453void omap3isp_subclk_disable(struct isp_device *isp,
1454 enum isp_subclk_resource res)
1455{
1456 isp->subclk_resources &= ~res;
1457
1458 __isp_subclk_update(isp);
1459}
1460
1461/*
1462 * isp_enable_clocks - Enable ISP clocks
1463 * @isp: OMAP3 ISP device
1464 *
b057c3c3
LP		 1465 * Return 0 if successful, or clk_prepare_enable return value if any of them
1466 * fails.
448de7e7
SA		 1467 */
1468static int isp_enable_clocks(struct isp_device *isp)
1469{
1470 int r;
1471 unsigned long rate;
448de7e7 1472
b057c3c3 1473 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7 1474 if (r) {
b057c3c3 1475 dev_err(isp->dev, "failed to enable cam_ick clock\n");
448de7e7
SA		 1476 goto out_clk_enable_ick;
1477 }
6d1aa02f 1478 r = clk_set_rate(isp->clock[ISP_CLK_CAM_MCLK], CM_CAM_MCLK_HZ);
448de7e7 1479 if (r) {
6d1aa02f 1480 dev_err(isp->dev, "clk_set_rate for cam_mclk failed\n");
448de7e7
SA		 1481 goto out_clk_enable_mclk;
1482 }
b057c3c3 1483 r = clk_prepare_enable(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1484 if (r) {
b057c3c3 1485 dev_err(isp->dev, "failed to enable cam_mclk clock\n");
448de7e7
SA		 1486 goto out_clk_enable_mclk;
1487 }
1488 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1489 if (rate != CM_CAM_MCLK_HZ)
1490 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1491 " expected : %d\n"
1492 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
b057c3c3 1493 r = clk_prepare_enable(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7 1494 if (r) {
b057c3c3 1495 dev_err(isp->dev, "failed to enable csi2_fck clock\n");
448de7e7
SA		 1496 goto out_clk_enable_csi2_fclk;
1497 }
1498 return 0;
1499
1500out_clk_enable_csi2_fclk:
b057c3c3 1501 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
448de7e7 1502out_clk_enable_mclk:
b057c3c3 1503 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
448de7e7
SA		 1504out_clk_enable_ick:
1505 return r;
1506}
1507
1508/*
1509 * isp_disable_clocks - Disable ISP clocks
1510 * @isp: OMAP3 ISP device
1511 */
1512static void isp_disable_clocks(struct isp_device *isp)
1513{
b057c3c3
LP		 1514 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_ICK]);
1515 clk_disable_unprepare(isp->clock[ISP_CLK_CAM_MCLK]);
1516 clk_disable_unprepare(isp->clock[ISP_CLK_CSI2_FCK]);
448de7e7
SA		 1517}
1518
1519static const char *isp_clocks[] = {
1520 "cam_ick",
1521 "cam_mclk",
448de7e7
SA		 1522 "csi2_96m_fck",
1523 "l3_ick",
1524};
1525
448de7e7
SA		 1526static int isp_get_clocks(struct isp_device *isp)
1527{
1528 struct clk *clk;
1529 unsigned int i;
1530
1531 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
cf2b4cf6 1532 clk = devm_clk_get(isp->dev, isp_clocks[i]);
448de7e7
SA		 1533 if (IS_ERR(clk)) {
1534 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
448de7e7
SA		 1535 return PTR_ERR(clk);
1536 }
1537
1538 isp->clock[i] = clk;
1539 }
1540
1541 return 0;
1542}
1543
1544/*
1545 * omap3isp_get - Acquire the ISP resource.
1546 *
1547 * Initializes the clocks for the first acquire.
1548 *
1549 * Increment the reference count on the ISP. If the first reference is taken,
1550 * enable clocks and power-up all submodules.
1551 *
25985edc 1552 * Return a pointer to the ISP device structure, or NULL if an error occurred.
448de7e7 1553 */
96d62ae2 1554static struct isp_device *__omap3isp_get(struct isp_device *isp, bool irq)
448de7e7
SA		 1555{
1556 struct isp_device *__isp = isp;
1557
1558 if (isp == NULL)
1559 return NULL;
1560
1561 mutex_lock(&isp->isp_mutex);
1562 if (isp->ref_count > 0)
1563 goto out;
1564
1565 if (isp_enable_clocks(isp) < 0) {
1566 __isp = NULL;
1567 goto out;
1568 }
1569
1570 /* We don't want to restore context before saving it! */
1571 if (isp->has_context)
1572 isp_restore_ctx(isp);
448de7e7 1573
96d62ae2
LP		 1574 if (irq)
1575 isp_enable_interrupts(isp);
448de7e7
SA		 1576
1577out:
1578 if (__isp != NULL)
1579 isp->ref_count++;
1580 mutex_unlock(&isp->isp_mutex);
1581
1582 return __isp;
1583}
1584
96d62ae2
LP		 1585struct isp_device *omap3isp_get(struct isp_device *isp)
1586{
1587 return __omap3isp_get(isp, true);
1588}
1589
448de7e7
SA		 1590/*
1591 * omap3isp_put - Release the ISP
1592 *
1593 * Decrement the reference count on the ISP. If the last reference is released,
1594 * power-down all submodules, disable clocks and free temporary buffers.
1595 */
1596void omap3isp_put(struct isp_device *isp)
1597{
1598 if (isp == NULL)
1599 return;
1600
1601 mutex_lock(&isp->isp_mutex);
1602 BUG_ON(isp->ref_count == 0);
1603 if (--isp->ref_count == 0) {
1604 isp_disable_interrupts(isp);
96d62ae2 1605 if (isp->domain) {
a32f2f90 1606 isp_save_ctx(isp);
96d62ae2
LP		 1607 isp->has_context = 1;
1608 }
1567bb7d
LP		 1609 /* Reset the ISP if an entity has failed to stop. This is the
1610 * only way to recover from such conditions.
1611 */
1612 if (isp->crashed)
994d5375 1613 isp_reset(isp);
448de7e7
SA		 1614 isp_disable_clocks(isp);
1615 }
1616 mutex_unlock(&isp->isp_mutex);
1617}
1618
1619/* --------------------------------------------------------------------------
1620 * Platform device driver
1621 */
1622
1623/*
1624 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1625 * @isp: OMAP3 ISP device
1626 */
1627#define ISP_PRINT_REGISTER(isp, name)\
1628 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1629 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1630#define SBL_PRINT_REGISTER(isp, name)\
1631 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1632 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1633
1634void omap3isp_print_status(struct isp_device *isp)
1635{
1636 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1637
1638 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1639 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1640 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1641 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1642 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1643 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1644 ISP_PRINT_REGISTER(isp, CTRL);
1645 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1646 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1647 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1648 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1649 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1650 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1651 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1652 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1653
1654 SBL_PRINT_REGISTER(isp, PCR);
1655 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1656
1657 dev_dbg(isp->dev, "--------------------------------------------\n");
1658}
1659
1660#ifdef CONFIG_PM
1661
1662/*
1663 * Power management support.
1664 *
1665 * As the ISP can't properly handle an input video stream interruption on a non
1666 * frame boundary, the ISP pipelines need to be stopped before sensors get
1667 * suspended. However, as suspending the sensors can require a running clock,
1668 * which can be provided by the ISP, the ISP can't be completely suspended
1669 * before the sensor.
1670 *
1671 * To solve this problem power management support is split into prepare/complete
1672 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1673 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1674 * resume(), and the the pipelines are restarted in complete().
1675 *
1676 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1677 * yet.
1678 */
1679static int isp_pm_prepare(struct device *dev)
1680{
1681 struct isp_device *isp = dev_get_drvdata(dev);
1682 int reset;
1683
1684 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1685
1686 if (isp->ref_count == 0)
1687 return 0;
1688
1689 reset = isp_suspend_modules(isp);
1690 isp_disable_interrupts(isp);
1691 isp_save_ctx(isp);
1692 if (reset)
1693 isp_reset(isp);
1694
1695 return 0;
1696}
1697
1698static int isp_pm_suspend(struct device *dev)
1699{
1700 struct isp_device *isp = dev_get_drvdata(dev);
1701
1702 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1703
1704 if (isp->ref_count)
1705 isp_disable_clocks(isp);
1706
1707 return 0;
1708}
1709
1710static int isp_pm_resume(struct device *dev)
1711{
1712 struct isp_device *isp = dev_get_drvdata(dev);
1713
1714 if (isp->ref_count == 0)
1715 return 0;
1716
1717 return isp_enable_clocks(isp);
1718}
1719
1720static void isp_pm_complete(struct device *dev)
1721{
1722 struct isp_device *isp = dev_get_drvdata(dev);
1723
1724 if (isp->ref_count == 0)
1725 return;
1726
1727 isp_restore_ctx(isp);
1728 isp_enable_interrupts(isp);
1729 isp_resume_modules(isp);
1730}
1731
1732#else
1733
1734#define isp_pm_prepare NULL
1735#define isp_pm_suspend NULL
1736#define isp_pm_resume NULL
1737#define isp_pm_complete NULL
1738
1739#endif /* CONFIG_PM */
1740
1741static void isp_unregister_entities(struct isp_device *isp)
1742{
1743 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1744 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1745 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1746 omap3isp_preview_unregister_entities(&isp->isp_prev);
1747 omap3isp_resizer_unregister_entities(&isp->isp_res);
1748 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1749 omap3isp_stat_unregister_entities(&isp->isp_af);
1750 omap3isp_stat_unregister_entities(&isp->isp_hist);
1751
1752 v4l2_device_unregister(&isp->v4l2_dev);
1753 media_device_unregister(&isp->media_dev);
1754}
1755
1756/*
1757 * isp_register_subdev_group - Register a group of subdevices
1758 * @isp: OMAP3 ISP device
1759 * @board_info: I2C subdevs board information array
1760 *
1761 * Register all I2C subdevices in the board_info array. The array must be
1762 * terminated by a NULL entry, and the first entry must be the sensor.
1763 *
1764 * Return a pointer to the sensor media entity if it has been successfully
1765 * registered, or NULL otherwise.
1766 */
1767static struct v4l2_subdev *
1768isp_register_subdev_group(struct isp_device *isp,
1769 struct isp_subdev_i2c_board_info *board_info)
1770{
1771 struct v4l2_subdev *sensor = NULL;
1772 unsigned int first;
1773
1774 if (board_info->board_info == NULL)
1775 return NULL;
1776
1777 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1778 struct v4l2_subdev *subdev;
1779 struct i2c_adapter *adapter;
1780
1781 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1782 if (adapter == NULL) {
4feca39b 1783 dev_err(isp->dev, "%s: Unable to get I2C adapter %d for "
448de7e7
SA		 1784 "device %s\n", __func__,
1785 board_info->i2c_adapter_id,
1786 board_info->board_info->type);
1787 continue;
1788 }
1789
1790 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1791 board_info->board_info, NULL);
1792 if (subdev == NULL) {
4feca39b 1793 dev_err(isp->dev, "%s: Unable to register subdev %s\n",
448de7e7
SA		 1794 __func__, board_info->board_info->type);
1795 continue;
1796 }
1797
1798 if (first)
1799 sensor = subdev;
1800 }
1801
1802 return sensor;
1803}
1804
1805static int isp_register_entities(struct isp_device *isp)
1806{
1807 struct isp_platform_data *pdata = isp->pdata;
1808 struct isp_v4l2_subdevs_group *subdevs;
1809 int ret;
1810
1811 isp->media_dev.dev = isp->dev;
1812 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1813 sizeof(isp->media_dev.model));
083eb078 1814 isp->media_dev.hw_revision = isp->revision;
448de7e7
SA		 1815 isp->media_dev.link_notify = isp_pipeline_link_notify;
1816 ret = media_device_register(&isp->media_dev);
1817 if (ret < 0) {
4feca39b 1818 dev_err(isp->dev, "%s: Media device registration failed (%d)\n",
448de7e7
SA		 1819 __func__, ret);
1820 return ret;
1821 }
1822
1823 isp->v4l2_dev.mdev = &isp->media_dev;
1824 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1825 if (ret < 0) {
4feca39b 1826 dev_err(isp->dev, "%s: V4L2 device registration failed (%d)\n",
448de7e7
SA		 1827 __func__, ret);
1828 goto done;
1829 }
1830
1831 /* Register internal entities */
1832 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1833 if (ret < 0)
1834 goto done;
1835
1836 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1837 if (ret < 0)
1838 goto done;
1839
1840 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1841 if (ret < 0)
1842 goto done;
1843
1844 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1845 &isp->v4l2_dev);
1846 if (ret < 0)
1847 goto done;
1848
1849 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1850 if (ret < 0)
1851 goto done;
1852
1853 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1854 if (ret < 0)
1855 goto done;
1856
1857 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1858 if (ret < 0)
1859 goto done;
1860
1861 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1862 if (ret < 0)
1863 goto done;
1864
1865 /* Register external entities */
ca4186f0 1866 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
448de7e7
SA		 1867 struct v4l2_subdev *sensor;
1868 struct media_entity *input;
1869 unsigned int flags;
1870 unsigned int pad;
aab84f55 1871 unsigned int i;
448de7e7
SA		 1872
1873 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1874 if (sensor == NULL)
1875 continue;
1876
1877 sensor->host_priv = subdevs;
1878
1879 /* Connect the sensor to the correct interface module. Parallel
1880 * sensors are connected directly to the CCDC, while serial
1881 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1882 * through CSIPHY1 or CSIPHY2.
1883 */
1884 switch (subdevs->interface) {
1885 case ISP_INTERFACE_PARALLEL:
1886 input = &isp->isp_ccdc.subdev.entity;
1887 pad = CCDC_PAD_SINK;
1888 flags = 0;
1889 break;
1890
1891 case ISP_INTERFACE_CSI2A_PHY2:
1892 input = &isp->isp_csi2a.subdev.entity;
1893 pad = CSI2_PAD_SINK;
1894 flags = MEDIA_LNK_FL_IMMUTABLE
1895 | MEDIA_LNK_FL_ENABLED;
1896 break;
1897
1898 case ISP_INTERFACE_CCP2B_PHY1:
1899 case ISP_INTERFACE_CCP2B_PHY2:
1900 input = &isp->isp_ccp2.subdev.entity;
1901 pad = CCP2_PAD_SINK;
1902 flags = 0;
1903 break;
1904
1905 case ISP_INTERFACE_CSI2C_PHY1:
1906 input = &isp->isp_csi2c.subdev.entity;
1907 pad = CSI2_PAD_SINK;
1908 flags = MEDIA_LNK_FL_IMMUTABLE
1909 | MEDIA_LNK_FL_ENABLED;
1910 break;
1911
1912 default:
4feca39b
LP		 1913 dev_err(isp->dev, "%s: invalid interface type %u\n",
1914 __func__, subdevs->interface);
448de7e7
SA		 1915 ret = -EINVAL;
1916 goto done;
1917 }
1918
aab84f55
SA		 1919 for (i = 0; i < sensor->entity.num_pads; i++) {
1920 if (sensor->entity.pads[i].flags & MEDIA_PAD_FL_SOURCE)
1921 break;
1922 }
1923 if (i == sensor->entity.num_pads) {
1924 dev_err(isp->dev,
1925 "%s: no source pad in external entity\n",
1926 __func__);
448de7e7
SA		 1927 ret = -EINVAL;
1928 goto done;
1929 }
1930
aab84f55 1931 ret = media_entity_create_link(&sensor->entity, i, input, pad,
448de7e7
SA		 1932 flags);
1933 if (ret < 0)
1934 goto done;
1935 }
1936
1937 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1938
1939done:
1940 if (ret < 0)
1941 isp_unregister_entities(isp);
1942
1943 return ret;
1944}
1945
1946static void isp_cleanup_modules(struct isp_device *isp)
1947{
1948 omap3isp_h3a_aewb_cleanup(isp);
1949 omap3isp_h3a_af_cleanup(isp);
1950 omap3isp_hist_cleanup(isp);
1951 omap3isp_resizer_cleanup(isp);
1952 omap3isp_preview_cleanup(isp);
1953 omap3isp_ccdc_cleanup(isp);
1954 omap3isp_ccp2_cleanup(isp);
1955 omap3isp_csi2_cleanup(isp);
1956}
1957
1958static int isp_initialize_modules(struct isp_device *isp)
1959{
1960 int ret;
1961
1962 ret = omap3isp_csiphy_init(isp);
1963 if (ret < 0) {
1964 dev_err(isp->dev, "CSI PHY initialization failed\n");
1965 goto error_csiphy;
1966 }
1967
1968 ret = omap3isp_csi2_init(isp);
1969 if (ret < 0) {
1970 dev_err(isp->dev, "CSI2 initialization failed\n");
1971 goto error_csi2;
1972 }
1973
1974 ret = omap3isp_ccp2_init(isp);
1975 if (ret < 0) {
1976 dev_err(isp->dev, "CCP2 initialization failed\n");
1977 goto error_ccp2;
1978 }
1979
1980 ret = omap3isp_ccdc_init(isp);
1981 if (ret < 0) {
1982 dev_err(isp->dev, "CCDC initialization failed\n");
1983 goto error_ccdc;
1984 }
1985
1986 ret = omap3isp_preview_init(isp);
1987 if (ret < 0) {
1988 dev_err(isp->dev, "Preview initialization failed\n");
1989 goto error_preview;
1990 }
1991
1992 ret = omap3isp_resizer_init(isp);
1993 if (ret < 0) {
1994 dev_err(isp->dev, "Resizer initialization failed\n");
1995 goto error_resizer;
1996 }
1997
1998 ret = omap3isp_hist_init(isp);
1999 if (ret < 0) {
2000 dev_err(isp->dev, "Histogram initialization failed\n");
2001 goto error_hist;
2002 }
2003
2004 ret = omap3isp_h3a_aewb_init(isp);
2005 if (ret < 0) {
2006 dev_err(isp->dev, "H3A AEWB initialization failed\n");
2007 goto error_h3a_aewb;
2008 }
2009
2010 ret = omap3isp_h3a_af_init(isp);
2011 if (ret < 0) {
2012 dev_err(isp->dev, "H3A AF initialization failed\n");
2013 goto error_h3a_af;
2014 }
2015
2016 /* Connect the submodules. */
2017 ret = media_entity_create_link(
2018 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
2019 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2020 if (ret < 0)
2021 goto error_link;
2022
2023 ret = media_entity_create_link(
2024 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
2025 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
2026 if (ret < 0)
2027 goto error_link;
2028
2029 ret = media_entity_create_link(
2030 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2031 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
2032 if (ret < 0)
2033 goto error_link;
2034
2035 ret = media_entity_create_link(
2036 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
2037 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2038 if (ret < 0)
2039 goto error_link;
2040
2041 ret = media_entity_create_link(
2042 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
2043 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
2044 if (ret < 0)
2045 goto error_link;
2046
2047 ret = media_entity_create_link(
2048 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2049 &isp->isp_aewb.subdev.entity, 0,
2050 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2051 if (ret < 0)
2052 goto error_link;
2053
2054 ret = media_entity_create_link(
2055 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2056 &isp->isp_af.subdev.entity, 0,
2057 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2058 if (ret < 0)
2059 goto error_link;
2060
2061 ret = media_entity_create_link(
2062 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
2063 &isp->isp_hist.subdev.entity, 0,
2064 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
2065 if (ret < 0)
2066 goto error_link;
2067
2068 return 0;
2069
2070error_link:
2071 omap3isp_h3a_af_cleanup(isp);
2072error_h3a_af:
2073 omap3isp_h3a_aewb_cleanup(isp);
2074error_h3a_aewb:
2075 omap3isp_hist_cleanup(isp);
2076error_hist:
2077 omap3isp_resizer_cleanup(isp);
2078error_resizer:
2079 omap3isp_preview_cleanup(isp);
2080error_preview:
2081 omap3isp_ccdc_cleanup(isp);
2082error_ccdc:
2083 omap3isp_ccp2_cleanup(isp);
2084error_ccp2:
2085 omap3isp_csi2_cleanup(isp);
2086error_csi2:
2087error_csiphy:
2088 return ret;
2089}
2090
2091/*
2092 * isp_remove - Remove ISP platform device
2093 * @pdev: Pointer to ISP platform device
2094 *
2095 * Always returns 0.
2096 */
4c62e976 2097static int isp_remove(struct platform_device *pdev)
448de7e7
SA		 2098{
2099 struct isp_device *isp = platform_get_drvdata(pdev);
448de7e7
SA		 2100
2101 isp_unregister_entities(isp);
2102 isp_cleanup_modules(isp);
9b28ee3c 2103 isp_xclk_cleanup(isp);
448de7e7 2104
96d62ae2 2105 __omap3isp_get(isp, false);
fabdbca8 2106 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d 2107 iommu_domain_free(isp->domain);
a32f2f90 2108 isp->domain = NULL;
448de7e7
SA		 2109 omap3isp_put(isp);
2110
448de7e7
SA		 2111 return 0;
2112}
2113
2114static int isp_map_mem_resource(struct platform_device *pdev,
2115 struct isp_device *isp,
2116 enum isp_mem_resources res)
2117{
2118 struct resource *mem;
2119
2120 /* request the mem region for the camera registers */
2121
2122 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2123 if (!mem) {
2124 dev_err(isp->dev, "no mem resource?\n");
2125 return -ENODEV;
2126 }
2127
cf2b4cf6
LP		 2128 if (!devm_request_mem_region(isp->dev, mem->start, resource_size(mem),
2129 pdev->name)) {
448de7e7
SA		 2130 dev_err(isp->dev,
2131 "cannot reserve camera register I/O region\n");
2132 return -ENODEV;
2133 }
2134 isp->mmio_base_phys[res] = mem->start;
2135 isp->mmio_size[res] = resource_size(mem);
2136
2137 /* map the region */
cf2b4cf6
LP		 2138 isp->mmio_base[res] = devm_ioremap_nocache(isp->dev,
2139 isp->mmio_base_phys[res],
2140 isp->mmio_size[res]);
448de7e7
SA		 2141 if (!isp->mmio_base[res]) {
2142 dev_err(isp->dev, "cannot map camera register I/O region\n");
2143 return -ENODEV;
2144 }
2145
2146 return 0;
2147}
2148
2149/*
2150 * isp_probe - Probe ISP platform device
2151 * @pdev: Pointer to ISP platform device
2152 *
2153 * Returns 0 if successful,
2154 * -ENOMEM if no memory available,
2155 * -ENODEV if no platform device resources found
2156 * or no space for remapping registers,
2157 * -EINVAL if couldn't install ISR,
2158 * or clk_get return error value.
2159 */
4c62e976 2160static int isp_probe(struct platform_device *pdev)
448de7e7
SA		 2161{
2162 struct isp_platform_data *pdata = pdev->dev.platform_data;
2163 struct isp_device *isp;
2164 int ret;
2165 int i, m;
2166
2167 if (pdata == NULL)
2168 return -EINVAL;
2169
cf2b4cf6 2170 isp = devm_kzalloc(&pdev->dev, sizeof(*isp), GFP_KERNEL);
448de7e7
SA		 2171 if (!isp) {
2172 dev_err(&pdev->dev, "could not allocate memory\n");
2173 return -ENOMEM;
2174 }
2175
2176 isp->autoidle = autoidle;
448de7e7
SA		 2177
2178 mutex_init(&isp->isp_mutex);
2179 spin_lock_init(&isp->stat_lock);
2180
2181 isp->dev = &pdev->dev;
2182 isp->pdata = pdata;
2183 isp->ref_count = 0;
2184
224ddca0
RK		 2185 ret = dma_coerce_mask_and_coherent(isp->dev, DMA_BIT_MASK(32));
2186 if (ret)
2187 return ret;
448de7e7
SA		 2188
2189 platform_set_drvdata(pdev, isp);
2190
2191 /* Regulators */
cf2b4cf6
LP		 2192 isp->isp_csiphy1.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY1");
2193 isp->isp_csiphy2.vdd = devm_regulator_get(&pdev->dev, "VDD_CSIPHY2");
448de7e7 2194
d8658bca
LP		 2195 /* Clocks
2196 *
2197 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2198 * manually to read the revision before calling __omap3isp_get().
2199 */
448de7e7
SA		 2200 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2201 if (ret < 0)
2202 goto error;
2203
2204 ret = isp_get_clocks(isp);
2205 if (ret < 0)
2206 goto error;
2207
d8658bca
LP		 2208 ret = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
2209 if (ret < 0)
2210 goto error;
2211
2212 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2213 dev_info(isp->dev, "Revision %d.%d found\n",
2214 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2215
2216 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
2217
0bd0dbee
PST		 2218 if (__omap3isp_get(isp, false) == NULL) {
2219 ret = -ENODEV;
448de7e7 2220 goto error;
0bd0dbee 2221 }
448de7e7
SA		 2222
2223 ret = isp_reset(isp);
2224 if (ret < 0)
2225 goto error_isp;
2226
9b28ee3c
LP		 2227 ret = isp_xclk_init(isp);
2228 if (ret < 0)
2229 goto error_isp;
2230
448de7e7 2231 /* Memory resources */
448de7e7
SA		 2232 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2233 if (isp->revision == isp_res_maps[m].isp_rev)
2234 break;
2235
2236 if (m == ARRAY_SIZE(isp_res_maps)) {
2237 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2238 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2239 ret = -ENODEV;
2240 goto error_isp;
2241 }
2242
2243 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2244 if (isp_res_maps[m].map & 1 << i) {
2245 ret = isp_map_mem_resource(pdev, isp, i);
2246 if (ret)
2247 goto error_isp;
2248 }
2249 }
2250
905d66c1 2251 isp->domain = iommu_domain_alloc(pdev->dev.bus);
f626b52d
OBC		 2252 if (!isp->domain) {
2253 dev_err(isp->dev, "can't alloc iommu domain\n");
2254 ret = -ENOMEM;
2255 goto error_isp;
2256 }
2257
fabdbca8 2258 ret = iommu_attach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2259 if (ret) {
2260 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
7c0f812a 2261 ret = -EPROBE_DEFER;
f626b52d
OBC		 2262 goto free_domain;
2263 }
2264
448de7e7
SA		 2265 /* Interrupt */
2266 isp->irq_num = platform_get_irq(pdev, 0);
2267 if (isp->irq_num <= 0) {
2268 dev_err(isp->dev, "No IRQ resource\n");
2269 ret = -ENODEV;
f626b52d 2270 goto detach_dev;
448de7e7
SA		 2271 }
2272
cf2b4cf6
LP		 2273 if (devm_request_irq(isp->dev, isp->irq_num, isp_isr, IRQF_SHARED,
2274 "OMAP3 ISP", isp)) {
448de7e7
SA		 2275 dev_err(isp->dev, "Unable to request IRQ\n");
2276 ret = -EINVAL;
f626b52d 2277 goto detach_dev;
448de7e7
SA		 2278 }
2279
2280 /* Entities */
2281 ret = isp_initialize_modules(isp);
2282 if (ret < 0)
cf2b4cf6 2283 goto detach_dev;
448de7e7
SA		 2284
2285 ret = isp_register_entities(isp);
2286 if (ret < 0)
2287 goto error_modules;
2288
96d62ae2 2289 isp_core_init(isp, 1);
448de7e7
SA		 2290 omap3isp_put(isp);
2291
2292 return 0;
2293
2294error_modules:
2295 isp_cleanup_modules(isp);
f626b52d 2296detach_dev:
fabdbca8 2297 iommu_detach_device(isp->domain, &pdev->dev);
f626b52d
OBC		 2298free_domain:
2299 iommu_domain_free(isp->domain);
7c0f812a 2300 isp->domain = NULL;
448de7e7 2301error_isp:
9b28ee3c 2302 isp_xclk_cleanup(isp);
448de7e7
SA		 2303 omap3isp_put(isp);
2304error:
ed33ac8e 2305 mutex_destroy(&isp->isp_mutex);
448de7e7
SA		 2306
2307 return ret;
2308}
2309
2310static const struct dev_pm_ops omap3isp_pm_ops = {
2311 .prepare = isp_pm_prepare,
2312 .suspend = isp_pm_suspend,
2313 .resume = isp_pm_resume,
2314 .complete = isp_pm_complete,
2315};
2316
2317static struct platform_device_id omap3isp_id_table[] = {
2318 { "omap3isp", 0 },
2319 { },
2320};
2321MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2322
2323static struct platform_driver omap3isp_driver = {
2324 .probe = isp_probe,
4c62e976 2325 .remove = isp_remove,
448de7e7
SA		 2326 .id_table = omap3isp_id_table,
2327 .driver = {
2328 .owner = THIS_MODULE,
2329 .name = "omap3isp",
2330 .pm = &omap3isp_pm_ops,
2331 },
2332};
2333
1d6629b1 2334module_platform_driver(omap3isp_driver);
448de7e7
SA		 2335
2336MODULE_AUTHOR("Nokia Corporation");
2337MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2338MODULE_LICENSE("GPL");
64dc3c1a 2339MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);
Mirror https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git