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dm: cros_ec: Add support for driver model
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88364387
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1/*
2 * Chromium OS cros_ec driver
3 *
4 * Copyright (c) 2012 The Chromium OS Authors.
88364387 5 *
1a459660 6 * SPDX-License-Identifier: GPL-2.0+
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7 */
8
9/*
836bb6e8
SG
10 * This is the interface to the Chrome OS EC. It provides keyboard functions,
11 * power control and battery management. Quite a few other functions are
12 * provided to enable the EC software to be updated, talk to the EC's I2C bus
13 * and store a small amount of data in a memory which persists while the EC
14 * is not reset.
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15 */
16
17#include <common.h>
18#include <command.h>
84d6cbd3 19#include <dm.h>
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20#include <i2c.h>
21#include <cros_ec.h>
22#include <fdtdec.h>
23#include <malloc.h>
24#include <spi.h>
2ab83f0d 25#include <asm/errno.h>
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26#include <asm/io.h>
27#include <asm-generic/gpio.h>
84d6cbd3
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28#include <dm/device-internal.h>
29#include <dm/uclass-internal.h>
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30
31#ifdef DEBUG_TRACE
32#define debug_trace(fmt, b...) debug(fmt, #b)
33#else
34#define debug_trace(fmt, b...)
35#endif
36
37enum {
38 /* Timeout waiting for a flash erase command to complete */
39 CROS_EC_CMD_TIMEOUT_MS = 5000,
40 /* Timeout waiting for a synchronous hash to be recomputed */
41 CROS_EC_CMD_HASH_TIMEOUT_MS = 2000,
42};
43
84d6cbd3 44#ifndef CONFIG_DM_CROS_EC
88364387 45static struct cros_ec_dev static_dev, *last_dev;
84d6cbd3 46#endif
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47
48DECLARE_GLOBAL_DATA_PTR;
49
50/* Note: depends on enum ec_current_image */
51static const char * const ec_current_image_name[] = {"unknown", "RO", "RW"};
52
53void cros_ec_dump_data(const char *name, int cmd, const uint8_t *data, int len)
54{
55#ifdef DEBUG
56 int i;
57
58 printf("%s: ", name);
59 if (cmd != -1)
60 printf("cmd=%#x: ", cmd);
61 for (i = 0; i < len; i++)
62 printf("%02x ", data[i]);
63 printf("\n");
64#endif
65}
66
67/*
68 * Calculate a simple 8-bit checksum of a data block
69 *
70 * @param data Data block to checksum
71 * @param size Size of data block in bytes
72 * @return checksum value (0 to 255)
73 */
74int cros_ec_calc_checksum(const uint8_t *data, int size)
75{
76 int csum, i;
77
78 for (i = csum = 0; i < size; i++)
79 csum += data[i];
80 return csum & 0xff;
81}
82
2d8ede58
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83/**
84 * Create a request packet for protocol version 3.
85 *
86 * The packet is stored in the device's internal output buffer.
87 *
88 * @param dev CROS-EC device
89 * @param cmd Command to send (EC_CMD_...)
90 * @param cmd_version Version of command to send (EC_VER_...)
91 * @param dout Output data (may be NULL If dout_len=0)
92 * @param dout_len Size of output data in bytes
93 * @return packet size in bytes, or <0 if error.
94 */
95static int create_proto3_request(struct cros_ec_dev *dev,
96 int cmd, int cmd_version,
97 const void *dout, int dout_len)
98{
99 struct ec_host_request *rq = (struct ec_host_request *)dev->dout;
100 int out_bytes = dout_len + sizeof(*rq);
101
102 /* Fail if output size is too big */
103 if (out_bytes > (int)sizeof(dev->dout)) {
104 debug("%s: Cannot send %d bytes\n", __func__, dout_len);
105 return -EC_RES_REQUEST_TRUNCATED;
106 }
107
108 /* Fill in request packet */
109 rq->struct_version = EC_HOST_REQUEST_VERSION;
110 rq->checksum = 0;
111 rq->command = cmd;
112 rq->command_version = cmd_version;
113 rq->reserved = 0;
114 rq->data_len = dout_len;
115
116 /* Copy data after header */
117 memcpy(rq + 1, dout, dout_len);
118
119 /* Write checksum field so the entire packet sums to 0 */
120 rq->checksum = (uint8_t)(-cros_ec_calc_checksum(dev->dout, out_bytes));
121
122 cros_ec_dump_data("out", cmd, dev->dout, out_bytes);
123
124 /* Return size of request packet */
125 return out_bytes;
126}
127
128/**
129 * Prepare the device to receive a protocol version 3 response.
130 *
131 * @param dev CROS-EC device
132 * @param din_len Maximum size of response in bytes
133 * @return maximum expected number of bytes in response, or <0 if error.
134 */
135static int prepare_proto3_response_buffer(struct cros_ec_dev *dev, int din_len)
136{
137 int in_bytes = din_len + sizeof(struct ec_host_response);
138
139 /* Fail if input size is too big */
140 if (in_bytes > (int)sizeof(dev->din)) {
141 debug("%s: Cannot receive %d bytes\n", __func__, din_len);
142 return -EC_RES_RESPONSE_TOO_BIG;
143 }
144
145 /* Return expected size of response packet */
146 return in_bytes;
147}
148
149/**
150 * Handle a protocol version 3 response packet.
151 *
152 * The packet must already be stored in the device's internal input buffer.
153 *
154 * @param dev CROS-EC device
155 * @param dinp Returns pointer to response data
156 * @param din_len Maximum size of response in bytes
157 * @return number of bytes of response data, or <0 if error
158 */
159static int handle_proto3_response(struct cros_ec_dev *dev,
160 uint8_t **dinp, int din_len)
161{
162 struct ec_host_response *rs = (struct ec_host_response *)dev->din;
163 int in_bytes;
164 int csum;
165
166 cros_ec_dump_data("in-header", -1, dev->din, sizeof(*rs));
167
168 /* Check input data */
169 if (rs->struct_version != EC_HOST_RESPONSE_VERSION) {
170 debug("%s: EC response version mismatch\n", __func__);
171 return -EC_RES_INVALID_RESPONSE;
172 }
173
174 if (rs->reserved) {
175 debug("%s: EC response reserved != 0\n", __func__);
176 return -EC_RES_INVALID_RESPONSE;
177 }
178
179 if (rs->data_len > din_len) {
180 debug("%s: EC returned too much data\n", __func__);
181 return -EC_RES_RESPONSE_TOO_BIG;
182 }
183
184 cros_ec_dump_data("in-data", -1, dev->din + sizeof(*rs), rs->data_len);
185
186 /* Update in_bytes to actual data size */
187 in_bytes = sizeof(*rs) + rs->data_len;
188
189 /* Verify checksum */
190 csum = cros_ec_calc_checksum(dev->din, in_bytes);
191 if (csum) {
192 debug("%s: EC response checksum invalid: 0x%02x\n", __func__,
193 csum);
194 return -EC_RES_INVALID_CHECKSUM;
195 }
196
197 /* Return error result, if any */
198 if (rs->result)
199 return -(int)rs->result;
200
201 /* If we're still here, set response data pointer and return length */
202 *dinp = (uint8_t *)(rs + 1);
203
204 return rs->data_len;
205}
206
207static int send_command_proto3(struct cros_ec_dev *dev,
208 int cmd, int cmd_version,
209 const void *dout, int dout_len,
210 uint8_t **dinp, int din_len)
211{
84d6cbd3
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212#ifdef CONFIG_DM_CROS_EC
213 struct dm_cros_ec_ops *ops;
214#endif
2d8ede58
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215 int out_bytes, in_bytes;
216 int rv;
217
218 /* Create request packet */
219 out_bytes = create_proto3_request(dev, cmd, cmd_version,
220 dout, dout_len);
221 if (out_bytes < 0)
222 return out_bytes;
223
224 /* Prepare response buffer */
225 in_bytes = prepare_proto3_response_buffer(dev, din_len);
226 if (in_bytes < 0)
227 return in_bytes;
228
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229#ifdef CONFIG_DM_CROS_EC
230 ops = dm_cros_ec_get_ops(dev->dev);
231 rv = ops->packet(dev->dev, out_bytes, in_bytes);
232#else
2d8ede58 233 switch (dev->interface) {
a6070283
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234#ifdef CONFIG_CROS_EC_SPI
235 case CROS_EC_IF_SPI:
236 rv = cros_ec_spi_packet(dev, out_bytes, in_bytes);
237 break;
df93d90a
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238#endif
239#ifdef CONFIG_CROS_EC_SANDBOX
240 case CROS_EC_IF_SANDBOX:
241 rv = cros_ec_sandbox_packet(dev, out_bytes, in_bytes);
242 break;
a6070283 243#endif
2d8ede58
SG
244 case CROS_EC_IF_NONE:
245 /* TODO: support protocol 3 for LPC, I2C; for now fall through */
246 default:
247 debug("%s: Unsupported interface\n", __func__);
248 rv = -1;
249 }
84d6cbd3 250#endif
2d8ede58
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251 if (rv < 0)
252 return rv;
253
254 /* Process the response */
255 return handle_proto3_response(dev, dinp, din_len);
256}
257
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258static int send_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
259 const void *dout, int dout_len,
260 uint8_t **dinp, int din_len)
261{
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262#ifdef CONFIG_DM_CROS_EC
263 struct dm_cros_ec_ops *ops;
264#endif
2d8ede58
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265 int ret = -1;
266
267 /* Handle protocol version 3 support */
268 if (dev->protocol_version == 3) {
269 return send_command_proto3(dev, cmd, cmd_version,
270 dout, dout_len, dinp, din_len);
271 }
88364387 272
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273#ifdef CONFIG_DM_CROS_EC
274 ops = dm_cros_ec_get_ops(dev->dev);
275 ret = ops->command(dev->dev, cmd, cmd_version,
276 (const uint8_t *)dout, dout_len, dinp, din_len);
277#else
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278 switch (dev->interface) {
279#ifdef CONFIG_CROS_EC_SPI
280 case CROS_EC_IF_SPI:
281 ret = cros_ec_spi_command(dev, cmd, cmd_version,
282 (const uint8_t *)dout, dout_len,
283 dinp, din_len);
284 break;
285#endif
286#ifdef CONFIG_CROS_EC_I2C
287 case CROS_EC_IF_I2C:
288 ret = cros_ec_i2c_command(dev, cmd, cmd_version,
289 (const uint8_t *)dout, dout_len,
290 dinp, din_len);
291 break;
292#endif
293#ifdef CONFIG_CROS_EC_LPC
294 case CROS_EC_IF_LPC:
295 ret = cros_ec_lpc_command(dev, cmd, cmd_version,
296 (const uint8_t *)dout, dout_len,
297 dinp, din_len);
298 break;
299#endif
300 case CROS_EC_IF_NONE:
301 default:
302 ret = -1;
303 }
84d6cbd3 304#endif
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305
306 return ret;
307}
308
309/**
310 * Send a command to the CROS-EC device and return the reply.
311 *
312 * The device's internal input/output buffers are used.
313 *
314 * @param dev CROS-EC device
315 * @param cmd Command to send (EC_CMD_...)
316 * @param cmd_version Version of command to send (EC_VER_...)
317 * @param dout Output data (may be NULL If dout_len=0)
318 * @param dout_len Size of output data in bytes
319 * @param dinp Response data (may be NULL If din_len=0).
320 * If not NULL, it will be updated to point to the data
321 * and will always be double word aligned (64-bits)
322 * @param din_len Maximum size of response in bytes
323 * @return number of bytes in response, or -1 on error
324 */
325static int ec_command_inptr(struct cros_ec_dev *dev, uint8_t cmd,
326 int cmd_version, const void *dout, int dout_len, uint8_t **dinp,
327 int din_len)
328{
2ab83f0d 329 uint8_t *din = NULL;
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330 int len;
331
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332 len = send_command(dev, cmd, cmd_version, dout, dout_len,
333 &din, din_len);
334
335 /* If the command doesn't complete, wait a while */
336 if (len == -EC_RES_IN_PROGRESS) {
2ab83f0d 337 struct ec_response_get_comms_status *resp = NULL;
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338 ulong start;
339
340 /* Wait for command to complete */
341 start = get_timer(0);
342 do {
343 int ret;
344
345 mdelay(50); /* Insert some reasonable delay */
346 ret = send_command(dev, EC_CMD_GET_COMMS_STATUS, 0,
347 NULL, 0,
348 (uint8_t **)&resp, sizeof(*resp));
349 if (ret < 0)
350 return ret;
351
352 if (get_timer(start) > CROS_EC_CMD_TIMEOUT_MS) {
353 debug("%s: Command %#02x timeout\n",
354 __func__, cmd);
355 return -EC_RES_TIMEOUT;
356 }
357 } while (resp->flags & EC_COMMS_STATUS_PROCESSING);
358
359 /* OK it completed, so read the status response */
360 /* not sure why it was 0 for the last argument */
361 len = send_command(dev, EC_CMD_RESEND_RESPONSE, 0,
362 NULL, 0, &din, din_len);
363 }
364
2ab83f0d
SG
365 debug("%s: len=%d, dinp=%p, *dinp=%p\n", __func__, len, dinp,
366 dinp ? *dinp : NULL);
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367 if (dinp) {
368 /* If we have any data to return, it must be 64bit-aligned */
369 assert(len <= 0 || !((uintptr_t)din & 7));
370 *dinp = din;
371 }
372
373 return len;
374}
375
376/**
377 * Send a command to the CROS-EC device and return the reply.
378 *
379 * The device's internal input/output buffers are used.
380 *
381 * @param dev CROS-EC device
382 * @param cmd Command to send (EC_CMD_...)
383 * @param cmd_version Version of command to send (EC_VER_...)
384 * @param dout Output data (may be NULL If dout_len=0)
385 * @param dout_len Size of output data in bytes
386 * @param din Response data (may be NULL If din_len=0).
387 * It not NULL, it is a place for ec_command() to copy the
388 * data to.
389 * @param din_len Maximum size of response in bytes
390 * @return number of bytes in response, or -1 on error
391 */
392static int ec_command(struct cros_ec_dev *dev, uint8_t cmd, int cmd_version,
393 const void *dout, int dout_len,
394 void *din, int din_len)
395{
396 uint8_t *in_buffer;
397 int len;
398
399 assert((din_len == 0) || din);
400 len = ec_command_inptr(dev, cmd, cmd_version, dout, dout_len,
401 &in_buffer, din_len);
402 if (len > 0) {
403 /*
404 * If we were asked to put it somewhere, do so, otherwise just
405 * disregard the result.
406 */
407 if (din && in_buffer) {
408 assert(len <= din_len);
409 memmove(din, in_buffer, len);
410 }
411 }
412 return len;
413}
414
415int cros_ec_scan_keyboard(struct cros_ec_dev *dev, struct mbkp_keyscan *scan)
416{
836bb6e8 417 if (ec_command(dev, EC_CMD_MKBP_STATE, 0, NULL, 0, scan,
2ab83f0d 418 sizeof(scan->data)) != sizeof(scan->data))
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419 return -1;
420
421 return 0;
422}
423
424int cros_ec_read_id(struct cros_ec_dev *dev, char *id, int maxlen)
425{
426 struct ec_response_get_version *r;
427
428 if (ec_command_inptr(dev, EC_CMD_GET_VERSION, 0, NULL, 0,
2ab83f0d 429 (uint8_t **)&r, sizeof(*r)) != sizeof(*r))
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430 return -1;
431
2ab83f0d 432 if (maxlen > (int)sizeof(r->version_string_ro))
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433 maxlen = sizeof(r->version_string_ro);
434
435 switch (r->current_image) {
436 case EC_IMAGE_RO:
437 memcpy(id, r->version_string_ro, maxlen);
438 break;
439 case EC_IMAGE_RW:
440 memcpy(id, r->version_string_rw, maxlen);
441 break;
442 default:
443 return -1;
444 }
445
446 id[maxlen - 1] = '\0';
447 return 0;
448}
449
450int cros_ec_read_version(struct cros_ec_dev *dev,
451 struct ec_response_get_version **versionp)
452{
453 if (ec_command_inptr(dev, EC_CMD_GET_VERSION, 0, NULL, 0,
454 (uint8_t **)versionp, sizeof(**versionp))
2ab83f0d 455 != sizeof(**versionp))
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456 return -1;
457
458 return 0;
459}
460
461int cros_ec_read_build_info(struct cros_ec_dev *dev, char **strp)
462{
463 if (ec_command_inptr(dev, EC_CMD_GET_BUILD_INFO, 0, NULL, 0,
836bb6e8 464 (uint8_t **)strp, EC_PROTO2_MAX_PARAM_SIZE) < 0)
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465 return -1;
466
467 return 0;
468}
469
470int cros_ec_read_current_image(struct cros_ec_dev *dev,
471 enum ec_current_image *image)
472{
473 struct ec_response_get_version *r;
474
475 if (ec_command_inptr(dev, EC_CMD_GET_VERSION, 0, NULL, 0,
2ab83f0d 476 (uint8_t **)&r, sizeof(*r)) != sizeof(*r))
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477 return -1;
478
479 *image = r->current_image;
480 return 0;
481}
482
483static int cros_ec_wait_on_hash_done(struct cros_ec_dev *dev,
484 struct ec_response_vboot_hash *hash)
485{
486 struct ec_params_vboot_hash p;
487 ulong start;
488
489 start = get_timer(0);
490 while (hash->status == EC_VBOOT_HASH_STATUS_BUSY) {
491 mdelay(50); /* Insert some reasonable delay */
492
493 p.cmd = EC_VBOOT_HASH_GET;
494 if (ec_command(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p),
495 hash, sizeof(*hash)) < 0)
496 return -1;
497
498 if (get_timer(start) > CROS_EC_CMD_HASH_TIMEOUT_MS) {
499 debug("%s: EC_VBOOT_HASH_GET timeout\n", __func__);
500 return -EC_RES_TIMEOUT;
501 }
502 }
503 return 0;
504}
505
506
507int cros_ec_read_hash(struct cros_ec_dev *dev,
508 struct ec_response_vboot_hash *hash)
509{
510 struct ec_params_vboot_hash p;
511 int rv;
512
513 p.cmd = EC_VBOOT_HASH_GET;
514 if (ec_command(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p),
515 hash, sizeof(*hash)) < 0)
516 return -1;
517
518 /* If the EC is busy calculating the hash, fidget until it's done. */
519 rv = cros_ec_wait_on_hash_done(dev, hash);
520 if (rv)
521 return rv;
522
523 /* If the hash is valid, we're done. Otherwise, we have to kick it off
524 * again and wait for it to complete. Note that we explicitly assume
525 * that hashing zero bytes is always wrong, even though that would
526 * produce a valid hash value. */
527 if (hash->status == EC_VBOOT_HASH_STATUS_DONE && hash->size)
528 return 0;
529
530 debug("%s: No valid hash (status=%d size=%d). Compute one...\n",
531 __func__, hash->status, hash->size);
532
836bb6e8 533 p.cmd = EC_VBOOT_HASH_START;
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534 p.hash_type = EC_VBOOT_HASH_TYPE_SHA256;
535 p.nonce_size = 0;
536 p.offset = EC_VBOOT_HASH_OFFSET_RW;
537
538 if (ec_command(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p),
539 hash, sizeof(*hash)) < 0)
540 return -1;
541
542 rv = cros_ec_wait_on_hash_done(dev, hash);
543 if (rv)
544 return rv;
545
546 debug("%s: hash done\n", __func__);
547
548 return 0;
549}
550
551static int cros_ec_invalidate_hash(struct cros_ec_dev *dev)
552{
553 struct ec_params_vboot_hash p;
554 struct ec_response_vboot_hash *hash;
555
556 /* We don't have an explict command for the EC to discard its current
557 * hash value, so we'll just tell it to calculate one that we know is
558 * wrong (we claim that hashing zero bytes is always invalid).
559 */
560 p.cmd = EC_VBOOT_HASH_RECALC;
561 p.hash_type = EC_VBOOT_HASH_TYPE_SHA256;
562 p.nonce_size = 0;
563 p.offset = 0;
564 p.size = 0;
565
566 debug("%s:\n", __func__);
567
568 if (ec_command_inptr(dev, EC_CMD_VBOOT_HASH, 0, &p, sizeof(p),
569 (uint8_t **)&hash, sizeof(*hash)) < 0)
570 return -1;
571
572 /* No need to wait for it to finish */
573 return 0;
574}
575
576int cros_ec_reboot(struct cros_ec_dev *dev, enum ec_reboot_cmd cmd,
577 uint8_t flags)
578{
579 struct ec_params_reboot_ec p;
580
581 p.cmd = cmd;
582 p.flags = flags;
583
584 if (ec_command_inptr(dev, EC_CMD_REBOOT_EC, 0, &p, sizeof(p), NULL, 0)
585 < 0)
586 return -1;
587
588 if (!(flags & EC_REBOOT_FLAG_ON_AP_SHUTDOWN)) {
589 /*
590 * EC reboot will take place immediately so delay to allow it
591 * to complete. Note that some reboot types (EC_REBOOT_COLD)
592 * will reboot the AP as well, in which case we won't actually
593 * get to this point.
594 */
595 /*
596 * TODO(rspangler@chromium.org): Would be nice if we had a
597 * better way to determine when the reboot is complete. Could
598 * we poll a memory-mapped LPC value?
599 */
600 udelay(50000);
601 }
602
603 return 0;
604}
605
606int cros_ec_interrupt_pending(struct cros_ec_dev *dev)
607{
608 /* no interrupt support : always poll */
609 if (!fdt_gpio_isvalid(&dev->ec_int))
2ab83f0d 610 return -ENOENT;
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611
612 return !gpio_get_value(dev->ec_int.gpio);
613}
614
836bb6e8 615int cros_ec_info(struct cros_ec_dev *dev, struct ec_response_mkbp_info *info)
88364387 616{
836bb6e8 617 if (ec_command(dev, EC_CMD_MKBP_INFO, 0, NULL, 0, info,
2ab83f0d 618 sizeof(*info)) != sizeof(*info))
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619 return -1;
620
621 return 0;
622}
623
624int cros_ec_get_host_events(struct cros_ec_dev *dev, uint32_t *events_ptr)
625{
626 struct ec_response_host_event_mask *resp;
627
628 /*
629 * Use the B copy of the event flags, because the main copy is already
630 * used by ACPI/SMI.
631 */
632 if (ec_command_inptr(dev, EC_CMD_HOST_EVENT_GET_B, 0, NULL, 0,
2ab83f0d 633 (uint8_t **)&resp, sizeof(*resp)) < (int)sizeof(*resp))
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634 return -1;
635
636 if (resp->mask & EC_HOST_EVENT_MASK(EC_HOST_EVENT_INVALID))
637 return -1;
638
639 *events_ptr = resp->mask;
640 return 0;
641}
642
643int cros_ec_clear_host_events(struct cros_ec_dev *dev, uint32_t events)
644{
645 struct ec_params_host_event_mask params;
646
647 params.mask = events;
648
649 /*
650 * Use the B copy of the event flags, so it affects the data returned
651 * by cros_ec_get_host_events().
652 */
653 if (ec_command_inptr(dev, EC_CMD_HOST_EVENT_CLEAR_B, 0,
654 &params, sizeof(params), NULL, 0) < 0)
655 return -1;
656
657 return 0;
658}
659
660int cros_ec_flash_protect(struct cros_ec_dev *dev,
661 uint32_t set_mask, uint32_t set_flags,
662 struct ec_response_flash_protect *resp)
663{
664 struct ec_params_flash_protect params;
665
666 params.mask = set_mask;
667 params.flags = set_flags;
668
669 if (ec_command(dev, EC_CMD_FLASH_PROTECT, EC_VER_FLASH_PROTECT,
670 &params, sizeof(params),
2ab83f0d 671 resp, sizeof(*resp)) != sizeof(*resp))
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HT
672 return -1;
673
674 return 0;
675}
676
677static int cros_ec_check_version(struct cros_ec_dev *dev)
678{
679 struct ec_params_hello req;
680 struct ec_response_hello *resp;
681
682#ifdef CONFIG_CROS_EC_LPC
683 /* LPC has its own way of doing this */
684 if (dev->interface == CROS_EC_IF_LPC)
685 return cros_ec_lpc_check_version(dev);
686#endif
687
688 /*
689 * TODO(sjg@chromium.org).
690 * There is a strange oddity here with the EC. We could just ignore
691 * the response, i.e. pass the last two parameters as NULL and 0.
692 * In this case we won't read back very many bytes from the EC.
693 * On the I2C bus the EC gets upset about this and will try to send
694 * the bytes anyway. This means that we will have to wait for that
695 * to complete before continuing with a new EC command.
696 *
697 * This problem is probably unique to the I2C bus.
698 *
699 * So for now, just read all the data anyway.
700 */
e8c12662 701
a6070283
RS
702 /* Try sending a version 3 packet */
703 dev->protocol_version = 3;
704 if (ec_command_inptr(dev, EC_CMD_HELLO, 0, &req, sizeof(req),
705 (uint8_t **)&resp, sizeof(*resp)) > 0) {
706 return 0;
707 }
708
e8c12662
RS
709 /* Try sending a version 2 packet */
710 dev->protocol_version = 2;
88364387
HT
711 if (ec_command_inptr(dev, EC_CMD_HELLO, 0, &req, sizeof(req),
712 (uint8_t **)&resp, sizeof(*resp)) > 0) {
e8c12662 713 return 0;
88364387
HT
714 }
715
e8c12662
RS
716 /*
717 * Fail if we're still here, since the EC doesn't understand any
718 * protcol version we speak. Version 1 interface without command
719 * version is no longer supported, and we don't know about any new
720 * protocol versions.
721 */
722 dev->protocol_version = 0;
723 printf("%s: ERROR: old EC interface not supported\n", __func__);
724 return -1;
88364387
HT
725}
726
727int cros_ec_test(struct cros_ec_dev *dev)
728{
729 struct ec_params_hello req;
730 struct ec_response_hello *resp;
731
732 req.in_data = 0x12345678;
733 if (ec_command_inptr(dev, EC_CMD_HELLO, 0, &req, sizeof(req),
734 (uint8_t **)&resp, sizeof(*resp)) < sizeof(*resp)) {
735 printf("ec_command_inptr() returned error\n");
736 return -1;
737 }
738 if (resp->out_data != req.in_data + 0x01020304) {
739 printf("Received invalid handshake %x\n", resp->out_data);
740 return -1;
741 }
742
743 return 0;
744}
745
746int cros_ec_flash_offset(struct cros_ec_dev *dev, enum ec_flash_region region,
747 uint32_t *offset, uint32_t *size)
748{
749 struct ec_params_flash_region_info p;
750 struct ec_response_flash_region_info *r;
751 int ret;
752
753 p.region = region;
754 ret = ec_command_inptr(dev, EC_CMD_FLASH_REGION_INFO,
755 EC_VER_FLASH_REGION_INFO,
756 &p, sizeof(p), (uint8_t **)&r, sizeof(*r));
757 if (ret != sizeof(*r))
758 return -1;
759
760 if (offset)
761 *offset = r->offset;
762 if (size)
763 *size = r->size;
764
765 return 0;
766}
767
768int cros_ec_flash_erase(struct cros_ec_dev *dev, uint32_t offset, uint32_t size)
769{
770 struct ec_params_flash_erase p;
771
772 p.offset = offset;
773 p.size = size;
774 return ec_command_inptr(dev, EC_CMD_FLASH_ERASE, 0, &p, sizeof(p),
775 NULL, 0);
776}
777
778/**
779 * Write a single block to the flash
780 *
781 * Write a block of data to the EC flash. The size must not exceed the flash
782 * write block size which you can obtain from cros_ec_flash_write_burst_size().
783 *
784 * The offset starts at 0. You can obtain the region information from
785 * cros_ec_flash_offset() to find out where to write for a particular region.
786 *
787 * Attempting to write to the region where the EC is currently running from
788 * will result in an error.
789 *
790 * @param dev CROS-EC device
791 * @param data Pointer to data buffer to write
792 * @param offset Offset within flash to write to.
793 * @param size Number of bytes to write
794 * @return 0 if ok, -1 on error
795 */
796static int cros_ec_flash_write_block(struct cros_ec_dev *dev,
797 const uint8_t *data, uint32_t offset, uint32_t size)
798{
799 struct ec_params_flash_write p;
800
801 p.offset = offset;
802 p.size = size;
836bb6e8
SG
803 assert(data && p.size <= EC_FLASH_WRITE_VER0_SIZE);
804 memcpy(&p + 1, data, p.size);
88364387
HT
805
806 return ec_command_inptr(dev, EC_CMD_FLASH_WRITE, 0,
807 &p, sizeof(p), NULL, 0) >= 0 ? 0 : -1;
808}
809
810/**
811 * Return optimal flash write burst size
812 */
813static int cros_ec_flash_write_burst_size(struct cros_ec_dev *dev)
814{
836bb6e8 815 return EC_FLASH_WRITE_VER0_SIZE;
88364387
HT
816}
817
818/**
819 * Check if a block of data is erased (all 0xff)
820 *
821 * This function is useful when dealing with flash, for checking whether a
822 * data block is erased and thus does not need to be programmed.
823 *
824 * @param data Pointer to data to check (must be word-aligned)
825 * @param size Number of bytes to check (must be word-aligned)
826 * @return 0 if erased, non-zero if any word is not erased
827 */
828static int cros_ec_data_is_erased(const uint32_t *data, int size)
829{
830 assert(!(size & 3));
831 size /= sizeof(uint32_t);
832 for (; size > 0; size -= 4, data++)
833 if (*data != -1U)
834 return 0;
835
836 return 1;
837}
838
839int cros_ec_flash_write(struct cros_ec_dev *dev, const uint8_t *data,
840 uint32_t offset, uint32_t size)
841{
842 uint32_t burst = cros_ec_flash_write_burst_size(dev);
843 uint32_t end, off;
844 int ret;
845
846 /*
847 * TODO: round up to the nearest multiple of write size. Can get away
848 * without that on link right now because its write size is 4 bytes.
849 */
850 end = offset + size;
851 for (off = offset; off < end; off += burst, data += burst) {
852 uint32_t todo;
853
854 /* If the data is empty, there is no point in programming it */
855 todo = min(end - off, burst);
856 if (dev->optimise_flash_write &&
857 cros_ec_data_is_erased((uint32_t *)data, todo))
858 continue;
859
860 ret = cros_ec_flash_write_block(dev, data, off, todo);
861 if (ret)
862 return ret;
863 }
864
865 return 0;
866}
867
868/**
869 * Read a single block from the flash
870 *
871 * Read a block of data from the EC flash. The size must not exceed the flash
872 * write block size which you can obtain from cros_ec_flash_write_burst_size().
873 *
874 * The offset starts at 0. You can obtain the region information from
875 * cros_ec_flash_offset() to find out where to read for a particular region.
876 *
877 * @param dev CROS-EC device
878 * @param data Pointer to data buffer to read into
879 * @param offset Offset within flash to read from
880 * @param size Number of bytes to read
881 * @return 0 if ok, -1 on error
882 */
883static int cros_ec_flash_read_block(struct cros_ec_dev *dev, uint8_t *data,
884 uint32_t offset, uint32_t size)
885{
886 struct ec_params_flash_read p;
887
888 p.offset = offset;
889 p.size = size;
890
891 return ec_command(dev, EC_CMD_FLASH_READ, 0,
892 &p, sizeof(p), data, size) >= 0 ? 0 : -1;
893}
894
895int cros_ec_flash_read(struct cros_ec_dev *dev, uint8_t *data, uint32_t offset,
896 uint32_t size)
897{
898 uint32_t burst = cros_ec_flash_write_burst_size(dev);
899 uint32_t end, off;
900 int ret;
901
902 end = offset + size;
903 for (off = offset; off < end; off += burst, data += burst) {
904 ret = cros_ec_flash_read_block(dev, data, off,
905 min(end - off, burst));
906 if (ret)
907 return ret;
908 }
909
910 return 0;
911}
912
913int cros_ec_flash_update_rw(struct cros_ec_dev *dev,
914 const uint8_t *image, int image_size)
915{
916 uint32_t rw_offset, rw_size;
917 int ret;
918
919 if (cros_ec_flash_offset(dev, EC_FLASH_REGION_RW, &rw_offset, &rw_size))
920 return -1;
2ab83f0d 921 if (image_size > (int)rw_size)
88364387
HT
922 return -1;
923
924 /* Invalidate the existing hash, just in case the AP reboots
925 * unexpectedly during the update. If that happened, the EC RW firmware
926 * would be invalid, but the EC would still have the original hash.
927 */
928 ret = cros_ec_invalidate_hash(dev);
929 if (ret)
930 return ret;
931
932 /*
933 * Erase the entire RW section, so that the EC doesn't see any garbage
934 * past the new image if it's smaller than the current image.
935 *
936 * TODO: could optimize this to erase just the current image, since
937 * presumably everything past that is 0xff's. But would still need to
938 * round up to the nearest multiple of erase size.
939 */
940 ret = cros_ec_flash_erase(dev, rw_offset, rw_size);
941 if (ret)
942 return ret;
943
944 /* Write the image */
945 ret = cros_ec_flash_write(dev, image, rw_offset, image_size);
946 if (ret)
947 return ret;
948
949 return 0;
950}
951
952int cros_ec_read_vbnvcontext(struct cros_ec_dev *dev, uint8_t *block)
953{
954 struct ec_params_vbnvcontext p;
955 int len;
956
957 p.op = EC_VBNV_CONTEXT_OP_READ;
958
959 len = ec_command(dev, EC_CMD_VBNV_CONTEXT, EC_VER_VBNV_CONTEXT,
960 &p, sizeof(p), block, EC_VBNV_BLOCK_SIZE);
961 if (len < EC_VBNV_BLOCK_SIZE)
962 return -1;
963
964 return 0;
965}
966
967int cros_ec_write_vbnvcontext(struct cros_ec_dev *dev, const uint8_t *block)
968{
969 struct ec_params_vbnvcontext p;
970 int len;
971
972 p.op = EC_VBNV_CONTEXT_OP_WRITE;
973 memcpy(p.block, block, sizeof(p.block));
974
975 len = ec_command_inptr(dev, EC_CMD_VBNV_CONTEXT, EC_VER_VBNV_CONTEXT,
976 &p, sizeof(p), NULL, 0);
977 if (len < 0)
978 return -1;
979
980 return 0;
981}
982
983int cros_ec_set_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t state)
984{
985 struct ec_params_ldo_set params;
986
987 params.index = index;
988 params.state = state;
989
990 if (ec_command_inptr(dev, EC_CMD_LDO_SET, 0,
991 &params, sizeof(params),
992 NULL, 0))
993 return -1;
994
995 return 0;
996}
997
998int cros_ec_get_ldo(struct cros_ec_dev *dev, uint8_t index, uint8_t *state)
999{
1000 struct ec_params_ldo_get params;
1001 struct ec_response_ldo_get *resp;
1002
1003 params.index = index;
1004
1005 if (ec_command_inptr(dev, EC_CMD_LDO_GET, 0,
1006 &params, sizeof(params),
2ab83f0d 1007 (uint8_t **)&resp, sizeof(*resp)) != sizeof(*resp))
88364387
HT
1008 return -1;
1009
1010 *state = resp->state;
1011
1012 return 0;
1013}
1014
84d6cbd3 1015#ifndef CONFIG_DM_CROS_EC
88364387 1016/**
836bb6e8
SG
1017 * Decode EC interface details from the device tree and allocate a suitable
1018 * device.
88364387
HT
1019 *
1020 * @param blob Device tree blob
1021 * @param node Node to decode from
1022 * @param devp Returns a pointer to the new allocated device
1023 * @return 0 if ok, -1 on error
1024 */
1025static int cros_ec_decode_fdt(const void *blob, int node,
1026 struct cros_ec_dev **devp)
1027{
1028 enum fdt_compat_id compat;
1029 struct cros_ec_dev *dev;
1030 int parent;
1031
1032 /* See what type of parent we are inside (this is expensive) */
1033 parent = fdt_parent_offset(blob, node);
1034 if (parent < 0) {
1035 debug("%s: Cannot find node parent\n", __func__);
1036 return -1;
1037 }
1038
1039 dev = &static_dev;
1040 dev->node = node;
1041 dev->parent_node = parent;
1042
1043 compat = fdtdec_lookup(blob, parent);
1044 switch (compat) {
1045#ifdef CONFIG_CROS_EC_SPI
1046 case COMPAT_SAMSUNG_EXYNOS_SPI:
1047 dev->interface = CROS_EC_IF_SPI;
1048 if (cros_ec_spi_decode_fdt(dev, blob))
1049 return -1;
1050 break;
1051#endif
1052#ifdef CONFIG_CROS_EC_I2C
1053 case COMPAT_SAMSUNG_S3C2440_I2C:
1054 dev->interface = CROS_EC_IF_I2C;
1055 if (cros_ec_i2c_decode_fdt(dev, blob))
1056 return -1;
1057 break;
1058#endif
1059#ifdef CONFIG_CROS_EC_LPC
1060 case COMPAT_INTEL_LPC:
1061 dev->interface = CROS_EC_IF_LPC;
1062 break;
df93d90a
SG
1063#endif
1064#ifdef CONFIG_CROS_EC_SANDBOX
1065 case COMPAT_SANDBOX_HOST_EMULATION:
1066 dev->interface = CROS_EC_IF_SANDBOX;
1067 break;
88364387
HT
1068#endif
1069 default:
1070 debug("%s: Unknown compat id %d\n", __func__, compat);
1071 return -1;
1072 }
1073
1074 fdtdec_decode_gpio(blob, node, "ec-interrupt", &dev->ec_int);
1075 dev->optimise_flash_write = fdtdec_get_bool(blob, node,
1076 "optimise-flash-write");
1077 *devp = dev;
1078
1079 return 0;
1080}
84d6cbd3 1081#endif
88364387 1082
84d6cbd3
SG
1083#ifdef CONFIG_DM_CROS_EC
1084int cros_ec_register(struct udevice *dev)
88364387 1085{
84d6cbd3
SG
1086 struct cros_ec_dev *cdev = dev->uclass_priv;
1087 const void *blob = gd->fdt_blob;
1088 int node = dev->of_offset;
88364387 1089 char id[MSG_BYTES];
84d6cbd3
SG
1090
1091 cdev->dev = dev;
1092 fdtdec_decode_gpio(blob, node, "ec-interrupt", &cdev->ec_int);
1093 cdev->optimise_flash_write = fdtdec_get_bool(blob, node,
1094 "optimise-flash-write");
1095
1096 /* we will poll the EC interrupt line */
1097 fdtdec_setup_gpio(&cdev->ec_int);
1098 if (fdt_gpio_isvalid(&cdev->ec_int)) {
1099 gpio_request(cdev->ec_int.gpio, "cros-ec-irq");
1100 gpio_direction_input(cdev->ec_int.gpio);
1101 }
1102
1103 if (cros_ec_check_version(cdev)) {
1104 debug("%s: Could not detect CROS-EC version\n", __func__);
1105 return -CROS_EC_ERR_CHECK_VERSION;
1106 }
1107
1108 if (cros_ec_read_id(cdev, id, sizeof(id))) {
1109 debug("%s: Could not read KBC ID\n", __func__);
1110 return -CROS_EC_ERR_READ_ID;
1111 }
1112
1113 /* Remember this device for use by the cros_ec command */
1114 debug("Google Chrome EC CROS-EC driver ready, id '%s'\n", id);
1115
1116 return 0;
1117}
1118#else
1119int cros_ec_init(const void *blob, struct cros_ec_dev **cros_ecp)
1120{
88364387 1121 struct cros_ec_dev *dev;
84d6cbd3
SG
1122 char id[MSG_BYTES];
1123#ifdef CONFIG_DM_CROS_EC
1124 struct udevice *udev;
1125 int ret;
1126
1127 ret = uclass_find_device(UCLASS_CROS_EC, 0, &udev);
1128 if (!ret)
1129 device_remove(udev);
1130 ret = uclass_get_device(UCLASS_CROS_EC, 0, &udev);
1131 if (ret)
1132 return ret;
1133 dev = udev->uclass_priv;
1134 return 0;
1135#else
88364387
HT
1136 int node = 0;
1137
1138 *cros_ecp = NULL;
1139 do {
1140 node = fdtdec_next_compatible(blob, node,
1141 COMPAT_GOOGLE_CROS_EC);
1142 if (node < 0) {
1143 debug("%s: Node not found\n", __func__);
1144 return 0;
1145 }
1146 } while (!fdtdec_get_is_enabled(blob, node));
1147
1148 if (cros_ec_decode_fdt(blob, node, &dev)) {
1149 debug("%s: Failed to decode device.\n", __func__);
1150 return -CROS_EC_ERR_FDT_DECODE;
1151 }
1152
1153 switch (dev->interface) {
1154#ifdef CONFIG_CROS_EC_SPI
1155 case CROS_EC_IF_SPI:
1156 if (cros_ec_spi_init(dev, blob)) {
1157 debug("%s: Could not setup SPI interface\n", __func__);
1158 return -CROS_EC_ERR_DEV_INIT;
1159 }
1160 break;
1161#endif
1162#ifdef CONFIG_CROS_EC_I2C
1163 case CROS_EC_IF_I2C:
1164 if (cros_ec_i2c_init(dev, blob))
1165 return -CROS_EC_ERR_DEV_INIT;
1166 break;
1167#endif
1168#ifdef CONFIG_CROS_EC_LPC
1169 case CROS_EC_IF_LPC:
1170 if (cros_ec_lpc_init(dev, blob))
1171 return -CROS_EC_ERR_DEV_INIT;
1172 break;
df93d90a
SG
1173#endif
1174#ifdef CONFIG_CROS_EC_SANDBOX
1175 case CROS_EC_IF_SANDBOX:
1176 if (cros_ec_sandbox_init(dev, blob))
1177 return -CROS_EC_ERR_DEV_INIT;
1178 break;
88364387
HT
1179#endif
1180 case CROS_EC_IF_NONE:
1181 default:
1182 return 0;
1183 }
84d6cbd3 1184#endif
88364387
HT
1185
1186 /* we will poll the EC interrupt line */
1187 fdtdec_setup_gpio(&dev->ec_int);
84d6cbd3
SG
1188 if (fdt_gpio_isvalid(&dev->ec_int)) {
1189 gpio_request(dev->ec_int.gpio, "cros-ec-irq");
88364387 1190 gpio_direction_input(dev->ec_int.gpio);
84d6cbd3 1191 }
88364387
HT
1192
1193 if (cros_ec_check_version(dev)) {
1194 debug("%s: Could not detect CROS-EC version\n", __func__);
1195 return -CROS_EC_ERR_CHECK_VERSION;
1196 }
1197
1198 if (cros_ec_read_id(dev, id, sizeof(id))) {
1199 debug("%s: Could not read KBC ID\n", __func__);
1200 return -CROS_EC_ERR_READ_ID;
1201 }
1202
1203 /* Remember this device for use by the cros_ec command */
84d6cbd3
SG
1204 *cros_ecp = dev;
1205#ifndef CONFIG_DM_CROS_EC
1206 last_dev = dev;
1207#endif
88364387
HT
1208 debug("Google Chrome EC CROS-EC driver ready, id '%s'\n", id);
1209
1210 return 0;
1211}
84d6cbd3 1212#endif
88364387 1213
88364387
HT
1214int cros_ec_decode_region(int argc, char * const argv[])
1215{
1216 if (argc > 0) {
1217 if (0 == strcmp(*argv, "rw"))
1218 return EC_FLASH_REGION_RW;
1219 else if (0 == strcmp(*argv, "ro"))
1220 return EC_FLASH_REGION_RO;
1221
1222 debug("%s: Invalid region '%s'\n", __func__, *argv);
1223 } else {
1224 debug("%s: Missing region parameter\n", __func__);
1225 }
1226
1227 return -1;
1228}
1229
84d6cbd3
SG
1230int cros_ec_decode_ec_flash(const void *blob, int node,
1231 struct fdt_cros_ec *config)
d7f25f35 1232{
84d6cbd3 1233 int flash_node;
d7f25f35
SG
1234
1235 flash_node = fdt_subnode_offset(blob, node, "flash");
1236 if (flash_node < 0) {
1237 debug("Failed to find flash node\n");
1238 return -1;
1239 }
1240
1241 if (fdtdec_read_fmap_entry(blob, flash_node, "flash",
1242 &config->flash)) {
1243 debug("Failed to decode flash node in chrome-ec'\n");
1244 return -1;
1245 }
1246
1247 config->flash_erase_value = fdtdec_get_int(blob, flash_node,
1248 "erase-value", -1);
1249 for (node = fdt_first_subnode(blob, flash_node); node >= 0;
1250 node = fdt_next_subnode(blob, node)) {
1251 const char *name = fdt_get_name(blob, node, NULL);
1252 enum ec_flash_region region;
1253
1254 if (0 == strcmp(name, "ro")) {
1255 region = EC_FLASH_REGION_RO;
1256 } else if (0 == strcmp(name, "rw")) {
1257 region = EC_FLASH_REGION_RW;
1258 } else if (0 == strcmp(name, "wp-ro")) {
1259 region = EC_FLASH_REGION_WP_RO;
1260 } else {
1261 debug("Unknown EC flash region name '%s'\n", name);
1262 return -1;
1263 }
1264
1265 if (fdtdec_read_fmap_entry(blob, node, "reg",
1266 &config->region[region])) {
1267 debug("Failed to decode flash region in chrome-ec'\n");
1268 return -1;
1269 }
1270 }
1271
1272 return 0;
1273}
1274
b2a668b5
SG
1275int cros_ec_i2c_xfer(struct cros_ec_dev *dev, uchar chip, uint addr,
1276 int alen, uchar *buffer, int len, int is_read)
1277{
1278 union {
1279 struct ec_params_i2c_passthru p;
1280 uint8_t outbuf[EC_PROTO2_MAX_PARAM_SIZE];
1281 } params;
1282 union {
1283 struct ec_response_i2c_passthru r;
1284 uint8_t inbuf[EC_PROTO2_MAX_PARAM_SIZE];
1285 } response;
1286 struct ec_params_i2c_passthru *p = &params.p;
1287 struct ec_response_i2c_passthru *r = &response.r;
1288 struct ec_params_i2c_passthru_msg *msg = p->msg;
1289 uint8_t *pdata;
1290 int read_len, write_len;
1291 int size;
1292 int rv;
1293
1294 p->port = 0;
1295
1296 if (alen != 1) {
1297 printf("Unsupported address length %d\n", alen);
1298 return -1;
1299 }
1300 if (is_read) {
1301 read_len = len;
1302 write_len = alen;
1303 p->num_msgs = 2;
1304 } else {
1305 read_len = 0;
1306 write_len = alen + len;
1307 p->num_msgs = 1;
1308 }
1309
1310 size = sizeof(*p) + p->num_msgs * sizeof(*msg);
1311 if (size + write_len > sizeof(params)) {
1312 puts("Params too large for buffer\n");
1313 return -1;
1314 }
1315 if (sizeof(*r) + read_len > sizeof(response)) {
1316 puts("Read length too big for buffer\n");
1317 return -1;
1318 }
1319
1320 /* Create a message to write the register address and optional data */
1321 pdata = (uint8_t *)p + size;
1322 msg->addr_flags = chip;
1323 msg->len = write_len;
1324 pdata[0] = addr;
1325 if (!is_read)
1326 memcpy(pdata + 1, buffer, len);
1327 msg++;
1328
1329 if (read_len) {
1330 msg->addr_flags = chip | EC_I2C_FLAG_READ;
1331 msg->len = read_len;
1332 }
1333
1334 rv = ec_command(dev, EC_CMD_I2C_PASSTHRU, 0, p, size + write_len,
1335 r, sizeof(*r) + read_len);
1336 if (rv < 0)
1337 return rv;
1338
1339 /* Parse response */
1340 if (r->i2c_status & EC_I2C_STATUS_ERROR) {
1341 printf("Transfer failed with status=0x%x\n", r->i2c_status);
1342 return -1;
1343 }
1344
1345 if (rv < sizeof(*r) + read_len) {
1346 puts("Truncated read response\n");
1347 return -1;
1348 }
1349
1350 if (read_len)
1351 memcpy(buffer, r->data, read_len);
1352
1353 return 0;
1354}
1355
1c266b92
SG
1356#ifdef CONFIG_CMD_CROS_EC
1357
88364387
HT
1358/**
1359 * Perform a flash read or write command
1360 *
1361 * @param dev CROS-EC device to read/write
1362 * @param is_write 1 do to a write, 0 to do a read
1363 * @param argc Number of arguments
1364 * @param argv Arguments (2 is region, 3 is address)
1365 * @return 0 for ok, 1 for a usage error or -ve for ec command error
1366 * (negative EC_RES_...)
1367 */
1368static int do_read_write(struct cros_ec_dev *dev, int is_write, int argc,
1369 char * const argv[])
1370{
1371 uint32_t offset, size = -1U, region_size;
1372 unsigned long addr;
1373 char *endp;
1374 int region;
1375 int ret;
1376
1377 region = cros_ec_decode_region(argc - 2, argv + 2);
1378 if (region == -1)
1379 return 1;
1380 if (argc < 4)
1381 return 1;
1382 addr = simple_strtoul(argv[3], &endp, 16);
1383 if (*argv[3] == 0 || *endp != 0)
1384 return 1;
1385 if (argc > 4) {
1386 size = simple_strtoul(argv[4], &endp, 16);
1387 if (*argv[4] == 0 || *endp != 0)
1388 return 1;
1389 }
1390
1391 ret = cros_ec_flash_offset(dev, region, &offset, &region_size);
1392 if (ret) {
1393 debug("%s: Could not read region info\n", __func__);
1394 return ret;
1395 }
1396 if (size == -1U)
1397 size = region_size;
1398
1399 ret = is_write ?
1400 cros_ec_flash_write(dev, (uint8_t *)addr, offset, size) :
1401 cros_ec_flash_read(dev, (uint8_t *)addr, offset, size);
1402 if (ret) {
1403 debug("%s: Could not %s region\n", __func__,
1404 is_write ? "write" : "read");
1405 return ret;
1406 }
1407
1408 return 0;
1409}
1410
b2a668b5
SG
1411/**
1412 * get_alen() - Small parser helper function to get address length
1413 *
1414 * Returns the address length.
1415 */
1416static uint get_alen(char *arg)
1417{
1418 int j;
1419 int alen;
1420
1421 alen = 1;
1422 for (j = 0; j < 8; j++) {
1423 if (arg[j] == '.') {
1424 alen = arg[j+1] - '0';
1425 break;
1426 } else if (arg[j] == '\0') {
1427 break;
1428 }
1429 }
1430 return alen;
1431}
1432
1433#define DISP_LINE_LEN 16
1434
1435/*
1436 * TODO(sjg@chromium.org): This code copied almost verbatim from cmd_i2c.c
1437 * so we can remove it later.
1438 */
1439static int cros_ec_i2c_md(struct cros_ec_dev *dev, int flag, int argc,
1440 char * const argv[])
1441{
1442 u_char chip;
1443 uint addr, alen, length = 0x10;
1444 int j, nbytes, linebytes;
1445
1446 if (argc < 2)
1447 return CMD_RET_USAGE;
1448
1449 if (1 || (flag & CMD_FLAG_REPEAT) == 0) {
1450 /*
1451 * New command specified.
1452 */
1453
1454 /*
1455 * I2C chip address
1456 */
1457 chip = simple_strtoul(argv[0], NULL, 16);
1458
1459 /*
1460 * I2C data address within the chip. This can be 1 or
1461 * 2 bytes long. Some day it might be 3 bytes long :-).
1462 */
1463 addr = simple_strtoul(argv[1], NULL, 16);
1464 alen = get_alen(argv[1]);
1465 if (alen > 3)
1466 return CMD_RET_USAGE;
1467
1468 /*
1469 * If another parameter, it is the length to display.
1470 * Length is the number of objects, not number of bytes.
1471 */
1472 if (argc > 2)
1473 length = simple_strtoul(argv[2], NULL, 16);
1474 }
1475
1476 /*
1477 * Print the lines.
1478 *
1479 * We buffer all read data, so we can make sure data is read only
1480 * once.
1481 */
1482 nbytes = length;
1483 do {
1484 unsigned char linebuf[DISP_LINE_LEN];
1485 unsigned char *cp;
1486
1487 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
1488
1489 if (cros_ec_i2c_xfer(dev, chip, addr, alen, linebuf, linebytes,
1490 1))
1491 puts("Error reading the chip.\n");
1492 else {
1493 printf("%04x:", addr);
1494 cp = linebuf;
1495 for (j = 0; j < linebytes; j++) {
1496 printf(" %02x", *cp++);
1497 addr++;
1498 }
1499 puts(" ");
1500 cp = linebuf;
1501 for (j = 0; j < linebytes; j++) {
1502 if ((*cp < 0x20) || (*cp > 0x7e))
1503 puts(".");
1504 else
1505 printf("%c", *cp);
1506 cp++;
1507 }
1508 putc('\n');
1509 }
1510 nbytes -= linebytes;
1511 } while (nbytes > 0);
1512
1513 return 0;
1514}
1515
1516static int cros_ec_i2c_mw(struct cros_ec_dev *dev, int flag, int argc,
1517 char * const argv[])
1518{
1519 uchar chip;
1520 ulong addr;
1521 uint alen;
1522 uchar byte;
1523 int count;
1524
1525 if ((argc < 3) || (argc > 4))
1526 return CMD_RET_USAGE;
1527
1528 /*
1529 * Chip is always specified.
1530 */
1531 chip = simple_strtoul(argv[0], NULL, 16);
1532
1533 /*
1534 * Address is always specified.
1535 */
1536 addr = simple_strtoul(argv[1], NULL, 16);
1537 alen = get_alen(argv[1]);
1538 if (alen > 3)
1539 return CMD_RET_USAGE;
1540
1541 /*
1542 * Value to write is always specified.
1543 */
1544 byte = simple_strtoul(argv[2], NULL, 16);
1545
1546 /*
1547 * Optional count
1548 */
1549 if (argc == 4)
1550 count = simple_strtoul(argv[3], NULL, 16);
1551 else
1552 count = 1;
1553
1554 while (count-- > 0) {
1555 if (cros_ec_i2c_xfer(dev, chip, addr++, alen, &byte, 1, 0))
1556 puts("Error writing the chip.\n");
1557 /*
1558 * Wait for the write to complete. The write can take
1559 * up to 10mSec (we allow a little more time).
1560 */
1561/*
1562 * No write delay with FRAM devices.
1563 */
1564#if !defined(CONFIG_SYS_I2C_FRAM)
1565 udelay(11000);
1566#endif
1567 }
1568
1569 return 0;
1570}
1571
1572/* Temporary code until we have driver model and can use the i2c command */
1573static int cros_ec_i2c_passthrough(struct cros_ec_dev *dev, int flag,
1574 int argc, char * const argv[])
1575{
1576 const char *cmd;
1577
1578 if (argc < 1)
1579 return CMD_RET_USAGE;
1580 cmd = *argv++;
1581 argc--;
1582 if (0 == strcmp("md", cmd))
1583 cros_ec_i2c_md(dev, flag, argc, argv);
1584 else if (0 == strcmp("mw", cmd))
1585 cros_ec_i2c_mw(dev, flag, argc, argv);
1586 else
1587 return CMD_RET_USAGE;
1588
1589 return 0;
1590}
1591
88364387
HT
1592static int do_cros_ec(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
1593{
84d6cbd3
SG
1594 struct cros_ec_dev *dev;
1595#ifdef CONFIG_DM_CROS_EC
1596 struct udevice *udev;
1597#endif
88364387
HT
1598 const char *cmd;
1599 int ret = 0;
1600
1601 if (argc < 2)
1602 return CMD_RET_USAGE;
1603
1604 cmd = argv[1];
1605 if (0 == strcmp("init", cmd)) {
84d6cbd3 1606#ifndef CONFIG_DM_CROS_EC
88364387
HT
1607 ret = cros_ec_init(gd->fdt_blob, &dev);
1608 if (ret) {
1609 printf("Could not init cros_ec device (err %d)\n", ret);
1610 return 1;
1611 }
84d6cbd3 1612#endif
88364387
HT
1613 return 0;
1614 }
1615
84d6cbd3
SG
1616#ifdef CONFIG_DM_CROS_EC
1617 ret = uclass_get_device(UCLASS_CROS_EC, 0, &udev);
1618 if (ret) {
1619 printf("Cannot get cros-ec device (err=%d)\n", ret);
1620 return 1;
1621 }
1622 dev = udev->uclass_priv;
1623#else
88364387
HT
1624 /* Just use the last allocated device; there should be only one */
1625 if (!last_dev) {
1626 printf("No CROS-EC device available\n");
1627 return 1;
1628 }
84d6cbd3
SG
1629 dev = last_dev;
1630#endif
88364387
HT
1631 if (0 == strcmp("id", cmd)) {
1632 char id[MSG_BYTES];
1633
1634 if (cros_ec_read_id(dev, id, sizeof(id))) {
1635 debug("%s: Could not read KBC ID\n", __func__);
1636 return 1;
1637 }
1638 printf("%s\n", id);
1639 } else if (0 == strcmp("info", cmd)) {
836bb6e8 1640 struct ec_response_mkbp_info info;
88364387
HT
1641
1642 if (cros_ec_info(dev, &info)) {
1643 debug("%s: Could not read KBC info\n", __func__);
1644 return 1;
1645 }
1646 printf("rows = %u\n", info.rows);
1647 printf("cols = %u\n", info.cols);
1648 printf("switches = %#x\n", info.switches);
1649 } else if (0 == strcmp("curimage", cmd)) {
1650 enum ec_current_image image;
1651
1652 if (cros_ec_read_current_image(dev, &image)) {
1653 debug("%s: Could not read KBC image\n", __func__);
1654 return 1;
1655 }
1656 printf("%d\n", image);
1657 } else if (0 == strcmp("hash", cmd)) {
1658 struct ec_response_vboot_hash hash;
1659 int i;
1660
1661 if (cros_ec_read_hash(dev, &hash)) {
1662 debug("%s: Could not read KBC hash\n", __func__);
1663 return 1;
1664 }
1665
1666 if (hash.hash_type == EC_VBOOT_HASH_TYPE_SHA256)
1667 printf("type: SHA-256\n");
1668 else
1669 printf("type: %d\n", hash.hash_type);
1670
1671 printf("offset: 0x%08x\n", hash.offset);
1672 printf("size: 0x%08x\n", hash.size);
1673
1674 printf("digest: ");
1675 for (i = 0; i < hash.digest_size; i++)
1676 printf("%02x", hash.hash_digest[i]);
1677 printf("\n");
1678 } else if (0 == strcmp("reboot", cmd)) {
1679 int region;
1680 enum ec_reboot_cmd cmd;
1681
1682 if (argc >= 3 && !strcmp(argv[2], "cold"))
1683 cmd = EC_REBOOT_COLD;
1684 else {
1685 region = cros_ec_decode_region(argc - 2, argv + 2);
1686 if (region == EC_FLASH_REGION_RO)
1687 cmd = EC_REBOOT_JUMP_RO;
1688 else if (region == EC_FLASH_REGION_RW)
1689 cmd = EC_REBOOT_JUMP_RW;
1690 else
1691 return CMD_RET_USAGE;
1692 }
1693
1694 if (cros_ec_reboot(dev, cmd, 0)) {
1695 debug("%s: Could not reboot KBC\n", __func__);
1696 return 1;
1697 }
1698 } else if (0 == strcmp("events", cmd)) {
1699 uint32_t events;
1700
1701 if (cros_ec_get_host_events(dev, &events)) {
1702 debug("%s: Could not read host events\n", __func__);
1703 return 1;
1704 }
1705 printf("0x%08x\n", events);
1706 } else if (0 == strcmp("clrevents", cmd)) {
1707 uint32_t events = 0x7fffffff;
1708
1709 if (argc >= 3)
1710 events = simple_strtol(argv[2], NULL, 0);
1711
1712 if (cros_ec_clear_host_events(dev, events)) {
1713 debug("%s: Could not clear host events\n", __func__);
1714 return 1;
1715 }
1716 } else if (0 == strcmp("read", cmd)) {
1717 ret = do_read_write(dev, 0, argc, argv);
1718 if (ret > 0)
1719 return CMD_RET_USAGE;
1720 } else if (0 == strcmp("write", cmd)) {
1721 ret = do_read_write(dev, 1, argc, argv);
1722 if (ret > 0)
1723 return CMD_RET_USAGE;
1724 } else if (0 == strcmp("erase", cmd)) {
1725 int region = cros_ec_decode_region(argc - 2, argv + 2);
1726 uint32_t offset, size;
1727
1728 if (region == -1)
1729 return CMD_RET_USAGE;
1730 if (cros_ec_flash_offset(dev, region, &offset, &size)) {
1731 debug("%s: Could not read region info\n", __func__);
1732 ret = -1;
1733 } else {
1734 ret = cros_ec_flash_erase(dev, offset, size);
1735 if (ret) {
1736 debug("%s: Could not erase region\n",
1737 __func__);
1738 }
1739 }
1740 } else if (0 == strcmp("regioninfo", cmd)) {
1741 int region = cros_ec_decode_region(argc - 2, argv + 2);
1742 uint32_t offset, size;
1743
1744 if (region == -1)
1745 return CMD_RET_USAGE;
1746 ret = cros_ec_flash_offset(dev, region, &offset, &size);
1747 if (ret) {
1748 debug("%s: Could not read region info\n", __func__);
1749 } else {
1750 printf("Region: %s\n", region == EC_FLASH_REGION_RO ?
1751 "RO" : "RW");
1752 printf("Offset: %x\n", offset);
1753 printf("Size: %x\n", size);
1754 }
1755 } else if (0 == strcmp("vbnvcontext", cmd)) {
1756 uint8_t block[EC_VBNV_BLOCK_SIZE];
1757 char buf[3];
1758 int i, len;
1759 unsigned long result;
1760
1761 if (argc <= 2) {
1762 ret = cros_ec_read_vbnvcontext(dev, block);
1763 if (!ret) {
1764 printf("vbnv_block: ");
1765 for (i = 0; i < EC_VBNV_BLOCK_SIZE; i++)
1766 printf("%02x", block[i]);
1767 putc('\n');
1768 }
1769 } else {
1770 /*
1771 * TODO(clchiou): Move this to a utility function as
1772 * cmd_spi might want to call it.
1773 */
1774 memset(block, 0, EC_VBNV_BLOCK_SIZE);
1775 len = strlen(argv[2]);
1776 buf[2] = '\0';
1777 for (i = 0; i < EC_VBNV_BLOCK_SIZE; i++) {
1778 if (i * 2 >= len)
1779 break;
1780 buf[0] = argv[2][i * 2];
1781 if (i * 2 + 1 >= len)
1782 buf[1] = '0';
1783 else
1784 buf[1] = argv[2][i * 2 + 1];
1785 strict_strtoul(buf, 16, &result);
1786 block[i] = result;
1787 }
1788 ret = cros_ec_write_vbnvcontext(dev, block);
1789 }
1790 if (ret) {
1791 debug("%s: Could not %s VbNvContext\n", __func__,
1792 argc <= 2 ? "read" : "write");
1793 }
1794 } else if (0 == strcmp("test", cmd)) {
1795 int result = cros_ec_test(dev);
1796
1797 if (result)
1798 printf("Test failed with error %d\n", result);
1799 else
1800 puts("Test passed\n");
1801 } else if (0 == strcmp("version", cmd)) {
1802 struct ec_response_get_version *p;
1803 char *build_string;
1804
1805 ret = cros_ec_read_version(dev, &p);
1806 if (!ret) {
1807 /* Print versions */
1808 printf("RO version: %1.*s\n",
2ab83f0d 1809 (int)sizeof(p->version_string_ro),
88364387
HT
1810 p->version_string_ro);
1811 printf("RW version: %1.*s\n",
2ab83f0d 1812 (int)sizeof(p->version_string_rw),
88364387
HT
1813 p->version_string_rw);
1814 printf("Firmware copy: %s\n",
1815 (p->current_image <
1816 ARRAY_SIZE(ec_current_image_name) ?
1817 ec_current_image_name[p->current_image] :
1818 "?"));
1819 ret = cros_ec_read_build_info(dev, &build_string);
1820 if (!ret)
1821 printf("Build info: %s\n", build_string);
1822 }
1823 } else if (0 == strcmp("ldo", cmd)) {
1824 uint8_t index, state;
1825 char *endp;
1826
1827 if (argc < 3)
1828 return CMD_RET_USAGE;
1829 index = simple_strtoul(argv[2], &endp, 10);
1830 if (*argv[2] == 0 || *endp != 0)
1831 return CMD_RET_USAGE;
1832 if (argc > 3) {
1833 state = simple_strtoul(argv[3], &endp, 10);
1834 if (*argv[3] == 0 || *endp != 0)
1835 return CMD_RET_USAGE;
1836 ret = cros_ec_set_ldo(dev, index, state);
1837 } else {
1838 ret = cros_ec_get_ldo(dev, index, &state);
1839 if (!ret) {
1840 printf("LDO%d: %s\n", index,
1841 state == EC_LDO_STATE_ON ?
1842 "on" : "off");
1843 }
1844 }
1845
1846 if (ret) {
1847 debug("%s: Could not access LDO%d\n", __func__, index);
1848 return ret;
1849 }
b2a668b5
SG
1850 } else if (0 == strcmp("i2c", cmd)) {
1851 ret = cros_ec_i2c_passthrough(dev, flag, argc - 2, argv + 2);
88364387
HT
1852 } else {
1853 return CMD_RET_USAGE;
1854 }
1855
1856 if (ret < 0) {
1857 printf("Error: CROS-EC command failed (error %d)\n", ret);
1858 ret = 1;
1859 }
1860
1861 return ret;
1862}
1863
1864U_BOOT_CMD(
b2a668b5 1865 crosec, 6, 1, do_cros_ec,
88364387
HT
1866 "CROS-EC utility command",
1867 "init Re-init CROS-EC (done on startup automatically)\n"
1868 "crosec id Read CROS-EC ID\n"
1869 "crosec info Read CROS-EC info\n"
1870 "crosec curimage Read CROS-EC current image\n"
1871 "crosec hash Read CROS-EC hash\n"
1872 "crosec reboot [rw | ro | cold] Reboot CROS-EC\n"
1873 "crosec events Read CROS-EC host events\n"
1874 "crosec clrevents [mask] Clear CROS-EC host events\n"
1875 "crosec regioninfo <ro|rw> Read image info\n"
1876 "crosec erase <ro|rw> Erase EC image\n"
1877 "crosec read <ro|rw> <addr> [<size>] Read EC image\n"
1878 "crosec write <ro|rw> <addr> [<size>] Write EC image\n"
1879 "crosec vbnvcontext [hexstring] Read [write] VbNvContext from EC\n"
1880 "crosec ldo <idx> [<state>] Switch/Read LDO state\n"
1881 "crosec test run tests on cros_ec\n"
b2a668b5
SG
1882 "crosec version Read CROS-EC version\n"
1883 "crosec i2c md chip address[.0, .1, .2] [# of objects] - read from I2C passthru\n"
1884 "crosec i2c mw chip address[.0, .1, .2] value [count] - write to I2C passthru (fill)"
88364387
HT
1885);
1886#endif
84d6cbd3
SG
1887
1888#ifdef CONFIG_DM_CROS_EC
1889UCLASS_DRIVER(cros_ec) = {
1890 .id = UCLASS_CROS_EC,
1891 .name = "cros_ec",
1892 .per_device_auto_alloc_size = sizeof(struct cros_ec_dev),
1893};
1894#endif